JP4958840B2 - Signal processing device, receiving device - Google Patents

Signal processing device, receiving device Download PDF

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JP4958840B2
JP4958840B2 JP2008126334A JP2008126334A JP4958840B2 JP 4958840 B2 JP4958840 B2 JP 4958840B2 JP 2008126334 A JP2008126334 A JP 2008126334A JP 2008126334 A JP2008126334 A JP 2008126334A JP 4958840 B2 JP4958840 B2 JP 4958840B2
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良寛 湯浅
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On Semiconductor Trading Ltd
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Description

本発明は、信号処理装置、受信装置に関する。   The present invention relates to a signal processing device and a receiving device.

受信装置における弱電界時のノイズに対する聴感改善対策として、受信信号の電界強度が弱電界になったことをSメータで計測し、Sメータ計測値S−DCに応じて受信信号に基づく検波信号にミュート処理を施す手法が提案されている(例えば、以下に示す特許文献1を参照)。図12に示すように、弱電界において検波信号に重畳されるノイズレベルが増大することが知られており、弱電界を検出した際にミュート処理を施すことによって検波信号に重畳されたノイズレベルを抑圧することができ、この結果、良好な聴感を得ることができる。
特開平8−330984号公報
As a measure for improving the auditory sensation against noise at the time of a weak electric field in the receiving device, the fact that the electric field intensity of the received signal has become a weak electric field is measured with an S meter, and a detection signal based on the received signal is obtained according to the S meter measured value S-DC A method of performing a mute process has been proposed (see, for example, Patent Document 1 shown below). As shown in FIG. 12, it is known that the noise level superimposed on the detection signal in the weak electric field increases, and the noise level superimposed on the detection signal is reduced by performing a mute process when the weak electric field is detected. As a result, it is possible to obtain a good audibility.
JP-A-8-330984

ところで、受信アンテナの後段アンプによって、受信信号に重畳されたノイズが増幅される。この結果、図13に示すように、弱電界の際に、増幅されたノイズの影響でSメータ計測値S−DCが上昇する。とりわけ、車載用の受信装置の場合、出力が弱いガラスアンテナが主に用いられており、ガラスアンテナの後段アンプによって、Sメータ計測値S−DCのノイズによる上昇が顕著となる。すると、Sメータ計測値S−DCに基づいて弱電界である可能性の判別が困難となる為、弱電界の際のミュート処理が実行されず、聴感が劣化するという課題が生じてしまう。   By the way, the noise superimposed on the received signal is amplified by the subsequent amplifier of the receiving antenna. As a result, as shown in FIG. 13, the S meter measurement value S-DC rises due to the influence of the amplified noise when the electric field is weak. In particular, in the case of a vehicle-mounted receiving device, a glass antenna having a weak output is mainly used, and the increase due to noise of the S meter measurement value S-DC becomes significant due to the latter stage amplifier of the glass antenna. Then, since it becomes difficult to determine the possibility of a weak electric field based on the S meter measurement value S-DC, a mute process is not performed in the case of a weak electric field, resulting in a problem that hearing is deteriorated.

本発明のうちの主たる発明は、信号処理装置において、アンテナで受信される受信信号を周波数変換することにより得られる中間周波数信号に基づいて、前記受信信号を検波した検波信号を出力する検波部と、前記中間周波数信号のレベルが所定レベル未満となる度合を検出する検出部と、電界強度計で計測される電界強度が所定強度未満であるか否かを判別し、前記電界強度が前記所定強度未満であると判別した場合、前記度合が所定度合以上であるか否かを判別する判別部と、前記電界強度が前記所定電界強度未満であり、且つ、前記度合が前記所定度合以上であると前記判別部が判別した場合、前記度合に基づいて、前記検波信号に対するミュート量を算出する算出部と、前記算出部の算出結果に基づいて、前記検波信号に対するミュート処理を行う処理部と、を備えたことを特徴とする。 A main invention of the present invention is a signal processing apparatus, wherein a detection unit that outputs a detection signal obtained by detecting the reception signal based on an intermediate frequency signal obtained by frequency-converting the reception signal received by an antenna; the detection unit level of the intermediate frequency signal to detect the degree of less than the predetermined level, the electric field intensity measured by the electric field strength meter to determine whether it is less than a predetermined intensity, the electric field strength is predetermined When it is determined that the intensity is less than the intensity, a determination unit that determines whether the degree is equal to or greater than a predetermined degree , the electric field intensity is less than the predetermined electric field intensity , and the degree is equal to or greater than the predetermined degree when said determination unit has determined that, based on the degree, and a calculation unit for calculating a mute amount for the detection signal, based on the calculation result of the calculating unit, Myu to said detection signal A processing unit for performing preparative process, characterized by comprising a.

本発明によれば、電界強度が所定強度未満(弱電界)である時のミュート処理を適切に行う信号処理装置、受信装置を提供することができる。   According to the present invention, it is possible to provide a signal processing device and a receiving device that appropriately perform mute processing when the electric field strength is less than a predetermined strength (weak electric field).

===受信装置の全体構成===
図1乃至図3を用いて、本発明の一実施形態に係る受信装置1の構成を説明する。尚、受信装置1は、受信信号の電界強度が頻繁に変化する車載向けのFMラジオ受信装置の場合を想定しているが、その他に、ワンセグ対応携帯電話等に搭載されるFMラジオ受信装置の場合や、AMラジオ受信装置等の場合でもよい。
=== Overall Configuration of Receiving Apparatus ===
The configuration of the receiving apparatus 1 according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3. The receiving device 1 is assumed to be an in-vehicle FM radio receiving device in which the electric field strength of the received signal changes frequently. In addition, the receiving device 1 is an FM radio receiving device mounted on a one-segment mobile phone or the like. Or an AM radio receiver or the like.

受信装置1は、図1に示す下記の構成を備える。
ガラスアンテナ10(アンテナ)は、自動車用の窓ガラスに組み込まれたアンテナであり、希望周波数に同調されたアナログ受信信号を受信する。
The receiving device 1 has the following configuration shown in FIG.
The glass antenna 10 (antenna) is an antenna incorporated in a window glass for an automobile and receives an analog reception signal tuned to a desired frequency.

周波数変換器20は、アナログ受信信号を高周波増幅して得られるアナログRF信号に対して局部発振信号を混合させることで、アナログRF信号をアナログ中間周波数信号IF_Aに変換する。尚、アナログ受信信号の希望周波数と局部発振回路の発振周波数との差が中間周波数である。
IF増幅器30は、周波数変換器20より出力されるアナログ中間周波数信号IF_Aを増幅して、アナログ中間周波数信号IF_Bを得る。
Sメータ40(電界強度計)は、IF増幅器30より出力されるアナログ中間周波数信号IF_Bの電界強度を計測してアナログSメータ計測値S_DC(A)を出力する電界強度計である。
The frequency converter 20 converts the analog RF signal into the analog intermediate frequency signal IF_A by mixing the local oscillation signal with the analog RF signal obtained by high-frequency amplification of the analog reception signal. The difference between the desired frequency of the analog reception signal and the oscillation frequency of the local oscillation circuit is the intermediate frequency.
The IF amplifier 30 amplifies the analog intermediate frequency signal IF_A output from the frequency converter 20 to obtain an analog intermediate frequency signal IF_B.
The S meter 40 (field strength meter) is a field strength meter that measures the field strength of the analog intermediate frequency signal IF_B output from the IF amplifier 30 and outputs an analog S meter measurement value S_DC (A).

DSP(Digital Signal Processor)100(信号処理装置)は、図1に示す下記の構成を備える。尚、AD変換器102、104とDA変換器118以外の構成は、DSP100のDSPコアが実行するプログラムの各機能である。
AD変換器102は、IF増幅器30より出力されるアナログ中間周波数信号IF_BをAD変換してデジタル中間周波数信号IF_Dを出力する。
AD変換器103は、Sメータ40から出力されるアナログSメータ計測値S_DC(A)をAD変換してデジタルSメータ計測値S_DC(D)を出力する。
直交変換部104は、AD変換器102より出力されるデジタル中間周波数信号IF_Dを直交変換してデジタルI信号IF_IとデジタルQ信号IF_Qとを出力する。
A DSP (Digital Signal Processor) 100 (signal processing apparatus) has the following configuration shown in FIG. The components other than the AD converters 102 and 104 and the DA converter 118 are functions of a program executed by the DSP core of the DSP 100.
The AD converter 102 AD converts the analog intermediate frequency signal IF_B output from the IF amplifier 30 and outputs a digital intermediate frequency signal IF_D.
The AD converter 103 AD converts the analog S meter measurement value S_DC (A) output from the S meter 40 and outputs a digital S meter measurement value S_DC (D).
The orthogonal transform unit 104 orthogonally transforms the digital intermediate frequency signal IF_D output from the AD converter 102 and outputs a digital I signal IF_I and a digital Q signal IF_Q.

FM検波部106(検波部)は、直交変換部104より出力されたデジタルI信号IF_IとデジタルQ信号IF_Qとに基づいてPLL(Phase Looked Loop)復調方式によるFM検波を行い、デジタルFM検波信号FM_OUTを出力する。また、FM検波部106は、PLL復調方式によるFM検波の過程でPLL検波部1062に入力される直前のデジタルIF信号を出力する。   The FM detection unit 106 (detection unit) performs FM detection by a PLL (Phase Looked Loop) demodulation method based on the digital I signal IF_I and the digital Q signal IF_Q output from the orthogonal transform unit 104, and performs a digital FM detection signal FM_OUT. Is output. Further, the FM detection unit 106 outputs a digital IF signal immediately before being input to the PLL detection unit 1062 in the process of FM detection by the PLL demodulation method.

ホール検波部108(検出部)は、デジタルIF信号に基づいてホール検波を行う。つまり、ホール検波部108は、デジタルIF信号のレベルが所定レベル未満になる度合を検出する。尚、ホールとは、図2に示すが如く、弱電界時において受信信号として支配的なランダムノイズの影響によってデジタルIF信号の包絡線に出現する谷間のことである。ホール検波の具体的な仕組みとしては、図3に示すが如く、デジタルIF信号に対して所定レベルの閾値Cを設定し、デジタルIF信号が閾値Cを連続して所定回数下回れば、弱電界である可能性を判定するためのカウントを行う。そして、そのカウント値は平滑化されてホール検出値HD_OUTとして出力される。当該ホール検出値HD_OUTは、ホールの落ち込み度合いやホールの発生頻度といった、デジタルIF信号のレベル低下度合いに関する総合的な指標として用いられる。   The hall detection unit 108 (detection unit) performs hall detection based on the digital IF signal. That is, the hall detector 108 detects the degree to which the level of the digital IF signal is less than a predetermined level. As shown in FIG. 2, a hole is a valley that appears in the envelope of a digital IF signal due to the influence of random noise that is dominant as a received signal in a weak electric field. As shown in FIG. 3, a specific mechanism of Hall detection is that a threshold C of a predetermined level is set for the digital IF signal, and if the digital IF signal continuously falls below the threshold C a predetermined number of times, a weak electric field is generated. A count is performed to determine the possibility. The count value is smoothed and output as a hole detection value HD_OUT. The hole detection value HD_OUT is used as a comprehensive index related to the degree of digital IF signal level reduction, such as the degree of hole drop and the frequency of hole occurrence.

ミュート信号生成部110(判別部、算出部)は、デジタルSメータ計測値S_DC(D)及びホール検出値HD_OUTを取得し、デジタルSメータ計測値S_DC(D)及びホール検出値HD_OUTに基づいて受信信号の電界強度が所定の電界強度を下回る弱電界であるか否かを判別する。その結果として、弱電界である可能性が低いと判別した場合、デジタルSメータ計測値S_DC(D)に基づくミュート量を算出し、弱電界である可能性が高いと判別した場合、デジタルSメータ計測値S_DC(D)及びホール検出値HD_OUTに基づくミュート量を算出する。そして、ミュート信号生成部110は、算定されたミュート量を設定したミュート信号M_Aを出力する。   The mute signal generation unit 110 (discriminating unit, calculation unit) acquires the digital S meter measurement value S_DC (D) and the hall detection value HD_OUT and receives them based on the digital S meter measurement value S_DC (D) and the hall detection value HD_OUT. It is determined whether the electric field strength of the signal is a weak electric field lower than a predetermined electric field strength. As a result, when it is determined that the possibility of a weak electric field is low, the mute amount based on the digital S meter measurement value S_DC (D) is calculated, and when it is determined that the possibility of a weak electric field is high, the digital S meter The mute amount based on the measured value S_DC (D) and the hole detection value HD_OUT is calculated. Then, the mute signal generator 110 outputs a mute signal M_A in which the calculated mute amount is set.

リミッタ部112は、ミュート信号生成部110より出力されたミュート信号M_Aのレベルを制限してミュート信号M_Bを出力する。
分圧部114は、リミッタ部112より出力されたミュート信号M_Bを分圧してミュート信号M_Cを出力する。
ミュート処理部116(処理部)は、分圧部114から出力されたミュート信号M_Cに基づいて、FM検波部106より出力されたデジタルFM検波信号FM_OUTをミュート処理する。
DA変換器118は、ミュート処理部116を介したデジタルFM検波信号FM_OUTをDA変換して低周波増幅器50へ出力する。そして、低周波増幅器50の出力によってスピーカ50が駆動される。
The limiter unit 112 limits the level of the mute signal M_A output from the mute signal generation unit 110 and outputs the mute signal M_B.
The voltage divider 114 divides the mute signal M_B output from the limiter unit 112 and outputs a mute signal M_C.
The mute processing unit 116 (processing unit) performs a mute process on the digital FM detection signal FM_OUT output from the FM detection unit 106 based on the mute signal M_C output from the voltage dividing unit 114.
The DA converter 118 DA-converts the digital FM detection signal FM_OUT that has passed through the mute processing unit 116 and outputs it to the low-frequency amplifier 50. The speaker 50 is driven by the output of the low frequency amplifier 50.

===ホール検波部の詳細構成===
図4乃至図7を用いて、本発明に係るホール検波部108の詳細構成について説明する。
=== Detailed Configuration of Hall Detection Unit ===
The detailed configuration of the Hall detector 108 according to the present invention will be described with reference to FIGS.

図4はホール検波部108の詳細構成を示した図である。
ホール検波部108は、FM検波部106からデジタルIF信号が入力される。尚、FM検波部106は、直交変換部104からのデジタルI信号IF_IとデジタルQ信号IF_Qとに基づいてPLL検波向けのデジタルIF信号を生成するIF処理部1060と、デジタルIF信号に基づきPLL検波による変調度の算出並びに復調処理を行ってデジタルFM検波信号FM_OUTを出力するPLL検波部1062と、を備える。
FIG. 4 is a diagram showing a detailed configuration of the hall detector 108.
The hall detector 108 receives the digital IF signal from the FM detector 106. The FM detection unit 106 generates an IF processing unit 1060 for generating a digital IF signal for PLL detection based on the digital I signal IF_I and the digital Q signal IF_Q from the orthogonal transform unit 104, and PLL detection based on the digital IF signal. A PLL detection unit 1062 that performs a modulation degree calculation and a demodulation process according to, and outputs a digital FM detection signal FM_OUT.

ホール検波部108は、図4に示す構成を備える。尚、ホール検出部1082は、本願請求項に係る「検出部」の一例であり、第1のカウンタ部1084及び第2のカウンタ部1086は、本願請求項に係る「カウンタ部」の一例であり、ループフィルタ部1088は、本願請求項に係る「平滑化部」の一例である。   The hall detector 108 has the configuration shown in FIG. The hole detection unit 1082 is an example of the “detection unit” according to the claims of the present application, and the first counter unit 1084 and the second counter unit 1086 are examples of the “counter unit” according to the claims of the present application. The loop filter unit 1088 is an example of the “smoothing unit” according to the claims of the present application.

ホール検出部1082(検出部)は、例えば、図5に示されるように、閾値C(図5に示す場合としては「0.1」)を格納するレジスタ120と、デジタルIF信号とレジスタ120に格納される閾値Cとを比較してデジタルIF信号が閾値Cを下回れば「1」を出力する比較演算部121と、比較演算部121の出力を順次遅延させる遅延処理部122a〜122fと、遅延処理部122a〜122fの各出力の論理積を演算してその結果をホール判定信号HDとして出力する論理積演算部123と、を備える。本構成により、ホール検出部1082は、デジタルIF信号が閾値Cとして「0.1」を連続して「7」回下回ればホールと判定して論理値1のホール判定信号HDを出力する。一方、それ以外の場合には論理値0のホール判定信号HDを出力する。   For example, as illustrated in FIG. 5, the hole detection unit 1082 (detection unit) stores a threshold 120 (“0.1” in the case illustrated in FIG. 5), a digital IF signal, and a register 120. A comparison operation unit 121 that outputs “1” if the digital IF signal falls below the threshold value C by comparing with the stored threshold value C, delay processing units 122 a to 122 f that sequentially delay the output of the comparison operation unit 121, and a delay A logical product operation unit 123 that calculates a logical product of the outputs of the processing units 122a to 122f and outputs the result as a hall determination signal HD. With this configuration, the hole detection unit 1082 determines a hole and outputs a hole determination signal HD having a logical value of 1 if the digital IF signal falls below “0.1” continuously by “7” times as the threshold C. On the other hand, in other cases, a hall determination signal HD having a logical value of 0 is output.

第1のカウンタ部1084(カウント部)は、例えば、図6に示されるように、「0」を格納するレジスタ130と、「1」を格納するレジスタ131と、比較演算部136より出力されるカウンタ出力HD_Cに基づいてレジスタ130に格納された「0」又は累積加算部132からの「1」の累積加算出力を選択して出力するスイッチ部133と、スイッチ部133の出力を1サンプリング周期遅延させる遅延処理部134と、レジスタ131に格納された「1」と遅延処理部134との出力とを加算する累積加算部132と、「199(1サンプリング周期の199倍)」を格納するレジスタ135と、遅延処理部134の出力とレジスタ135に格納された「199」とを比較して遅延処理部134の出力が「199」以上となれば「1」のカウンタ出力HD_Cを出力する比較演算部136と、を備える。本構成により、第1のカウンタ部1084は、200カウントする毎に「1」のカウンタ出力HD_Cを出力し、スイッチ部133の出力は200カウントする毎に「0」にリセットされる。   For example, as illustrated in FIG. 6, the first counter unit 1084 (count unit) is output from the register 130 that stores “0”, the register 131 that stores “1”, and the comparison operation unit 136. Based on the counter output HD_C, “0” stored in the register 130 or “1” accumulated addition output from the accumulation adding unit 132 is selected and output, and the output of the switch 133 is delayed by one sampling period The delay processing unit 134 to be added, the cumulative addition unit 132 that adds “1” stored in the register 131 and the output of the delay processing unit 134, and the register 135 that stores “199 (199 times one sampling period)”. If the output of the delay processing unit 134 is compared with “199” stored in the register 135 and the output of the delay processing unit 134 is “199” or more, It includes a comparison operation unit 136 outputs the counter output HD_C 1 ", the. With this configuration, the first counter unit 1084 outputs a counter output HD_C of “1” every 200 counts, and the output of the switch unit 133 is reset to “0” every 200 counts.

第2のカウンタ部1086(カウント部)は、例えば、図6に示されるように、「0」を格納するレジスタ140と、第1のカウンタ部1084より出力されるカウンタ出力HD_Cに基づいてレジスタ140に格納された「0」又は累積加算部143からのホール判定信号HDの累積加算出力を選択して出力するスイッチ部141と、スイッチ部141の出力を1サンプリング周期遅延させる遅延処理部142と、ホール判定信号HDを累積加算してカウンタ出力HD_Sを出力する累積加算部143と、を備える。本構成により、第2のカウンタ部1086は、ホール判定信号HDのサンプリング周波数を「1/200」倍にダウンサンプリングすることになる(例えば、サンプリング周波数が「8.82(MHz)」から「44.1(kHz)」に変換される)。また、カウンタ出力HD_Sは、所定期間(本実施形態の場合では200サンプリング周期)あたりでのホールの落ち込み度合いやホールの発生頻度を表すことになる。   For example, as illustrated in FIG. 6, the second counter unit 1086 (count unit) includes a register 140 that stores “0” and a register 140 based on the counter output HD_C output from the first counter unit 1084. The switch unit 141 that selects and outputs “0” or the cumulative addition output of the hall determination signal HD from the cumulative addition unit 143, and the delay processing unit 142 that delays the output of the switch unit 141 by one sampling period, A cumulative addition unit 143 that cumulatively adds the hall determination signal HD and outputs a counter output HD_S. With this configuration, the second counter unit 1086 down-samples the sampling frequency of the hall determination signal HD by “1/200” times (for example, the sampling frequency is “8.82 (MHz)” to “44”. .1 (kHz) "). Further, the counter output HD_S represents the degree of hole drop and the occurrence frequency of holes per predetermined period (in the case of the present embodiment, 200 sampling periods).

ループフィルタ部1088(平滑化部)は、例えば、図7に示されるように、第2のカウンタ部1086から出力されたカウンタ出力HD_SをゲインK(=2のn乗;nはパラメータで可変)倍する増幅部151と、増幅部151の出力と減算部155の出力とを加算する加算部152と、加算部152の出力と1サンプリング周期遅延させてホール検出値HD_OUTを出力する遅延処理部153と、ホール検出値HD_OUTをゲインK倍する増幅部154と、ホール検出値HD_OUTから増幅部155の出力を減算する減算部155と、を備える。本構成により、ループフィルタ部1088は、カウンタ出力HD_Sの高周波成分を除去するLPF(Low Pass Filter)として機能する。   For example, as shown in FIG. 7, the loop filter unit 1088 (smoothing unit) converts the counter output HD_S output from the second counter unit 1086 to a gain K (= 2 to the nth power; n is variable by a parameter) Amplifying unit 151 for multiplying, adding unit 152 for adding the output of amplifying unit 151 and the output of subtracting unit 155, delay processing unit 153 for delaying the output of adding unit 152 by one sampling period and outputting hole detection value HD_OUT And an amplifying unit 154 that multiplies the hall detection value HD_OUT by a gain K, and a subtracting unit 155 that subtracts the output of the amplifying unit 155 from the hall detection value HD_OUT. With this configuration, the loop filter unit 1088 functions as an LPF (Low Pass Filter) that removes a high-frequency component of the counter output HD_S.

===DSPのミュート処理===
図8は、DSP100のミュート信号生成部110におけるミュート処理の流れを示すフローチャートである。尚、S800〜S802までの処理が、本願請求項に係る「弱電界判別部」の処理の一例であり、S803〜S805までの処理が、本願請求項に係る「ミュート量算出部」の処理の一例を表している。
=== Mute processing of DSP ===
FIG. 8 is a flowchart showing the flow of mute processing in the mute signal generation unit 110 of the DSP 100. The processing from S800 to S802 is an example of the processing of the “weak electric field determination unit” according to the claims of the present application, and the processing from S803 to S805 is the processing of the “mute amount calculation unit” of the claims of the present application. An example is shown.

ミュート信号生成部110は、Sメータ40からAD変換器103を介してデジタルSメータ計測値S_DC(D)と、ホール検波部108からホール検出値HD_OUTと、を取得した後(S800)、Sメータ計測値S_DC(D)がゼロレベルから所定の閾値D以下までの範囲内(以下、「ホール検出測定範囲内」と呼ぶ。)であるか否かを判定する(S801)。Sメータ計測値S_DC(D)が所定の閾値D以上となるホール検出測定範囲外のとき(S801:NO)、弱電界である可能性が低いと判別し、ホール検出値HD_OUTに応じたミュート量の算出を行わず、Sメータ計測値S_DC(D)に応じたミュート量の算出を行う(S803)。そして、ミュート信号生成部110は、当該ミュート量を設定したミュート信号M_Aを生成する。   The mute signal generation unit 110 acquires the digital S meter measurement value S_DC (D) from the S meter 40 via the AD converter 103 and the hall detection value HD_OUT from the hall detection unit 108 (S800), and then acquires the S meter. It is determined whether or not the measured value S_DC (D) is within a range from zero level to a predetermined threshold value D or less (hereinafter referred to as “hall detection measurement range”) (S801). When the S meter measurement value S_DC (D) is outside the hall detection measurement range where the threshold value D is equal to or greater than the predetermined threshold D (S801: NO), it is determined that the possibility of a weak electric field is low, and the mute amount corresponding to the hall detection value HD_OUT Is not calculated, and the mute amount is calculated in accordance with the S meter measurement value S_DC (D) (S803). Then, the mute signal generation unit 110 generates a mute signal M_A in which the mute amount is set.

一方、Sメータ計測値S_DC(D)がホール検出測定範囲内であれば(S801:YES)、ミュート信号生成部110は、つぎにホール検出値HD_OUTが閾値Aを上回るか否かを判定する(S802)。尚、図9に示すように、ホール検出値HD_OUTが安定するまでの所定期間T1の経過を待って、ミュート信号生成部110は、閾値Aを上回るか否かの判定を行う。   On the other hand, if the S meter measurement value S_DC (D) is within the hall detection measurement range (S801: YES), the mute signal generator 110 next determines whether or not the hall detection value HD_OUT exceeds the threshold A ( S802). As shown in FIG. 9, the mute signal generation unit 110 determines whether or not the threshold value A is exceeded after waiting for the elapse of a predetermined period T1 until the hole detection value HD_OUT is stabilized.

ホール検出値HD_OUTが閾値Aを下回れば(S802:NO)、弱電界である可能性が低いと判別し、ホール検出値HD_OUTに応じたミュート量の算出を行わず、Sメータ計測値S_DC(D)に応じたミュート量の算出を行う(S803)。そして、ミュート信号生成部110は、当該ミュート量を設定したミュート信号M_Aを生成する。   If the hall detection value HD_OUT falls below the threshold A (S802: NO), it is determined that the possibility of a weak electric field is low, and the mute amount is not calculated according to the hall detection value HD_OUT, and the S meter measurement value S_DC (D ) To calculate the amount of mute (S803). Then, the mute signal generation unit 110 generates a mute signal M_A in which the mute amount is set.

ホール検出値HD_OUTが閾値Aを上回れば(S802:YES)、弱電界である可能性が高いと判別し、ホール検出値HD_OUTに応じたミュート量の算出を行う(S804)。尚、このときのミュート量は、閾値Aから閾値Bまでの範囲内で0(dB)から飽和値(dB)まで線形的に変化し、閾値Bを超えると飽和値(dB)で一定となる関係式により算出する。   If the hole detection value HD_OUT exceeds the threshold A (S802: YES), it is determined that there is a high possibility of a weak electric field, and the mute amount is calculated according to the hole detection value HD_OUT (S804). Note that the amount of mute at this time linearly changes from 0 (dB) to the saturation value (dB) within the range from the threshold A to the threshold B, and when the threshold B is exceeded, the saturation value (dB) is constant. Calculated by the relational expression.

そして、ミュート信号生成部110は、ホール検出値HD_OUTに応じたミュート量に対し、Sメータ計測値S_DC(D)に応じたミュート量を加算し(S805)、その加算した結果を設定したミュート信号M_Aを生成する。   Then, the mute signal generation unit 110 adds the mute amount according to the S meter measurement value S_DC (D) to the mute amount according to the hall detection value HD_OUT (S805), and sets the result of the addition as a mute signal. M_A is generated.

図11は、各種ミュート処理のシミュレーション結果を示した図である。尚、同図において、一点鎖線(a)が電界強度に応じたホール検出値HD_OUTを表し、二点鎖線(b)がミュート処理を何ら行わない場合における電界強度に応じたデジタルFM検波信号FM_OUTを表し、点線(c)がSメータ計測値S_DC(D)に基づくミュート処理を行う場合における電界強度に応じたデジタルFM検波信号FM_OUTを表し、実線(d)がSメータ計測値S_DC(D)及びホール検出値HD_OUTに基づくミュート処理を行う場合における電界強度に応じたデジタルFM検波信号FM_OUTを表している。同図の結果より、Sメータ計測値S_DC(D)に基づくミュート処理単独の場合に比して、Sメータ計測値S_DC(D)及びホール検出値HD_OUTに基づくミュート処理を行う場合の方が、デジタルFM検波信号FM_OUTのレベルの低減化がより一層図られ、この結果、良好な聴感を得ることができる。   FIG. 11 is a diagram illustrating simulation results of various mute processes. In the figure, the alternate long and short dash line (a) represents the hole detection value HD_OUT corresponding to the electric field intensity, and the alternate long and two short dashes line (b) represents the digital FM detection signal FM_OUT corresponding to the electric field intensity when no mute processing is performed. The dotted line (c) represents the digital FM detection signal FM_OUT corresponding to the electric field strength when the mute processing based on the S meter measurement value S_DC (D) is performed, and the solid line (d) represents the S meter measurement value S_DC (D) and The digital FM detection signal FM_OUT corresponding to the electric field strength when the mute processing based on the hall detection value HD_OUT is performed is shown. From the results shown in FIG. 9, the mute processing based on the S meter measurement value S_DC (D) and the hall detection value HD_OUT is performed more than the mute processing based on the S meter measurement value S_DC (D) alone. The level of the digital FM detection signal FM_OUT is further reduced, and as a result, a good audibility can be obtained.

以上、本実施の形態について説明したが、前述した実施例は、本発明の理解を容易にするためのものであり、本発明を限定して解釈するためのものではない。本発明は、その趣旨を逸脱することなく、変更/改良され得るととともに、本発明にはその等価物も含まれる。   Although the present embodiment has been described above, the above-described examples are for facilitating the understanding of the present invention, and are not intended to limit the present invention. The present invention can be changed / improved without departing from the spirit thereof, and the present invention includes equivalents thereof.

本発明の受信装置の一実施形態に係る車載用の受信装置の構成を示した図である。It is the figure which showed the structure of the vehicle-mounted receiver which concerns on one Embodiment of the receiver of this invention. 本発明の実施形態に係る弱電界時のホールを説明するための図である。It is a figure for demonstrating the hole at the time of the weak electric field which concerns on embodiment of this invention. 本発明の実施形態に係るホール検出の仕組みを説明するための図である。It is a figure for demonstrating the mechanism of the hole detection which concerns on embodiment of this invention. 本発明の実施形態に係るホール検波部の構成を示した図である。It is the figure which showed the structure of the Hall detection part which concerns on embodiment of this invention. 本発明の実施形態に係るホール検出部の構成を示した図である。It is the figure which showed the structure of the hole detection part which concerns on embodiment of this invention. 本発明の実施形態に係るカウンタ部並びにダウンサンプリング部の構成を示した図である。It is the figure which showed the structure of the counter part which concerns on embodiment of this invention, and a downsampling part. 本発明の実施形態に係るループフィルタ部の構成を示した図である。It is the figure which showed the structure of the loop filter part which concerns on embodiment of this invention. 本発明の実施形態に係るDSPのミュート処理の流れを示すフローチャートである。It is a flowchart which shows the flow of the mute process of DSP which concerns on embodiment of this invention. 本発明の実施形態に係るホール検出値に応じたミュート処理を説明するための図である。It is a figure for demonstrating the mute process according to the hole detection value which concerns on embodiment of this invention. 本発明の実施形態に係るホール検出値に応じたミュート処理を説明するための図である。It is a figure for demonstrating the mute process according to the hole detection value which concerns on embodiment of this invention. 本発明の実施形態に係る各種ミュート処理のシミュレーション結果を示した図である。It is the figure which showed the simulation result of the various mute processes which concern on embodiment of this invention. ミュートの有無における弱電界時の検波信号及びノイズの変化を示した図である。It is the figure which showed the detection signal at the time of the weak electric field in the presence or absence of a mute, and the change of noise. 弱電界時におけるSメータ計測値を示した図である。It is the figure which showed the S meter measured value at the time of a weak electric field.

符号の説明Explanation of symbols

1 受信装置
10 ガラスアンテナ
20 周波数変換器
30 IF増幅器
40 Sメータ
100 DSP
106 FM検波部
108 ホール検波部
1082 ホール検出部
1084 第1のカウンタ部
1086 第2のカウンタ部
1088 ループフィルタ部
110 ミュート信号生成部
116 ミュート処理部
1 receiver 10 glass antenna 20 frequency converter 30 IF amplifier 40 S meter 100 DSP
106 FM detector 108 Hall detector 1082 Hall detector 1084 First counter unit 1086 Second counter unit 1088 Loop filter unit 110 Mute signal generator 116 Mute processor

Claims (5)

アンテナで受信される受信信号を周波数変換することにより得られる中間周波数信号に基づいて、前記受信信号を検波した検波信号を出力する検波部と、
前記中間周波数信号のレベルが所定レベル未満となる度合を検出する検出部と
界強度計で計測される電界強度が所定強度未満であるか否かを判別し、前記電界強度が前記所定強度未満であると判別した場合、前記度合が所定度合以上であるか否かを判別する判別部と、
前記電界強度が前記所定電界強度未満であり、且つ、前記度合が前記所定度合以上であると前記判別部が判別した場合、前記度合に基づいて、前記検波信号に対するミュート量を算出する算出部と、
前記算出部の算出結果に基づいて、前記検波信号に対するミュート処理を行う処理部と、
を備えたことを特徴とする信号処理装置。
A detection unit that outputs a detection signal obtained by detecting the reception signal based on an intermediate frequency signal obtained by frequency-converting the reception signal received by the antenna;
A detector that detects the degree to which the level of the intermediate frequency signal is less than a predetermined level ;
Field intensity measured by the electric field strength meter to determine whether it is less than the predetermined intensity, when the field strength is determined to the less than predetermined intensity, the degree to or greater than the predetermined degree A discriminator for discriminating;
A calculation unit that calculates a mute amount for the detection signal based on the degree when the determination unit determines that the electric field intensity is less than the predetermined electric field intensity and the degree is equal to or greater than the predetermined degree ; ,
A processing unit that performs a mute process on the detection signal based on a calculation result of the calculation unit;
A signal processing apparatus comprising:
前記検出部は、前記中間周波数信号のレベルが前記所定レベル未満になる回数に応じた値を有する前記度合を示す検出信号を出力し、
前記算出部は、前記検出信号に基づいて前記ミュート量を算出する
ことを特徴とする請求項1に記載の信号処理装置。
The detection unit outputs a detection signal indicating the degree having a value corresponding to the number of times the level of the intermediate frequency signal becomes less than the predetermined level,
The signal processing apparatus according to claim 1, wherein the calculation unit calculates the mute amount based on the detection signal.
前記算出部は、前記検出部の検出結果及び前記電界強度に基づいて前記ミュート量を算出する
ことを特徴とする請求項1に記載の信号処理装置。
The signal processing apparatus according to claim 1, wherein the calculation unit calculates the mute amount based on a detection result of the detection unit and the electric field strength.
前記検出部は、
前記中間周波数信号のレベルが前記所定レベル未満になることに応じてカウントを行うカウント部と、
前記カウント部のカウント値を平滑化することにより前記度合を示す検出信号を出力する平滑化部と、
を有することを特徴とする請求項1に記載の信号処理装置。
The detector is
A counting unit that counts when the level of the intermediate frequency signal becomes less than the predetermined level;
A smoothing unit that outputs a detection signal indicating the degree by smoothing the count value of the counting unit;
The signal processing apparatus according to claim 1, comprising:
アンテナで受信される受信信号を中間周波数信号に周波数変換する周波数変換器と、
前記中間周波数信号に基づいて、前記受信信号を検波した検波信号を出力する検波部と、
前記中間周波数信号のレベルが所定レベル未満となる度合を検出する検出部と
界強度計で計測される電界強度が所定強度未満であるか否かを判別し、前記電界強度が前記所定強度未満であると判別した場合、前記度合が所定度合以上であるか否かを判別する判別部と、
前記電界強度が前記所定電界強度未満であり、且つ、前記度合が前記所定度合以上であると前記判別部が判別した場合、前記度合に基づいて、前記検波信号に対するミュート量を算出する算出部と、
前記算出部の算出結果に基づいて、前記検波信号に対するミュート処理を行う処理部と、を有する
ことを特徴とする受信装置。
A frequency converter that converts the received signal received by the antenna into an intermediate frequency signal;
A detection unit that outputs a detection signal obtained by detecting the reception signal based on the intermediate frequency signal;
A detector that detects the degree to which the level of the intermediate frequency signal is less than a predetermined level ;
Field intensity measured by the electric field strength meter to determine whether it is less than the predetermined intensity, when the field strength is determined to the less than predetermined intensity, the degree to or greater than the predetermined degree A discriminator for discriminating;
A calculation unit that calculates a mute amount for the detection signal based on the degree when the determination unit determines that the electric field intensity is less than the predetermined electric field intensity and the degree is equal to or greater than the predetermined degree ; ,
And a processing unit that performs a mute process on the detection signal based on a calculation result of the calculation unit.
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