JP4901112B2 - 帯域デルタ−シグマ・アナログ−デジタル変換器 - Google Patents
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- 238000001228 spectrum Methods 0.000 claims description 21
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- 238000006243 chemical reaction Methods 0.000 claims description 10
- 238000001914 filtration Methods 0.000 claims description 3
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 108091022873 acetoacetate decarboxylase Proteins 0.000 description 63
- 238000013139 quantization Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000007493 shaping process Methods 0.000 description 3
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M50/00—Constructional details or processes of manufacture of the non-active parts of electrochemical cells other than fuel cells, e.g. hybrid cells
- H01M50/30—Arrangements for facilitating escape of gases
- H01M50/342—Non-re-sealable arrangements
- H01M50/3425—Non-re-sealable arrangements in the form of rupturable membranes or weakened parts, e.g. pierced with the aid of a sharp member
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
- H04B1/0025—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage using a sampling rate lower than twice the highest frequency component of the sampled signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/402—Arrangements specific to bandpass modulators
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M2200/00—Safety devices for primary or secondary batteries
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M50/00—Constructional details or processes of manufacture of the non-active parts of electrochemical cells other than fuel cells, e.g. hybrid cells
- H01M50/10—Primary casings; Jackets or wrappings
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
- H03M3/464—Details of the digital/analogue conversion in the feedback path
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
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- Compression, Expansion, Code Conversion, And Decoders (AREA)
Description
いくつかの従来のΔ−ΣADCは、高いサンプリング周波数、例えばアナログ入力信号の中心搬送波周波数の4倍のサンプリング周波数で、4次のループ・フィルタおよび量子化器を使用する。
図において、同様な参照数字は同様な機能を有する特徴を示す。
図2を参照すると、データ受信機の実施形態は、アンテナ10、アナログ回路11およびデジタル回路12を含む。受信機のアンテナ10は、捕獲された変調搬送波を、アナログ回路11の入力ポート14でアナログ入力信号に変換する。アナログ回路11は、アナログ入力信号のアナログ−デジタル変換を行なって、一連の規則正しい間隔で配列された中間デジタル信号を出力ポート15に生成する。デジタル回路12は、主に、この一連の中間デジタル信号に対して、すなわちデジタル領域で、データ処理を行なう。例示の主要なデータ処理には、通常、量子化雑音の低いデータ搬送ベース・バンド信号を生成することがある。デジタル回路12は、出力ポート13からデジタル・ベース・バンド・データ・ストリームを出力する。
図6Aにおいて、グラフ50、52、54、56はNTF極の最大半径がDA変換器28の利得K1でどのように変化するかを示す。グラフ50および52は、それぞれ、NRZ型アナログ帰還信号および0.5のデューティ・サイクルを有するRZ型アナログ帰還パルスに対応する。NRZアナログ帰還信号と0.5のデューティ・サイクルを有するRZアナログ帰還パルスの両方について、K1の全ての値が1よりも大きな半径を持つNTF極を生成する。したがって、この型のアナログ帰還信号を使用するΔ−ΣADCは、動作不安定性を有するかもしれない。グラフ54および56は、それぞれ、1/3および1/4のデューティ・サイクルを有するRZ型アナログ帰還パルスに対応する。この型のアナログ帰還パルスの各々について、全てのNTF極が1よりも小さな半径を有する利得K1の範囲が常にある。1/3のデューティ・サイクルを有するRZアナログ帰還パルスの場合、近似の範囲[1.5、4.1]のK1値が、1よりも大きな半径のNTF極を生成することはない。同様に、1/4のデューティ・サイクルを有するRZアナログ帰還パルスの場合、範囲[0、4.8]のK1値が、1よりも大きな半径のNTF極を生成することはない。
この出願の明細書、図面および特許請求の範囲を考慮に入れて、本発明の他の実施形態が当業者には明らかになるであろう。
Claims (7)
- アナログ入力信号から得られたアナログ信号をろ波するように構成されたアナログ帯域ループ・フィルタであって、中心帯域周波数を有するアナログ帯域ループ・フィルタと、
前記ループ・フィルタからの前記ろ波されたアナログ信号をサンプリング周波数でサンプリングして、一連のデジタル信号を生成するように構成された量子化器と、
ディジタル−アナログ変換器とを備えた、アナログ入力信号を変換するためのデルタ−シグマ・アナログ−デジタル変換器を備えた装置であって、
前記一連のデジタル信号がデータ搬送周波数スペクトルを有し、このスペクトルは、前記アナログ入力信号の有するデータ搬送周波数スペクトルの鏡像であり、前記一連のデジタル信号のデータ搬送スペクトルが、前記中心帯域周波数とゼロの間にあり、および
該ディジタル−アナログ変換器は、該サンプリング周波数で一連のアナログ帰還信号を生成するように構成され、これにより、アナログ帰還信号の各々が、0.5以下のデューティ・サイクルを持ち、該一連のデジタル信号の1つに対応するようにした装置。 - 請求項1に記載の装置において、前記サンプリング周波数がfsであり、前記ループ・フィルタの前記中心帯域周波数がfcであり、さらにfs=(4/3)fc±10%である装置。
- 請求項1に記載の装置において、前記ループ・フィルタが4以上の次数を有する装置。
- 請求項1に記載の装置において、前記デジタル信号を受け取るように結合され、かつ前記ループ・フィルタの通過帯域の低い方の端より上の周波数を除去するように構成されたデジタル復調器をさらに備える装置。
- 請求項1に記載の装置において、
前記アナログ帯域ループ・フィルタが、前記アナログ帰還信号をアナログ入力信号と順次に結合して前記アナログ入力信号から得られたアナログ信号をろ波するように構成されている装置。 - アナログ入力信号を、データ搬送帯域を有する一連のデジタル信号に変換するために、データ搬送帯域を有するアナログ入力信号をデルタ−シグマ・アナログ−デジタル変換器に送信する工程と、
変更アナログ信号を中心帯域周波数を有するループ・フィルタでろ波する工程と、
前記ろ波された変更アナログ信号をサンプリングして、前記一連のデジタル信号を生成する工程と、
前記一連のデジタル出力信号のデジタル−アナログ変換を行なって、0.5以下のデューティ・サイクルを持つアナログ帰還信号を順次に生成する工程と、
前記アナログ帰還信号をアナログ入力信号と順次に結合することにより、前記ループ・フィルタでろ波される、前記変更アナログ信号を生成する工程とを含む方法であって、
前記一連のデジタル信号がデータ搬送周波数スペクトルを有し、このスペクトルは、前記アナログ入力信号の有するデータ搬送周波数スペクトルの鏡像であり、前記一連のデジタル信号のデータ搬送スペクトルが、前記中心帯域周波数とゼロの間にある方法。 - 請求項6に記載の方法において、前記ループ・フィルタが、4以上の次数を有する方法。
Applications Claiming Priority (2)
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US10/789,681 US7126516B2 (en) | 2004-02-28 | 2004-02-28 | Bandpass delta-sigma analog-to-digital converters |
US10/789681 | 2004-02-28 |
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JP2005244993A JP2005244993A (ja) | 2005-09-08 |
JP2005244993A5 JP2005244993A5 (ja) | 2008-04-17 |
JP4901112B2 true JP4901112B2 (ja) | 2012-03-21 |
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JP2005052533A Active JP4901112B2 (ja) | 2004-02-28 | 2005-02-28 | 帯域デルタ−シグマ・アナログ−デジタル変換器 |
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US (1) | US7126516B2 (ja) |
EP (1) | EP1569345B1 (ja) |
JP (1) | JP4901112B2 (ja) |
KR (1) | KR101149773B1 (ja) |
DE (1) | DE602005000134T2 (ja) |
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US7706495B2 (en) * | 2004-03-12 | 2010-04-27 | Panasonic Corporation | Two-point frequency modulation apparatus |
FR2880482B1 (fr) * | 2004-12-30 | 2007-04-27 | Cit Alcatel | Dispositif de conversion d'un signal transmis en un signal numerique |
US7821437B1 (en) * | 2009-04-08 | 2010-10-26 | Rosemount Inc. | Line noise analysis and detection and measurement error reduction |
US8094051B2 (en) * | 2009-05-07 | 2012-01-10 | Imec | Sigma-delta-based analog-to-digital converter |
CN106416081B (zh) * | 2014-06-20 | 2018-05-15 | Hrl实验室有限责任公司 | 交织调制器 |
EP3091668A1 (en) | 2015-05-05 | 2016-11-09 | CommScope Technologies LLC | Receiver arrangement for use in a digital repeater system |
CN110504969B (zh) * | 2018-05-18 | 2023-03-24 | 创意电子股份有限公司 | 模拟数字转换器装置与待测信号产生方法 |
US10862504B2 (en) * | 2018-08-29 | 2020-12-08 | Mediatek Singapore Pte. Ltd. | Radio frequency bandpass delta-sigma analog-to-digital converters and related methods |
US11821731B2 (en) * | 2020-08-19 | 2023-11-21 | Invensense, Inc. | Minimizing a delay of a capacitance-to-voltage converter of a gyroscope by including such converter within a bandpass sigma-delta analog-to-digital converter of the gyroscope |
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US4509037A (en) * | 1981-06-12 | 1985-04-02 | Gould Inc. | Enhanced delta modulation encoder |
FR2702902B1 (fr) * | 1993-03-15 | 1995-04-21 | Alcatel Radiotelephone | Récepteur numérique à fréquence intermédiaire et procédé de filtrage en bande de base mis en Óoeuvre dans ce récepteur. |
GB2278247A (en) | 1993-05-17 | 1994-11-23 | Nat Science Council | Chopper-stabilized sigma-delta converter |
US6087969A (en) * | 1998-04-27 | 2000-07-11 | Motorola, Inc. | Sigma-delta modulator and method for digitizing a signal |
US6459743B1 (en) | 1998-08-07 | 2002-10-01 | Telefonaktiebolaget Lm Ericsson (Publ) | Digital reception with radio frequency sampling |
US6469649B1 (en) * | 2000-03-08 | 2002-10-22 | Massachusetts Institute Of Technology | Narrowband analog to digital converter with suppressed second-order distortion |
US6538588B1 (en) * | 2000-09-18 | 2003-03-25 | Qualcomm, Incorporated | Multi-sampling Σ-Δ analog-to-digital converter |
US6518905B2 (en) * | 2000-12-21 | 2003-02-11 | Wright State University | Parallel time interleaved delta sigma modulator |
JP2002344321A (ja) * | 2001-05-16 | 2002-11-29 | Pioneer Electronic Corp | デルタシグマ型ad変換器 |
US6778116B1 (en) * | 2003-02-25 | 2004-08-17 | Northrop Grumman Corporation | Switching DAC pulse encoding circuit |
US6693573B1 (en) | 2003-03-19 | 2004-02-17 | Raytheon Company | Mixed technology MEMS/BiCMOS LC bandpass sigma-delta for direct RF sampling |
US6977602B1 (en) * | 2004-07-13 | 2005-12-20 | Maxim Integrated Products, Inc. | Wide band digital to analog converters and methods, including converters with selectable impulse response |
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- 2004-02-28 US US10/789,681 patent/US7126516B2/en not_active Expired - Lifetime
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- 2005-02-15 DE DE602005000134T patent/DE602005000134T2/de active Active
- 2005-02-15 EP EP05250868A patent/EP1569345B1/en active Active
- 2005-02-18 KR KR1020050013748A patent/KR101149773B1/ko active IP Right Grant
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DE602005000134D1 (de) | 2006-11-02 |
DE602005000134T2 (de) | 2007-09-13 |
KR20060042102A (ko) | 2006-05-12 |
US7126516B2 (en) | 2006-10-24 |
EP1569345A1 (en) | 2005-08-31 |
EP1569345B1 (en) | 2006-09-20 |
US20050190091A1 (en) | 2005-09-01 |
KR101149773B1 (ko) | 2012-06-08 |
JP2005244993A (ja) | 2005-09-08 |
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