JP4839244B2 - プラズマディスプレイ装置およびフラットディスプレイ装置 - Google Patents
プラズマディスプレイ装置およびフラットディスプレイ装置 Download PDFInfo
- Publication number
- JP4839244B2 JP4839244B2 JP2007043121A JP2007043121A JP4839244B2 JP 4839244 B2 JP4839244 B2 JP 4839244B2 JP 2007043121 A JP2007043121 A JP 2007043121A JP 2007043121 A JP2007043121 A JP 2007043121A JP 4839244 B2 JP4839244 B2 JP 4839244B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- driver
- plasma display
- module
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
す斜視図である。図27は図26のプラズマディスプレイ装置を示す断面図である。
図28は図21のドライバICモジュール60をシャーシ13に取りつけた例を示し、図
29は図22のドライバICモジュール60をシャーシ13に取りつけた例を示す。
12,14 ガラス基板
13 シャーシ
16,18 電極
22 アドレスパルス発生回路
36 回路基板
38 アドレスバス基板
40 フレキシブルプリント板
58 ドライバICチップ
60 ドライバICモジュール
66 保護板
68 樹脂シート
70 背面板
76 前面板
78 固定用板
166 保護部材
168 樹脂部材
170 支持板
176 放熱板
Claims (3)
- プラズマディスプレイパネルと、
前記プラズマディスプレイパネルの背面側に配置されたシャーシと、
前記プラズマディスプレイパネルの電極に電圧を印加するICチップと、前記プラズマディスプレイパネルの電極と駆動制御用の回路基板とを接続すると共にその間に前記ICチップが電気的に接続されて配置されたフレキシブル基板とを有するドライバICモジュールとを備え、
前記ドライバICモジュールの有するICチップは、凹み部を有し当該凹み部により前記ICチップを覆う金属材料からなる第2の部材とともに前記フレキシブル基板上に配置され、前記ICチップの表面と前記第2の部材の間には間隙が設けられ、前記間隙に熱伝導性の材料からなる第1の部材が配置され、前記第2の部材は前記フレキシブル基板と一体化して前記シャーシにネジ止めにより固定されることを特徴とするプラズマディスプレイ装置。 - 前記ICチップの有する電極と前記フレキシブル基板の有する配線とが接続され、前記ICチップの電極を有する面と前記フレキシブル基板との間には樹脂が配置されることを特徴とする請求項1記載のプラズマディスプレイ装置。
- 前記フレキシブル基板の前記ICチップが搭載された面とは逆の面に支持部材が配置されたことを特徴とする請求項1又は2のいずれかに記載のプラズマディスプレイ装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007043121A JP4839244B2 (ja) | 2001-07-30 | 2007-02-23 | プラズマディスプレイ装置およびフラットディスプレイ装置 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001230307 | 2001-07-30 | ||
JP2001230307 | 2001-07-30 | ||
JP2007043121A JP4839244B2 (ja) | 2001-07-30 | 2007-02-23 | プラズマディスプレイ装置およびフラットディスプレイ装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007001118A Division JP4528788B2 (ja) | 2001-07-30 | 2007-01-09 | プラズマディスプレイ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007214581A JP2007214581A (ja) | 2007-08-23 |
JP4839244B2 true JP4839244B2 (ja) | 2011-12-21 |
Family
ID=38492678
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007043121A Expired - Fee Related JP4839244B2 (ja) | 2001-07-30 | 2007-02-23 | プラズマディスプレイ装置およびフラットディスプレイ装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4839244B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009300643A (ja) * | 2008-06-12 | 2009-12-24 | Panasonic Corp | ディスプレイ装置 |
JP5609680B2 (ja) * | 2010-08-27 | 2014-10-22 | ソニー株式会社 | 放熱構造及び電子機器 |
KR102374299B1 (ko) * | 2017-05-15 | 2022-03-16 | 엘지이노텍 주식회사 | 올인원 칩 온 필름용 연성 회로기판 및 이를 포함하는 칩 패키지, 및 이를 포함하는 전자 디바이스 |
WO2018212498A1 (ko) * | 2017-05-15 | 2018-11-22 | 엘지이노텍 주식회사 | 올인원 칩 온 필름용 연성 회로기판 및 이를 포함하는 칩 패키지, 및 이를 포함하는 전자 디바이스 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0511183U (ja) * | 1991-07-29 | 1993-02-12 | 日本電気株式会社 | プラズマデイスプレイ装置 |
JP2865496B2 (ja) * | 1992-08-24 | 1999-03-08 | 株式会社日立製作所 | マルチチップモジュール |
JP2853666B2 (ja) * | 1996-07-16 | 1999-02-03 | 日本電気株式会社 | マルチチップモジュール |
JPH10260641A (ja) * | 1997-03-17 | 1998-09-29 | Nec Corp | フラットパネル型表示装置用ドライバicの実装構造 |
JP3656455B2 (ja) * | 1999-04-13 | 2005-06-08 | 富士電機デバイステクノロジー株式会社 | ドライバーモジュール構造 |
JP2001013883A (ja) * | 1999-06-30 | 2001-01-19 | Fujitsu Ltd | ドライバic実装モジュール及びそれを使用した平板型表示装置 |
JP3631638B2 (ja) * | 1999-09-29 | 2005-03-23 | 京セラ株式会社 | 半導体素子用パッケージの実装構造 |
-
2007
- 2007-02-23 JP JP2007043121A patent/JP4839244B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2007214581A (ja) | 2007-08-23 |
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