JP4725696B2 - Switching power supply - Google Patents
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Description
【０００１】
【発明の属する技術分野】
本発明は、電源装置、特に交流入力電圧の実効値が低い場合にも出力電力の制限を受けないスイッチング電源装置に関するものである。
【０００２】
【従来の技術】
図３に示すように、従来の交流−直流変換装置は、交流電源(1)からの交流電力を整流するブリッジ型全波整流回路を構成する整流回路(2)を備えている。整流回路(2)の正側端子（一方の出力端）にインダクタ(3)の一端が接続され、インダクタ(3)の他端は整流素子としての整流用ダイオード(4)を介して正側出力端子(5)に接続される。整流回路(2)の正側端子と負側端子（他方の出力端）との間には直列に接続された入力側分圧抵抗(7,8)が接続される。インダクタ(3)の他端と整流回路(2)の負側端子との間には、スイッチング素子としてのＭＯＳ-ＦＥＴ(9)とスイッチング電流検出手段としての電流検出用抵抗(10)との直列回路が接続される。
【０００３】
正側出力端子(5)と負側出力端子(6)との間に出力電圧検出手段としての出力側分圧抵抗(12,13)が直列に接続され、出力側分圧抵抗(12,13)と並列に平滑用コンデンサ(20)が接続される。出力側分圧抵抗(12,13)の接続点は、誤差増幅器(14)の反転入力端子(-)に接続され、誤差増幅器(14)の非反転入力端子(+)には基準電源(21)の基準電圧が印加される。誤差増幅器(14)の出力電圧(VC)は乗算器(15)に供給され、乗算器(15)は、一方の入力側分圧抵抗(8)に印加される電圧(VM)と誤差増幅器(14)の出力電圧(VC)とを乗算してコンパレータ(16)の反転入力端子(-)に乗算電圧(VCS)を供給する。コンパレータ(16)の非反転入力端子(+)には電流検出用抵抗(10)に印加される電圧が印加され、電流検出用抵抗(10)に印加される電圧が乗算器(15)の乗算電圧(VCS)より高いとき、コンパレータ(16)は、高い電圧(Ｈ)レベルの出力信号を発生し、駆動回路を構成するＲ-Ｓフリップフロップ(17)をセット状態からリセット状態に切り換えて、ＭＯＳ-ＦＥＴ(9)をオン状態からオフ状態に切り換える。
【０００４】
また、整流回路(2)の正側端子に接続された電流検出器(18)はインダクタ(3)に流れる電流のゼロレベルを検出し、Ｒ-Ｓフリップフロップ(17)はインダクタ(3)に流れる電流がゼロレベルのときに電流検出器(18)の出力によりリセット状態からセット状態となり、ＭＯＳ-ＦＥＴ(9)のゲート端子（制御端子）にオン信号を付与し、ＭＯＳ-ＦＥＴ(9)をオン状態にする。入力側分圧抵抗(7,8)、電流検出用抵抗(10)、出力側分圧抵抗(12,13)、誤差増幅器(14)、乗算器(15)、コンパレータ(16)及び電流検出器(18)はオン・オフ期間制御回路(22)を構成し、Ｒ-Ｓフリップフロップ(17)及びオン・オフ期間制御回路(22)はＭＯＳ-ＦＥＴ(9)のゲート端子に付与するオン・オフ信号を発生する制御回路(11)を構成する。
【０００５】
動作の際に、ＭＯＳ-ＦＥＴ(9)がオン状態のとき、交流電源(1)から整流回路(2)を介してインダクタ(3)、ＭＯＳ-ＦＥＴ(9)及び電流検出用抵抗(10)を通じて電流が流れ、インダクタ(3)にエネルギが蓄積される。ＭＯＳ-ＦＥＴ(9)がオン状態からオフ状態に切り換えられると、インダクタ(3)に蓄積されたエネルギが放出されて整流用ダイオード(4)及び平滑用コンデンサ(20)に電流が流れ、平滑用コンデンサ(20)が昇圧充電される。これにより、交流電源(1)から供給される交流入力電圧より高い値の直流出力電圧が平滑用コンデンサ(20)の両端から正側出力端子(5)及び負側出力端子(6)を通じて出力される。ＭＯＳ-ＦＥＴ(9)がオフ状態になり、インダクタ(3)に流れる電流（インダクタ電流）は、徐々に減少してゼロまで戻る。このように、ＭＯＳ-ＦＥＴ(9)の制御周期毎にインダクタ電流をゼロまで戻す制御を「電流臨界導通モード」という。
【０００６】
制御回路(11)の誤差増幅器(14)は、出力側分圧抵抗(13)に印加される電圧値を基準電源(21)の基準電圧と比較して、直流出力電圧を一定値に制御する信号を生成する。次に、正側出力端子(5)及び負側出力端子(6)間の出力電圧との誤差を表す誤差増幅器(14)の出力電圧(VC)と入力側分圧抵抗(8)に印加される整流回路(2)の出力電圧(VM)とを乗算器(15)により乗算して交流入力電流の基準信号を生成する。更に、この基準信号の電圧と電流検出用抵抗(10)の検出電圧とをコンパレータ(16)により比較し、電流検出用抵抗(10)の検出電圧が基準信号の電圧より大きいとき、コンパレータ(16)は出力を発生して、Ｒ-Ｓフリップフロップ(17)をリセット状態に切り換え、ＭＯＳ-ＦＥＴ(9)をオフ状態に切り換える。また、電流検出器(18)がインダクタ(3)に流れる電流のゼロレベルを検出したとき、Ｒ-Ｓフリップフロップ(17)はセット状態に切り換えられ、ＭＯＳ-ＦＥＴ(9)がオン状態となる。このため、図４に示すように、インダクタ(3)を流れる電流、即ちＭＯＳ-ＦＥＴ(9)を流れる電流(IQ)と整流用ダイオード(4)を流れる電流(ID)との三角波形状の和電流は、交流電圧の瞬時電圧が高いほど大きい値となる。これにより、Ｒ-Ｓフリップフロップ(17)の出力端子(Q)からＭＯＳ-ＦＥＴ(9)のゲート端子にオン・オフ信号が付与され、ＭＯＳ-ＦＥＴ(9)がオン・オフ制御される。したがって、図３に示す交流−直流変換装置は、ＭＯＳ-ＦＥＴ(9)を流れる電流(IQ)のピーク値を電流検出用抵抗(10)で検出し、その検出値を使用してＭＯＳ-ＦＥＴ(9)のオン・オフを制御するピーク電流制御方式の力率改善コンバータを構成する。図３に示す交流−直流変換装置では、誤差増幅器(14)の出力電圧(VC)と整流回路(2)の出力電圧とを乗算して交流入力電流の基準信号を生成するため、交流入力電流の瞬時的変化が交流入力電圧の瞬時的変化に追従し、入力力率を略１.０まで上昇させることができる。
【０００７】
【発明が解決しようとする課題】
しかしながら、図３に示す従来の交流−直流変換装置では、出力電圧を一定に制御する場合に交流電圧の実効値が低く且つ交流電圧の瞬時値が高いときに、ＭＯＳ-ＦＥＴ(9)に流れる電流値が大きくなる。しかも、図５に示すように、交流電圧の全波整流波形に相似する電流に制御できるのは、交流電圧に対してスイッチング電流の制御信号がリニアに増加する範囲である。交流電源(1)からの交流電流を交流電源(1)の交流電圧と同位相で且つ正弦波状に制御するには、乗算器(15)の入出力特性によって、一方の入力側分圧抵抗(8)に印加される電圧(VM)と誤差増幅器(14)の出力電圧(VC)との電圧範囲が限定される。このため、交流電圧の入力電圧範囲が広い場合は制御信号の値が制限され、交流電圧の瞬時値が低いと、スイッチング電流、即ち出力電力が制限される欠点がある。
この欠点を解消するため、制御信号の値が小さくても電流検出用抵抗(10)の抵抗値を小さくすれば、必要な出力電力を確保できるが、電流検出用抵抗(10)はスイッチング電流の過電流も検出するため、電流検出用抵抗(10)の抵抗値を小さくすると過電流値が大きくなり、ＭＯＳ-ＦＥＴ(9)の容量及びインダクタ(3)の外形が大きくなる欠点があった。
【０００８】
そこで、本発明は交流入力電圧の実効値が低い場合にも出力電力が制限されないスイッチング電源装置を提供することを目的とする。
【０００９】
【課題を解決するための手段】
本発明によるスイッチング電源装置は、交流電源(1)に接続される整流回路(2)と、整流回路(2)の一方の出力端と一対の出力端子(5,6)との間に直列に接続されたインダクタ(3)及び整流素子(4)と、インダクタ(3)と整流素子(4)との接続点と整流回路(2)の他方の出力端との間に直列に接続されたスイッチング素子(9)と、スイッチング素子(9)の制御端子にオン・オフ信号を付与する制御回路(11)とを備えている。制御回路(11)は、スイッチング素子(9)の制御端子に付与するオン・オフ信号を出力する駆動回路(17)と、交流電源(1)からの交流電圧の実効値又は平均値若しくは相当値が低いときに駆動回路(17)から出力されるオン・オフ信号のオン期間を保持するオン・オフ期間制御回路(22)とを備えている。「相当値」は、交流電源からの交流電圧のピーク値であるか又は実効値に比例する値である。交流電源(1)からの交流電圧の実効値が低いときでも、オン・オフ期間制御回路(22)により駆動回路(17)から出力されるオン・オフ信号のオン期間が保持され、スイッチング素子(9)のオン状態が保持されるので、スイッチング素子(9)により大きなスイッチング電流を流すことができ、正側出力端子(5)及び負側出力端子(6)から大きな出力電力を取り出すことができる。したがって、交流入力電圧の実効値が低い場合でも出力電力が制限されない。
【００１０】
更に、本発明によるスイッチング電源装置が備えるオン・オフ期間制御回路(22)は、スイッチング素子(9)に流れる電流を電圧として検出するスイッチング電流検出手段(10)と、一対の出力端子(5,6)間に接続された出力電圧検出手段(12,13)と、出力電圧検出手段(12,13)の検出電圧と基準電源(21)の基準電圧との誤差電圧に比例する出力信号を発生する誤差増幅器(14)と、整流回路(2)の出力電圧を検出して整流回路(2)の出力電圧の実効値又は平均値若しくは相当値が低いときに検出出力電圧(VM)を増加させる入力電圧検出回路(28)と、入力電圧検出回路(28)の検出出力電圧(VM)と誤差増幅器(14)の出力電圧(VC)との乗算電圧(VCS)を発生する乗算器(15)と、乗算器(15)の乗算電圧(VCS)とスイッチング電流検出手段(10)の検出電圧とを比較してスイッチング電流検出手段(10)の検出電圧の方が高くなったときに駆動回路(17)の出力をオンからオフに切り換える信号を発生するコンパレータ(16)と、インダクタ(3)に流れる電流を検出し且つインダクタ(3)に流れる電流のゼロレベルを検出したときに駆動回路(17)の出力をオフからオンに切り換える信号を発生する電流検出器(18)とを備えている。誤差増幅器(14)の出力電圧(VC)と整流回路(2)の出力電圧とを乗算して交流入力電流の基準信号を生成するため、交流入力電流の瞬時的変化が交流入力電圧の瞬時的変化に追従し、入力力率を略１.０まで上昇させることができる。また、スイッチング電流検出手段(10)により過電流値を必要以上に増大させずに、交流入力電圧の瞬時値をより高く検出することができる。
【００１１】
本発明の実施の形態での入力電圧検出回路(28)は、整流回路(2)の出力電圧を検出する入力電圧検出器(23)と、整流回路(2)の両出力端間に直列に接続された入力側分圧抵抗(7,8)とを備え、整流回路(2)の出力電圧の実効値又は平均値若しくは相当値が低いときに入力電圧検出器(23)の検出信号により入力側分圧抵抗(7,8)の抵抗値を調整して、入力側分圧抵抗(7,8)間の電圧(VM)を増加させるので、乗算器(15)の乗算値(VCS)が高くなり、コンパレータ(16)の出力が発生しない。
【００１２】
本発明の他の実施の形態での入力電圧検出回路(28)は、整流回路(2)の出力電圧を検出する入力電圧検出器(23)と、整流回路(2)の両出力端間に直列に接続された入力側分圧抵抗(7,8)と、入力側分圧抵抗(7,8)の接続点と整流回路(2)の他方の出力端との間に直列に接続された付加抵抗(24)及びスイッチ(25)とを備え、整流回路(2)の出力電圧の実効値又は平均値若しくは相当値が低いときに入力電圧検出器(23)の検出信号によりスイッチ(25)をオフに切り換えて入力側分圧抵抗(7,8)を通じて電流が流れ、整流回路(2)の出力電圧の実効値又は平均値若しくは相当値が高いときに入力電圧検出器(23)の検出信号によりスイッチ(25)をオンに切り換えて入力側分圧抵抗(7,8)及び付加抵抗(24)を通じて電流が流れる。
【００１３】
【発明の実施の形態】
以下、本発明によるスイッチング電源装置の実施の形態を図１及び図２に基いて説明する。但し、図１及び図２では図３に示す箇所と同一の部分には同一の符号を付し、その説明を省略する。
本実施の形態のスイッチング電源装置は、図１に示すように、整流回路(2)の出力電圧の実効値を検出する入力電圧検出器(23)と、抵抗値が固定された入力側分圧抵抗(7)と、入力側分圧抵抗(7)と直列に接続され且つ入力電圧検出器(23)の検出信号により抵抗値が可変する可変抵抗素子により構成される入力側分圧抵抗(8)とで構成された入力電圧検出回路(28)を有する制御回路(11)を備えている。入力電圧検出回路(28)は、整流回路(2)の出力電圧の実効値が低いときに入力電圧検出器(23)から出力される検出信号により、入力側分圧抵抗(8)の抵抗値が増大する。このとき、交流入力電圧の実効値が低くなるほど入力側分圧抵抗(8)の抵抗値が大きくなるように制御されるので、乗算器(15)の乗算電圧(VCS)がより大きくなり、コンパレータ(16)の基準電圧のレベルが高くなる。電流検出用抵抗(10)に印加される電圧がより高くなければコンパレータ(16)は高い電圧(Ｈ)レベルの出力信号を発生しないから、Ｒ-Ｓフリップフロップ(17)は交流入力電圧の実効値が低いときにもセット状態に維持される。したがって、交流入力電圧の実効値が低い場合でもＭＯＳ-ＦＥＴ(9)のオン期間が延長されるので、より大きなスイッチング電流をＭＯＳ-ＦＥＴ(9)に流すことができ、より大きな出力電力を得ることができる。よって、交流入力電圧の実効値が低い場合でも出力電力が制限されることがない。
【００１４】
図１に示す実施の形態では、交流入力電圧の実効値が低いときに、入力側分圧抵抗(8)の抵抗値を増加させる例を示したが、逆に入力側分圧抵抗(7)の抵抗値を減少させてもよい。また、入力側分圧抵抗(8)の抵抗値を増加させると同時に入力側分圧抵抗(7)の抵抗値を減少させてもよい。
【００１５】
図２に示す本発明の他の実施の形態での入力電圧検出回路(28)は、入力側分圧抵抗(7,8)の接続点と整流回路(2)の負側端子との間に付加抵抗(24)及びスイッチとしてのトランジスタ(25)が直列に接続される。整流回路(2)の出力電圧の実効値を検出する入力電圧検出器(23)の出力信号はコンパレータ(26)の非反転入力端子(+)に供給され、コンパレータ(26)の反転入力端子(-)は基準電源(27)に接続される。コンパレータ(26)の出力信号はトランジスタ(25)のベース端子に供給される。整流回路(2)の出力電圧の実効値が高いことを入力電圧検出器(23)により検出し、入力電圧検出器(23)の出力電圧が基準電源(27)の基準電圧より高いときはコンパレータ(26)の高い電圧(Ｈ)レベルの出力によりトランジスタ(25)がオン状態となり、入力側分圧抵抗(7,8)及び付加抵抗(24)を通じて電流が流れるため、入力側分圧抵抗(8)に印加される電圧(VM)が低くなる。整流回路(2)の出力電圧の実効値が低いときは、コンパレータ(26)からの低い電圧(Ｌ)レベルの出力信号によりトランジスタ(25)はオフ状態に維持され、入力側分圧抵抗(8)に印加される電圧(VM)が高くなるため、Ｒ-Ｓフリップフロップ(17)は交流入力電圧の実効値が低いときでもセット状態に維持される。前記何れの実施の形態でも、交流入力電圧の実効値を検出する代わりに交流入力電圧の平均値又は相当値を検出してもよい。また、スイッチング素子としてＭＯＳ-ＦＥＴの代わりにバイポーラトランジスタ、ＩＧＢＴ（絶縁ゲート型バイポーラトランジスタ）、Ｊ-ＦＥＴ（接合型電界効果トランジスタ）又はサイリスタ等を使用してもよい。更に、電流検出器(18)を設ける代わりにインダクタ(3)に別巻線を付加してこの別巻線によりインダクタ(3)に流れる電流を検出してもよい。
【００１６】
【発明の効果】
前記のように、本発明によるスイッチング電源装置では、交流電源からの交流入力電圧の実効値が低いときでも過電流値を増大させずにより大きな出力電力を得ることができるので、出力電力の制限を受けない。また、インダクタの小型化及びスイッチング素子の低容量化を図り、スイッチング電源装置の低コスト化、小型化を実現できる利点がある。
【図面の簡単な説明】
【図１】 本発明によるスイッチング電源装置の回路図
【図２】 本発明によるスイッチング電源装置の他の実施の形態を示す回路図
【図３】 従来のスイッチング電源装置の回路図
【図４】 インダクタ電流とＭＯＳ-ＦＥＴのゲート電圧との関係を示すグラフ
【図５】 乗算器の出力特性を示すグラフ
【符号の説明】
(1)・・交流電源、 (2)・・整流回路、 (3)・・インダクタ、 (4)・・整流用ダイオード（整流素子）、 (5)・・正側出力端子、 (6)・・負側出力端子、 (7,8)・・入力側分圧抵抗、 (9)・・ＭＯＳ-ＦＥＴ（スイッチング素子）、 (10)・・電流検出用抵抗（スイッチング電流検出手段）、 (11)・・制御回路、 (12,13)・・出力側分圧抵抗（出力電圧検出手段）、 (14)・・誤差増幅器、 (15)・・乗算器、 (16)・・コンパレータ、 (17)・・Ｒ-Ｓフリップフロップ（駆動回路）、 (18)・・電流検出器、 (20)・・平滑用コンデンサ、 (21)・・基準電源、 (22)・・オン・オフ期間制御回路、 (23)・・入力電圧検出器、 (24)・・付加抵抗、 (25)・・トランジスタ（スイッチ）、 (26)・・コンパレータ、 (27)・・基準電源、 (28)・・入力電圧検出回路[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power supply device, and more particularly to a switching power supply device that is not limited in output power even when the effective value of an AC input voltage is low.
[0002]
[Prior art]
As shown in FIG. 3, the conventional AC-DC converter includes a rectifier circuit (2) that constitutes a bridge-type full-wave rectifier circuit that rectifies AC power from an AC power source (1). One end of the inductor (3) is connected to the positive terminal (one output terminal) of the rectifier circuit (2), and the other end of the inductor (3) is output via the rectifier diode (4) as a rectifier. Connected to terminal (5). An input side voltage dividing resistor (7, 8) connected in series is connected between the positive side terminal and the negative side terminal (the other output terminal) of the rectifier circuit (2). Between the other end of the inductor (3) and the negative terminal of the rectifier circuit (2), a MOS-FET (9) as a switching element and a current detection resistor (10) as a switching current detection means are connected in series. The circuit is connected.
[0003]
An output side voltage dividing resistor (12, 13) as an output voltage detection means is connected in series between the positive side output terminal (5) and the negative side output terminal (6), and the output side voltage dividing resistor (12, 13 ) Is connected in parallel with the smoothing capacitor (20). The connection point of the output side voltage dividing resistor (12, 13) is connected to the inverting input terminal (-) of the error amplifier (14), and the non-inverting input terminal (+) of the error amplifier (14) is connected to the reference power supply (21 ) Is applied. The output voltage (V C ) of the error amplifier (14) is supplied to the multiplier (15), and the multiplier (15) has an error from the voltage (V M ) applied to one input side voltage dividing resistor (8). The multiplication voltage (V CS ) is supplied to the inverting input terminal (−) of the comparator (16) by multiplying the output voltage (V C ) of the amplifier (14). The voltage applied to the current detection resistor (10) is applied to the non-inverting input terminal (+) of the comparator (16), and the voltage applied to the current detection resistor (10) is multiplied by the multiplier (15). When higher than the voltage (V CS ), the comparator (16) generates an output signal of a high voltage (H) level and switches the RS flip-flop (17) constituting the driving circuit from the set state to the reset state. The MOS-FET (9) is switched from the on state to the off state.
[0004]
The current detector (18) connected to the positive terminal of the rectifier circuit (2) detects the zero level of the current flowing through the inductor (3), and the RS flip-flop (17) is connected to the inductor (3). When the flowing current is at the zero level, the output of the current detector (18) is changed from the reset state to the set state, and an ON signal is given to the gate terminal (control terminal) of the MOS-FET (9), and the MOS-FET (9) Turn on the. Input side voltage dividing resistor (7, 8), current detection resistor (10), output side voltage dividing resistor (12, 13), error amplifier (14), multiplier (15), comparator (16) and current detector (18) constitutes an on / off period control circuit (22), and the RS flip-flop (17) and the on / off period control circuit (22) are applied to the gate terminal of the MOS-FET (9). A control circuit (11) for generating an off signal is configured.
[0005]
In operation, when the MOS-FET (9) is in the ON state, the inductor (3), the MOS-FET (9) and the current detection resistor (10) from the AC power supply (1) through the rectifier circuit (2) A current flows through and the energy is stored in the inductor (3). When the MOS-FET (9) is switched from the on-state to the off-state, the energy stored in the inductor (3) is released, and a current flows through the rectifying diode (4) and the smoothing capacitor (20). The capacitor (20) is boosted and charged. As a result, a DC output voltage higher than the AC input voltage supplied from the AC power supply (1) is output from both ends of the smoothing capacitor (20) through the positive output terminal (5) and the negative output terminal (6). The The MOS-FET (9) is turned off, and the current flowing through the inductor (3) (inductor current) gradually decreases and returns to zero. In this manner, the control for returning the inductor current to zero every control cycle of the MOS-FET (9) is referred to as “current critical conduction mode”.
[0006]
The error amplifier (14) of the control circuit (11) controls the DC output voltage to a constant value by comparing the voltage value applied to the output side voltage dividing resistor (13) with the reference voltage of the reference power source (21). Generate a signal. Next, it is applied to the output voltage (V C ) of the error amplifier (14) representing the error from the output voltage between the positive output terminal (5) and the negative output terminal (6) and the input side voltage dividing resistor (8). A multiplier (15) multiplies the output voltage (V M ) of the rectifier circuit (2) to be generated to generate an AC input current reference signal. Further, the voltage of the reference signal is compared with the detection voltage of the current detection resistor (10) by the comparator (16) .When the detection voltage of the current detection resistor (10) is larger than the voltage of the reference signal, the comparator (16 ) Generates an output, switches the RS flip-flop (17) to the reset state, and switches the MOS-FET (9) to the off state. When the current detector (18) detects the zero level of the current flowing through the inductor (3), the RS flip-flop (17) is switched to the set state and the MOS-FET (9) is turned on. . Therefore, as shown in FIG. 4, a triangular wave shape of a current flowing through the inductor (3), that is, a current (I Q ) flowing through the MOS-FET (9) and a current (I D ) flowing through the rectifying diode (4). The sum current of becomes larger as the instantaneous voltage of the AC voltage is higher. Thereby, an on / off signal is given from the output terminal (Q) of the RS flip-flop (17) to the gate terminal of the MOS-FET (9), and the MOS-FET (9) is controlled to be on / off. Therefore, the AC-DC converter shown in FIG. 3 detects the peak value of the current (I Q ) flowing through the MOS-FET (9) with the current detection resistor (10), and uses the detected value to determine the MOS− A peak current control type power factor correction converter that controls on / off of the FET (9) is configured. In the AC-DC converter shown in FIG. 3, the AC input current reference signal is generated by multiplying the output voltage (V C ) of the error amplifier (14) by the output voltage of the rectifier circuit (2). The instantaneous change of the current follows the instantaneous change of the AC input voltage, and the input power factor can be increased to about 1.0.
[0007]
[Problems to be solved by the invention]
However, in the conventional AC-DC converter shown in FIG. 3, when the output voltage is controlled to be constant, the current flows through the MOS-FET (9) when the effective value of the AC voltage is low and the instantaneous value of the AC voltage is high. The current value increases. Moreover, as shown in FIG. 5, the current that is similar to the full-wave rectified waveform of the AC voltage can be controlled within a range in which the control signal of the switching current increases linearly with respect to the AC voltage. In order to control the alternating current from the alternating current power source (1) in the same phase as the alternating voltage of the alternating current power source (1) and in a sine wave shape, one input side voltage dividing resistor ( The voltage range between the voltage (V M ) applied to 8) and the output voltage (V C ) of the error amplifier (14) is limited. For this reason, when the input voltage range of the AC voltage is wide, the value of the control signal is limited. When the instantaneous value of the AC voltage is low, the switching current, that is, the output power is limited.
To eliminate this drawback, the required output power can be secured by reducing the resistance value of the current detection resistor (10) even if the value of the control signal is small, but the current detection resistor (10) Since the overcurrent is also detected, if the resistance value of the current detection resistor (10) is reduced, the overcurrent value is increased, resulting in a disadvantage that the capacitance of the MOS-FET (9) and the outer shape of the inductor (3) are increased.
[0008]
Therefore, an object of the present invention is to provide a switching power supply device in which the output power is not limited even when the effective value of the AC input voltage is low.
[0009]
[Means for Solving the Problems]
The switching power supply device according to the present invention includes a rectifier circuit (2) connected to an AC power supply (1), and one output terminal of the rectifier circuit (2) and a pair of output terminals (5, 6) in series. Switching connected in series between the connected inductor (3) and rectifier element (4), and the connection point between the inductor (3) and rectifier element (4) and the other output terminal of the rectifier circuit (2) An element (9) and a control circuit (11) for applying an on / off signal to the control terminal of the switching element (9) are provided. The control circuit (11) includes a drive circuit (17) that outputs an on / off signal applied to the control terminal of the switching element (9), and an effective value, an average value, or an equivalent value of the AC voltage from the AC power source (1) And an on / off period control circuit (22) for holding the on period of the on / off signal output from the drive circuit (17) when the voltage is low. The “equivalent value” is a peak value of the AC voltage from the AC power source or a value proportional to the effective value. Even when the effective value of the AC voltage from the AC power supply (1) is low, the ON / OFF period of the ON / OFF signal output from the drive circuit (17) is maintained by the ON / OFF period control circuit (22), and the switching element ( Since the ON state of 9) is maintained, a large switching current can flow through the switching element (9), and a large output power can be taken out from the positive output terminal (5) and the negative output terminal (6). . Therefore, even when the effective value of the AC input voltage is low, the output power is not limited.
[0010]
Further, the on / off period control circuit (22) provided in the switching power supply device according to the present invention includes a switching current detection means (10) for detecting a current flowing through the switching element (9) as a voltage, and a pair of output terminals (5, 6) Output voltage detection means (12, 13) connected between them and generate an output signal proportional to the error voltage between the detection voltage of the output voltage detection means (12, 13) and the reference voltage of the reference power supply (21) Detect the output voltage of the error amplifier (14) and the rectifier circuit (2) and increase the detected output voltage (V M ) when the effective value, average value, or equivalent value of the output voltage of the rectifier circuit (2) is low The input voltage detection circuit (28) to be generated, and a multiplication for generating a multiplication voltage (V CS ) of the detection output voltage (V M ) of the input voltage detection circuit (28) and the output voltage (V C ) of the error amplifier (14) The switching voltage detection means by comparing the multiplication voltage (V CS ) of the multiplier (15) with the detection voltage of the switching current detection means (10). A comparator (16) for generating a signal for switching the output of the drive circuit (17) from on to off when the detection voltage of the stage (10) becomes higher, and a current flowing in the inductor (3) is detected and the inductor And a current detector (18) for generating a signal for switching the output of the drive circuit (17) from OFF to ON when the zero level of the current flowing in (3) is detected. The output voltage (V C ) of the error amplifier (14) and the output voltage of the rectifier circuit (2) are multiplied to generate a reference signal for the AC input current. It is possible to increase the input power factor to approximately 1.0 by following the change in the image. In addition, the instantaneous value of the AC input voltage can be detected higher without increasing the overcurrent value more than necessary by the switching current detection means (10).
[0011]
The input voltage detection circuit (28) in the embodiment of the present invention is connected in series between the input voltage detector (23) for detecting the output voltage of the rectifier circuit (2) and both output terminals of the rectifier circuit (2). The input voltage divider resistor (7, 8) is connected, and input by the detection signal of the input voltage detector (23) when the effective value or average value or equivalent value of the output voltage of the rectifier circuit (2) is low. Since the voltage (V M ) between the input side voltage dividing resistors (7, 8) is increased by adjusting the resistance value of the side voltage dividing resistors (7, 8), the multiplier value (V CS ) Becomes high, and the output of the comparator (16) does not occur.
[0012]
In another embodiment of the present invention, the input voltage detection circuit (28) includes an input voltage detector (23) for detecting the output voltage of the rectifier circuit (2), and both output terminals of the rectifier circuit (2). The input side voltage dividing resistor (7, 8) connected in series and the connection point between the input side voltage dividing resistor (7, 8) and the other output terminal of the rectifier circuit (2) were connected in series. It has an additional resistor (24) and a switch (25), and when the effective value or average value or equivalent value of the output voltage of the rectifier circuit (2) is low, the switch (25) is detected by the detection signal of the input voltage detector (23). The input voltage detector (23) detects when the current flows through the input side voltage dividing resistor (7, 8) and the effective value, average value, or equivalent value of the output voltage of the rectifier circuit (2) is high. The switch (25) is turned on by a signal, and a current flows through the input side voltage dividing resistors (7, 8) and the additional resistor (24).
[0013]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of a switching power supply device according to the present invention will be described with reference to FIGS. However, in FIG.1 and FIG.2, the same code | symbol is attached | subjected to the part same as the location shown in FIG. 3, and the description is abbreviate | omitted.
As shown in FIG. 1, the switching power supply according to the present embodiment includes an input voltage detector (23) for detecting an effective value of the output voltage of the rectifier circuit (2), and an input side voltage divider having a fixed resistance value. An input side voltage dividing resistor (8) configured by a variable resistance element connected in series with the resistor (7) and the input side voltage dividing resistor (7) and having a resistance value variable by a detection signal of the input voltage detector (23). ) And a control circuit (11) having an input voltage detection circuit (28). The input voltage detection circuit (28) detects the resistance value of the input side voltage dividing resistor (8) based on the detection signal output from the input voltage detector (23) when the effective value of the output voltage of the rectifier circuit (2) is low. Will increase. At this time, since the resistance value of the input side voltage dividing resistor (8) is controlled to increase as the effective value of the AC input voltage decreases, the multiplication voltage (V CS ) of the multiplier (15) increases. The reference voltage level of the comparator (16) increases. Since the comparator (16) does not generate a high voltage (H) level output signal unless the voltage applied to the current detection resistor (10) is higher, the R-S flip-flop (17) is effective for the AC input voltage. The set state is maintained even when the value is low. Therefore, even when the effective value of the AC input voltage is low, the ON period of the MOS-FET (9) is extended, so that a larger switching current can be passed through the MOS-FET (9) and a larger output power can be obtained. be able to. Therefore, even when the effective value of the AC input voltage is low, the output power is not limited.
[0014]
In the embodiment shown in FIG. 1, the example in which the resistance value of the input side voltage dividing resistor (8) is increased when the effective value of the AC input voltage is low is shown. Conversely, the input side voltage dividing resistor (7) The resistance value may be reduced. Further, the resistance value of the input side voltage dividing resistor (7) may be decreased simultaneously with increasing the resistance value of the input side voltage dividing resistor (8).
[0015]
The input voltage detection circuit (28) according to another embodiment of the present invention shown in FIG. 2 is provided between the connection point of the input side voltage dividing resistors (7, 8) and the negative side terminal of the rectifier circuit (2). An additional resistor (24) and a transistor (25) as a switch are connected in series. The output signal of the input voltage detector (23) that detects the effective value of the output voltage of the rectifier circuit (2) is supplied to the non-inverting input terminal (+) of the comparator (26), and the inverting input terminal of the comparator (26) ( -) Is connected to the reference power supply (27). The output signal of the comparator (26) is supplied to the base terminal of the transistor (25). The input voltage detector (23) detects that the effective value of the output voltage of the rectifier circuit (2) is high, and the comparator when the output voltage of the input voltage detector (23) is higher than the reference voltage of the reference power supply (27) Since the high voltage (H) level output of (26) turns on the transistor (25) and current flows through the input side voltage dividing resistor (7, 8) and the additional resistor (24), the input side voltage dividing resistor ( The voltage (V M ) applied to 8) is lowered. When the effective value of the output voltage of the rectifier circuit (2) is low, the transistor (25) is kept off by the low voltage (L) level output signal from the comparator (26), and the input side voltage dividing resistor (8 ) to the voltage applied (V M) for increases, R-S flip-flop (17) is maintained in the set state, even when the lower effective value of the AC input voltage. In any of the embodiments, instead of detecting the effective value of the AC input voltage, an average value or an equivalent value of the AC input voltage may be detected. Further, a bipolar transistor, IGBT (insulated gate bipolar transistor), J-FET (junction field effect transistor), thyristor, or the like may be used as the switching element instead of the MOS-FET. Further, instead of providing the current detector (18), a separate winding may be added to the inductor (3), and the current flowing through the inductor (3) may be detected by this separate winding.
[0016]
【The invention's effect】
As described above, in the switching power supply according to the present invention, even when the effective value of the AC input voltage from the AC power supply is low, a larger output power can be obtained without increasing the overcurrent value. I do not receive it. Further, there is an advantage that the inductor can be reduced in size and the switching element can be reduced in capacity, and the switching power supply device can be reduced in cost and size.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a switching power supply device according to the present invention. FIG. 2 is a circuit diagram showing another embodiment of a switching power supply device according to the present invention. FIG. 3 is a circuit diagram of a conventional switching power supply device. Graph showing the relationship between the current and the gate voltage of the MOS-FET [Fig. 5] Graph showing the output characteristics of the multiplier [Explanation of symbols]
(1) ・ ・ AC power supply, (2) ・ Rectifier circuit, (3) ・ Inductor, (4) ・ Rectifier diode (rectifier element), (5) ・ ・ Positive output terminal, (6) ・・ Negative output terminal, (7,8) ・ ・ Input side voltage dividing resistor, (9) ・ ・ MOS-FET (switching element), (10) ・ ・ Current detection resistor (switching current detection means), (11 ) ・ ・ Control circuit, (12,13) ・ ・ Output side voltage dividing resistor (output voltage detection means), (14) ・ ・ Error amplifier, (15) ・ ・ Multiplier, (16) ・ ・ Comparator, (17 ) ・ ・ R-S flip-flop (drive circuit), (18) ・ ・ Current detector, (20) ・ ・ Smoothing capacitor, (21) ・ ・ Reference power supply, (22) ・ ・ On / off period control circuit , (23) ・ ・ Input voltage detector, (24) ・ ・ Additional resistor, (25) ・ Transistor (switch), (26) ・ ・ Comparator, (27) ・ ・ Reference power supply, (28) ・ ・ Input Voltage detection circuit
Claims (3)
前記制御回路は、前記スイッチング素子の制御端子に付与するオン・オフ信号を出力する駆動回路と、前記交流電源からの交流電圧の実効値又は平均値若しくは相当値が低いときに前記駆動回路から出力されるオン・オフ信号のオン期間を保持するオン・オフ期間制御回路とを備え、
該オン・オフ期間制御回路は、前記スイッチング素子に流れる電流を電圧として検出するスイッチング電流検出手段と、前記一対の出力端子間に接続された出力電圧検出手段と、該出力電圧検出手段の検出電圧と基準電源の基準電圧との誤差電圧に比例する出力信号を発生する誤差増幅器と、前記整流回路の出力電圧を検出して前記整流回路の出力電圧の実効値又は平均値若しくは相当値が低いときに検出出力電圧を増加させる入力電圧検出回路と、該入力電圧検出回路の検出出力電圧と前記誤差増幅器の出力電圧との乗算電圧を発生する乗算器と、該乗算器の乗算電圧と前記スイッチング電流検出手段の検出電圧とを比較して前記スイッチング電流検出手段の検出電圧の方が高くなったときに前記駆動回路の出力をオンからオフに切り換える信号を発生するコンパレータと、前記インダクタに流れる電流を検出し且つ前記インダクタに流れる電流のゼロレベルを検出したときに前記駆動回路の出力をオフからオンに切り換える信号を発生する電流検出器とを備えることを特徴とするスイッチング電源装置。A rectifier circuit connected to an AC power supply; an inductor and a rectifier element connected in series between one output end of the rectifier circuit and a pair of output terminals; a connection point between the inductor and the rectifier element; In a switching power supply device comprising: a switching element connected in series between the other output terminal of the rectifier circuit; and a control circuit that applies an on / off signal to a control terminal of the switching element.
The control circuit outputs a drive circuit that outputs an on / off signal to be applied to a control terminal of the switching element, and an output from the drive circuit when the effective value, average value, or equivalent value of the AC voltage from the AC power supply is low. An on / off period control circuit for holding an on period of the on / off signal generated,
The on / off period control circuit includes a switching current detection unit that detects a current flowing through the switching element as a voltage, an output voltage detection unit connected between the pair of output terminals, and a detection voltage of the output voltage detection unit An error amplifier that generates an output signal proportional to the error voltage between the reference voltage and the reference voltage of the reference power supply, and when the output voltage of the rectifier circuit is detected and the effective value, average value, or equivalent value of the output voltage of the rectifier circuit is low An input voltage detection circuit for increasing the detection output voltage, a multiplier for generating a multiplication voltage of the detection output voltage of the input voltage detection circuit and the output voltage of the error amplifier, the multiplication voltage of the multiplier and the switching current When the detection voltage of the switching current detection means becomes higher compared with the detection voltage of the detection means, the output of the drive circuit is switched from on to off. A comparator for generating a signal; and a current detector for detecting a current flowing through the inductor and generating a signal for switching the output of the drive circuit from off to on when a zero level of the current flowing through the inductor is detected. The switching power supply device characterized by the above-mentioned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001163972A JP4725696B2 (en) | 2001-05-31 | 2001-05-31 | Switching power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001163972A JP4725696B2 (en) | 2001-05-31 | 2001-05-31 | Switching power supply |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002359977A JP2002359977A (en) | 2002-12-13 |
| JP4725696B2 true JP4725696B2 (en) | 2011-07-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001163972A Expired - Fee Related JP4725696B2 (en) | 2001-05-31 | 2001-05-31 | Switching power supply |
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| Country | Link |
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| JP (1) | JP4725696B2 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4718228B2 (en) * | 2005-04-14 | 2011-07-06 | 新電元工業株式会社 | Power factor correction circuit |
| JP4818334B2 (en) * | 2008-08-26 | 2011-11-16 | 株式会社東芝 | DC / DC converter |
| JP4972142B2 (en) | 2009-10-26 | 2012-07-11 | 日立コンピュータ機器株式会社 | Power factor correction apparatus and control method thereof |
| CN101867283B (en) * | 2010-06-13 | 2014-03-19 | 中兴通讯股份有限公司 | Method and device for improving control characteristic of power factor correction |
| JP6053706B2 (en) * | 2014-02-19 | 2016-12-27 | 三菱電機株式会社 | Power converter |
| JP6150086B2 (en) * | 2016-03-23 | 2017-06-21 | 東芝ライテック株式会社 | Power factor correction circuit and power supply device |
| JP6946878B2 (en) * | 2017-09-13 | 2021-10-13 | 富士電機株式会社 | Power factor improvement circuit and switching power supply using this |
| CN113054628B (en) * | 2021-03-23 | 2023-06-02 | 厦门立林科技有限公司 | MOS tube overcurrent protection system |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5658741A (en) * | 1979-10-19 | 1981-05-21 | Hitachi Ltd | Power factor improving circuit |
| JPH09238470A (en) * | 1996-02-29 | 1997-09-09 | Toshiba Lighting & Technol Corp | Power supply equipment, discharge lamp lighting equipment, and lighting system |
-
2001
- 2001-05-31 JP JP2001163972A patent/JP4725696B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5658741A (en) * | 1979-10-19 | 1981-05-21 | Hitachi Ltd | Power factor improving circuit |
| JPH09238470A (en) * | 1996-02-29 | 1997-09-09 | Toshiba Lighting & Technol Corp | Power supply equipment, discharge lamp lighting equipment, and lighting system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2002359977A (en) | 2002-12-13 |
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