JP4702516B2 - Organic EL device and manufacturing method thereof - Google Patents

Organic EL device and manufacturing method thereof Download PDF

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JP4702516B2
JP4702516B2 JP2004134009A JP2004134009A JP4702516B2 JP 4702516 B2 JP4702516 B2 JP 4702516B2 JP 2004134009 A JP2004134009 A JP 2004134009A JP 2004134009 A JP2004134009 A JP 2004134009A JP 4702516 B2 JP4702516 B2 JP 4702516B2
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insulating film
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JP2004335470A (en
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チャン ナム キム
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/856—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/824—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/878—Arrangements for extracting light from the devices comprising reflective means

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Description

本発明は、有機電界発光素子に関し、特に、能動電界発光素子及びその製造方法に関する。   The present invention relates to an organic electroluminescent device, and more particularly, to an active electroluminescent device and a manufacturing method thereof.

エレクトロルミネッセンス（電界発光）素子（以下、ＥＬＤという）は、広い視野角、高開口率、高色度などの特徴を有するため、次世代フラットディスプレイ素子として注目を浴びている。特に、有機ＥＬＤは、正孔注入電極と、電子注入電極の間に形成された有機発光層に電荷が注入されると、電子と正孔とが対をなした後、消滅しながら光が発生する原理によるものであるため、他の表示素子に比べて低い電圧でも駆動が可能である。   An electroluminescence (electroluminescence) element (hereinafter referred to as ELD) has attracted attention as a next-generation flat display element because it has features such as a wide viewing angle, a high aperture ratio, and high chromaticity. In particular, in organic ELD, when charge is injected into the organic light emitting layer formed between the hole injection electrode and the electron injection electrode, light is generated while the electrons and holes are paired and then disappears. Therefore, it can be driven with a lower voltage than other display elements.

有機ＥＬＤは、その駆動方式によって受動電界発光素子と、能動電界発光素子とに分けられる。受動電界発光素子は、透明基板上の透明電極と、透明電極上の有機ＥＬ層と、有機ＥＬ層上のカソード電極とで構成される。能動電界発光素子は、基板上で画素領域を形成するスキャンライン、及びデータラインと、スキャンライン、及びデータラインと電気的に接続され、電界発光素子を制御するスイッチング素子と、スイッチング素子に電気的に接続され、基板上の画素領域に形成された透明電極と、透明電極上の有機ＥＬ層と、有機ＥＬ層上の金属電極とで構成される。能動電界発光素子は、受動電界発光素子と異なり、スイッチング素子をさらに含み、このスイッチング素子は薄膜トランジスタである。   The organic ELD is classified into a passive electroluminescent device and an active electroluminescent device according to its driving method. The passive electroluminescent element is composed of a transparent electrode on a transparent substrate, an organic EL layer on the transparent electrode, and a cathode electrode on the organic EL layer. The active electroluminescent device is electrically connected to a scan line, a data line, a scan line, and a data line that form a pixel region on the substrate, and controls the electroluminescent device, and is electrically connected to the switching device. And a transparent electrode formed in a pixel region on the substrate, an organic EL layer on the transparent electrode, and a metal electrode on the organic EL layer. Unlike the passive electroluminescent device, the active electroluminescent device further includes a switching device, which is a thin film transistor.

しかしながら、従来の能動電界発光素子の場合、薄膜トランジスタが素子の開口率、及び発光率を落とす要因となる。開口率、及び発光率の増大のためには画素領域を広げなければならず、画素領域の拡張にも限界がある。画素領域が拡張されすぎる場合、薄膜トランジスタ、及び補助電極と金属電極などの機能が劣るという問題がある。   However, in the case of a conventional active electroluminescence device, the thin film transistor is a factor that decreases the aperture ratio and the light emission rate of the device. In order to increase the aperture ratio and the light emission rate, the pixel area must be expanded, and there is a limit to the expansion of the pixel area. When the pixel region is excessively expanded, there is a problem that the functions of the thin film transistor, the auxiliary electrode, and the metal electrode are inferior.

そこで、本発明の目的は、発光効率を増大させると共に、電気的な機能を向上させることのできる、有機電界発光素子、及びその製造方法を提供することにある。   SUMMARY OF THE INVENTION An object of the present invention is to provide an organic electroluminescent device capable of increasing luminous efficiency and improving electrical function, and a method for manufacturing the same.

上記目的を達成するため、本発明による有機電界発光素子は、薄膜トランジスタを含み、画素領域が形成された基板と、前記薄膜トランジスタ及び前記基板上に形成され、凸凹パターンを有する平坦化絶縁膜と、前記平坦化絶縁膜上に形成され、凸凹パターンを有する第１電極と、前記画素領域の境界領域で、前記第１電極の一定領域上に形成され、前記画素領域内に突出した部分を有する絶縁膜と、前記絶縁膜上に形成され、かつ前記画素領域に突出した部分を有する補助電極と、前記第１電極上に形成された電界発光層と、前記電界発光層及び前記補助電極の上に形成された第２電極とを含み、前記絶縁膜と前記補助電極の各突出した部分は、前記画素領域内の隅部分に配置されて、互いにオーバーラップすることを特徴とする。
In order to achieve the above object, an organic electroluminescence device according to the present invention includes a thin film transistor, a substrate on which a pixel region is formed, the thin film transistor and a planarization insulating film formed on the substrate and having an uneven pattern ; A first electrode having a concavo-convex pattern formed on the planarization insulating film; and an insulating film formed on a predetermined region of the first electrode at a boundary region of the pixel region and having a portion protruding into the pixel region And an auxiliary electrode formed on the insulating film and having a protruding portion in the pixel region, an electroluminescent layer formed on the first electrode, and formed on the electroluminescent layer and the auxiliary electrode. The protruding portions of the insulating film and the auxiliary electrode are disposed at corner portions in the pixel region and overlap each other.

ここで、前記平坦化絶縁膜は、画素領域で凸凹パターンを有し、前記薄膜トランジスタ上にコンタクトホールを有する。そして、前記電界発光層、及び前記第２電極は、画素領域で凸凹パターンを有する。   Here, the planarization insulating film has an uneven pattern in the pixel region, and a contact hole is formed on the thin film transistor. The electroluminescent layer and the second electrode have an uneven pattern in the pixel region.

本発明による有機電界発光素子の製造方法は、(a)画素領域が形成された基板上に薄膜トランジスタを形成する段階と、(b)凸凹パターンを有する平坦化絶縁膜を、前記薄膜トランジスタ及び基板の全面上に形成する段階と、(c)凸凹パターンを有する第１電極を前記平坦化絶縁膜上に形成する段階と、(d)前記画素領域の境界領域で、前記第１電極の一定領域上に設けられ、前記画素領域内に突出した部分を有する絶縁膜を形成する段階と、(e)前記絶縁膜上に形成され、かつ画素領域に突出した部分を有する補助電極を形成する段階と、(f)前記第１電極上に電界発光層を形成する段階と、(g)前記電界発光層及び前記補助電極の上に第２電極を形成する段階とを含み、前記絶縁膜と前記補助電極の各突出した部分は、前記画素領域内の隅部分に配置されて、互いにオーバーラップすることを特徴とする。 A method of manufacturing an organic electroluminescent device according to the present invention includes: (a) forming a thin film transistor on a substrate on which a pixel region is formed; and (b) a planarizing insulating film having a concavo-convex pattern, (C) forming a first electrode having a concavo-convex pattern on the planarization insulating film; and (d) a boundary region of the pixel region on a certain region of the first electrode. Providing an insulating film having a portion protruding in the pixel region, and (e) forming an auxiliary electrode formed on the insulating film and having a portion protruding in the pixel region; f) forming an electroluminescent layer on the first electrode; and (g) forming a second electrode on the electroluminescent layer and the auxiliary electrode , the insulating film and the auxiliary electrode being formed. Each protruding part is arranged at a corner in the pixel area. Te, characterized by overlapping.

ここで、前記凸凹パターンを有する平坦化絶縁膜を形成する段階は、前記薄膜トランジスタと、基板の全面上に絶縁物質層を蒸着する段階と、前記絶縁物質層に柱状のパターンを形成する段階と、前記絶縁物質層を熱処理する段階とを含む。前記柱状のパターンが一定の間隔、及び一定の幅で形成される。   Here, forming the planarization insulating film having the uneven pattern includes depositing an insulating material layer on the entire surface of the thin film transistor and the substrate, forming a columnar pattern on the insulating material layer, Heat-treating the insulating material layer. The columnar patterns are formed with a constant interval and a constant width.

本発明の有機電界発光素子、及びその製造方法によれば、画素電極の第１電極と、共通電極の第２電極とを凸凹状に形成することでその面積を広げられる。従って、発光効率、及び光反射効率を極大化させることができる。また、補助電極と第２電極との接触面積を広げることで、両電極間の抵抗を減らすことができる。   According to the organic electroluminescent element and the manufacturing method thereof of the present invention, the area can be increased by forming the first electrode of the pixel electrode and the second electrode of the common electrode in an uneven shape. Therefore, the light emission efficiency and the light reflection efficiency can be maximized. Moreover, the resistance between both electrodes can be reduced by expanding the contact area between the auxiliary electrode and the second electrode.

以下、本発明による有機ＥＬ素子、及びその製造方法の好ましい実施形態について、添付図面に基づいて詳細に説明する。   Hereinafter, preferred embodiments of an organic EL device and a method for producing the same according to the present invention will be described in detail with reference to the accompanying drawings.

図１Ａ乃至図１Ｉは、本発明の有機電界発光素子（ＥＬＤ）の製造方法を示す断面図である。
図１Ａに示すように、ガラス基板１０上に薄膜トランジスタ２００の活性層として使用するために、多結晶シリコンを用いて半導体層が蒸着される。そして、薄膜トランジスタ２００が形成される領域にのみ残るように、半導体層はパターニングされる。そして、基板１０と、パターニングされた半導体層１１、１１ａ、１１ｂの全面を覆うようにゲート絶縁膜１２が蒸着され、次いで、ゲート電極を形成するための導電物質層を蒸着する。導電物質層は、パターニングされた半導体層１１、１１ａ、１１ｂ上の一定の領域にのみ残るようにパターニングされ、ゲート電極１３を形成する。 1A to 1I are cross-sectional views illustrating a method for manufacturing an organic electroluminescent device (ELD) of the present invention.
As shown in FIG. 1A, a semiconductor layer is deposited on a glass substrate 10 using polycrystalline silicon for use as an active layer of a thin film transistor 200. Then, the semiconductor layer is patterned so as to remain only in the region where the thin film transistor 200 is formed. Then, a gate insulating film 12 is deposited so as to cover the entire surface of the substrate 10 and the patterned semiconductor layers 11, 11a, and 11b, and then a conductive material layer for forming a gate electrode is deposited. The conductive material layer is patterned so as to remain only in certain regions on the patterned semiconductor layers 11, 11 a, and 11 b, thereby forming the gate electrode 13.

その後、ゲート電極１３をマスクに用いて、半導体層１１ａ、１１ｂにボロン（Ｂ）やリン（Ｐ）などの不純物を注入した後に熱処理を行い、薄膜トランジスタ２００のソース／ドレイン領域１１ａ、１１ｂが形成される。そして、不純物が注入されていない半導体層領域はチャンネル領域１１となる。ここで、ゲート電極１３をマスクに用いて不純物を注入したので、ソース／ドレイン領域１１ａ、１１ｂと、チャンネル領域１１との境界は、ゲート電極１３の両エッジと整列している。   Thereafter, using the gate electrode 13 as a mask, impurities such as boron (B) and phosphorus (P) are implanted into the semiconductor layers 11a and 11b, and then heat treatment is performed, so that the source / drain regions 11a and 11b of the thin film transistor 200 are formed. The The semiconductor layer region into which no impurity is implanted becomes the channel region 11. Here, since the impurities are implanted using the gate electrode 13 as a mask, the boundaries between the source / drain regions 11 a and 11 b and the channel region 11 are aligned with both edges of the gate electrode 13.

ゲート絶縁膜１２と、ゲート電極１３上には、第１層間絶縁膜１４が形成される。そして、ソース／ドレイン領域１１ａ、１１ｂの上面の一定部分が露出するように、第１層間絶縁膜１４と、ゲート絶縁膜１２を選択的にエッチングしてコンタクトホールが形成され、コンタクトホールに金属物質を埋め込み、ソース／ドレイン領域１１ａ、１１ｂに各々電気的に接続される電極ライン１５が形成される。
次いで、第１層間絶縁膜１４と電極ライン１５上に、第２層間絶縁膜１６が蒸着される。ここで、第２層間絶縁膜１６の形成は省略することができる。 A first interlayer insulating film 14 is formed on the gate insulating film 12 and the gate electrode 13. Then, a contact hole is formed by selectively etching the first interlayer insulating film 14 and the gate insulating film 12 so that certain portions of the upper surfaces of the source / drain regions 11a and 11b are exposed, and a metal material is formed in the contact holes. And electrode lines 15 are formed which are electrically connected to the source / drain regions 11a and 11b, respectively.
Next, a second interlayer insulating film 16 is deposited on the first interlayer insulating film 14 and the electrode line 15. Here, the formation of the second interlayer insulating film 16 can be omitted.

図１ｂに示すように、第２層間絶縁膜１６上に平坦化絶縁膜１７を形成するために、スピンコーティング方法で絶縁物質を形成し、その形成された絶縁物質をプリベーク（pre-bake）工程によって硬化させる。
As shown in Figure 1b, in order to form a planarization insulating film 17 on the second interlayer insulating film 16, an insulating material by spin coating method, the formed insulating material prebaking (pre-bake) process To cure.

次いで、図１ｃに示すように、一定の間隔のパターンを有するマスク１８を用いて、平坦化絶縁膜１７を紫外線(UV)に露出させ、現像液を用いて平坦化絶縁膜１７を現像して、図１ｄに示すように、平坦化絶縁膜１７に一定の間隔のパターン１７ａを形成する。パターン１７ａが存在しない領域では、第２層間絶縁膜１６の表面が露出される。   Next, as shown in FIG. 1c, the planarization insulating film 17 is exposed to ultraviolet rays (UV) using a mask 18 having a pattern with a constant interval, and the planarization insulating film 17 is developed using a developer. As shown in FIG. 1 d, a pattern 17 a having a constant interval is formed on the planarization insulating film 17. In the region where the pattern 17a does not exist, the surface of the second interlayer insulating film 16 is exposed.

図２は、パターン１７ａの一実施形態を示す平面図である。
図２に示すように、平坦化絶縁膜１７のパターン１７ａは四角形の柱状である。これらは、図３に示すように、３つ以上の頂点を有する多角形の柱、楕円、または円柱など、 他にも様々な形状が可能である。パターン１７ａは一定の間隔で形成され、パターン１７ａの幅と間隔は１ｃｍ未満である。即ち、０＜ａ＜１ｃｍ、０＜ｂ＜１ｃｍ、０＜ｃ＜１ｃｍ、０＜ｄ＜１ｃｍである。 FIG. 2 is a plan view showing an embodiment of the pattern 17a.
As shown in FIG. 2, the pattern 17a of the planarization insulating film 17 has a rectangular column shape. These can be various other shapes such as polygonal columns, ellipses, or cylinders having three or more vertices, as shown in FIG. The patterns 17a are formed at regular intervals, and the width and interval of the patterns 17a are less than 1 cm. That is, 0 <a <1 cm, 0 <b <1 cm, 0 <c <1 cm, and 0 <d <1 cm.

図１Ｅに示すように、メルトベーキング工程によって平坦化絶縁膜１７の表面に凸凹状のパターンを形成する。この際、平坦化絶縁膜１７を、硬化しない程度の多少低い温度でベーキングすると、パターン１７ａが溶けて流れることで、凸凹状のパターンに変形する。次いで、薄膜トランジスタ２００のドレイン領域１１ｂに接続された電極ライン１５が露出するように、平坦化絶縁膜１７、及び第２層間絶縁膜１６を選択的に除去して、コンタクトホール１８を形成する。   As shown in FIG. 1E, an uneven pattern is formed on the surface of the planarization insulating film 17 by a melt baking process. At this time, if the planarization insulating film 17 is baked at a somewhat low temperature that does not cure, the pattern 17a melts and flows, thereby deforming into an uneven pattern. Next, the planarization insulating film 17 and the second interlayer insulating film 16 are selectively removed so that the electrode line 15 connected to the drain region 11b of the thin film transistor 200 is exposed, and a contact hole 18 is formed.

図１ｆに示すように、コンタクトホール１８、及び平坦化絶縁膜１７の全面に第１電極１９を形成する。この際、下部発光方式のＥＬ素子の場合は、第１電極１９をＩＴＯのような透明な物質で形成し、逆に、上部発光方式のＥＬ素子の場合には、反射率や仕事関数の高い金属物質で第１電極１９を形成する。上部発光方式のＥＬ素子の場合に、第１電極１９の材料としては、クロム（Ｃｒ）、銅（Ｃｕ）、タングステン（Ｗ）、金（Ａｕ）、ニッケル（Ｎｉ）、銀（Ａｇ）、チタニウム（Ｔｉ）、タンタル（Ｔａ）などの金属、またはこれらの合金が使用され、金属を多層に蒸着することで形成できる。コンタクトホール１８内に蒸着された第１電極１９は、コンタクトホール１８の下部の電極ライン１５に接続され、平坦化絶縁膜１７上に蒸着された第１電極１９は、平坦化絶縁膜１７のような凸凹状のパターンを有する。
このように、画素領域における第１電極１９は、凸凹な表面を有するので、光反射効率をさらに増大させることが可能となる。 As shown in FIG. 1 f, the first electrode 19 is formed on the entire surface of the contact hole 18 and the planarization insulating film 17. At this time, in the case of a lower light emission type EL element, the first electrode 19 is formed of a transparent material such as ITO. On the other hand, in the case of an upper light emission type EL element, the reflectance and work function are high. The first electrode 19 is formed of a metal material. In the case of an upper-light-emitting EL element, the material of the first electrode 19 is chromium (Cr), copper (Cu), tungsten (W), gold (Au), nickel (Ni), silver (Ag), titanium. A metal such as (Ti) or tantalum (Ta) or an alloy thereof is used, and the metal can be formed by vapor deposition in multiple layers. The first electrode 19 deposited in the contact hole 18 is connected to the electrode line 15 below the contact hole 18, and the first electrode 19 deposited on the planarizing insulating film 17 is like the planarizing insulating film 17. It has a concavo-convex pattern.
Thus, since the first electrode 19 in the pixel region has an uneven surface, the light reflection efficiency can be further increased.

そして、第１電極１９は、画素領域を電気的に分離するために選択的に除去され、第１電極１９は、電極ライン１５を介してドレイン領域１１ｂに電気的に接続される複数の画素電極１９、つまり、アノードとなる。   The first electrode 19 is selectively removed to electrically isolate the pixel region, and the first electrode 19 is a plurality of pixel electrodes that are electrically connected to the drain region 11b through the electrode line 15. 19, that is, the anode.

図１Ｇに示すように、画素領域を除いた残りの領域に、絶縁膜２０が形成される。絶縁膜２０は、画素領域の間の境界領域に位置した平坦化絶縁膜１７、及び画素電極１９を覆う。   As shown in FIG. 1G, the insulating film 20 is formed in the remaining region excluding the pixel region. The insulating film 20 covers the planarization insulating film 17 and the pixel electrode 19 located in the boundary region between the pixel regions.

上述したように、絶縁膜２０は、画素電極１９の所定の部分とオーバーラップするが、絶縁膜２０と、画素電極１９とのオーバーラップ領域が広がると、画素領域が小さくなる。したがって、素子の開口率を高めるために、製造工程時にオーバーラップ領域を最大限減らす必要がある。しかし、オーバーラップ領域が狭すぎる場合、補助電極２１と、第２電極２３との接触領域が狭くなるため、短絡のおそれが増加する。このような問題点を解決するために、本発明の絶縁膜２０は、図４及び図５に示すように、開口率を高めると同時に、補助電極２１と、第２電極２３との接触面積を広げるように、画素領域１００内に突出した部分２０ａを有する。 As described above, the insulating film 20 overlaps with a predetermined portion of the pixel electrode 19. However, when the overlapping region between the insulating film 20 and the pixel electrode 19 is widened, the pixel region becomes small. Therefore, in order to increase the aperture ratio of the element, it is necessary to reduce the overlap region as much as possible during the manufacturing process. However, when the overlap region is too narrow, the contact region between the auxiliary electrode 21 and the second electrode 23 is narrowed, which increases the risk of short circuit. In order to solve such problems, the insulating film 20 of the present invention increases the aperture ratio and at the same time increases the contact area between the auxiliary electrode 21 and the second electrode 23 as shown in FIGS. widen so on, it has a portion 20a that protrudes in the pixel region 100.

ここで、突出部分２０ａは、薄膜トランジスタ２００の上部、あるいは画素領域１００に形成することができる。
絶縁膜２０が画素領域１００の間の境界領域の上部ばかりでなく、画素領域１００の一部にまで延長されることで、補助電極２１と、第２電極２３との接触面が広げられる。 Here, the protruding portion 20 a can be formed on the thin film transistor 200 or in the pixel region 100.
The insulating film 20 extends not only to the upper part of the boundary region between the pixel regions 100 but also to a part of the pixel region 100, so that the contact surface between the auxiliary electrode 21 and the second electrode 23 is expanded.

図６及び図７に示すように、絶縁膜２０上に補助電極２１を形成する。補助電極２１は、絶縁膜２０と同様に、画素領域１００の間の境界領域上に位置し、絶縁膜２０の突出部分２０ａ上にも形成される。したがって、素子の高い開口率を維持すると同時に、補助電極２１の面積も広がる。補助電極２１と、画素電極１９との接触を防止するために、補助電極２１は、絶縁膜２０の全表面に形成されるわけではなく、画素領域の周縁の絶縁膜２０が露出するように、絶縁膜２０の一定の領域上にのみ形成されることが好ましい。補助電極の材料としては、抵抗の小さい金属を使用する。例えば、クロム（Ｃｒ）、アルミニウム（Ａｌ）、銅（Ｃｕ）、タングステン（Ｗ）、金（Ａｕ）、ニッケル（Ｎｉ）、銀（Ａｇ）、ネオジウム（Ｎｄ）のうち何れか一つ、またはこれらの合金を使用できる。特に、クロム（Ｃｒ）のように透明性の低い金属を補助電極２１の材料として使用する場合、光を遮断するブラックマトリックス効果が得られる。   As shown in FIGS. 6 and 7, the auxiliary electrode 21 is formed on the insulating film 20. Similarly to the insulating film 20, the auxiliary electrode 21 is located on the boundary region between the pixel regions 100 and is also formed on the protruding portion 20 a of the insulating film 20. Therefore, the area of the auxiliary electrode 21 is increased while maintaining a high aperture ratio of the element. In order to prevent contact between the auxiliary electrode 21 and the pixel electrode 19, the auxiliary electrode 21 is not formed on the entire surface of the insulating film 20, and the insulating film 20 at the periphery of the pixel region is exposed. It is preferable that the insulating film 20 be formed only on a certain region. As a material for the auxiliary electrode, a metal having a low resistance is used. For example, one of chromium (Cr), aluminum (Al), copper (Cu), tungsten (W), gold (Au), nickel (Ni), silver (Ag), neodymium (Nd), or these Can be used. In particular, when a metal with low transparency such as chromium (Cr) is used as the material of the auxiliary electrode 21, a black matrix effect that blocks light can be obtained.

図１Ｈと図１１に示すように、シャドーマスク３０を用いて画素電極１９上に、有機電界発光層２２が蒸着される。有機電界発光層２２は、画素領域１００にのみ蒸着される。有機ＥＬ層２２は、正孔輸送層（図示せず）、発光層（図示せず）、及び、電子輸送層（図示せず）の積層構造を有する。有機ＥＬ層２２が補助電極２１の突出部位（突出領域）２１ａ上に形成されないようにするために、図８に示すように、シャドーマスク３０のパターンは、絶縁膜２０の突出した部分２０ａと同一の突出部３０ａを有する。
As shown in FIGS. 1H and 11, an organic electroluminescent layer 22 is deposited on the pixel electrode 19 using a shadow mask 30. The organic electroluminescent layer 22 is deposited only on the pixel region 100. The organic EL layer 22 has a stacked structure of a hole transport layer (not shown), a light emitting layer (not shown), and an electron transport layer (not shown). In order to prevent the organic EL layer 22 from being formed on the protruding portion (protruding region) 21a of the auxiliary electrode 21, the pattern of the shadow mask 30 is the same as the protruding portion 20a of the insulating film 20, as shown in FIG. Projecting portion 30a.

図９及び図１０は、シャドーマスク３０の他の実施形態を示す。図９に示すように、有機ＥＬ層２２の蒸着時において、シャドーマスク３０のパターンは、画素領域１００と互いにアラインし、パターンの突出部３０ａは、絶縁膜２０の突出部分２０ａとアラインする。有機ＥＬ層２２は、赤色Ｒ，緑色Ｇ，青色Ｂに従って順次に形成される。シャドーマスク３０を用いて赤色有機発光物質、緑色有機発光物質、青色有機発光物質を順次に蒸着させる。また、Ｒ，Ｇ，Ｂそれぞれの有機ＥＬ層２２に共通に入る物質の蒸着時にも、シャドーマスク３０を使用する。   9 and 10 show another embodiment of the shadow mask 30. FIG. As shown in FIG. 9, when the organic EL layer 22 is deposited, the pattern of the shadow mask 30 is aligned with the pixel region 100, and the protruding portion 30 a of the pattern is aligned with the protruding portion 20 a of the insulating film 20. The organic EL layer 22 is sequentially formed according to red R, green G, and blue B. A red organic light emitting material, a green organic light emitting material, and a blue organic light emitting material are sequentially deposited using the shadow mask 30. In addition, the shadow mask 30 is also used when depositing a material that enters the R, G, and B organic EL layers 22 in common.

図１Ｈに示すように、絶縁膜２０が漏出された領域と、補助電極２１と、有機ＥＬ層２２上に第２電極２３が形成される。ここで、上部発光方式のＥＬ素子の場合に、第２電極２３は、ＩＴＯ（Indium Tin Oxide）、またはＩＺＯ（Indium Zinc Oxide）などの透明な伝導性物質で形成される。一方、下部発光方式のＥＬ素子の場合、第２電極２３は、反射率の高い金属物質で形成される。下部発光方式のＥＬ素子の場合、第２電極２３を形成するために、全面にアルミニウムを数ｎｍの厚さで蒸着した後、銀を数ｎｍ−数十ｎｍで蒸着するか、またはＭｇxＡｇ1-x系の金属を数ｎｍ〜数十ｎｍの厚さで蒸着する。   As shown in FIG. 1H, the second electrode 23 is formed on the region where the insulating film 20 is leaked, the auxiliary electrode 21, and the organic EL layer 22. Here, in the case of an upper light emitting EL element, the second electrode 23 is formed of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). On the other hand, in the case of a lower light-emitting EL element, the second electrode 23 is formed of a highly reflective metal material. In the case of an EL element of a bottom emission type, in order to form the second electrode 23, aluminum is deposited on the entire surface with a thickness of several nanometers, and then silver is deposited with several nanometers to several tens of nanometers, or MgxAg1-x. The system metal is deposited with a thickness of several nm to several tens of nm.

図１Ｉに示すように、以後に有機ＥＬ層２２を酸素や水分から保護するために、保護膜２５を形成する。そして、図示してはいないが、シーラントと透明基板を用いて保護キャップを装着して、アクティブマトリックス有機ＥＬ素子を完成する。   As shown in FIG. 1I, a protective film 25 is subsequently formed to protect the organic EL layer 22 from oxygen and moisture. Although not shown, a protective cap is attached using a sealant and a transparent substrate to complete an active matrix organic EL element.

上述した実施形態の外にも本発明がその趣旨及び範疇から外れることなく、他のさまざまな形態で具体化され得ることは、当該技術に通常の知識を持ちあわせるものには明らかであろう。
したがって、本発明は、上記の実施形態に限定されるものではなく、特許請求の範囲、及びその同等範囲内にある全ての実施形態が本発明の範疇内に属するものである。 It will be apparent to those skilled in the art that the present invention can be embodied in other various forms without departing from the spirit and scope of the present invention in addition to the above-described embodiments.
Therefore, the present invention is not limited to the above-described embodiments, and all the embodiments within the scope of the claims and their equivalents belong to the scope of the present invention.

本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の有機電界発光素子の製造方法を示す断面図である。It is sectional drawing which shows the manufacturing method of the organic electroluminescent element of this invention. 本発明の平坦化絶縁膜に形成されるコンタクトホールの間隔、及び大きさを示す平面図である。It is a top view which shows the space | interval of a contact hole formed in the planarization insulating film of this invention, and a magnitude | size. 本発明の平坦化絶縁膜に形成されるコンタクトホールの他の実施形態を示す平面図である。It is a top view which shows other embodiment of the contact hole formed in the planarization insulating film of this invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention. 本発明のシャドーマスクを示す図面である。It is drawing which shows the shadow mask of this invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention. 本発明の有機電界発光素子の製造方法を示す図面である。1 is a view showing a method for manufacturing an organic electroluminescent device of the present invention.

符号の説明Explanation of symbols

１０：基板
１１：チャンネル領域
１１ａ、１１ｂ：ソース／ドレイン電極
１２：ゲート絶縁膜
１３：ゲート電極
１４：第１層間絶縁膜
１５：電極ライン
１６：第２層間絶縁膜
１７：平坦化絶縁膜
１８：コンタクトホール
１９：第１電極
２０：絶縁膜
２１：補助電極
２２：有機電界発光層
２３：第２電極
２５：保護膜
３０：シャドーマスク
１００画素領域
２００：薄膜トランジスタ

10: Substrate 11: Channel region 11a, 11b: Source / drain electrode 12: Gate insulating film 13: Gate electrode 14: First interlayer insulating film 15: Electrode line 16: Second interlayer insulating film 17: Planarizing insulating film 18: Contact hole 19: first electrode 20: insulating film 21: auxiliary electrode 22: organic electroluminescent layer 23: second electrode 25: protective film 30: shadow mask 100 pixel region 200: thin film transistor

Claims (12)

薄膜トランジスタを含み、画素領域が形成された基板と、
前記薄膜トランジスタ及び前記基板上に形成され、凸凹パターンを有する平坦化絶縁膜と、
前記平坦化絶縁膜上に形成され、凸凹パターンを有する第１電極と、
前記画素領域の境界領域で、前記第１電極の一定領域上に形成され、前記画素領域内に突出した部分を有する絶縁膜と、
前記絶縁膜上に形成され、かつ前記画素領域に突出した部分を有する補助電極と、
前記第１電極上に形成された電界発光層と、
前記電界発光層及び前記補助電極の上に形成された第２電極とを含み、
前記絶縁膜と前記補助電極の各突出した部分は、前記画素領域内の隅部分に配置されて、互いにオーバーラップすることを特徴とする有機電界発光素子。 A substrate including a thin film transistor and having a pixel region formed thereon;
A planarization insulating film formed on the thin film transistor and the substrate and having an uneven pattern ;
A first electrode formed on the planarization insulating film and having an uneven pattern;
An insulating film formed on a predetermined region of the first electrode at a boundary region of the pixel region and having a portion protruding into the pixel region;
An auxiliary electrode formed on the insulating film and having a portion protruding into the pixel region;
An electroluminescent layer formed on the first electrode;
A second electrode formed on the electroluminescent layer and the auxiliary electrode;
The protruding portions of the insulating film and the auxiliary electrode are disposed at corner portions in the pixel region and overlap each other. 前記平坦化絶縁膜は、画素領域に凸凹パターンを有し、前記薄膜トランジスタ上にコンタクトホールを有することを特徴とする請求項１記載の有機電界発光素子。   2. The organic electroluminescence device according to claim 1, wherein the planarization insulating film has an uneven pattern in a pixel region, and a contact hole on the thin film transistor. 前記電界発光層及び前記第２電極は、画素領域に凸凹パターンを有することを特徴とする請求項１記載の有機電界発光素子。   The organic electroluminescent device according to claim 1, wherein the electroluminescent layer and the second electrode have an uneven pattern in a pixel region. 前記補助電極の突出領域は、前記薄膜トランジスタの上部に形成されることを特徴とする請求項１記載の有機電界発光素子。   The organic electroluminescence device according to claim 1, wherein the protruding region of the auxiliary electrode is formed on the thin film transistor. (a)画素領域が形成された基板上に薄膜トランジスタを形成する段階と、
(b)凸凹パターンを有する平坦化絶縁膜を、前記薄膜トランジスタ及び基板の全面上に形成する段階と、
(c)凸凹パターンを有する第１電極を前記平坦化絶縁膜上に形成する段階と、
(d)前記画素領域の境界領域で、前記第１電極の一定領域上に設けられ、前記画素領域内に突出した部分を有する絶縁膜を形成する段階と、
(e)前記絶縁膜上に形成され、かつ画素領域に突出した部分を有する補助電極を形成する段階と、
(f)前記第１電極上に電界発光層を形成する段階と、
(g)前記電界発光層及び前記補助電極の上に第２電極を形成する段階とを含み、
前記絶縁膜と前記補助電極の各突出した部分は、前記画素領域内の隅部分に配置されて、互いにオーバーラップすることを特徴とする有機電界発光素子の製造方法。 (a) forming a thin film transistor on the substrate on which the pixel region is formed;
(b) forming a planarization insulating film having an uneven pattern on the entire surface of the thin film transistor and the substrate;
(c) forming a first electrode having an uneven pattern on the planarization insulating film;
(d) forming an insulating film provided on a certain region of the first electrode at a boundary region of the pixel region and having a portion protruding into the pixel region;
(e) forming an auxiliary electrode formed on the insulating film and having a portion protruding into the pixel region;
(f) forming an electroluminescent layer on the first electrode;
(g) forming a second electrode on the electroluminescent layer and the auxiliary electrode;
The protruding portions of the insulating film and the auxiliary electrode are disposed at corner portions in the pixel region and overlap each other. 前記凸凹パターンを有する平坦化絶縁膜を形成する段階は、
前記薄膜トランジスタ及び基板の全面上に絶縁物質層を形成する段階と、
前記絶縁物質層に柱状のパターンを形成する段階と、
前記絶縁物質層を熱処理する段階と、
を含むことを特徴とする請求項５記載の有機電界発光素子の製造方法。 The step of forming a planarization insulating film having the uneven pattern comprises:
Forming an insulating material layer on the entire surface of the thin film transistor and the substrate;
Forming a columnar pattern on the insulating material layer;
Heat treating the insulating material layer;
The method of manufacturing an organic electroluminescent element according to claim 5, comprising: 前記柱状のパターンが、一定の間隔及び一定の幅で形成されることを特徴とする請求項６記載の有機電界発光素子の製造方法。   7. The method of manufacturing an organic electroluminescent element according to claim 6, wherein the columnar patterns are formed with a constant interval and a constant width. 前記パターンの間隔及び幅は、１ｃｍ未満であることを特徴とする請求項７記載の有機電界発光素子の製造方法。   8. The method of manufacturing an organic electroluminescent device according to claim 7, wherein the interval and width of the patterns are less than 1 cm. 前記電界発光層及び前記第２電極は、凸凹パターンを有することを特徴とする請求項５記載の有機電界発光素子の製造方法。   6. The method of manufacturing an organic electroluminescent element according to claim 5, wherein the electroluminescent layer and the second electrode have an uneven pattern. 前記絶縁膜の突出した部分は、前記薄膜トランジスタの上部の前記第１電極上に形成されることを特徴とする請求項５記載の有機電界発光素子の製造方法。   6. The method according to claim 5, wherein the protruding portion of the insulating film is formed on the first electrode above the thin film transistor. 前記電界発光層は、前記画素領域にのみ形成されることを特徴とする請求項５記載の有機電界発光素子の製造方法。   6. The method of manufacturing an organic electroluminescent device according to claim 5, wherein the electroluminescent layer is formed only in the pixel region. 前記薄膜トランジスタ上の前記平坦化絶縁膜に、コンタクトホールを形成する段階をさらに含むことを特徴とする請求項５記載の有機電界発光素子の製造方法。   6. The method of manufacturing an organic electroluminescent device according to claim 5, further comprising a step of forming a contact hole in the planarization insulating film on the thin film transistor.
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