JP4651207B2 - Semiconductor substrate and manufacturing method thereof - Google Patents

Semiconductor substrate and manufacturing method thereof Download PDF

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JP4651207B2
JP4651207B2 JP2001050727A JP2001050727A JP4651207B2 JP 4651207 B2 JP4651207 B2 JP 4651207B2 JP 2001050727 A JP2001050727 A JP 2001050727A JP 2001050727 A JP2001050727 A JP 2001050727A JP 4651207 B2 JP4651207 B2 JP 4651207B2
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substrate
main surface
plane
gan
semiconductor substrate
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JP2002255694A (en
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克洋 秋本
博之 木下
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Kyocera Corp
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Kyocera Corp
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  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、窒素−周期律表第3族元素化合物半導体膜を形成するための半導体用基板とその製造方法に関する。
【0002】
【従来の技術】
発光ダイオードなどに使用される窒化ガリウム(以下GaNと表記)のエピタキシャル基板の構造は、サファイア基板の上に窒化アルミニウム(AlN)もしくはGaNのバッファ層の一層を設け、さらにその上にn型GaN層、p型GaN層を成長させた構造となっている。このGaN基板のGaN及びAlN層の成長には、有機金属化合物結晶成長(MO−CVD)法,分子線エピタキシー(MBE)法などが用いられる。
【0003】
GaN基板用のサファイア基板は、チョクラルスキー(CZ)法などの引き上げ法によって作成されたサファイア結晶を、切り出し加工後に主面の面方位が(0001)面または(11−20)面からの傾斜角が0〜0.5°、好ましくは0〜0.3°となるように調整加工したものを、化学研磨加工して用いられる。上記MBE法を用いてサファイア基板上にGaNを成長させる場合、使用するサファイア基板は燐酸及び硫酸の混合液によるエッチングを行ない、600℃での水素クリーニングを行うと、主面のRms(2乗平均面粗さ)が非常に小さくなりMBE法での結晶成長後のGaNの結晶性が向上するという報告がなされている(Jpn.J.Appl.Phys.Vol.37(1998)pp.L1109-1112参照)。
【0004】
また、MOCVD法による結晶成長においても主面のRa値,Rms値が大きい基板では、結晶成長後のGaN層表面は更に凹凸が大きくなる(例えば電子情報通信学会論文誌2000/4Vol.J83-Cno.4参照)ために、表面粗さの小さな基板が必要であった。
【0005】
【発明が解決しようとする課題】
一般に用いられるサファイア基板においては、主面の結晶方位がサファイアの(0001)面または(11−20)面から0〜0.3°の傾斜角にて作成されているため、熱処理の有無を問わず、MBE法でGaNを結晶成長させると図14に示すように表面の荒れた表面になることが非常に多く、平滑な表面を持ったGaN膜を安定して得ることは非常に困難であった。
【0006】
これは、サファイア基板の主面の結晶方位の変動範囲が傾斜角で0〜0.3°と大きいために、サファイア基板表面の状態が安定しないためである。
【0007】
また、熱処理や燐酸と硫酸の混合液による化学エッチングを行なわない場合においても、サファイア基板表面の状態が安定して再現できず同じくGaN膜の表面が荒れるという問題があった。また、燐酸や硫酸などの強酸によるサファイアのエッチングでは、酸の温度を150℃以上に加熱する必要があり危険である。
【0008】
本発明は上記問題に鑑みて、表面が平滑で結晶性の優れたGaN基板を得る事を目的とし、更にこの目的のために極めて平滑な表面を持ったサファイア基板を用いることが有効であることを確認し、極めて平滑な表面のサファイア基板を安定に作成することを目的とする。
【0009】
【課題を解決するための手段】
本発明は、窒素−周期律表第3族元素化合物半導体の結晶成長に用いる基板であって、サファイアからなり、主面の結晶方位が(0001)面または(11−20)面から0〜0.03°傾いており、主面に400nm以上の幅のテラスと高さ2Å以下のステップを有し、主面の表面粗さがRms値で0.1nm以下、Ra値で0.06nm以下であることを特徴とし、この半導体用基板を用い、分子線エピタキシー(MBE)法によりGaN結晶を成長させる。
【0010】
このサファイアからなる半導体用基板を得るための製造方法として、サファイア基板の主面の結晶方位が(0001)面または(11−20)面から0〜0.03°の傾斜角となるように加工した後、800〜900℃で60時間以上の酸化雰囲気加熱を行なう事を特徴とする。
【0011】
【作用】
本発明の半導体用基板は、原子レベルで平滑なテラス面を400nm以上の広い幅で形成し、且つステップの段差も2Å以下に安定して小いため、表面粗さの非常に小さな表面を形成することが出来る。この半導体用基板を用いることで、MBE法においてもRHEEDのストリークが従来より明瞭で、且つ表面の起伏形状も大幅に平滑化されたGaN単結晶膜を得ることができる。
【0012】
【発明の実施の形態】
以下、本発明の実施形態を説明する。
【0013】
本発明の半導体用基板はサファイアからなり、その主面の結晶面方位が(0001)面または(11−20)面から0〜0.03°の範囲で傾いた基板に、酸化雰囲気800〜900℃にて60時間以上加熱処理を行うことにより得られるものである。その結果、図1のように主面6には明瞭な400nm以上の幅の平坦面であるテラス1と2Å以下の高さの段差を持つステップ2を規則正しく有し、Rms値が0.1nm以下でRa(算術平均粗さ)値が0.06nm以下となり、原子レベルで平滑化された(atomic flat sapphire)主面6を持つ半導体用基板5としたものである。この半導体用基板は、図2に示すようにGaN若しくはAlNのバッファ層4を介して、GaN結晶層をMBE法によって形成するために用いる。
【0014】
なお、熱処理を行っていない半導体用基板の主面のAFM(原子間力顕微鏡)像を図3に、本発明の製造方法を用いて作成された半導体用基板5の主面6のAFM像を図5に示す。図5に示すように主面上にはテラス1、ステップ2の存在を確認することができる。
【0015】
主面6の結晶方位の傾斜角は、従来は(0001)面または(11−20)面から0〜0.3°の範囲に限定されていたが、温度及び時間を一律に設定した熱処理条件ではテラス1及びステップ2の形成は不安定であり且つ安定に表面粗さの小さな主面6を作成することができなかった。結晶方位の傾斜角が(0001)面または(11−20)面から0.03°以上のサファイア基板においては、熱処理を施した後のテラス幅は小さくなり、ステップの高さは2Å以下で安定に形成できず、起伏が大きくなるため主面6のRms値が0.1nmを安定して下回ることができない。このような主面のRms値が0.1nm以上の半導体用基板では、平滑な表面を持ったGaN膜を安定して得ることは困難であった。
【0016】
そこで、本発明は、安定して主面6のRms値が0.1nmを下回るサファイア基板を作成するために、主面6の(0001)面若しくは(11−20)面からの傾斜角を0.03°以下とし、熱処理によって主面6側の表面におけるステップ2の高さが2Å以下となるようにしたものである。この時テラス1の幅は400nm以上となり、主面6のRms値は0.1nmを下回るようになり、Ra値も0.06nmを下回る極めて平坦な半導体用基板を安定して形成できるようになる。
【0017】
この半導体用基板5を用いて図2の様にMBE法によりGaN結晶層3を結晶成長させた場合、AFM像は図4に示すように良好な平坦面を持ったGaN膜を安定に得ることができるようになる。
【0018】
本発明の半導体用基板5をなすサファイア基板は、CZ法(チョクラルスキー法)などの引き上げ法によってアルミナの融液から作成される。引き上げられた結晶は円柱状の形状をしており、この円柱状の結晶について結晶方位を測定して切断加工を行い円板形状となったものを研磨加工して基板として使用する。
【0019】
(0001)面若しくは(11−20)面からの主面の傾斜角が±0.03°の範囲になるよう研磨加工を終えた主面6はAFMにて観察すると、図3の様になっている。表面粗さはRa値で0.10nm,Rms値では0.14nmである。研磨終了時点での表面状態は、AFMで観察する限り(0001)面若しくは(11−20)面からの傾斜角には依存関係のない形状、粗さである。
【0020】
研磨を終えたサファイア基板に、850℃60時間の酸化雰囲気炉による熱処理を行なうと、図5の様に原子レベルで平滑化された表面が露出し、Ra値も0.06nmと研磨前に比べてほぼ半減した平坦な面を得ることが出来るようになる。
【0021】
主面が(0001)面若しくは(11−20)面から0.03°以下の傾斜角を持ったサファイア基板の熱処理における温度は、800℃未満では平滑化させるための時間が200時間以上は必要であり、実用的ではない。また、900℃を越える処理温度ではテラス1の面積は大きくなるが、同時にステップ2の段差が大きくなる傾向にあり2Åから20Å以上の段差を形成するようになり、表面粗さも悪くなる。ステップ2の段差が2Å以上になると、MBE法にてGaNを結晶成長させたGaN膜の表面の平坦性の改善は乏しい。
【0022】
以上のように、本発明においてはサファイア基板の結晶方位と熱処理条件を上述の範囲に限定することにより、図5に示すAFM像の主面6を持ち、400nm以上の幅のテラス1と2Å以下の高さのステップを有し、Rms値が0.1nm以下でRa値が0.06nm以下となり、原子レベルで平滑化された(atomic flat sapphire)主面6を持つ半導体用基板を安定に得ることが出来、この半導体用基板を用いてMBE法によりGaNを結晶成長させた場合に、図4に示す良好な表面と良好な結晶性を持ったGaN結晶層を安定に得ることが出来るようになる。
【0023】
また、本発明は半導体用基板5上にGaN結晶層を形成する場合、ガリウム(Ga)を金属ソースとし、窒素(N)をプラズマまたはアンモニアガスソースとしたMBE法において、窒化処理を行った半導体用基板5上にAlNまたはGaN層からなるバッファ層4を堆積し、更にGaN結晶層3をエピタキシャル成長する事により、平滑な表面を持ったGaN膜を安定して得るものである。上記GaN層は、AlXGaYIn(1-X-Y)N(X=0,Y=0,X=Y=0を含む)により表記されるこれら窒化物半導体を固溶したものにおいても同様の効果が期待できる。
【0024】
本発明によれば、良好な窒素−周期律表第3族元素化合物半導体膜を得ることが出来、発光ダイオード(LED)の他レーザーダイオード、MMIC等の半導体装置の特性の改善が期待できる。
【0025】
【実施例】
以下、本発明の実施例を図面を用いて説明する。
【0026】
(実施例1)
サファイア基板の主面が(0001)面からの傾斜角が±0.03°の範囲になるように基板の切断及び研削加工を行い、化学研磨加工を行う。研磨加工を終えたサファイア基板の主面は原子間力顕微鏡(AFM)にて観察すると、図3の様になっている。表面粗さはRa値で0.10nm,Rms値では0.14nmである。研磨終了時点での表面状態は、AFMで観察する限り基板の(0001)面からの傾斜角には依存関係のない形状、粗さである。
【0027】
研磨を終えたサファイア基板に、850℃60時間の酸化雰囲気炉による熱処理を行なうと、図5の様に原子レベルで平滑化された表面が露出し、Ra値も0.06nmと研磨前に比べてほぼ半減した平坦な面を得ることが出来るようになる。表面粗さ(Ra)値について、従来のサファイア基板との比較を表1に示す。数値的にも従来より大幅にサファイア基板の表面粗さを改善することができる。
【0028】
【表1】

Figure 0004651207
【0029】
この際、熱処理温度を900℃より高くすると、比較的短時間でテラスが現れる傾向があるが、同時に主面の原子層段差(ステップ)の複合が起こり、局所的に大きな起伏が現れるようになる。また、サファイア基板の主面の結晶方位が(0001)面から±0.03°よりも大きく傾斜している場合は、850℃50時間以下の熱処理でもテラスが現れるが、その幅が極端に小さくなり、表面粗さも熱処理前後で改善しない。サファイア基板の主面の結晶方位が(0001)面から±0.03°以下の範囲になっている場合は、図5の平坦面を得るために60時間以上の熱処理を施す必要があった。
【0030】
(実施例2)
上記実施例1の半導体用基板5を用いてGa金属とNプラズマを用いたMBE法によってGaNの結晶成長を行った。結晶成長の各段階でのRHEED(高速反射電子線回折)パターンについて、上記実施例1の半導体用基板5を用いた場合について図10〜図13に、従来の基板を用いた場合について図6〜9に示す。
【0031】
600℃でのサーマルクリーニング後の時点でのサファイア基板のRHEEDパターンは図6及び図10である。窒素プラズマを用いた窒化処理を行った状態でのRHEEDパターンは、従来の例(図7)、本発明の実施例のもの(図11)とも顕著な差は見られないが、低温バッファを堆積した後のRHEEDパターンは、従来の例(図8)に比べ、本発明の実施例(図12)では斑点SPOTが観察され多結晶化している様子が分かる。しかしながら、GaN1μm成長後のRHEEDパターンは、従来の例(図9)に比べて、本発明の実施例(図13)では、ストリークがシャープで明るく見える本数も多く、平坦性の高い良質な結晶が成長していることが解る。
【0032】
作成されたGaN基板の表面をAFMにて観察した結果、従来の例のGaN基板の表面(図14)に比べ、本発明の実施例によるGaN基板の表面(図4)は平滑性が大幅に改善している。
【0033】
(実施例3)
サファイア基板の主面が(11−20)面から±0.03°の範囲になるように基板の切断及び研削加工を行い、化学研磨加工を行う。研磨加工を終えたサファイア基板の表面は原子間力顕微鏡(AFM)にて観察すると、表面粗さはRa値で0.80nm,Rms値では0.11nmである。研磨終了時点での表面状態は、AFMで観察する限り基板の(11−20)面からの傾斜角には依存関係のない形状、粗さである。研磨を終えたサファイア基板に、800℃60時間の酸化雰囲気炉による熱処理を行なうと、テラスが明瞭に露出し、Ra値も0.04nmと研磨前に比べてほぼ半減した面を得ることが出来るようになり、従来より大幅にサファイア基板の表面粗さを改善することができる。
【0034】
この際、熱処理温度を850℃以上にすると、短時間で平坦面が現れる傾向があるが、局所的に大きな起伏が現れるようになり、サファイア基板の表面の結晶方位が(0001)面から±0.03°よりも大きく外れている場合は、テラス面の幅が極端に小さくなり、表面粗さは熱処理前後で改善しない。サファイア基板の表面の結晶方位が(11−20)面から±0.03°以下の範囲になっている場合は、図5の平坦面を得るために60時間以上の熱処理を施す必要があった。
【0035】
(実施例4)
上記実施例3のサファイア基板を用いてGa金属とNプラズマを用いたMBE法によってGaNの結晶成長を行った。結果、作成されたGaN基板の表面をAFMにて観察すると、(0001)面のサファイア基板の場合と同じく、従来のサファイア基板でのGaN基板の表面に比べ、本発明によるサファイア基板を用いたGaN基板の表面は平滑性が大幅に改善していた。
【0036】
【発明の効果】
本発明によれば、窒素−周期律表第3族元素化合物半導体の結晶成長に用いる基板であって、サファイアからなり、主面の結晶方位が(0001)面または(11−20)面から0〜0.03°傾いており、主面に400nm以上の幅のテラスと高さ2Å以下のステップを有し、主面の表面粗さがRms値で0.1nm以下、Ra値で0.06nm以下であることを特徴とする半導体用基板を用いれば、分子線エピタキシー(MBE)法においても良好なGaN膜が得られるようになる。本発明のGaN基板によって、特性の良好な半導体デバイスを作成することが可能になる。
【図面の簡単な説明】
【図1】本発明の半導体用基板の主面でのテラス・ステップの断面を示す概念図である。
【図2】本発明の半導体用基板に半導体膜を形成した状態の断面を示す概念図である。
【図3】結晶方位が(0001)面から±0.03°以下の範囲に傾斜したサファイア基板の研磨後の表面のAFM像である。
【図4】本発明の半導体用基板にGaN結晶層を成長した後の表面のAFM像である。
【図5】本発明による半導体用基板の主面のAFM像である。
【図6】本発明の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図7】本発明の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図8】本発明の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図9】本発明の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図10】従来の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図11】従来の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図12】従来の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図13】従来の半導体用基板の、製造工程における主面のRHEEDパターンを示す図である。
【図14】従来のサファイア基板にGaN結晶層を成長した後の表面のAFM像である。
【符号の説明】
1:テラス
2:ステップ
3:GaN結晶層
4:バッファ層
5:半導体用基板[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor substrate for forming a nitrogen-periodic table group 3 element compound semiconductor film and a method for manufacturing the same.
[0002]
[Prior art]
The structure of an epitaxial substrate of gallium nitride (hereinafter referred to as GaN) used for a light emitting diode or the like is provided with an aluminum nitride (AlN) or GaN buffer layer on a sapphire substrate, and an n-type GaN layer thereon. The p-type GaN layer is grown. An organic metal compound crystal growth (MO-CVD) method, a molecular beam epitaxy (MBE) method, or the like is used for the growth of the GaN and AlN layers of the GaN substrate.
[0003]
The sapphire substrate for the GaN substrate is a sapphire crystal created by a pulling method such as the Czochralski (CZ) method, and the surface orientation of the main surface is tilted from the (0001) plane or the (11-20) plane after cutting. What is adjusted so that the angle is 0 to 0.5 °, preferably 0 to 0.3 °, is used after chemical polishing. When GaN is grown on a sapphire substrate using the MBE method, the sapphire substrate to be used is etched with a mixed solution of phosphoric acid and sulfuric acid and subjected to hydrogen cleaning at 600 ° C., so that Rms (root mean square) of the main surface is obtained. It has been reported that (surface roughness) becomes very small and the crystallinity of GaN after crystal growth by the MBE method is improved (Jpn.J.Appl.Phys.Vol.37 (1998) pp.L1109-1112). reference).
[0004]
Further, in the crystal growth by MOCVD method, in the substrate having a large Ra value and Rms value on the main surface, the surface of the GaN layer after the crystal growth is further uneven (for example, IEICE Transactions 2000 / 4Vol.J83-Cno Therefore, a substrate with a small surface roughness was required.
[0005]
[Problems to be solved by the invention]
In a sapphire substrate that is generally used, the crystal orientation of the main surface is created at an inclination angle of 0 to 0.3 ° from the (0001) plane or the (11-20) plane of sapphire. First, when the GaN crystal is grown by the MBE method, the surface becomes very rough as shown in FIG. 14, and it is very difficult to stably obtain a GaN film having a smooth surface. It was.
[0006]
This is because the state of the surface of the sapphire substrate is not stable because the variation range of the crystal orientation of the main surface of the sapphire substrate is as large as 0 to 0.3 ° in inclination.
[0007]
Even when heat treatment or chemical etching with a mixed solution of phosphoric acid and sulfuric acid is not performed, there is a problem that the surface state of the sapphire substrate cannot be stably reproduced and the surface of the GaN film is also roughened. In addition, etching of sapphire with a strong acid such as phosphoric acid or sulfuric acid is dangerous because the acid temperature needs to be heated to 150 ° C. or higher.
[0008]
In view of the above problems, the present invention aims to obtain a GaN substrate having a smooth surface and excellent crystallinity, and for this purpose, it is effective to use a sapphire substrate having an extremely smooth surface. The purpose is to stably produce a sapphire substrate having an extremely smooth surface.
[0009]
[Means for Solving the Problems]
The present invention is a substrate used for crystal growth of a Group 3 element compound semiconductor of a nitrogen-periodic table, which is made of sapphire, and the crystal orientation of the main surface is 0 to 0 from the (0001) plane or the (11-20) plane. The main surface has a terrace with a width of 400 nm or more and a step of 2 mm or less in height. The surface roughness of the main surface is 0.1 nm or less in terms of Rms and 0.06 nm or less in terms of Ra. A GaN crystal is grown by molecular beam epitaxy (MBE) using this semiconductor substrate.
[0010]
As a manufacturing method for obtaining this semiconductor substrate made of sapphire, the main surface of the sapphire substrate is processed so that the crystal orientation is an inclination angle of 0 to 0.03 ° from the (0001) plane or the (11-20) plane. Then, heating in an oxidizing atmosphere at 800 to 900 ° C. for 60 hours or more is performed.
[0011]
[Action]
The semiconductor substrate of the present invention forms a surface having a very small surface roughness because a flat terrace surface at an atomic level is formed with a wide width of 400 nm or more and a step difference is stably small to 2 mm or less. I can do it. By using this semiconductor substrate, it is possible to obtain a GaN single crystal film in which the RHEED streak is clearer than in the prior art and the undulation shape of the surface is greatly smoothed even in the MBE method.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below.
[0013]
The semiconductor substrate of the present invention is made of sapphire, and the main surface has a crystal plane orientation tilted in the range of 0 to 0.03 ° from the (0001) plane or the (11-20) plane, and an oxidizing atmosphere 800 to 900. It is obtained by performing a heat treatment at 60 ° C. for 60 hours or more. As a result, as shown in FIG. 1, the main surface 6 has a terrace 1 which is a clear flat surface having a width of 400 nm or more and a step 2 having a height difference of 2 mm or less regularly, and an Rms value of 0.1 nm or less. Thus, the Ra (arithmetic average roughness) value is 0.06 nm or less, and the semiconductor substrate 5 having the main surface 6 smoothed at the atomic level (atomic flat sapphire) is obtained. This semiconductor substrate is used for forming a GaN crystal layer by the MBE method through a GaN or AlN buffer layer 4 as shown in FIG.
[0014]
An AFM (atomic force microscope) image of the main surface of the semiconductor substrate that has not been heat-treated is shown in FIG. 3, and an AFM image of the main surface 6 of the semiconductor substrate 5 created by using the manufacturing method of the present invention is shown in FIG. As shown in FIG. As shown in FIG. 5, the presence of terrace 1 and step 2 can be confirmed on the main surface.
[0015]
Conventionally, the tilt angle of the crystal orientation of the main surface 6 was limited to the range of 0 to 0.3 ° from the (0001) plane or the (11-20) plane, but the heat treatment conditions were set uniformly at the temperature and time. Then, the formation of the terrace 1 and the step 2 is unstable, and the main surface 6 having a small surface roughness cannot be stably formed. In a sapphire substrate whose crystal orientation tilt angle is 0.03 ° or more from the (0001) plane or the (11-20) plane, the terrace width after heat treatment is small, and the step height is stable at 2 mm or less. The Rms value of the main surface 6 cannot stably fall below 0.1 nm. In such a semiconductor substrate having an Rms value of 0.1 nm or more on the main surface, it has been difficult to stably obtain a GaN film having a smooth surface.
[0016]
Therefore, in order to stably produce a sapphire substrate in which the Rms value of the main surface 6 is less than 0.1 nm, the present invention reduces the inclination angle of the main surface 6 from the (0001) plane or the (11-20) plane to 0. 0.03 ° or less, and the height of step 2 on the surface on the main surface 6 side is set to 2 mm or less by heat treatment. At this time, the width of the terrace 1 is 400 nm or more, the Rms value of the main surface 6 is less than 0.1 nm, and an extremely flat semiconductor substrate having an Ra value of less than 0.06 nm can be stably formed. .
[0017]
When the GaN crystal layer 3 is grown by MBE using this semiconductor substrate 5 as shown in FIG. 2, the AFM image can stably obtain a GaN film having a good flat surface as shown in FIG. Will be able to.
[0018]
The sapphire substrate constituting the semiconductor substrate 5 of the present invention is made from a melt of alumina by a pulling method such as the CZ method (Czochralski method). The pulled-up crystal has a cylindrical shape, and the crystal orientation of this cylindrical crystal is measured and cut, and the disk-shaped one is polished and used as a substrate.
[0019]
The main surface 6 that has been polished so that the inclination angle of the main surface from the (0001) plane or the (11-20) plane is within a range of ± 0.03 ° is as shown in FIG. ing. The surface roughness is 0.10 nm in Ra value and 0.14 nm in Rms value. The surface state at the end of polishing is a shape and roughness having no dependency on the inclination angle from the (0001) plane or the (11-20) plane as long as observed by AFM.
[0020]
When the polished sapphire substrate is heat-treated in an oxidizing atmosphere furnace at 850 ° C. for 60 hours, the surface smoothed at the atomic level as shown in FIG. 5 is exposed, and the Ra value is 0.06 nm, compared to before polishing. As a result, a flat surface that is almost halved can be obtained.
[0021]
If the temperature in the heat treatment of the sapphire substrate whose main surface has an inclination angle of 0.03 ° or less from the (0001) surface or the (11-20) surface is less than 800 ° C., it takes 200 hours or more for smoothing. And not practical. At a processing temperature exceeding 900 ° C., the area of the terrace 1 increases, but at the same time, the step 2 has a tendency to increase, and a step of 2 to 20 inches or more is formed, resulting in poor surface roughness. When the level difference in step 2 is 2 mm or more, improvement in the flatness of the surface of the GaN film obtained by crystal growth of GaN by the MBE method is poor.
[0022]
As described above, in the present invention, the crystal orientation of the sapphire substrate and the heat treatment conditions are limited to the above-mentioned ranges, so that the main surface 6 of the AFM image shown in FIG. A semiconductor substrate having a main surface 6 that is smooth at the atomic level and has an Rms value of 0.1 nm or less and an Ra value of 0.06 nm or less (atomic flat sapphire). When a GaN crystal is grown by MBE using this semiconductor substrate, the GaN crystal layer having a good surface and good crystallinity shown in FIG. 4 can be stably obtained. Become.
[0023]
Further, in the present invention, when a GaN crystal layer is formed on a semiconductor substrate 5, a semiconductor subjected to nitriding treatment in the MBE method using gallium (Ga) as a metal source and nitrogen (N) as a plasma or ammonia gas source. A buffer layer 4 made of an AlN or GaN layer is deposited on a substrate 5 and a GaN crystal layer 3 is epitaxially grown to stably obtain a GaN film having a smooth surface. The above GaN layer is the same in the case where these nitride semiconductors represented by Al X Ga Y In (1-XY) N (including X = 0, Y = 0, X = Y = 0) are dissolved. The effect can be expected.
[0024]
According to the present invention, an excellent nitrogen-periodic table group 3 element compound semiconductor film can be obtained, and improvement in characteristics of a semiconductor device such as a light emitting diode (LED), a laser diode, and an MMIC can be expected.
[0025]
【Example】
Embodiments of the present invention will be described below with reference to the drawings.
[0026]
Example 1
The substrate is cut and ground so that the main surface of the sapphire substrate is in the range of ± 0.03 ° from the (0001) plane, and chemical polishing is performed. The main surface of the polished sapphire substrate is as shown in FIG. 3 when observed by an atomic force microscope (AFM). The surface roughness is 0.10 nm in Ra value and 0.14 nm in Rms value. The surface state at the end of polishing is a shape and roughness having no dependency on the tilt angle from the (0001) plane of the substrate as far as observed by AFM.
[0027]
When the polished sapphire substrate is heat-treated in an oxidizing atmosphere furnace at 850 ° C. for 60 hours, the surface smoothed at the atomic level as shown in FIG. 5 is exposed, and the Ra value is 0.06 nm, compared to before polishing. As a result, a flat surface that is almost halved can be obtained. Table 1 shows the surface roughness (Ra) value compared with the conventional sapphire substrate. Numerically, the surface roughness of the sapphire substrate can be greatly improved as compared with the prior art.
[0028]
[Table 1]
Figure 0004651207
[0029]
At this time, if the heat treatment temperature is higher than 900 ° C., terraces tend to appear in a relatively short time, but at the same time, a combination of atomic layer steps (steps) on the main surface occurs, and large undulations appear locally. . In addition, when the crystal orientation of the main surface of the sapphire substrate is inclined more than ± 0.03 ° from the (0001) plane, the terrace appears even after heat treatment at 850 ° C. for 50 hours or less, but its width is extremely small. The surface roughness is not improved before and after the heat treatment. When the crystal orientation of the main surface of the sapphire substrate is in the range of ± 0.03 ° or less from the (0001) plane, it was necessary to perform heat treatment for 60 hours or more in order to obtain the flat surface of FIG.
[0030]
(Example 2)
Crystal growth of GaN was performed by the MBE method using Ga metal and N plasma using the semiconductor substrate 5 of Example 1 above. Regarding RHEED (high-speed reflection electron diffraction) patterns at each stage of crystal growth, FIGS. 10 to 13 show the case where the semiconductor substrate 5 of Example 1 is used, and FIGS. 6 to 6 show the case where a conventional substrate is used. 9 shows.
[0031]
The RHEED pattern of the sapphire substrate at the time after thermal cleaning at 600 ° C. is shown in FIGS. The RHEED pattern in the state of performing nitriding using nitrogen plasma is not significantly different from the conventional example (FIG. 7) and the example of the present invention (FIG. 11), but a low temperature buffer is deposited. After the RHEED pattern, the spot SPOT is observed and polycrystallized in the embodiment of the present invention (FIG. 12) as compared to the conventional example (FIG. 8). However, the RHEED pattern after growth of 1 μm of GaN has a larger number of streaks that appear sharper and brighter in the embodiment of the present invention (FIG. 13) than in the conventional example (FIG. 9), and high quality crystals with high flatness are obtained. You can see that it is growing.
[0032]
As a result of observing the surface of the prepared GaN substrate by AFM, the surface of the GaN substrate according to the embodiment of the present invention (FIG. 4) is significantly smoother than the surface of the GaN substrate of the conventional example (FIG. 14). It has improved.
[0033]
(Example 3)
The substrate is cut and ground so that the main surface of the sapphire substrate is within a range of ± 0.03 ° from the (11-20) plane, and chemical polishing is performed. When the surface of the polished sapphire substrate is observed with an atomic force microscope (AFM), the surface roughness is 0.80 nm in terms of Ra and 0.11 nm in terms of Rms. The surface state at the end of polishing is a shape and roughness having no dependency on the tilt angle from the (11-20) plane of the substrate as far as observed by AFM. When the polished sapphire substrate is heat-treated in an oxidizing atmosphere furnace at 800 ° C. for 60 hours, the terrace is clearly exposed, and a surface with an Ra value of 0.04 nm, which is almost half that before polishing, can be obtained. As a result, the surface roughness of the sapphire substrate can be significantly improved as compared with the conventional case.
[0034]
At this time, when the heat treatment temperature is 850 ° C. or higher, a flat surface tends to appear in a short time, but a large undulation appears locally, and the crystal orientation of the surface of the sapphire substrate is ± 0 from the (0001) plane. When the angle is larger than 0.03 °, the width of the terrace surface becomes extremely small, and the surface roughness does not improve before and after the heat treatment. When the crystal orientation of the surface of the sapphire substrate is in the range of ± 0.03 ° or less from the (11-20) plane, it was necessary to perform heat treatment for 60 hours or more in order to obtain the flat surface of FIG. .
[0035]
Example 4
Crystal growth of GaN was performed by MBE method using Ga metal and N plasma using the sapphire substrate of Example 3 above. As a result, when the surface of the prepared GaN substrate is observed with an AFM, the GaN using the sapphire substrate according to the present invention is compared with the surface of the GaN substrate with the conventional sapphire substrate as in the case of the (0001) plane sapphire substrate. The smoothness of the surface of the substrate was greatly improved.
[0036]
【The invention's effect】
According to the present invention, a substrate used for crystal growth of a Group 3 element compound semiconductor of a nitrogen-periodic table is made of sapphire, and the crystal orientation of the main surface is 0 from the (0001) plane or the (11-20) plane. The main surface has a terrace with a width of 400 nm or more and a step with a height of 2 mm or less. The surface roughness of the main surface is 0.1 ms or less in terms of Rms and 0.06 nm in terms of Ra. If a semiconductor substrate having the following characteristics is used, a good GaN film can be obtained even in the molecular beam epitaxy (MBE) method. The GaN substrate of the present invention makes it possible to produce a semiconductor device with good characteristics.
[Brief description of the drawings]
FIG. 1 is a conceptual diagram showing a cross section of a terrace step on a main surface of a semiconductor substrate of the present invention.
FIG. 2 is a conceptual diagram showing a cross section in a state where a semiconductor film is formed on a semiconductor substrate of the present invention.
FIG. 3 is an AFM image of a polished surface of a sapphire substrate whose crystal orientation is inclined within a range of ± 0.03 ° or less from the (0001) plane.
FIG. 4 is an AFM image of a surface after a GaN crystal layer is grown on a semiconductor substrate of the present invention.
FIG. 5 is an AFM image of a main surface of a semiconductor substrate according to the present invention.
FIG. 6 is a view showing an RHEED pattern of a main surface in a manufacturing process of a semiconductor substrate of the present invention.
FIG. 7 is a view showing an RHEED pattern of the main surface in the manufacturing process of the semiconductor substrate of the present invention.
FIG. 8 is a view showing an RHEED pattern of the main surface in the manufacturing process of the semiconductor substrate of the present invention.
FIG. 9 is a view showing an RHEED pattern of the main surface in the manufacturing process of the semiconductor substrate of the present invention.
FIG. 10 is a view showing an RHEED pattern of a main surface in a manufacturing process of a conventional semiconductor substrate.
FIG. 11 is a view showing a RHEED pattern of a main surface in a manufacturing process of a conventional semiconductor substrate.
FIG. 12 is a view showing an RHEED pattern of a main surface in a manufacturing process of a conventional semiconductor substrate.
FIG. 13 is a diagram showing a RHEED pattern of a main surface in a manufacturing process of a conventional semiconductor substrate.
FIG. 14 is an AFM image of a surface after a GaN crystal layer is grown on a conventional sapphire substrate.
[Explanation of symbols]
1: Terrace 2: Step 3: GaN crystal layer 4: Buffer layer 5: Semiconductor substrate

Claims (3)

窒素−周期律表第3族元素化合物半導体の結晶成長に用いる基板であって、サファイアからなり、主面が結晶方位(0001)面または(11−20)面から0〜0.03°傾いており、主面に高さ2Å以下であるステップを有し、主面の表面粗さがRms値で0.1nm以下、Ra値で0.06nm以下であることを特徴とする半導体用基板。  A substrate used for crystal growth of a Group 3 element compound semiconductor of a nitrogen-periodic table, which is made of sapphire, and the main surface is inclined by 0 to 0.03 ° from the crystal orientation (0001) plane or (11-20) plane. And a step of having a height of 2 mm or less on the main surface, wherein the surface roughness of the main surface is 0.1 nm or less in terms of Rms and 0.06 nm or less in terms of Ra. 上記化合物半導体がAlGaIn(1−X−Y)N(X=0,Y=0,X=Y=0を含む)から成り、分子線エピタキシー(MBE)法により結晶成長させることを特徴とする請求項1に記載の半導体用基板。Consists the compound semiconductor is Al X Ga Y In (including X = 0, Y = 0, X = Y = 0) (1-X-Y) N, to be grown by molecular beam epitaxy (MBE) The semiconductor substrate according to claim 1. 基板状のサファイア結晶を研磨加工して、主面の傾斜角を、(0001)面または(11−20)面から0〜0.03°とした後、
前記基板状のサファイア結晶を800〜900℃で60時間以上の酸化雰囲気加熱を行うことにより製作されることを特徴とする請求項1に記載の半導体用基板。
After polishing the substrate-like sapphire crystal and setting the inclination angle of the main surface to 0 to 0.03 ° from the (0001) plane or the (11-20) plane,
The semiconductor substrate according to claim 1, wherein the substrate-like sapphire crystal is manufactured by heating in an oxidizing atmosphere at 800 to 900 ° C. for 60 hours or more.
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