JP4601564B2 - Error correction processing method and transmission apparatus - Google Patents

Error correction processing method and transmission apparatus Download PDF

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JP4601564B2
JP4601564B2 JP2006045566A JP2006045566A JP4601564B2 JP 4601564 B2 JP4601564 B2 JP 4601564B2 JP 2006045566 A JP2006045566 A JP 2006045566A JP 2006045566 A JP2006045566 A JP 2006045566A JP 4601564 B2 JP4601564 B2 JP 4601564B2
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敦 宮下
和彦 中村
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Hitachi Kokusai Electric Inc
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Description

本発明は、デジタル伝送装置から出力されるデジタルデータの信頼性向上に関する技術である。   The present invention relates to a technique for improving the reliability of digital data output from a digital transmission apparatus.

昨今、映像や音声信号をデジタル信号化した後、MPEG処理によりデータ圧縮し、デジタルデータを伝送可能な変調器や復調器で変調調し、伝送する技術が多用されている。従来技術と本発明に共通な映像デジタル伝送システム全体の構成を示すブロック図の図5を用いて、以下に説明する。   2. Description of the Related Art Recently, a technique is frequently used in which video and audio signals are converted into digital signals, data is compressed by MPEG processing, modulated by a modulator or demodulator capable of transmitting digital data, and transmitted. This will be described below with reference to FIG. 5 which is a block diagram showing the overall configuration of a video digital transmission system common to the prior art and the present invention.

送信側において、映像信号はMPEGエンコーダ11に入力され、圧縮データとなる。この圧縮データの構成は、8ビット即ち1バイトを1ワードとした188ワードと16ワードのパリティの合計204ワードを単位とする多数個の誤り訂正単位(以後パケット)から構成されるトランスポートストリーム(以後TS)信号と呼ぶ形態となる。このTS信号は、DVBエンコーダ(Digital Video Broadcasting−Encoder)12に入力され、DVB(Digital Video Broadcasting)処理を施されDVBe信号となる。このDVBe信号は、変調部13により、例えばOFDM変調され、送信部14に送られ送信アンテナ15から電波として放射される。   On the transmission side, the video signal is input to the MPEG encoder 11 and becomes compressed data. This compressed data is composed of a transport stream composed of a large number of error correction units (hereinafter referred to as packets) having a total of 204 words of 188 words and 16 words of parity of 8 bits, that is, 1 byte as 1 word. Hereinafter, it will be referred to as a TS) signal. This TS signal is input to a DVB encoder (Digital Video Broadcasting-Encoder) 12 and subjected to DVB (Digital Video Broadcasting) processing to become a DVBe signal. This DVBe signal is, for example, OFDM-modulated by the modulation unit 13, sent to the transmission unit 14, and radiated as a radio wave from the transmission antenna 15.

放射された電波は、伝送路W1を経由して、受信アンテナ16に到達する。なお、伝送路W1の状態においては、電波の強さも距離に応じて減衰するため雑音等も混入してしまう。受信アンテナ16により収集された電波は、受信部17に入力され、復調部18に入力され、変調と同一の処理に対応するOFDM復調が行われ、DVBr信号として出力される。このDVBr信号は、DVBデコーダ19に入力され、TSr信号となって、元のトランスポート信号に戻される。MPEGデコーダ20は、このTSr信号を伸張処理し、元の映像信号を出力する。   The radiated radio wave reaches the receiving antenna 16 via the transmission path W1. In the state of the transmission line W1, noise and the like are also mixed because the strength of the radio wave is attenuated according to the distance. The radio waves collected by the receiving antenna 16 are input to the receiving unit 17 and input to the demodulating unit 18, subjected to OFDM demodulation corresponding to the same processing as the modulation, and output as a DVBr signal. This DVBr signal is input to the DVB decoder 19 and converted into a TSr signal and returned to the original transport signal. The MPEG decoder 20 decompresses this TSr signal and outputs the original video signal.

ここで、受信側におけるDVBデコーダ19で行うRS(Read Solomon)訂正の概念について簡単に述べる。RS訂正は、16ワードのパリティを与えた場合、パリティの数16だけ方程式を作れるので、16個の未知数が求められる。つまり、8つの誤りの位置8個とその値8個を算出できるため、場所不明の8個の誤りを訂正できる。すなわち、付加したパリティ数の半分の誤りに対し、その位置と誤った値を算出できる。ただし、検算に用いる式が無くなるため、多くの誤りが混入した場合、誤訂正を検出できない頻度が増加する。訂正の数を減らせば、一部の式を検算に用いることができ、誤訂正が発生する頻度は低下させられる。RS訂正は、訂正能力をフル活用しなければ、誤りを誤認する頻度を低減できる。しかし、204ワード中に9ワード以上の誤りがあると、誤り訂正は全く行わず、エラーフラグを発生する。ここで、エラーフラグとは誤り訂正が成功したか否かを示す情報のことであり、以下フラグと省略する。   Here, the concept of RS (Read Solomon) correction performed by the DVB decoder 19 on the receiving side will be briefly described. In the RS correction, when a parity of 16 words is given, an equation can be made by the number of parities of 16, so that 16 unknowns are obtained. That is, since 8 positions of 8 errors and 8 values thereof can be calculated, 8 errors of unknown location can be corrected. That is, for an error that is half the number of added parities, the position and an incorrect value can be calculated. However, since there are no equations used for verification, when many errors are mixed, the frequency at which erroneous correction cannot be detected increases. If the number of corrections is reduced, some equations can be used for verification, and the frequency of occurrence of erroneous corrections can be reduced. RS correction can reduce the frequency of error recognition unless the correction capability is fully utilized. However, if there are errors of 9 words or more in 204 words, error correction is not performed at all and an error flag is generated. Here, the error flag is information indicating whether or not the error correction is successful, and is hereinafter abbreviated as a flag.

そこで従来は受信部で、サイトダイバシチにおいて、図7のように各系統を誤り訂正し、図8のように誤りの無い系統のパケットを選択していた。
特開2003−283468号公報
Therefore, conventionally, in the site diversity at the receiving unit, each system is error-corrected as shown in FIG. 7, and a packet having no error as shown in FIG. 8 is selected.
JP 2003-283468 A

上記の誤り訂正は、付加パリティ数の半分の8ワードまでの誤りであれば元の正しいワードに訂正できる。しかし、誤りワード数が9ワード以上の場合、訂正不能となり誤りは残留する。   In the above error correction, if the error is up to 8 words, which is half of the number of added parities, the original correct word can be corrected. However, when the number of error words is 9 words or more, correction is impossible and errors remain.

3系統以上あれば、多数決により選択したワードが誤りである確率より、正常である確率の方が高いため、誤り総数が8ヶ以内となり、誤り訂正可能となる可能性が大きい。しかし、2系統で、誤りワード数が多く誤り訂正できない場合は従来の構成においては、訂正処理の誤った処理によって、誤りがさらに増加し、MPEG復号処理をさらに悪化させる欠点を持つ。この悪化は、時として、届くはずのないデータを待つなどの、大きな間違いをMPEGデコーダに与え、異常画像の生じる秒数を長くする欠点も生じる。   If there are three or more lines, the probability of being normal is higher than the probability that the word selected by the majority is in error, so that the total number of errors is within 8 and the possibility of error correction is high. However, when the number of error words is large and error correction cannot be performed in two systems, the conventional configuration has a disadvantage that errors further increase due to incorrect processing of correction processing, which further deteriorates MPEG decoding processing. This deterioration sometimes gives rise to the disadvantage of giving a large error to the MPEG decoder, such as waiting for data that should not arrive, and increasing the number of seconds in which an abnormal image occurs.

本発明はこれらの欠点を除去し、多数決が成立しない2系統で誤りが多い場合でも、誤り訂正の成功率を高めることを目的とする。   An object of the present invention is to eliminate these drawbacks and increase the success rate of error correction even when there are many errors in two systems in which a majority vote is not established.

本発明は、上記課題を解決するため、誤り訂正符号化処理を施したデジタル信号を伝送する伝送装置において、受信側での復号化処理に際し、受信信号におけるブロック符号化信号のA系統とB系統との2系統を入力とし、少なくとも誤り訂正不可能な誤り訂正単位は、それぞれのタイミング位相を、ワード単位にて一致させた後、前記ブロック符号化信号のA系統とB系統と、前記A系統の複数の所定の選択基準の番号ワードと前記B系統の前記複数の所定の選択基準から外れた番号ワードとを組み合わせ生成したブロック符号化信号系統と、前記A系統の前記複数の所定の選択基準から外れた番号ワードと前記B系統の前記複数の所定の選択基準の番号ワードとを組み合わせ生成したブロック符号化信号系統、とをそれぞれ、誤り訂正し、誤り訂正が完了した系統を選択出力する。   In order to solve the above-described problems, the present invention provides a transmission apparatus for transmitting a digital signal subjected to error correction coding processing. In the decoding processing on the receiving side, the A system and the B system of the block coded signal in the received signal And at least error correction units that cannot be corrected for errors, the timing phases of which coincide with each other in word units, and then the A system and B system of the block coded signal, and the A system A block coded signal system generated by combining a plurality of predetermined selection criterion number words and a number word deviating from the plurality of predetermined selection standards of the B system, and the plurality of predetermined selection standards of the A system A block coded signal system generated by combining a number word deviating from the number B and the plurality of predetermined selection standard number words of the B system, respectively, for error correction It selects and outputs the system error correction has been completed.

また、前記の所定の選択基準の番号とは、2N+1(奇数)、または4N(4の倍数)、または4N+1(4の倍数の直後の数)、または4N+2(4の倍数でない偶数)、または4N+3(4の倍数の直前の数)、または4N+1(4の倍数の直後の数)と4N+2(4の倍数でない偶数)、または4N+1(4の倍数の直後の数)と4N+3(4の倍数の直前の数)、または4N+1(4の倍数の直後の数)と4N(4の倍数)、または2分割の前半部分、または4分割の前半部分、または4分割の1分割目部分と3分割目部分、または4分割の1分割目部分と4分割目部分のいずれかである。   The predetermined selection reference number is 2N + 1 (odd number), 4N (a multiple of 4), 4N + 1 (a number immediately after a multiple of 4), 4N + 2 (an even number not a multiple of 4), or 4N + 3 (Number immediately before a multiple of 4), or 4N + 1 (number immediately after a multiple of 4) and 4N + 2 (an even number that is not a multiple of 4), or 4N + 1 (number immediately after a multiple of 4) and 4N + 3 (just before a multiple of 4) Or 4N + 1 (a number immediately after a multiple of 4) and 4N (a multiple of 4), or the first half of 2 divisions, or the first half of 4 divisions, or the first and third divisions of 4 divisions , Or any one of the first and fourth divided parts.

さらに、前記の所定の選択基準の番号とは、188ワードのデータと16ワードのパリティとで異なる。
ところで、前記の組み合わせ生成したブロック符号化信号系統数が2の累乗−2(6,14,30,62,126)である。
Furthermore, the predetermined selection reference number is different for 188-word data and 16-word parity.
By the way, the number of block coded signal systems generated in combination is a power of 2-2 (6, 14, 30, 62, 126).

また、映像信号をデジタル圧縮符号化し、誤り訂正符号化等の伝送路符号化処理を施し、デジタル変調した後に伝送信号化する送信部と、該伝送信号を受信し、デジタル復調処理、誤り訂正等の伝送路復号化処理、デジタル圧縮情報の伸張処理をする受信部とからなる伝送装置において、上記受信部の伝送路復号化部での復号化処理に際し、前記の誤り訂正処理を行う手段を設けたことを特徴とする伝送装置を供給する。   In addition, the video signal is digitally compressed and encoded, transmission channel encoding processing such as error correction encoding is performed, and after digital modulation, the transmission signal is converted into a transmission signal, and the transmission signal is received, digital demodulation processing, error correction, etc. Means for performing the error correction processing at the time of decoding processing in the transmission path decoding section of the receiving section in a transmission device comprising a receiving section for performing transmission path decoding processing and digital compression information expansion processing A transmission device is provided.

以上説明したように本発明によれば、多数決が成立しない2系統で誤りが多く従来の方法では誤り数が多く訂正不可能なTS信号においても、多数のワードを入れ替えした系統に対して誤り訂正し、1つ以上の系統が誤り訂正できる確率が高くなり、画像復調の処理を停止する頻度を低下することができる。   As described above, according to the present invention, error correction is performed for a system in which a large number of words are replaced even in a TS signal in which there are many errors in two systems in which the majority decision is not established and the number of errors is uncorrectable in the conventional method. In addition, the probability that one or more systems can correct an error increases, and the frequency of stopping the image demodulation process can be reduced.

そのため、ワード入替と誤り訂正の論理回路の追加により、最も簡単な2系統のサイトダイバシチで、安定な画像伝送が実現できる。   Therefore, stable image transmission can be realized with the simplest two-system site diversity by adding logic circuits for word replacement and error correction.

図5に、従来技術と本発明に共通な伝送システム全体の構成を示すブロック図であり、以下に説明する。本発明の実施例が従来技術と異なる点は、図5のDVBデコーダ19の内部の誤り訂正が改良されたことである。   FIG. 5 is a block diagram showing the configuration of the entire transmission system common to the prior art and the present invention, which will be described below. The embodiment of the present invention is different from the prior art in that the error correction inside the DVB decoder 19 of FIG. 5 is improved.

図5の送信側において、映像信号はMPEGエンコーダ11に入力され、圧縮データとなる。この圧縮データの構成は、8ビットを1ワードとした188ワードを単位とする多数個のパケットから構成されるTS信号と呼ぶ形態となる。このTS信号は、DVBエンコーダ12に入力され、DVB処理を施されDVBe信号となる。このDVBe信号は、変調部13により、例えばOFDM変調され、送信部14に送られ送信アンテナ15から電波として放射される。   On the transmission side in FIG. 5, the video signal is input to the MPEG encoder 11 and becomes compressed data. The configuration of the compressed data is a form called a TS signal composed of a large number of packets in units of 188 words with 8 bits as one word. This TS signal is input to the DVB encoder 12 and subjected to DVB processing to become a DVBe signal. This DVBe signal is, for example, OFDM-modulated by the modulation unit 13, sent to the transmission unit 14, and radiated as a radio wave from the transmission antenna 15.

放射された電波は、伝送路W1を経由して、受信アンテナ16に到達する。なお、伝送路W1の状態においては、電波の強さも距離に応じて減衰するため雑音等も混入してしまう。受信アンテナ16により収集された電波は、受信部17に入力され、復調部18に入力され、変調と同一の処理に対応するOFDM復調が行われ、DVBr信号として出力される。このDVBr信号は、DVBデコーダ19に入力され、誤り訂正を施され、TSr信号となって、元のトランスポート信号に戻される。MPEGデコーダ20は、このTSr信号を伸張処理し、元の映像信号を出力する。   The radiated radio wave reaches the receiving antenna 16 via the transmission path W1. In the state of the transmission line W1, noise and the like are also mixed because the strength of the radio wave is attenuated according to the distance. The radio waves collected by the receiving antenna 16 are input to the receiving unit 17 and input to the demodulating unit 18, subjected to OFDM demodulation corresponding to the same processing as the modulation, and output as a DVBr signal. This DVBr signal is input to the DVB decoder 19, subjected to error correction, converted into a TSr signal, and returned to the original transport signal. The MPEG decoder 20 decompresses this TSr signal and outputs the original video signal.

次に、誤り訂正する系のパケットを多数追加し、誤り訂正できる確率を高くする本発明の誤り訂正処理動作をまず定性的に説明し、後で図を用いて詳細に説明する。
まず定性的には、2系統とも訂正不能な場合に備えて、複数の選択基準の番号ワードと前記B系統の前記複数の選択基準から外れた番号ワードとを組み合わせ生成したブロック符号化信号系統と、A系統の前記複数の選択基準から外れた番号ワードとB系統の前記複数の選択基準の番号ワードとを組み合わせ生成したブロック符号化信号系統のパケットとをそれぞれ、誤り訂正し、誤り訂正が完了した系統のパケットを選択出力する。
Next, the error correction processing operation of the present invention for adding a large number of packets for error correction and increasing the probability of error correction will be described qualitatively first, and will be described in detail later with reference to the drawings.
First, qualitatively, a block coded signal system in which a plurality of selection reference number words and a number word deviating from the plurality of selection criteria of the B system are generated in combination in the case where both systems cannot be corrected. , Error correction is performed for each of the packets of the block coded signal system generated by combining the number word deviating from the plurality of selection criteria of the A system and the plurality of selection criteria number words of the B system, and the error correction is completed. Select and output packets of the selected system.

また、多数のデータを入れ替えるため、前記の所定の選択基準の番号とは、2N+1(奇数)、または4N(4の倍数)、または4N+1(4の倍数の直後の数)、または4N+2(4の倍数でない偶数)、または4N+3(4の倍数の直前の数)、または4N+1(4の倍数の直後の数)と4N+2(4の倍数でない偶数)、または4N+1(4の倍数の直後の数)と4N+3(4の倍数の直前の数)、または4N+1(4の倍数の直後の数)と4N(4の倍数)、または2分割の前半部分、または4分割の前半部分、または4分割の1分割目部分と3分割目部分、または4分割の1分割目部分と4分割目部分のいずれかである。合計11種の選択基準で、22系統が追加される。   In order to replace a large number of data, the predetermined selection reference number is 2N + 1 (odd number), 4N (a multiple of 4), 4N + 1 (a number immediately after a multiple of 4), or 4N + 2 (4 An even number that is not a multiple), or 4N + 3 (the number that immediately precedes a multiple of 4), or 4N + 1 (the number that immediately follows a multiple of 4) and 4N + 2 (an even number that is not a multiple of 4), or 4N + 1 (the number that immediately follows a multiple of 4) 4N + 3 (the number immediately before a multiple of 4), or 4N + 1 (the number immediately after a multiple of 4) and 4N (a multiple of 4), or the first half of 2 divisions, or the first half of 4 divisions, or 1 division of 4 divisions It is either the eye part and the third part part, or the first part part and the fourth part part of the four parts. 22 systems are added based on a total of 11 selection criteria.

ここで、パケットは188バイトのデータと16バイトのパリティから構成される204バイトの誤り訂正の単位なので、188と16の公約数1,2,4から2分割と4分割となる。さらに、多数のデータを入れ替えるため、前記の所定の選択基準の番号とは、188ワードのデータと16ワードのパリティとで異ならせれば、11x11x2=242と242系統が追加される。   Here, since the packet is a unit of error correction of 204 bytes composed of 188 bytes of data and 16 bytes of parity, the common divisors 1, 2, 4 of 188 and 16 are divided into two and four. Further, in order to replace a large number of data, if the predetermined selection reference number is different between 188-word data and 16-word parity, 11 × 11 × 2 = 242 and 242 systems are added.

ところで、前記の組み合わせ生成したブロック符号化信号系統数が2の累乗−2の6,14,30,62,126,254であれば、A系統とB系統を合計した全体の選択数は2の累乗8,16,32,64,128,256で論理設計が容易となる。   By the way, if the number of block coded signal systems generated in combination is a power of 2-6, 14, 30, 62, 126, and 254, the total number of selections of the total of system A and system B is 2. Logic design is easy with powers 8, 16, 32, 64, 128, and 256.

以下、本発明の実施例の誤り訂正処理について、図1から図4を用いて説明する。図1は本発明の誤り訂正処理の一実施例による構成を示すブロック図であり、図2、図3、図4は本発明の誤り訂正処理の一実施例の動作を示すタイムチャートの模式図である。   The error correction processing according to the embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram showing a configuration according to an embodiment of the error correction processing of the present invention, and FIGS. 2, 3, and 4 are schematic diagrams of time charts showing operations of the embodiment of the error correction processing of the present invention. It is.

本発明の誤り訂正処理の一実施例による構成を示すブロック図の図1において、復調部1、2出力のDVBr信号を誤り訂正部4,5で処理しても、フラグNGで訂正不能な場合に備えて、選択部10でDVBr信号をワードごとに入れ替えてから、誤り訂正部6、誤り訂正部7、誤り訂正部21から誤り訂正部30で処理した誤り訂正結果を選択部9で誤り訂正が完了した系統のパケットを選択出力する。つまり、誤り訂正する系のパケットを多数追加し、誤り訂正できる確率を高くする
本発明の誤り訂正処理の一実施例の動作を示すタイムチャートの模式図の図2の上段の部分の様に、誤り訂正の信号が、A系統とB系統ともフラグNGで訂正不能の場合、A系統の奇数番号ワードとB系統偶数番号ワードとを組み合わせ生成したパケットのア系統と、B系統の奇数番号ワードとA系統偶数番号ワードとを組み合わせ生成したパケットのイ系統とを、出力する。A系統の4N+1(4の倍数の直後の数)と4N+2(4の倍数でない偶数)の番号ワードと前記B系統の4N+3(4の倍数の直前の数)と4N(4の倍数)番号ワードとを組み合わせ生成したブロック符号化信号ウ系統と、B系統の4N+1(4の倍数の直後の数)と4N+2(4の倍数でない偶数)の番号ワードとA系統の4N+3(4の倍数の直前の数)と4N(4の倍数)番号ワードとを組み合わせ生成したパケットのエ系統を出力する。そして、ブロック図の図1の様に、A系統とB系統とア系統とイ系統とウ系統とエ系統をそれぞれ、誤り訂正し、誤り訂正が完了したイ系統を、選択出力する。
In FIG. 1 of the block diagram showing the configuration according to one embodiment of the error correction processing of the present invention, even if the DVBr signals output from the demodulation units 1 and 2 are processed by the error correction units 4 and 5, they cannot be corrected by the flag NG In preparation for the error correction, the selection unit 10 replaces the DVBr signal for each word, and the error correction unit 6, the error correction unit 7, and the error correction result processed by the error correction unit 21 from the error correction unit 21 are corrected by the selection unit 9. Selects and outputs the packet of the system that has completed. That is, by adding a large number of packets for error correction and increasing the probability of error correction, as in the upper part of FIG. 2 in the schematic diagram of the time chart showing the operation of one embodiment of the error correction processing of the present invention, When the error correction signal cannot be corrected by the flag NG in both the A system and the B system, the A system of the packet generated by combining the odd number word of the A system and the B system even number word, and the odd number word of the B system The A system of the packet generated by combining the A system even number word is output. 4N + 1 (number immediately after a multiple of 4) and 4N + 2 (even numbers that are not multiples of 4) number words, 4N + 3 (number immediately before a multiple of 4) and 4N (multiples of 4) number words of the B system Block-coded signal c system generated by combining, number word of 4N + 1 (number immediately after a multiple of 4) and 4N + 2 (even number not a multiple of 4) of system B, and 4N + 3 (number just before a multiple of 4) of system A ) And 4N (multiple of 4) number words are output. Then, as shown in FIG. 1 of the block diagram, the A system, the B system, the A system, the A system, the C system, and the D system are each subjected to error correction, and the A system that has completed the error correction is selectively output.

即ち、図2の上段の部分の様に、誤り訂正のパケットが、A系統とB系統の2系統ともフラグNGで訂正不能な場合でも、2系統の誤りは系統ごとに発生はバラバラであり、2系統の誤りは互いに異なり、2系統の誤りの総数は、誤り訂正可能な限界8ヶと大きく変わらない事が多い。その結果、図2の中段の部分の様に、ワード単位で差し替え生成したパケットは、図2のエ系統の様に一方のパケットのは誤り総数が減少し、図2のウ系統の様に他方のパケットのは誤り数が増加する。その結果一方のパケットは誤り総数が8ヶ以内となり、誤り訂正可能となる可能性が大きい。   That is, as shown in the upper part of FIG. 2, even if the error correction packet cannot be corrected by the flag NG in both the A system and the B system, the two system errors are generated separately for each system. The two systems of errors are different from each other, and the total number of errors of the two systems is often not much different from the limit of 8 errors that can be corrected. As a result, as shown in the middle part of FIG. 2, in the packet generated by replacement in units of words, the total number of errors of one packet is reduced as in the system of FIG. The number of errors increases. As a result, the total number of errors in one packet is 8 or less, and there is a high possibility that errors can be corrected.

さらに、図3の様に、A系統の4の倍数以外の番号ワードとB系統の4の倍数の番号ワードとを組み合わせ生成したパケットのオ系統と、B系統の4の倍数の番号ワードとA系統の4の倍数以外の番号ワードとを組み合わせ生成したパケットのカ系統と、A系統の4N+1(4の倍数の直後の数)以外の番号ワードとB系統の4N+1(4の倍数の直後の数)の番号ワードとを組み合わせ生成したパケットのキ系統と、B系統の4N+1(4の倍数の直後の数)の番号ワードとA系統の4N+1(4の倍数の直後の数)以外の番号ワードとを組み合わせ生成したパケットのク系統とをそれぞれ、誤り訂正し、誤り訂正が完了したオ系統を選択出力する。   Further, as shown in FIG. 3, a packet system O generated by combining a number word other than a multiple of 4 of the A system and a number word of a multiple of 4 of the system B, a number word of a multiple of 4 of the system B, and A A packet generated by combining number words other than a multiple of 4 of the system, a number word other than 4N + 1 of the A system (number immediately after a multiple of 4), and 4N + 1 of the B system (number immediately after a multiple of 4) ) Number words other than 4N + 1 (number immediately after a multiple of 4) and a number word other than 4N + 1 (number immediately after a multiple of 4) of the A system, Each of the packet systems generated by combining the error corrections is error-corrected, and the error-completed system is selectively output.

A系統の2分割の前半部分のワードとB系統の2分割の後半部分のワードとを組み合わせ生成したパケットのケ系統と、B系統の2分割の前半部分ワードとA系統の2分割の後半部分のワードとを組み合わせ生成したパケットのコ系統と、A系統の4分割の1分割目部分と3分割目部分とのワードとB系統4分割の2分割目部分と4分割目部分とのワードとを組み合わせ生成したパケットのサ系統と、A系統の4分割の2分割目部分と4分割目部分とのワードとB系統4分割の1分割目部分と3分割目部分とのワードとを組み合わせ生成したパケットのシ系統と、をそれぞれ誤り訂正し、誤り訂正が完了したサ系統を選択出力する。   A packet system generated by combining a word in the first half of the A system divided into two parts and a word in the second half of the system divided into two parts, a first half part word of the two systems divided into the B system, and a latter part of the two parts of the A system Of the packet generated by combining the two words, the words of the first and third divisions of the four divisions of the A system, the words of the second and fourth divisions of the four divisions of the B system, Generated by combining the packet system of the packet generated by combining A, the word of the second divided part and the fourth divided part of the A system, and the word of the first divided part and the third divided part of the B system divided into four parts. The error correction is performed on each of the received packet systems, and the system that has completed the error correction is selectively output.

即ち、図2と同様に、図4の上段の部分の様に、誤り訂正の信号が、A系統とB系統の2系統ともフラグNGで訂正不能な場合でも、2系統の誤りは系統ごとに発生はバラバラであり、図3の中段の部分の様に、ワード単位で差し替え生成した結果は、図3のサ系統の様に片方の系統は誤り総数が減少し、図4のシ系統の様に他方の系統は誤り数が増加する。その結果一方の系統は誤り総数が片方の8ヶ以内となり、誤り訂正可能となる可能性が大きい。   That is, as in FIG. 2, as in the upper part of FIG. 4, even if the error correction signal cannot be corrected by the flag NG in both the A system and the B system, the error in the two systems is different for each system. As shown in the middle part of FIG. 3, the generation result is replaced by word unit. As a result, the total number of errors is reduced in one system as shown in FIG. On the other hand, the number of errors increases in the other system. As a result, the total number of errors in one system is within 8 of one and there is a high possibility that errors can be corrected.

即ち、本発明の第一の誤り訂正処理の実施例による構成を示すブロック図の図1の様に、多くの選択基準でワード単位で差し替え生成したパケットは、A系統とB系統の2系統のパケットともフラグNGで訂正不能な場合でも、少なくとも1つの系統のパケットは誤り総数が減少し、誤り総数が8ヶ以内となり、誤り訂正可能となる可能性が大きい。   That is, as shown in FIG. 1 of the block diagram showing the configuration according to the first embodiment of the error correction processing of the present invention, packets generated by replacement in units of words with many selection criteria are divided into two systems of A system and B system. Even if both packets cannot be corrected by the flag NG, the total number of errors of the packets of at least one system is reduced, the total number of errors is within 8, and the possibility of error correction is high.

本発明の誤り訂正処理の一実施例による構成を示すブロック図The block diagram which shows the structure by one Example of the error correction processing of this invention 本発明の誤り訂正処理の一実施例の動作を示すタイムチャートの模式図Schematic diagram of time chart showing operation of one embodiment of error correction processing of the present invention 本発明の誤り訂正処理の他の実施例の動作を示すタイムチャートの模式図Schematic diagram of a time chart showing the operation of another embodiment of the error correction processing of the present invention 本発明の誤り訂正処理の別の実施例の動作を示すタイムチャートの模式図Schematic diagram of a time chart showing the operation of another embodiment of the error correction processing of the present invention 従来技術と本発明に共通な伝送システム全体の構成を示すブロック図The block diagram which shows the structure of the whole transmission system common to a prior art and this invention 従来技術の誤り訂正処理による構成を示すブロック図The block diagram which shows the constitution by the error correction processing of the prior art 従来技術の誤り訂正処理動作を示すタイムチャートの模式図Schematic diagram of the time chart showing the error correction processing operation of the prior art 従来技術の誤り訂正処理の破綻動作を示すタイムチャートの模式図Schematic diagram of time chart showing failure behavior of error correction processing of the prior art

符号の説明Explanation of symbols

1、2、3:受信部、4、5,6、7、21〜30:誤り訂正部、
8:多数決部、9、10:選択部、
11:MPEGエンコーダ、12:DVBエンコーダ、
13:変調部、14:送信部、15:送信アンテナ、W1:伝送路、
16:受信アンテナ、17:受信部、18:復調部、19:DVBデコーダ、
20:MPEGデコーダ
1, 2, 3: receiving unit, 4, 5, 6, 7, 21-30: error correcting unit,
8: Majority decision part, 9, 10: Selection part,
11: MPEG encoder, 12: DVB encoder,
13: Modulator, 14: Transmitter, 15: Transmitting antenna, W1: Transmission path,
16: receiving antenna, 17: receiving unit, 18: demodulating unit, 19: DVB decoder,
20: MPEG decoder

Claims (5)

誤り訂正符号化処理を施したデジタル信号を伝送する伝送装置において、受信側での復号化処理に際し、受信信号におけるブロック符号化信号のA系統とB系統との2系統を入力とし、少なくとも誤り訂正不可能な誤り訂正単位は、それぞれのタイミング位相を、ワード単位にて一致させた後、前記ブロック符号化信号のA系統とB系統と、
前記A系統の複数の188ワードのデータと16ワードのパリティとで異なる所定の選択基準の番号ワードと前記B系統の前記複数の所定の選択基準から外れた番号ワードとを組み合わせ生成したブロック符号化信号系統と、前記A系統の前記複数の所定の選択基準から外れた番号ワードと前記B系統の前記複数の所定の選択基準の番号ワードとを組み合わせ生成したブロック符号化信号系統、とをそれぞれ、誤り訂正し、誤り訂正が完了した系統を選択出力することを特徴とする信号処理方法。
In a transmission apparatus that transmits a digital signal subjected to error correction coding processing, at the time of decoding processing on the receiving side, two systems of the block coded signal A and B of the received signal are input, and at least error correction is performed. The impossible error correction units are the system A and system B of the block coded signal after the respective timing phases are matched in word units.
Block encoding in which a plurality of 188-word data of the A system and a number word of predetermined selection criteria different in 16-word parity and a number word deviating from the plurality of predetermined selection standards of the B-system are combined and generated A signal system, and a block coded signal system generated by combining a number word deviating from the plurality of predetermined selection criteria of the A system and a number word of the plurality of predetermined selection standards of the B system, A signal processing method characterized by performing error correction and selectively outputting a system for which error correction has been completed.
請求項1の信号処理方法において、前記の188ワードのデータと16ワードのパリティとで異なる所定の選択基準の番号とは、2N+1(Nは整数)、または4N、または4N+1、または4N+2、または4N+3、または4N+1と4N+2、または4N+1と4N+3、または4N+1と4N、または2分割の前半部分、または4分割の前半部分、または4分割の1分割目部分と3分割目部分、または4分割の1分割目部分と4分割目部分、のいずれかであることを特徴とする信号処理方法。 2. The signal processing method according to claim 1, wherein the number of the predetermined selection criterion that differs between the 188-word data and the 16-word parity is 2N + 1 (N is an integer), 4N, 4N + 1, 4N + 2, or 4N + 3. 4N + 1 and 4N + 2, 4N + 1 and 4N + 3, or 4N + 1 and 4N, or the first half of 2 divisions, or the first half of 4 divisions, or the first and third divisions of 4 divisions, or 1 division of 4 divisions A signal processing method characterized by being one of an eye part and a fourth divided part. 請求項1乃至請求項2の信号処理方法において、前記の組み合わせ生成したブロック符号化信号系統数が6,14,30,62,126であることを特徴とする信号処理方法。 3. The signal processing method according to claim 1, wherein the number of block coded signal systems generated in combination is 6, 14, 30, 62, 126 . 請求項1乃至請求項の信号処理方法において、前記の組み合わせ生成したブロック符号化信号系統数が2の累乗−2であることを特徴とする信号処理方法。 3. The signal processing method according to claim 1, wherein the number of block coded signal systems generated in combination is a power of 2-2. 映像信号をデジタル圧縮符号化し、誤り訂正符号化等の伝送路符号化処理を施し、デジタル変調した後に伝送信号化する送信部と、該伝送信号を受信し、デジタル復調処理、誤り訂正等の伝送路復号化処理、デジタル圧縮情報の伸張処理をする受信部とからなる伝送装置において、上記受信部の伝送路復号化部での復号化処理に際し、請求項1乃至請求項の誤り訂正処理を行う手段を設けたことを特徴とする伝送装置。 A video signal is digitally compressed and encoded, transmission channel encoding processing such as error correction encoding is performed, digital modulation is performed and a transmission signal is converted into a transmission signal, and the transmission signal is received and digital demodulation processing, transmission such as error correction is performed In a transmission apparatus comprising a receiving unit that performs path decoding processing and digital compression information expansion processing, the error correction processing according to claims 1 to 4 is performed in the decoding processing by the transmission path decoding unit of the receiving unit. A transmission apparatus comprising means for performing.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10126391A (en) * 1996-10-23 1998-05-15 Oi Denki Kk Method and device for correcting error of selective call signal
JP2000068908A (en) * 1998-08-20 2000-03-03 Nec Corp Mobile communication system
JP2001501789A (en) * 1996-09-27 2001-02-06 エリクソン インコーポレイテッド Error detection method for ARQ system
JP2003283468A (en) * 2002-03-20 2003-10-03 Hitachi Kokusai Electric Inc Error correction processing method and transmission apparatus
JP2005012452A (en) * 2003-06-18 2005-01-13 Nippon Hoso Kyokai <Nhk> Device, method, and program for receiving digital signal
JP2007088875A (en) * 2005-09-22 2007-04-05 Hitachi Kokusai Electric Inc Error correction processing method and transmission apparatus
JP2007208792A (en) * 2006-02-03 2007-08-16 Hitachi Kokusai Electric Inc Error correction processing method and transmission apparatus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001501789A (en) * 1996-09-27 2001-02-06 エリクソン インコーポレイテッド Error detection method for ARQ system
JPH10126391A (en) * 1996-10-23 1998-05-15 Oi Denki Kk Method and device for correcting error of selective call signal
JP2000068908A (en) * 1998-08-20 2000-03-03 Nec Corp Mobile communication system
JP2003283468A (en) * 2002-03-20 2003-10-03 Hitachi Kokusai Electric Inc Error correction processing method and transmission apparatus
JP2005012452A (en) * 2003-06-18 2005-01-13 Nippon Hoso Kyokai <Nhk> Device, method, and program for receiving digital signal
JP2007088875A (en) * 2005-09-22 2007-04-05 Hitachi Kokusai Electric Inc Error correction processing method and transmission apparatus
JP2007208792A (en) * 2006-02-03 2007-08-16 Hitachi Kokusai Electric Inc Error correction processing method and transmission apparatus

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