JP4574567B2 - Despreading and in-phase / quadrature component multiplex processing apparatus and method - Google Patents

Despreading and in-phase / quadrature component multiplex processing apparatus and method Download PDF

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JP4574567B2
JP4574567B2 JP2006049574A JP2006049574A JP4574567B2 JP 4574567 B2 JP4574567 B2 JP 4574567B2 JP 2006049574 A JP2006049574 A JP 2006049574A JP 2006049574 A JP2006049574 A JP 2006049574A JP 4574567 B2 JP4574567 B2 JP 4574567B2
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徹也 佐藤
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本発明は、逆拡散及び同相・直交成分多重処理装置及び方法に関し、特に、コード分割多重接続（ＣＤＭＡ：Code Division Multiple Access）方式の移動通信システムの受信機に用いられるコード分割多重データ信号の逆拡散処理及び同相・直交成分多重処理に係るものである。   The present invention relates to a despreading and in-phase / quadrature component multiplex processing apparatus and method, and more particularly, to an inverse of a code division multiplexed data signal used in a receiver of a code division multiple access (CDMA) mobile communication system. This relates to diffusion processing and in-phase / quadrature component multiplexing processing.

図３にコード分割多重データ信号を逆拡散処理する従来の第１の構成例を示す。同図において、１はコード分割多重データ信号の同相成分（Ｉｃｈ）の逆拡散処理部であり、２はコード分割多重データ信号の直交成分（Ｑｃｈ）の逆拡散処理部である。また、３はコード分割多重データ信号の同相成分（Ｉｃｈ）の逆拡散結果（ＤＥＳＰＩ）を加算して送信信号を復元するための加算器等を含む後段処理部であり、４は直交成分（Ｑｃｈ）の逆拡散結果（ＤＥＳＰＱ）を加算して送信信号を復元するための加算器等を含む後段処理部である。なお、以下では同相成分（Ｉｃｈ）を単にＩ成分、直交成分（Ｑｃｈ）をＱ成分とも記す。   FIG. 3 shows a first conventional configuration example for despreading a code division multiplexed data signal. In the figure, 1 is a despreading processing unit for the in-phase component (Ich) of the code division multiplexed data signal, and 2 is a despreading processing unit for the quadrature component (Qch) of the code division multiplexed data signal. Reference numeral 3 denotes a post-stage processing unit including an adder for restoring the transmission signal by adding the despreading result (DESPI) of the in-phase component (Ich) of the code division multiplexed data signal, and 4 is the quadrature component (Qch). ) Despreading result (DESPQ), and a post-processing unit including an adder for restoring the transmission signal. Hereinafter, the in-phase component (Ich) is also simply referred to as I component, and the quadrature component (Qch) is also referred to as Q component.

逆拡散処理部（Ｉｃｈ）１には、Ｉ成分のコード分割多重データ信号（ＩＤＡＴＡ）が入力され、該コード分割多重データ信号（ＩＤＡＴＡ）と、該コード分割多重データ信号（ＩＤＡＴＡ）を反転して１を加算した信号との何れか一方を選択して出力する反転選択部１１を備える。また、逆拡散処理部（Ｉｃｈ）１には、上記反転選択部１１から出力されるＩ成分の信号と、逆拡散処理部（Ｑｃｈ）２の同様の反転選択部２１から出力されるＱ成分の信号との何れか一方を選択して出力するＩＱ選択部１２を備える。   The despreading processing unit (Ich) 1 receives an I component code division multiplexed data signal (IDATA) and inverts the code division multiplexed data signal (IDATA) and the code division multiplexed data signal (IDATA). An inversion selection unit 11 that selects and outputs either one of the signals obtained by adding 1 is provided. Further, the despreading processing unit (Ich) 1 includes the I component signal output from the inversion selection unit 11 and the Q component output from the same inversion selection unit 21 of the despreading processing unit (Qch) 2. An IQ selection unit 12 that selects and outputs one of the signals is provided.

逆拡散処理部（Ｑｃｈ）２には、Ｑ成分のコード分割多重データ信号（ＱＤＡＴＡ）が入力され、該コード分割多重データ信号（ＱＤＡＴＡ）と、該コード分割多重データ信号（ＱＤＡＴＡ）を反転して１を加算した信号との何れか一方を選択して出力する反転選択部２１を備える。また、逆拡散処理部（Ｑｃｈ）２には、上記反転選択部２１から出力されるＱ成分の信号と、逆拡散処理部（Ｉｃｈ）１の同様の反転選択部１１から出力されるＩ成分の信号との何れか一方を選択して出力するＩＱ選択部２２を備える。   The despreading processing unit (Qch) 2 receives a Q component code division multiplexed data signal (QDATA) and inverts the code division multiplexed data signal (QDATA) and the code division multiplexed data signal (QDATA). An inversion selection unit 21 that selects and outputs one of the signals obtained by adding 1 is provided. Further, the despreading processing unit (Qch) 2 has a Q component signal output from the inversion selection unit 21 and an I component output from the same inversion selection unit 11 of the despreading processing unit (Ich) 1. An IQ selection unit 22 that selects and outputs one of the signals is provided.

逆拡散処理部（Ｉｃｈ）１には、図３の下部の表２に示すように第１の逆拡散コード（ＰＲＩ＿ＣＯＤＥ）及び第２の逆拡散コード（ＳＥＣ＿ＣＯＤＥ）から生成されるＩ成分用の反転選択信号（ＩＩＮＶ）が入力され、該反転選択信号（ＩＩＮＶ）により上記反転選択部１１の選択出力を切替える。   In the despreading processing unit (Ich) 1, the inversion for the I component generated from the first despreading code (PRI_CODE) and the second despreading code (SEC_CODE) as shown in Table 2 at the bottom of FIG. The selection signal (IINV) is input, and the selection output of the inversion selection unit 11 is switched by the inversion selection signal (IINV).

同様に、逆拡散処理部（Ｑｃｈ）２には、表２に示すように第１の逆拡散コード（ＰＲＩ＿ＣＯＤＥ）及び第２の逆拡散コード（ＳＥＣ＿ＣＯＤＥ）から生成されるＱ成分用の反転選択信号（ＱＩＮＶ）が入力され、該反転選択信号（ＱＩＮＶ）により上記反転選択部２１の選択出力を切替える。   Similarly, an inverse selection signal for the Q component generated from the first despread code (PRI_CODE) and the second despread code (SEC_CODE) as shown in Table 2 is sent to the despread processing unit (Qch) 2. (QINV) is input, and the selection output of the inversion selection unit 21 is switched by the inversion selection signal (QINV).

更に、逆拡散処理部（Ｉｃｈ）１及び逆拡散処理部（Ｑｃｈ）２には、図３の下部の表２に示すように第１の逆拡散コード（ＰＲＩ＿ＣＯＤＥ）及び第２の逆拡散コード（ＳＥＣ＿ＣＯＤＥ）から生成されるＩＱ選択信号（ＩＱＳＥＬ）が入力され、該ＩＱ選択信号（ＩＱＳＥＬ）により、前述のＩＱ選択部１２及び２２の選択出力を切替える。   Further, the despreading processing unit (Ich) 1 and the despreading processing unit (Qch) 2 have a first despreading code (PRI_CODE) and a second despreading code (as shown in Table 2 at the bottom of FIG. 3). An IQ selection signal (IQSEL) generated from (SEC_CODE) is input, and the selection output of the IQ selection units 12 and 22 is switched by the IQ selection signal (IQSEL).

なお、上述の反転選択部１１，２１及びＩＱ選択部１２，２２の各入力端に付した符号“０”及び“１”は、各選択制御信号として入力される反転選択信号（ＩＩＮＶ，ＱＩＮＶ）及びＩＱ選択信号（ＩＱＳＥＬ）の論理値に応じて、該論理値が“０”のときは“０”側の入力端の信号を、該論理値が“１”のときは“１”側の入力端の信号を選択して出力することを意味している。   The symbols “0” and “1” attached to the input terminals of the inversion selection units 11 and 21 and the IQ selection units 12 and 22 are the inversion selection signals (INNV and QINV) input as the selection control signals. Depending on the logic value of the IQ selection signal (IQSEL), when the logic value is “0”, the signal at the input terminal on the “0” side is displayed. When the logic value is “1”, the signal on the “1” side is displayed. This means that the signal at the input end is selected and output.

また、上述の第１の逆拡散コード（ＰＲＩ＿ＣＯＤＥ）と第２の逆拡散コード（ＳＥＣ＿ＣＯＤＥ）は、例えば、セクタ又は端末対応のスクランブリングコードと物理チャネル対応のチャネライゼイションコード等のように、それぞれ種別の異なる逆拡散コードである。   The first despreading code (PRI_CODE) and the second despreading code (SEC_CODE) described above are, for example, a sector or terminal-compatible scrambling code and a physical channel-compatible channelization code, respectively. Different types of despreading codes.

図４に従来のコード分割多重データ信号を逆拡散処理する第２の構成例を示す。この構成例は、図３に示した第１の構成例と同様に、逆拡散処理部（Ｉｃｈ）１及び逆拡散処理部（Ｑｃｈ）２に、図４下部の表２（図３下部の表２のと同内容）に示すように、第１の逆拡散コード（ＰＲＩ＿ＣＯＤＥ）及び第２の逆拡散コード（ＳＥＣ＿ＣＯＤＥ）から生成される反転選択信号（ＩＩＮＶ，ＱＩＮＶ）及びＩＱ選択信号（ＩＱＳＥＬ）が入力され、逆拡散部（Ｉｃｈ）１及び逆拡散処理部（Ｑｃｈ）２は、第１の構成例と同様に、Ｉ成分及びＱ成分の逆拡散結果（ＤＥＳＰＩ）及び（ＤＥＳＰＱ）をそれぞれ出力する。   FIG. 4 shows a second configuration example for despreading a conventional code division multiplexed data signal. This configuration example is similar to the first configuration example shown in FIG. 3 in that the despreading processing unit (Ich) 1 and the despreading processing unit (Qch) 2 are connected to Table 2 at the bottom of FIG. 4 (Table at the bottom of FIG. 3). 2), the inverted selection signal (INNV, QINV) and the IQ selection signal (IQSEL) generated from the first despread code (PRI_CODE) and the second despread code (SEC_CODE) The despreading unit (Ich) 1 and the despreading processing unit (Qch) 2 are input and output the despreading results (DESPI) and (DESPQ) of the I component and Q component, respectively, as in the first configuration example. .

ただし、第２の構成例では、Ｉ成分及びＱ成分の逆拡散結果（ＤＥＳＰＩ）及び（ＤＥＳＰＱ）をＩＱ多重部５に入力し、該ＩＱ多重部５によりＩ成分及びＱ成分の逆拡散結果（ＤＥＳＰＩ）及び（ＤＥＳＰＱ）を多重化した逆拡散結果（ＤＥＳＰ）を生成し、該逆拡散結果（ＤＥＳＰ）を、Ｉ成分及びＱ成分に共通の加算器等の後段処理部６に入力し、該後段処理部６では、２倍レートのクロック信号でＩ成分及びＱ成分の後段処理を行う構成としている。   However, in the second configuration example, the despreading results (DESPI) and (DESPQ) of the I component and the Q component are input to the IQ multiplexing unit 5, and the I component and Q component despreading results ( A despread result (DESP) in which DESPI) and (DESPQ) are multiplexed, and the despread result (DESP) is input to a post-processing unit 6 such as an adder common to the I component and the Q component, The post-processing unit 6 is configured to perform post-processing of the I component and Q component with a double-rate clock signal.

図５に従来のコード分割多重データ信号を逆拡散処理する第１及び第２の構成例によるＩ成分及びＱ成分の逆拡散結果（ＤＥＳＰＩ）及び（ＤＥＳＰＱ）、並びにそれらを多重化した逆拡散結果（ＤＥＳＰ）の生成タイミングチャートを示す。同図において、ＰＲＩ＿ＣＯＤＥ及びＳＥＣ＿ＣＯＤＥはそれぞれ第１及び第２の逆拡散コード、ＩＤＡＴＡ［３：０］及びＱＤＡＴＡ［３：０］はコード分割多重データ信号のＩ成分及びＱ成分、ＩＩＮＶ，ＱＩＮＶ及びＩＱＳＥＬは上述した逆拡散処理用制御信号、ＤＥＳＰＩ［３：０］及びＤＥＳＰＱ［３：０］は逆拡散結果のＩ成分及びＱ成分、ＤＥＳＰ［３：０］はＩ成分及びＱ成分の多重逆拡散結果である。   FIG. 5 shows despreading results (DESPI) and (DESPQ) of I and Q components according to the first and second configuration examples for despreading a conventional code division multiplexed data signal, and despreading results obtained by multiplexing them. The generation timing chart of (DESP) is shown. In the figure, PRI_CODE and SEC_CODE are the first and second despread codes, respectively, IDATA [3: 0] and QDATA [3: 0] are the I and Q components of the code division multiplexed data signal, IINV, QINV and IQSEL. Is the control signal for despreading processing described above, DESPI [3: 0] and DESPQ [3: 0] are the I and Q components of the despread result, and DESP [3: 0] is the multiple despread of the I and Q components It is a result.

本発明に関連する先行技術文献として、下記の特許文献１には、ＢＰＳＫ変調のベースバンド信号の同相成分及び直交成分をチップレートの整数倍のサンプリング周波数でディジタル信号に変換して１サンプル毎に切替えて多重化し、多重化した信号を相関検出して自乗検波して得た包絡線振幅の２乗波形から同期情報を検出することにより、小型化・低消費電力化を図ったＣＤＭＡ同期回路が開示されている。
特開平１１−１２７１３３号公報 As a prior art document related to the present invention, the following patent document 1 converts an in-phase component and a quadrature component of a baseband signal of BPSK modulation into a digital signal at a sampling frequency that is an integral multiple of the chip rate, and samples each sample. A CDMA synchronization circuit that achieves miniaturization and low power consumption by detecting synchronization information from the square waveform of the envelope amplitude obtained by switching and multiplexing, detecting the correlation of the multiplexed signals and square detection. It is disclosed.
JP 11-127133 A

前述した従来のコード分割多重データ信号を逆拡散処理する第１の構成例では、逆拡散処理部及び後段処理部を、Ｉ成分用及びＱ成分用にそれぞれ２組備えなければならず、それによって回路規模が増大してしまうという問題があった。   In the first configuration example for despreading the above-described conventional code division multiplexed data signal, two sets of despreading processing units and post-processing units must be provided for the I component and the Q component, respectively. There was a problem that the circuit scale would increase.

また、従来のコード分割多重データ信号を逆拡散処理する第２の構成例では、後段処理部がＩ成分用及びＱ成分用で共用化することができるため、後段処理部の回路規模を縮小することはできるが、Ｉ成分及びＱ成分の各逆拡散結果（ＤＥＳＰＩ）及び（ＤＥＳＰＱ）を多重化する多重回路が新たに必要となるため、それによって回路規模が増加してしまうという問題があった。   Further, in the second configuration example in which the conventional code division multiplexed data signal is despread, the post-processing unit can be shared for the I component and the Q component, so the circuit scale of the post-processing unit is reduced. However, there is a problem that the circuit scale increases because a new multiplexing circuit is required to multiplex the despreading results (DESPI) and (DESPQ) of the I component and Q component. .

本発明は、コード分割多重データ信号の逆拡散回路の構成を簡素化すると共に、Ｉ成分及びＱ成分を多重化する処理回路を別途設けることなく、Ｉ成分及びＱ成分を多重化した逆拡散結果が得られる逆拡散回路を提供し、コード分割多重データ信号受信部の回路規模の低減を図ることを目的とする。   The present invention simplifies the configuration of a despreading circuit for a code division multiplexed data signal and provides a despreading result obtained by multiplexing the I component and the Q component without separately providing a processing circuit for multiplexing the I component and the Q component. An object of the present invention is to reduce the circuit scale of the code division multiplexed data signal receiver.

本発明の逆拡散及び同相・直交成分多重処理装置は、コード分割多重データ信号の同相成分及び直交成分を入力し、その何れか一方を選択して出力する同相・直交成分選択部１０１と、同相・直交成分選択部１０１の出力信号又はその出力信号を反転して１を加算した信号の何れか一方を選択して出力する反転選択部１０２と、第１の逆拡散コード及び第２の逆拡散コード並びに該逆拡散コードの２倍のレートで論理値が交互に反転する交互反転信号から、同相・直交成分選択制御信号及び反転選択制御信号を生成する手段（図１の表１参照）とを備え、前記同相・直交成分選択部１０１の選択出力を前記同相・直交成分選択制御信号により切替え、前記反転選択部１０２の選択出力を前記反転選択制御信号により切替えることを特徴とする。   The despreading and in-phase / quadrature component multiplex processing apparatus of the present invention inputs an in-phase component and a quadrature component of a code division multiplexed data signal, and selects and outputs one of them, and an in-phase / quadrature component selection unit 101 An inversion selection unit 102 that selects and outputs either the output signal of the orthogonal component selection unit 101 or a signal obtained by inverting the output signal and adding 1; and the first despread code and the second despread Means for generating an in-phase / quadrature component selection control signal and an inversion selection control signal (see Table 1 in FIG. 1) from a code and an alternating inversion signal whose logic value is alternately inverted at a rate twice that of the despread code. The selection output of the in-phase / quadrature component selection unit 101 is switched by the in-phase / quadrature component selection control signal, and the selection output of the inversion selection unit 102 is switched by the inversion selection control signal.

また、本発明の逆拡散及び同相・直交成分多重処理方法は、第１の逆拡散コード及び第２の逆拡散コード並びに該逆拡散コードの２倍のレートで論理値が交互に反転する交互反転信号から、同相・直交成分選択制御信号及び反転選択制御信号を、図１の表１に示すように生成する過程と、コード分割多重データ信号の同相成分及び直交成分を入力し、その何れか一方を選択して出力する同相・直交成分選択部１０１に、前記同相・直交成分選択制御信号を加えて選択出力を切り替え、前記同相・直交成分選択部の出力信号又はその出力信号を反転して１を加算した信号の何れか一方を選択して出力する反転選択部１０２に、前記反転選択制御信号を加えて選択出力を切替えることを特徴とする。   In addition, the despreading and in-phase / quadrature component multiplexing processing method of the present invention provides a first despreading code, a second despreading code, and an alternating inversion in which logical values are alternately inverted at a rate twice that of the despreading code. A process for generating an in-phase / quadrature component selection control signal and an inversion selection control signal from the signal as shown in Table 1 of FIG. 1 and an in-phase component and a quadrature component of the code division multiplexed data signal are input. Is added to the in-phase / quadrature component selection unit 101 to output the in-phase / quadrature component selection control signal, the selection output is switched, and the output signal of the in-phase / quadrature component selection unit or its output signal is inverted to 1 The selection output is switched by adding the inversion selection control signal to the inversion selection unit 102 that selects and outputs one of the signals obtained by adding the signals.

本発明によれば、ＣＤＭＡ方式を用いる移動通信システムにおける逆拡散処理と後段のＩ／Ｑ成分の信号処理に対して、第１及び第２の逆拡散コード（ＰＲＩ＿ＣＯＤＥ，ＳＥＣ＿ＣＯＤＥ）と、その２倍レートのクロック信号で交互に論理値が反転する信号から、Ｉ／Ｑ成分の選択制御信号及び反転信号の選択制御信号を生成し、それらの信号を用いて逆拡散を行うことにより、Ｉ／Ｑ成分が多重化された逆拡散結果を得ることができる。   According to the present invention, the first and second despreading codes (PRI_CODE, SEC_CODE) and twice the despreading process and the signal processing of the I / Q component in the subsequent stage in the mobile communication system using the CDMA system. By generating a selection control signal for an I / Q component and a selection control signal for an inverted signal from a signal whose logic value is alternately inverted by a rate clock signal, and performing despreading using these signals, I / Q A despread result in which the components are multiplexed can be obtained.

これにより、従来の第１の構成例と比較して、逆拡散処理部と後段回路の規模を半減化することができる。また従来の第２の構成例と比較しても、逆拡散処理部が２分の１の回路規模で実現することができ、かつＩ／Ｑ成分の多重化回路が不要であることから、その分、回路規模を削減することができ、Ｉ／Ｑ成分の多重化によりＩ／Ｑ成分に対して共通回路が使用可能となり、大幅な回路規模低減を図ることができる。   As a result, the scale of the despreading processing unit and the post-stage circuit can be halved as compared with the conventional first configuration example. Compared to the conventional second configuration example, the despreading processing unit can be realized with a circuit scale of a half and an I / Q component multiplexing circuit is not required. Therefore, the circuit scale can be reduced, and by multiplexing the I / Q components, a common circuit can be used for the I / Q components, and the circuit scale can be greatly reduced.

図１にコード分割多重データ信号の逆拡散処理及びＩＱ成分の多重処理を行う本発明の機能ブロックを示す。同図において、１０はＩ成分及びＱ成分を有するコード分割多重データ信号の逆拡散処理と、そのＩ成分及びＱ成分の逆拡散結果の多重化信号を出力する逆拡散及びＩＱ多重部である。   FIG. 1 shows functional blocks of the present invention for performing despreading processing of code division multiplexed data signals and multiplexing processing of IQ components. In the figure, reference numeral 10 denotes a despreading and IQ multiplexing unit that outputs a despreading process of a code division multiplexed data signal having an I component and a Q component and a multiplexed signal resulting from the despreading of the I component and the Q component.

また、６は加算器等を含む後段処理部であり、多重化されたＩ成分及びＱ成分の逆拡散結果を入力し、Ｉ成分及びＱ成分の各逆拡散結果に対して、２倍レートのクロック信号で後段処理を行う機能部である。なお、該後段処理部６はＩ成分及びＱ成分に対して共通に使用され、図４に示した従来の第２の構成例における後段処理部６と同様のものである。   Reference numeral 6 denotes a post-processing unit including an adder and the like, which inputs multiplexed I component and Q component despread results, and doubles the I component and Q component despread results. This is a functional unit that performs subsequent processing with a clock signal. The post-processing unit 6 is used in common for the I component and the Q component, and is the same as the post-processing unit 6 in the second conventional configuration example shown in FIG.

逆拡散及びＩＱ成分多重部１０は、Ｉ成分のコード分割多重データ信号（ＩＤＡＴＡ）及びＱ成分のコード分割多重データ信号（ＱＤＡＴＡ）を入力し、その何れか一方を選択して出力するＩＱ選択部１０１と、該ＩＱ選択部１０１の出力信号と、その出力信号を反転して１を加算した信号との何れか一方を選択して出力する反転選択部１０２とを備える。   The despreading and IQ component multiplexing unit 10 inputs an I component code division multiplexed data signal (IDATA) and a Q component code division multiplexed data signal (QDATA), and selects and outputs either of them. 101, and an inversion selection unit 102 that selects and outputs one of the output signal of the IQ selection unit 101 and a signal obtained by inverting the output signal and adding 1.

上記ＩＱ選択部１０１及び反転選択部１０２への選択制御信号として、図１の下部の表１に示すように、第１及び第２の逆拡散コード（ＰＲＩ＿ＣＯＤＥ，ＳＥＣ＿ＣＯＤＥ）、並びに２倍レートのクロック信号により“０”（ｌｏｗ）と“１”（ｈｉｇｈ）とが交互に入れ替わる論理パターン信号（ＩＱＭＵＸ）から、ＩＱ選択信号（ＩＱＳＥＬ）及び反転選択信号（ＩＮＶＳＥＬ）の２種の制御信号を生成し、該ＩＱ選択信号（ＩＱＳＥＬ）をＩＱ選択部１０１の選択制御信号とし、反転選択信号（ＩＮＶＳＥＬ）を反転選択部１０２の選択制御信号として入力する。   As selection control signals to the IQ selection unit 101 and the inversion selection unit 102, as shown in Table 1 at the bottom of FIG. 1, first and second despread codes (PRI_CODE, SEC_CODE), and a double rate clock Two types of control signals, an IQ selection signal (IQSEL) and an inversion selection signal (INVSEL), are generated from a logic pattern signal (IQMUX) in which “0” (low) and “1” (high) are alternately switched according to the signal. The IQ selection signal (IQSEL) is used as a selection control signal for the IQ selection unit 101, and the inversion selection signal (INVSEL) is input as a selection control signal for the inversion selection unit 102.

図２に本発明の逆拡散及びＩＱ多重部によるＩ成分及びＱ成分の多重化逆拡散結果（ＤＥＳＰ）の生成タイミングチャートを示す。同図において、ＰＲＩ＿ＣＯＤＥ及びＳＥＣ＿ＣＯＤＥは第１及び第２の逆拡散コード、ＩＱＭＵＸは２倍レートのクロック信号により“０”（ｌｏｗ）と“１”（ｈｉｇｈ）とが入れ替わる論理パターン信号、ＩＱＳＥＬはＩＱ選択信号、ＩＮＶＳＥＬは反転選択信号、ＩＤＡＴＡ［３：０］及びＱＤＡＴＡ［３：０］はコード分割多重データ信号のＩ成分及びＱ成分、ＤＥＳＰ［３：０］はＩ成分及びＱ成分の逆拡散結果の多重化信号である。   FIG. 2 shows a generation timing chart of the despreading result (DESP) of the I component and the Q component by the despreading and IQ multiplexing unit of the present invention. In the figure, PRI_CODE and SEC_CODE are first and second despread codes, IQMUX is a logical pattern signal in which “0” (low) and “1” (high) are switched by a double rate clock signal, and IQSEL is IQ Selection signal, INVSEL is an inverted selection signal, IDATA [3: 0] and QDATA [3: 0] are the I and Q components of the code division multiplexed data signal, and DESP [3: 0] is the despreading of the I and Q components The resulting multiplexed signal.

本発明の逆拡散及びＩＱ多重部１０から出力される逆拡散処理結果（ＤＥＳＰ）は、既にＩ／Ｑ成分が多重化された信号であり、図４に示した従来の第２の構成例により出力される逆拡散処理結果（ＤＥＳＰ）（図５参照）と等価な信号であり、従来の第２の構成例と同様に、後段処理部６も２倍レートのクロック信号によりＩ成分及びＱ成分に対して処理を行う。   The despreading processing result (DESP) output from the despreading and IQ multiplexing unit 10 of the present invention is a signal in which the I / Q component has already been multiplexed. According to the second conventional configuration example shown in FIG. This is a signal equivalent to the output despreading processing result (DESP) (see FIG. 5). Similarly to the second conventional configuration example, the post-processing unit 6 also uses the double rate clock signal to generate the I component and the Q component. Process.

従来の構成例と本発明との主要な相違点は、逆拡散処理用制御信号生成論理にある。従来の逆拡散処理用制御信号生成論理を図３及び図４の表２に、本発明におけるＩＱ多重型逆拡散処理用制御信号生成論理を図１の表１に示す。本発明では、逆拡散コード（ＰＲＩ＿ＣＯＤＥ／ＳＥＣ＿ＣＯＤＥ）の他に、２倍レートのクロック信号で“０”と“１”とが交互に反転する信号（ＩＱＭＵＸ）を生成し、表１に示す論理によりＩＱ選択信号（ＩＱＳＥＬ）と反転選択信号（ＩＮＶＳＥＬ）とを生成する。   The main difference between the conventional configuration example and the present invention lies in the control signal generation logic for despreading processing. Conventional control signal generation logic for despreading processing is shown in Table 2 in FIGS. 3 and 4, and control signal generation logic for IQ multiplexing type despreading processing in the present invention is shown in Table 1 in FIG. In the present invention, in addition to the despread code (PRI_CODE / SEC_CODE), a signal (IQMUX) in which “0” and “1” are alternately inverted by a double rate clock signal is generated, and the logic shown in Table 1 is used. An IQ selection signal (IQSEL) and an inversion selection signal (INVSEL) are generated.

上記の選択制御信号を、図１に示す逆拡散及びＩＱ成分多重部１０のＩＱ選択部１０１及び反転選択部１０２に加えることにより、単純な回路構成で逆拡散処理並びにＩ成分及びＱ成分の多重処理を行った逆拡散処理結果（ＤＥＳＰ）が得られる。図２及び図５のタイムチャートから、従来の第２の構成例におけるＩＱ成分多重逆拡散処理結果（ＤＥＳＰ）と、本発明の回路構成によるＩＱ多重逆拡散処理結果（ＤＥＳＰ）とは、等価であることが分かる。   By adding the above selection control signal to the IQ selection unit 101 and the inversion selection unit 102 of the despreading and IQ component multiplexing unit 10 shown in FIG. 1, the despreading process and the multiplexing of the I component and the Q component are performed with a simple circuit configuration. A despreading processing result (DESP) obtained by performing the processing is obtained. From the time charts of FIGS. 2 and 5, the IQ component multiple despread processing result (DESP) in the second conventional configuration example and the IQ multiple despread processing result (DESP) according to the circuit configuration of the present invention are equivalent. I understand that there is.

コード分割多重データ信号の逆拡散処理及びＩＱ成分の多重処理を行う本発明の機能ブロックを示す図である。It is a figure which shows the functional block of this invention which performs the de-spreading process of a code division multiplexing data signal, and the multiplexing process of IQ component. 本発明のＩ成分及びＱ成分の多重化逆拡散結果（ＤＥＳＰ）の生成タイミングチャートを示す図である。It is a figure which shows the production | generation timing chart of the multiplexed despread result (DESP) of I component and Q component of this invention. コード分割多重データ信号を逆拡散処理する従来の第１の構成例を示す図である。It is a figure which shows the 1st example of a conventional structure which despreads a code division multiplexing data signal. 従来のコード分割多重データ信号を逆拡散処理する機能ブロックの第２の構成例を示す図である。It is a figure which shows the 2nd structural example of the functional block which despreads the conventional code division multiplexing data signal. 従来のＩ成分及びＱ成分の多重化逆拡散結果（ＤＥＳＰ）の生成タイミングチャートを示す図である。It is a figure which shows the production | generation timing chart of the multiplexed despread result (DESP) of the conventional I component and Q component.

符号の説明Explanation of symbols

１ Ｉ成分の逆拡散処理部
１１ 反転選択部
１２ ＩＱ選択部
２ Ｑ成分の逆拡散処理部
２１ 反転選択部
２２ ＩＱ選択部
３ Ｉ成分の後段処理部
４ Ｑ成分の後段処理部
５ ＩＱ多重部
６ 後段処理部
１０ 逆拡散及びＩＱ多重部
１０１ ＩＱ選択部
１０２ 反転選択部 DESCRIPTION OF SYMBOLS 1 Inverse despreading part of I component 11 Inversion selection part 12 IQ selection part 2 Inverse diffusion processing part of Q component 21 Inversion selection part 22 IQ selection part 3 I-component post-processing part 4 Q-component post-processing part 5 IQ multiplexing part 6 Post-processing unit 10 Despreading and IQ multiplexing unit 101 IQ selection unit 102 Inversion selection unit

Claims (2)

コード分割多重データ信号の同相成分及び直交成分を入力し、その何れか一方を選択して出力する同相・直交成分選択部と、
前記同相・直交成分選択部の出力信号又はその出力信号を反転して１を加算した信号の何れか一方を選択して出力する反転選択部と、
第１の逆拡散コード及び第２の逆拡散コード並びに該逆拡散コードの２倍のレートで論理値が交互に反転する交互反転信号から、同相・直交成分選択制御信号及び反転選択制御信号を生成する手段と、
を備え、前記同相・直交成分選択部の選択出力を前記同相・直交成分選択制御信号により切替え、前記反転選択部の選択出力を前記反転選択制御信号により切替えることを特徴とする逆拡散及び同相・直交成分多重処理装置。 An in-phase / quadrature component selection unit that inputs an in-phase component and a quadrature component of the code division multiplexed data signal, and selects and outputs either of them;
An inversion selection unit that selects and outputs either the output signal of the in-phase / quadrature component selection unit or a signal obtained by inverting the output signal and adding 1;
An in-phase / quadrature component selection control signal and an inversion selection control signal are generated from the first despread code, the second despread code, and the alternating inversion signal whose logic value is alternately inverted at a rate twice that of the despreading code. Means to
The selection output of the in-phase / quadrature component selection unit is switched by the in-phase / quadrature component selection control signal, and the selection output of the inversion selection unit is switched by the inversion selection control signal. Orthogonal component multiprocessing device. 第１の逆拡散コード及び第２の逆拡散コード並びに該逆拡散コードの２倍のレートで論理値が交互に反転する交互反転信号から、同相・直交成分選択制御信号及び反転選択制御信号を生成する過程と、
コード分割多重データ信号の同相成分及び直交成分を入力し、その何れか一方を選択して出力する同相・直交成分選択部に、前記同相・直交成分選択制御信号を加えて選択出力を切り替え、
前記同相・直交成分選択部の出力信号又はその出力信号を反転して１を加算した信号の何れか一方を選択して出力する反転選択部に、前記反転選択制御信号を加えて選択出力を切替えることを特徴とする逆拡散及び同相・直交成分多重処理方法。 An in-phase / quadrature component selection control signal and an inversion selection control signal are generated from the first despread code, the second despread code, and the alternating inversion signal whose logic value is alternately inverted at a rate twice that of the despreading code. The process of
In-phase / quadrature component selection unit for inputting the in-phase / quadrature component of the code division multiplexed data signal, selecting and outputting one of them, and switching the selection output by adding the in-phase / quadrature component selection control signal,
The selection output is switched by adding the inversion selection control signal to an inversion selection unit that selects and outputs either the output signal of the in-phase / quadrature component selection unit or a signal obtained by inverting the output signal and adding 1 A despreading and in-phase / quadrature component multiplex processing method.
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Citations (4)

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JPH11127133A (en) * 1997-10-22 1999-05-11 Matsushita Electric Ind Co Ltd Cdma synchronization circuit and method for detecting cdma synchronizing signal
JP2002064406A (en) * 2000-08-10 2002-02-28 Motorola Inc Complex digital matched filter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09153883A (en) * 1995-11-30 1997-06-10 Nec Corp Spread spectrum transmitter-receiver
JPH11127133A (en) * 1997-10-22 1999-05-11 Matsushita Electric Ind Co Ltd Cdma synchronization circuit and method for detecting cdma synchronizing signal
JPH11127089A (en) * 1997-10-23 1999-05-11 Fujitsu Ltd Cdma receiver
JP2002064406A (en) * 2000-08-10 2002-02-28 Motorola Inc Complex digital matched filter

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