JP4563026B2 - Manufacturing method of three-dimensional confined quantum nanostructure - Google Patents

Manufacturing method of three-dimensional confined quantum nanostructure Download PDF

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JP4563026B2
JP4563026B2 JP2003428864A JP2003428864A JP4563026B2 JP 4563026 B2 JP4563026 B2 JP 4563026B2 JP 2003428864 A JP2003428864 A JP 2003428864A JP 2003428864 A JP2003428864 A JP 2003428864A JP 4563026 B2 JP4563026 B2 JP 4563026B2
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功太 舘野
哲 伊藤
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Nippon Telegraph and Telephone Corp
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本発明は、三次元閉じ込め量子ナノ構造体の製造方法に関する。 The present invention relates to a method for producing a three-dimensional quantum confinement nanostructures.

従来の三次元閉じ込め構造は、横方向に伸びた量子ドットや量子ディスクの形状をなし、その大きさが微小となっている。このため、従来の三次元閉じ込め構造の製造方法としては、電子ビーム（ＥＢ）による加工を利用した方法（例えば、下記非特許文献１等参照）や、結晶成長時のＳ−Ｋモード等による自己形成を利用した方法（例えば、下記非特許文献２等参照）が主に適用されている。   The conventional three-dimensional confinement structure has a shape of a quantum dot or quantum disk extending in the lateral direction, and its size is very small. For this reason, as a conventional method of manufacturing a three-dimensional confinement structure, a method using processing by an electron beam (EB) (for example, see Non-Patent Document 1 below), self-production by SK mode during crystal growth, etc. A method using formation (see, for example, Non-Patent Document 2 below) is mainly applied.

前者の方法は、量子井戸構造を有する成長膜をリソグラフィ技術を用いて加速したイオンで物理的に除去するドライエッチングにより形成するため、加工のダメージを受けやすく、発光や電子輸送特性などで量子構造の特性を十分に発現させることが難しかった。   In the former method, a growth film having a quantum well structure is formed by dry etching that is physically removed by ions accelerated using lithography technology, so that it is easily damaged by processing and has a quantum structure in terms of light emission and electron transport properties. It was difficult to fully develop the characteristics.

また、後者の方法は、加工の影響を受けないために優れた特性を有するものの、量子構造のサイズや位置の制御が難しく、ナノサイズのデバイスへの将来的な応用に適さなかった。   In addition, the latter method has excellent characteristics because it is not affected by processing, but it is difficult to control the size and position of the quantum structure, and is not suitable for future application to nano-sized devices.

さらに、両者の方法においては、量子構造とその周りの材料との格子定数差の影響が大きく、欠陥が多数生じやすかった。具体的には、例えば、ＧａＡｓ上のＩｎＡｓ三次元閉じ込め量子ナノ構造を成長させる際には、ＩｎＡｓを数原子層で成長させないと、格子不整合を生じて欠陥が多数生じてしまい、光デバイスに適用可能なほどの発光を得ることができなかった。   Furthermore, in both methods, the effect of the lattice constant difference between the quantum structure and the surrounding material is large, and many defects are likely to occur. Specifically, for example, when growing an InAs three-dimensional confined quantum nanostructure on GaAs, if InAs is not grown in several atomic layers, lattice mismatch occurs and a lot of defects are generated, resulting in an optical device. It was not possible to obtain luminescence that was applicable.

また、ＳｉやＧａＡｓ等の化合物半導体において、Ａｕ等の微小の金属との共晶で融点を低下させて、当該金属の基に選択的に結晶成長を生じさせることにより、ｐ−ｎ構造やヘテロ構造のナノワイアを作製する気相‐液相‐固相（Vapor-Liquid-Solid：ＶＬＳ）成長が知られている（例えば、下記非特許文献３等参照）。   Further, in a compound semiconductor such as Si or GaAs, the melting point is lowered by eutectic with a minute metal such as Au, and crystal growth is selectively caused in the metal group, thereby generating a pn structure or heterostructure. Vapor-Liquid-Solid (VLS) growth for producing nanowires having a structure is known (for example, see Non-Patent Document 3 below).

しかしながら、上記方法は、ワイアの周囲が大気となるため、表面酸化の影響や表面ポテンシャルの影響により、室温において優れた特性を発現させることができなかった（例えば、下記非特許文献４，５等参照）。   However, since the surroundings of the wire is in the atmosphere, the above method cannot exhibit excellent characteristics at room temperature due to the effects of surface oxidation and surface potential (for example, Non-Patent Documents 4 and 5 below) reference).

Y.Nagamune,S.Tsukamoto,M.Nishioka, and Y.Arakawa,“Growth process and mechanism of nanometer-scale GaAs dot-structures using MOCVD selective growth,”J.Crystal Growth 126(1993)707.Y. Nagamune, S. Tsukamoto, M. Nishioka, and Y. Arakawa, “Growth process and mechanism of nanometer-scale GaAs dot-structures using MOCVD selective growth,” J. Crystal Growth 126 (1993) 707. J.Tatebayashi,M.Nishioka,Y.Arakawa,“Luminescence in excess of 1.5 um at room-temperature of InAs quantum dots capped by a thin InGaAs strain-reducing layer,”J.Crystal Growth 237-239(2002)1296.J. Tatebayashi, M. Nishioka, Y. Arakawa, “Luminescence in excess of 1.5 um at room-temperature of InAs quantum dots capped by a thin InGaAs strain-reducing layer,” J. Crystal Growth 237-239 (2002) 1296. R.S.Wagner,W.C.Ellis,“Vapor-Liquid-Solid mechanism of single crystal growth,”Appl.Phys.Lett.4(1964)89.R.S.Wagner, W.C.Ellis, “Vapor-Liquid-Solid mechanism of single crystal growth,” Appl. Phys. Lett. 4 (1964) 89. M.T.Bjork,B.J.Ohlsson,C.Thelander,A.I.Persson,K.Deppert,L.R.Wallenberg,L.Samuelson,“Nanowire resonant tunneling diodes,”Appl.Phys.Lett.81(2002)4458.M.T.Bjork, B.J.Ohlsson, C.Thelander, A.I.Persson, K.Deppert, L.R.Wallenberg, L.Samuelson, “Nanowire resonant tunneling diodes,” Appl. Phys. Lett. 81 (2002) 4458. N.Panev,A.I.Persson,N.Skold,L.Samuelson,“Sharp exciton emission from single InAs quantum dots in GaAs nanowires,”Appl.Phys.lett.83(2003)2238.N. Panev, A.I.Persson, N. Skold, L. Samuelson, “Sharp exciton emission from single InAs quantum dots in GaAs nanowires,” Appl. Phys. Lett. 83 (2003) 2238.

本発明は、上述したような従来技術を鑑みて、ナノサイズの光デバイスや電子デバイスへ適用できるようになされたものであり、加工によるダメージを受けることなく室温下での優れた特性を発現できる三次元閉じ込め量子ナノ構造体の製造方法を提供することを目的とする。 The present invention has been made in view of the conventional technology as described above, and can be applied to nano-sized optical devices and electronic devices, and can exhibit excellent characteristics at room temperature without being damaged by processing. and to provide a manufacturing method of a quantum nano-structure confinement three dimensions.

前述した課題を解決するための、本発明に係る三次元閉じ込め量子ナノ構造体の製造方法は、基板上に金属の微粒子体を形成し、当該微粒子体を活性点として当該基板と当該微粒子体との間に、気相‐液相‐固相（ＶＬＳ）成長により、活性層及び当該活性層で発光する光を閉じ込めるために当該活性層に対し前記基板側及び前記微粒子体側の両方に配置した光閉じ込め層を含む多層構造からなる柱状構造体を成長させると共に、前記柱状構造体と前記微粒子体との間に、選択的エッチング除去可能なエッチング層を気相‐液相‐固相（ＶＬＳ）成長により成長させ、前記柱状構造体を包囲するように前記基板上に、前記柱状構造体の前記活性層と異なる組成の層を埋め込み成長させて埋め込み構造体を形成した後、前記エッチング層を選択的エッチング除去することにより、前記微粒子体を除去して、三次元閉じ込め量子ナノ構造体を製造することを特徴とする。 For solving the problems described before mentioned method for producing a three-dimensional quantum confinement nanostructure according to the present invention, the fine particles of a metal is formed on the substrate, the substrate and the particulate material the particles thereof as active sites between the vapor phase - liquid phase - by solid phase (VLS) growth, relative to the active layer in order to confine the light emitted from the active layer and the active layer, placed on both the substrate side and the fine particles side grown columnar structures composed of multi-layer structure including an optical confinement layer Rutotomoni, between the columnar structure and the particulate matter, vapor phase selective etching removable etch layer - liquid - solid (VLS ) grown by the growth, on the substrate so as to surround the columnar structure, after forming the columnar structure of the active layer different from a layer of the composition was buried grown buried structure, the etch layer Choice By etching away, by removing the particulate matter, characterized by producing a quantum nanostructure confinement three dimensions.

本発明に係る三次元閉じ込め量子ナノ構造体の製造方法によれば、柱状構造体がＶＬＳ成長で形成されると共に大気に触れることなく埋め込み構造体で包囲されているので、ドライエッチング等の加工によるダメージを受けることなく室温下での優れた特性を発現することができる。 According to the three-dimensional confinement manufacturing method of a quantum nano-structure according to the present invention, since the columnar structure is surrounded by a buried structure is not exposed to the air while being formed by VLS growth, due to processing such as dry etching Excellent properties at room temperature can be exhibited without being damaged.

本発明に係る三次元閉じ込め量子ナノ構造体の製造方法の実施形態を図面に基づいて以下に説明するが、本発明はこれらの実施形態に限定されるものではない。 Will be described below with reference to the embodiment of the three-dimensional confinement manufacturing method of a quantum nano-structure according to the present invention with reference to the accompanying drawings, the present invention is not limited to these embodiments.

［第一番目の実施形態］
本発明に係る三次元閉じ込め量子ナノ構造体の製造方法の第一番目の実施形態を図１，２に基づいて説明する。図１は、三次元閉じ込め量子ナノ構造体の製造方法の説明図、図２は、柱状構造体の説明図である。 [First embodiment]
The FIRST embodiment of a three-dimensional confinement manufacturing method of a quantum nano-structure according to the present invention will be described with reference to FIGS. FIG. 1 is an explanatory diagram of a method for producing a three-dimensional confined quantum nanostructure, and FIG. 2 is an explanatory diagram of a columnar structure.

ＧａＡｓ（３１１）Ｂの基板１１上にレジスト膜を形成して、ＥＢを照射してレジスト膜にホールを複数形成し（直径２０ｎｍ、間隔２００ｎｍ）、Ａｕを蒸着した後にレジスト膜を除去することにより、当該基板１１上にＡｕの微粒子体１２（直径２０ｎｍ、高さ５ｎｍ）を複数形成する（図１（ａ）参照）。   By forming a resist film on the substrate 11 of GaAs (311) B, irradiating EB to form a plurality of holes in the resist film (diameter 20 nm, interval 200 nm), and depositing Au and then removing the resist film A plurality of Au fine particles 12 (diameter 20 nm, height 5 nm) are formed on the substrate 11 (see FIG. 1A).

続いて、有機金属気相成長（ＭＯＶＰＥ）法により、ＴＭＧａ、ＴＭＩｎ、ＴＢＡｓ（又はＡｓＨ3）を原料に用い、原料流量及び成長時間を調整して、基板１１と微粒子体１２との間に、基板１１側から順に、ＧａＡｓからなる第一の光閉じ込め層１３ａ（２００ｎｍ）、ＩｎＡｓからなる活性層１３ｂ（２０ｎｍ）、ＧａＡｓからなる第二の光閉じ込め層１３ｃ（５００ｎｍ）をＶＬＳ成長させることにより（基板温度４３０℃）、柱状構造体１３を形成する（図１（ｂ）参照）。 Subsequently, TMGa, TMIn, TBAs (or AsH 3 ) is used as a raw material by a metal organic chemical vapor deposition (MOVPE) method, the raw material flow rate and the growth time are adjusted, and between the substrate 11 and the fine particle body 12, The first optical confinement layer 13a (200 nm) made of GaAs, the active layer 13b (20 nm) made of InAs, and the second optical confinement layer 13c (500 nm) made of GaAs are VLS grown in this order from the substrate 11 side ( The columnar structure 13 is formed at a substrate temperature of 430 ° C. (see FIG. 1B).

なお、柱状構造体１３は、ＧａＡｓ（３１１）Ｂの基板１１を用いているため、ＶＬＳ成長により、基板１１に対する垂直方向よりも２９．５°傾いた［１１１］方向に成長する。   Since the columnar structure 13 uses the GaAs (311) B substrate 11, it grows in the [111] direction inclined by 29.5 ° from the direction perpendicular to the substrate 11 by VLS growth.

ここで、上記柱状構造体１３は、微粒子体１２を活性点としたＶＬＳ成長により形成されているため、前記光閉じ込め層１３ａ，１３ｃと活性層１３ｂとの界面を微小領域とすることができ、前記光閉じ込め層１３ａ，１３ｃのＧａＡｓと活性層１３ｂのＩｎＡｓとの格子不整合に起因する欠陥を大幅に抑制することができる。   Here, since the columnar structure 13 is formed by VLS growth using the fine particle body 12 as an active point, the interface between the light confinement layers 13a and 13c and the active layer 13b can be a minute region, Defects caused by lattice mismatch between GaAs in the optical confinement layers 13a and 13c and InAs in the active layer 13b can be greatly suppressed.

次に、ＴＭＡｌ、ＴＭＧａ、ＴＢＡｓ（又はＡｓＨ3）を原料に用いて、基板１１上にＡｌ0.1Ｇａ0.9Ａｓを埋め込み成長（６５０℃）させて埋め込み構造体１４を形成して表面を平坦化することにより、三次元閉じ込め量子ナノ構造体１０を製造した（図１（ｃ）参照）。 Next, using TMAl, TMGa, TBAs (or AsH 3 ) as a raw material, Al 0.1 Ga 0.9 As is embedded and grown (650 ° C.) on the substrate 11 to form the embedded structure 14 and planarize the surface. Thus, a three-dimensional confined quantum nanostructure 10 was manufactured (see FIG. 1C).

このとき、柱状構造体１３を成長させた後に大気開放することなく上記埋め込み構造体１４の成長を行うことにより、柱状構造体１３と埋め込み構造体１４との界面の欠陥や不純物の影響が大幅に抑制される。   At this time, by growing the embedded structure 14 without exposing to the atmosphere after growing the columnar structure 13, the influence of defects and impurities at the interface between the columnar structure 13 and the embedded structure 14 is greatly increased. It is suppressed.

また、柱状構造体１３は、活性層１３ｂの形状が、いわゆる量子ドットや量子ディスクではなく、埋め込み構造体１４で埋め込まれることにより、箱型となっているので、基板１１に対する垂直方向及び水平方向でのバンド構造の制御が容易となる。   Further, the columnar structure 13 has a box shape because the shape of the active layer 13b is not a so-called quantum dot or quantum disk but is embedded by the embedded structure 14, so that the vertical structure and the horizontal direction with respect to the substrate 11 are formed. The band structure can be easily controlled.

また、前記光閉じ込め層１３ａ，１３ｃ及び埋め込み構造体１４のバンドギャップは、活性層１３ｂのバンドギャップよりも大きくなっている。   Further, the band gaps of the optical confinement layers 13a and 13c and the embedded structure 14 are larger than the band gap of the active layer 13b.

さらに、柱状構造体１３は、図２に示すように、前記微粒子体１２と前記活性層１３ｂとが基板１１の面と平行な平面に投影したときに重なることがないように、基板１１に対して傾斜して形成されている。   Further, as shown in FIG. 2, the columnar structure 13 is placed on the substrate 11 so as not to overlap when the fine particle body 12 and the active layer 13 b are projected onto a plane parallel to the surface of the substrate 11. And inclined.

このため、三次元閉じ込め量子ナノ構造体１０は、表面からの光の入出力が可能となり、フォトルミネッセンス測定において、室温でシャープな発光を１３００ｎｍ付近で観測することができる。   Therefore, the three-dimensional confined quantum nanostructure 10 can input and output light from the surface, and in photoluminescence measurement, sharp light emission can be observed at around 1300 nm at room temperature.

そして、基板１１をｎ型とし、柱状構造体１３の第一の光閉じ込め層１３ａ（成長方向基端側のＧａＡｓ）をｎ−ＧａＡｓとし、柱状構造体１３の第二の光閉じ込め層１３ｃ（成長方向先端側のＧａＡｓ）をｐ−ＧａＡｓとし、埋め込み構造体１４（Ａｌ0.1Ｇａ0.9Ａｓ）をＦｅ等でドーピングして半絶縁性とすることにより、柱状構造体１３を微小なｐｉｎダイオードとすることができる。 The substrate 11 is n-type, the first optical confinement layer 13a of the columnar structure 13 (GaAs on the base end side in the growth direction) is n-GaAs, and the second optical confinement layer 13c (growth of the columnar structure 13). The columnar structure 13 is made into a minute pin diode by making p-GaAs the GaAs at the tip end in the direction and making the buried structure 14 (Al 0.1 Ga 0.9 As) semi-insulating by doping with Fe or the like. Can do.

ここで、基板１１をｎ型電極とし、微粒子体１２にｐ型端子を触針して、Ｉ−Ｖ測定を行ったところ、三次元閉じ込め量子ナノ構造体１０は、逆バイアスにおいて、電流の流れないダイオード特性を得ることができ、順方向において、１３００ｎｍ付近で発光が観測された。   Here, when the substrate 11 is an n-type electrode and the fine particle body 12 is contacted with a p-type terminal and IV measurement is performed, the three-dimensional confined quantum nanostructure 10 has a current flow in reverse bias. In the forward direction, light emission was observed at around 1300 nm.

したがって、本実施形態によれば、加速したイオンにより物理的に除去するドライエッチング等の加工技術を利用せずに済むので、活性層１３ｂがダメージを受けることはなく、室温下での優れた特性を発現することができる。   Therefore, according to the present embodiment, since it is not necessary to use a processing technique such as dry etching that is physically removed by accelerated ions, the active layer 13b is not damaged and has excellent characteristics at room temperature. Can be expressed.

［第二番目の実施形態］
本発明に係る三次元閉じ込め量子ナノ構造体の製造方法の第二番目の実施形態を図３に基づいて説明する。図３は、三次元閉じ込め量子ナノ構造体の製造方法の説明図である。なお、前述した実施形態と同様な部分については、前述した実施形態と同様な符号を用いることにより、前述した実施形態と重複する説明を省略する。 [Second Embodiment]
The second th embodiment of a three-dimensional confinement manufacturing method of a quantum nano-structure according to the present invention will be described with reference to FIG. FIG. 3 is an explanatory diagram of a method for manufacturing a three-dimensional confined quantum nanostructure. In addition, about the part similar to embodiment mentioned above, the description which overlaps with embodiment mentioned above is abbreviate | omitted by using the code | symbol similar to embodiment mentioned above.

前述した第一番目の実施形態と同様に、ｎ−Ｓｉ（１１１）の基板２１上にレジスト膜を形成して、ＥＢを照射してレジスト膜にホールを複数形成し（直径２０ｎｍ、間隔２００ｎｍ）、前述した第一番目の実施形態の場合よりも少ない量のＡｕを蒸着した後にレジスト膜を除去することにより、Ａｕの凝集作用で当該レジスト膜の上記ホールよりも小さい直径となるＡｕの微粒子体２２（直径１０ｎｍ、高さ２ｎｍ）を当該基板２１上に複数形成する。   As in the first embodiment described above, a resist film is formed on the n-Si (111) substrate 21, and EB is irradiated to form a plurality of holes in the resist film (diameter 20 nm, interval 200 nm). By removing the resist film after depositing a smaller amount of Au than in the case of the first embodiment described above, Au fine particles having a diameter smaller than the holes of the resist film due to the aggregating action of Au A plurality of 22 (diameter 10 nm, height 2 nm) are formed on the substrate 21.

続いて、ＭＯＶＰＥ法により、ＴＭＧａ、ＴＭＩｎ、ＴＢＰ（又はＰＨ3）を原料に用い、原料流量及び成長時間を調整して、基板２１と微粒子体２２との間に柱状構造体２３をＶＬＳ成長により形成すると共に、当該柱状構造体２３上に、選択的なウエットエッチングにより除去可能なＧａＰからなる比較的長いエッチング層２５をさらに成長させて形成する（基板温度４７０℃）。 Subsequently, TMGa, TMIn, TBP (or PH 3 ) is used as a raw material by the MOVPE method, the raw material flow rate and the growth time are adjusted, and the columnar structure 23 is formed between the substrate 21 and the fine particle body 22 by VLS growth. At the same time, a relatively long etching layer 25 made of GaP that can be removed by selective wet etching is further grown and formed on the columnar structure 23 (substrate temperature 470 ° C.).

上記柱状構造体２３は、基板２１側から順に、ＧａＰからなる第一Ａ層２３ａａとＧａＡｓからなる第一Ｂ層２３ａｂとを複数回（例えば２０回）繰り返すことにより形成される第一の分布ブラッグ反射鏡（ＤＢＲ）層２３ａと、ＧａＡｓからなる第一のスペーサ層２３ｂと、ＩｎＡｓからなる活性層２３ｃと、ＧａＡｓからなる第二のスペーサ層２３ｄと、ＧａＰからなる第二Ａ層２３ｅａとＧａＡｓからなる第二Ｂ層２３ｅｂとを複数回（例えば２０回）繰り返すことにより形成される第二の分布ブラッグ反射鏡（ＤＢＲ）層２３ｅとからなっている（図３（ａ）参照）。   The columnar structure 23 is a first distributed Bragg formed by repeating a first A layer 23aa made of GaP and a first B layer 23ab made of GaAs a plurality of times (for example, 20 times) sequentially from the substrate 21 side. Reflector (DBR) layer 23a, first spacer layer 23b made of GaAs, active layer 23c made of InAs, second spacer layer 23d made of GaAs, second A layer 23ea made of GaP, and GaAs And a second distributed Bragg reflector (DBR) layer 23e formed by repeating the second B layer 23eb a plurality of times (for example, 20 times) (see FIG. 3A).

なお、本実施形態においては、上記ＤＢＲ層２３ａ，２３ｅ、上記スペーサ層２３ｂ，２３ｄにより、光閉じ込め層を構成している。また、柱状構造体２３は、ｎ−Ｓｉ（１１１）の基板２１を用いているため、ＶＬＳ成長により、基板２１に対して垂直方向に成長する。また、柱状構造体２３は、微粒子体２２が微小なため、その直径が５ｎｍとなった。また、前記ＤＢＲ層２３ａ，２３ｅの各層２３ａａ，２３ａｂ，２３ｅａ，２３ｅｂは、１０００ｎｍの波長の光に対する反射率が９９％以上となるように下記の式に基づいて長さＬが設定されている。   In this embodiment, the DBR layers 23a and 23e and the spacer layers 23b and 23d constitute an optical confinement layer. In addition, since the columnar structure 23 uses the n-Si (111) substrate 21, it grows in a direction perpendicular to the substrate 21 by VLS growth. The columnar structure 23 has a diameter of 5 nm because the fine particles 22 are minute. The lengths L of the respective layers 23aa, 23ab, 23ea, 23eb of the DBR layers 23a, 23e are set based on the following formula so that the reflectance with respect to light having a wavelength of 1000 nm is 99% or more.

Ｌ＝ｍλ／（４ｎ）
ただし、ｍは自然数、λは光の波長、ｎは屈折率である。 L = mλ / (4n)
Here, m is a natural number, λ is the wavelength of light, and n is a refractive index.

そして、柱状構造体２３の第一のＤＢＲ層２３ａ（成長方向基端側）をｎ型とし、柱状構造体２３の第二のＤＢＲ層２３ｅ（成長方向先端側）をｐ型とすると共に、ＴＭＡｌ、ＴＭＧａ、ＴＢＡｓ（又はＡｓＨ3）を原料に用いて、柱状構造体２３の周囲に同心円状をなすように、当該柱状構造体２３側から順に、ＧａＡｓからなる第一の埋め込み層２４ａ、半絶縁性のＡｌ0.1Ｇａ0.9Ａｓからなる第二の埋め込み層２４ｂ、半絶縁性のＡｌ0.9Ｇａ0.1Ａｓからなる第三の埋め込み層２４ｃを基板２１上に埋め込み成長（６５０℃）させて埋め込み構造体２４を形成する（図３（ｂ）参照）。 The first DBR layer 23a (growth direction base end side) of the columnar structure 23 is n-type, the second DBR layer 23e (growth direction front end) of the columnar structure 23 is p-type, and TMAl , TMGa, TBAs (or AsH 3 ) as raw materials, the first buried layer 24a made of GaAs, semi-insulating in order from the columnar structure 23 side so as to form a concentric circle around the columnar structure 23 The embedded layer 24 is formed by embedding and growing (650 ° C.) the second embedded layer 24 b made of conductive Al 0.1 Ga 0.9 As and the third embedded layer 24 c made of semi-insulating Al 0.9 Ga 0.1 As on the substrate 21. (See FIG. 3B).

なお、上記埋め込み構造体２４は、円周面に対して垂直方向へ１０００ｎｍの波長の光を反射できるように、各埋め込み層２４ａ〜２４ｃの厚さが設定されていることから、柱状構造体２３の発光体である活性層２３ｃ（ＩｎＡｓ）に対して、基板２１に対する垂直方向及び水平方向で光を閉じ込めることができる。   The embedded structure 24 has a thickness of each of the embedded layers 24a to 24c so that light having a wavelength of 1000 nm can be reflected in a direction perpendicular to the circumferential surface. It is possible to confine light in the vertical direction and the horizontal direction with respect to the substrate 21 with respect to the active layer 23c (InAs) which is a light emitter of the above.

また、前述した第一番目の実施形態の場合と同様に、柱状構造体２３を成長させた後に大気開放することなく上記埋め込み構造体２４の成長を行うことにより、柱状構造体２３と埋め込み構造体２４との界面の欠陥や不純物の影響が大幅に抑制される。   Further, as in the case of the first embodiment described above, the columnar structure 23 and the embedded structure are grown by growing the embedded structure 24 without exposing to the atmosphere after the columnar structure 23 is grown. The influence of defects and impurities at the interface with 24 is greatly suppressed.

また、前述した第一番目の実施形態の場合と同様に、前記ＤＢＲ層２３ａ，２３ｅ及び前記スペーサ層２３ｂ，２３ｄ（光閉じ込め層）並びに埋め込み構造体２４のバンドギャップは、活性層２３ｃのバンドギャップよりも大きくなっている。   Similarly to the case of the first embodiment described above, the band gaps of the DBR layers 23a and 23e, the spacer layers 23b and 23d (light confinement layers) and the embedded structure 24 are the same as the band gap of the active layer 23c. Is bigger than.

最後に、塩酸系のエッチング液又はＨＣｌガス等との化学反応により前記エッチング層２５を選択的にエッチングして当該エッチング層２５と共に微粒子体２２を除去して光の入出力を可能とすることにより、三次元閉じ込め量子ナノ構造体２０を製造する（図３（ｃ）参照）。   Finally, the etching layer 25 is selectively etched by a chemical reaction with a hydrochloric acid-based etching solution or HCl gas, and the fine particles 22 are removed together with the etching layer 25 to enable light input / output. Then, the three-dimensional confined quantum nanostructure 20 is manufactured (see FIG. 3C).

これにより、Ｑ値が１００００以上と高く、光の閉じ込めが可能なモード体積（Ｖ＝２（λ／ｎ）3、ｎは屈折率）が小さい、フォトニック結晶レーザ構造を得ることができる。この三次元閉じ込め量子ナノ構造体２０に順方向で電流を流したところ、無閾値のレーザ発振動作を確認することができた。 As a result, a photonic crystal laser structure having a high Q value of 10,000 or more and a small mode volume (V = 2 (λ / n) 3 , where n is a refractive index) capable of confining light can be obtained. When a current was passed through the three-dimensional confined quantum nanostructure 20 in the forward direction, a thresholdless laser oscillation operation could be confirmed.

したがって、本実施形態によれば、前述した第一番目の実施形態の場合と同様に、加速したイオンにより物理的に除去するドライエッチング等の加工技術を利用せずに済むので、活性層２３ｃがダメージを受けることはなく、室温下での優れた特性を発現することができる。   Therefore, according to the present embodiment, as in the case of the first embodiment described above, it is not necessary to use a processing technique such as dry etching that is physically removed by accelerated ions. It is not damaged and can exhibit excellent characteristics at room temperature.

なお、本実施形態では、前記エッチング層２５を選択的にエッチングして当該エッチング層２５と共に微粒子体２２を除去することにより、光の入出力を可能としたが、例えば、前記エッチング層２５及び微粒子体２２を除去せずに、基板２１側から光の入出力を行うようにすることも可能である。   In this embodiment, light can be input and output by selectively etching the etching layer 25 and removing the fine particles 22 together with the etching layer 25. For example, the etching layer 25 and the fine particles can be input / output. It is also possible to input / output light from the substrate 21 side without removing the body 22.

本発明に係る三次元閉じ込め量子ナノ構造体の製造方法は、加工によるダメージを受けることなく室温下での優れた特性を発現する光高率なナノサイズの光デバイスや電子デバイスの提供が可能となり、産業上、極めて有効に利用することができる。 Method for producing a three-dimensional quantum confinement nanostructure according to the present invention, it is possible to provide the excellent characteristics of an optical high rate nanosized expressing optical devices and electronic devices at room temperature without being damaged due to processing Industrially, it can be used very effectively.

本発明に係る三次元閉じ込め量子ナノ構造体の製造方法の第一番目の実施形態の説明図である。It is explanatory drawing of 1st embodiment of the manufacturing method of the three-dimensional confinement quantum nanostructure which concerns on this invention. 本発明に係る三次元閉じ込め量子ナノ構造体の第一番目の実施形態の柱状構造体の説明図である。It is explanatory drawing of the columnar structure of 1st embodiment of the three-dimensional confinement quantum nanostructure which concerns on this invention. 本発明に係る三次元閉じ込め量子ナノ構造体の製造方法の第二番目の実施形態の説明図である。It is explanatory drawing of 2nd embodiment of the manufacturing method of the three-dimensional confinement quantum nanostructure which concerns on this invention.

符号の説明Explanation of symbols

１０ 三次元閉じ込め量子ナノ構造体
１１ 基板
１２ 微粒子体
１３ 柱状構造体
１３ａ 第一の光閉じ込め層
１３ｂ 活性層
１３ｃ 第二の光閉じ込め層
１４ 埋め込み構造体
２０ 三次元閉じ込め量子ナノ構造体
２１ 基板
２２ 微粒子体
２３ 柱状構造体
２３ａ 第一の分布ブラッグ反射鏡層
２３ａａ 第一Ａ層
２３ａｂ 第一Ｂ層
２３ｂ 第一のスペーサ層
２３ｃ 活性層
２３ｄ 第二のスペーサ層
２３ｅ 第二の分布ブラッグ反射鏡層
２３ｅａ 第二Ａ層
２３ｅｂ 第二Ｂ層
２４ 埋め込み構造体
２４ａ 第一の埋め込み層
２４ｂ 第二の埋め込み層
２４ｃ 第三の埋め込み層
２５ エッチング層 DESCRIPTION OF SYMBOLS 10 Three-dimensional confinement quantum nanostructure 11 Substrate 12 Fine particle body 13 Columnar structure 13a First optical confinement layer 13b Active layer 13c Second optical confinement layer 14 Embedded structure 20 Three-dimensional confinement quantum nanostructure 21 Substrate 22 Fine particle Body 23 columnar structure 23a first distributed Bragg reflector layer 23aa first A layer 23ab first B layer 23b first spacer layer 23c active layer 23d second spacer layer 23e second distributed Bragg reflector layer 23ea first 2A layer 23eb second B layer 24 embedded structure 24a first embedded layer 24b second embedded layer 24c third embedded layer 25 etching layer

Claims (1)

基板上に金属の微粒子体を形成し、当該微粒子体を活性点として当該基板と当該微粒子体との間に、気相‐液相‐固相（ＶＬＳ）成長により、活性層及び当該活性層で発光する光を閉じ込めるために当該活性層に対し前記基板側及び前記微粒子体側の両方に配置した光閉じ込め層を含む多層構造からなる柱状構造体を成長させると共に、前記柱状構造体と前記微粒子体との間に、選択的エッチング除去可能なエッチング層を気相‐液相‐固相（ＶＬＳ）成長により成長させ、前記柱状構造体を包囲するように前記基板上に、前記柱状構造体の前記活性層と異なる組成の層を埋め込み成長させて埋め込み構造体を形成した後、前記エッチング層を選択的エッチング除去することにより、前記微粒子体を除去して、三次元閉じ込め量子ナノ構造体を製造する
ことを特徴とする三次元閉じ込め量子ナノ構造体の製造方法。 A metal fine particle is formed on a substrate, and the active layer and the active layer are formed by vapor phase-liquid phase-solid phase (VLS) growth between the substrate and the fine particle with the fine particle as an active point. emission to Rutotomoni grown columnar structures composed of multi-layer structure including an optical confinement layer disposed on both the substrate side and the fine side to the active layer in order to confine light, the columnar structure and the particulate matter gas phase, the selective etching removable etch layer between the - liquid - solid (VLS) grown by the growth, on the substrate so as to surround the columnar structure, wherein the columnar structure after forming the buried structures the layers of the active layer with different composition were buried growth, by selectively etching away the etch layer, and removing the particulate matter, the three-dimensional quantum confinement nanostructures Three-dimensional confinement manufacturing method of a quantum nano-structure is characterized by the manufacture.
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JPH05175118A (en) * 1991-12-24 1993-07-13 Nippon Telegr & Teleph Corp <Ntt> Method for creating compound semiconductor having quantum fine line or quantum box structure
JPH05306200A (en) * 1992-04-30 1993-11-19 Matsushita Electric Ind Co Ltd Production of fine structure
JPH0697425A (en) * 1992-09-14 1994-04-08 Hitachi Ltd Quantum wire superlattice structure and its manufacture
JPH07169938A (en) * 1993-12-16 1995-07-04 Denki Kagaku Kogyo Kk Quantum fine wire device and its manufacture
JPH07169937A (en) * 1993-11-15 1995-07-04 Nippon Telegr & Teleph Corp <Ntt> Manufacture of quantum fine wire growing substrate
JPH07183485A (en) * 1993-12-22 1995-07-21 Denki Kagaku Kogyo Kk Quantum fine line device and manufacture

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JPH05175118A (en) * 1991-12-24 1993-07-13 Nippon Telegr & Teleph Corp <Ntt> Method for creating compound semiconductor having quantum fine line or quantum box structure
JPH05306200A (en) * 1992-04-30 1993-11-19 Matsushita Electric Ind Co Ltd Production of fine structure
JPH0697425A (en) * 1992-09-14 1994-04-08 Hitachi Ltd Quantum wire superlattice structure and its manufacture
JPH07169937A (en) * 1993-11-15 1995-07-04 Nippon Telegr & Teleph Corp <Ntt> Manufacture of quantum fine wire growing substrate
JPH07169938A (en) * 1993-12-16 1995-07-04 Denki Kagaku Kogyo Kk Quantum fine wire device and its manufacture
JPH07183485A (en) * 1993-12-22 1995-07-21 Denki Kagaku Kogyo Kk Quantum fine line device and manufacture

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