JP4505769B2 - Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof - Google Patents

Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof Download PDF

Info

Publication number
JP4505769B2
JP4505769B2 JP2000101253A JP2000101253A JP4505769B2 JP 4505769 B2 JP4505769 B2 JP 4505769B2 JP 2000101253 A JP2000101253 A JP 2000101253A JP 2000101253 A JP2000101253 A JP 2000101253A JP 4505769 B2 JP4505769 B2 JP 4505769B2
Authority
JP
Japan
Prior art keywords
adhesive
adhesive layer
film
weight
adhesive film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2000101253A
Other languages
Japanese (ja)
Other versions
JP2001279197A (en
Inventor
禎一 稲田
雄二 長谷川
雅也 西山
健男 富山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2000101253A priority Critical patent/JP4505769B2/en
Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to US10/240,265 priority patent/US7070670B2/en
Priority to KR1020027012945A priority patent/KR100815314B1/en
Priority to TW090107672A priority patent/TWI245791B/en
Priority to TW092115192A priority patent/TWI332521B/en
Priority to TW098125792A priority patent/TWI332024B/en
Priority to PCT/JP2001/002716 priority patent/WO2001074962A1/en
Priority to KR1020087011924A priority patent/KR100894208B1/en
Priority to KR1020077022421A priority patent/KR100894207B1/en
Publication of JP2001279197A publication Critical patent/JP2001279197A/en
Application granted granted Critical
Publication of JP4505769B2 publication Critical patent/JP4505769B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01012—Magnesium [Mg]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0104—Zirconium [Zr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01077—Iridium [Ir]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Description

【０００１】
【発明の属する技術分野】
本発明は、接着フィルム、接着フィルムを備えた半導体搭載用配線基板、半導体装置及びその製造方法に関する。
【０００２】
【従来の技術】
ＣＳＰは他の電子部品と一括して実装できるために、日刊工業新聞社発行表面実装技術１９９７−３号記事「実用化に入ったＣＳＰ（ファインピッチＢＧＡ）のゆくえ」中に示されたような各種構造が提案されている。その中でも、インターポーザと呼ばれる配線基板にテープやキャリア基板を用いた方式の実用化が進んでいる。これらはインターポーザと呼ばれる配線基板を介するために、信学技報ＣＰＭ９６−１２１，ＩＣＤ９６−１６０（１９９６−１２）「テープＢＧＡタイプＣＳＰの開発」やシャープ技報第６６号（１９９６−１２）「チップサイズパッケージ（Ｃｈｉｐ Ｓｉｚｅ ＰａｃｋＡｇｅ）開発」に発表されているように優れた接続信頼性を示している。
【０００３】
これらのＣＳＰの半導体チップとインターポーザと呼ばれる配線基板との間には、それぞれの熱膨張率差から生じる熱応力を低減するような接着フィルムが使われる。このような接着フィルムには耐湿性や高温耐久性が要求されている。
【０００４】
フィルムタイプの接着剤は、フレキシブルプリント配線板等で用いられており、アクリロニトリルブタジエンゴムを主成分とする系が多く用いられている。
【０００５】
プリント配線板関連材料として耐湿性を向上させたものとしては、特開昭６０−２４３１８０号公報に示されるアクリル系樹脂、エポキシ樹脂、ポリイソシアネート及び無機フィラーを含む接着剤があり、また特開昭６１−１３８６８０号公報に示されるアクリル系樹脂、エポキシ樹脂、分子中にウレタン結合を有する両末端が第１級アミン化合物及び無機フィラーを含む接着剤がある。
【０００６】
【発明が解決しようとする課題】
上記の接着フィルムには、熱応力の緩和の作用、耐熱性や耐湿性を有することが必要である。それに加え、製造プロセスの上からは、半導体チップに設けられた電気信号を出力するための電極部分に接着剤が流出してこないことが必要であり、また、貫通孔付き配線基板を用いた場合には貫通孔から、接着剤が流出してこないことが必要である。これは電極部分に接着剤が流出すると電極の接続不良が発生し、貫通孔から接着剤が流出した場合、金型を汚染するため不良発生の原因となるからである。さらに配線基板に設けられた回路との間に空隙を残してはならない。回路と接着剤との間に空隙があると耐熱性、耐湿性の低下が起こりやすい。しかし、チップ上の回路を破損しない程度の低い圧力や低い温度で熱圧着した場合、接着剤の侵みだし防止と十分な回路充填性を満足することは難しかった。
【０００７】
本発明は、ガラスエポキシ基板やフレキシブル基板等のインターポーザと呼ばれる配線基板に熱膨張係数の差が大きい半導体チップを実装する場合に必要な低弾性と回路充填性を持ち、耐熱性、耐湿性を損なうことなく、かつ貫通孔からのしみだしがない接着フィルム、この接着フィルムを備えた半導体搭載用配線基板、及びこの接着フィルムを用いて半導体チップと配線基板を接着させた半導体装置の提供を目的とした。
【０００８】
【課題を解決するための手段】
本発明は下記（１）〜（９）記載の各事項に関する。
（１） 下記の２種類の接着剤層を積層してなることを特徴とする接着フィルム。
第１の接着剤層
エポキシ樹脂及びその硬化剤１００重量部、官能基を含む重量平均分子量が１０万以上でＴｇが−５０℃以上０℃以下である高分子量成分１０〜１００重量部、硬化促進剤０．１〜２０重量部を含有する接着剤からなり、示差走査熱分析（ＤＳＣ）による硬化度が０〜４０％の範囲にある接着剤層。
第２の接着剤層
エポキシ樹脂及びその硬化剤１００重量部、官能基を含む重量平均分子量が１０万以上でＴｇが−５０℃以上０℃以下である高分子量成分１０〜１００重量部、硬化促進剤０．１〜２０重量部を含有する接着剤からなり、ＤＳＣによる硬化度が０〜４０%の範囲にある接着剤層であって、高分子量成分の重量部が第１の接着剤層より１０重量部以上大きいかまたは、ＤＳＣによる硬化度が第１の接着剤層より５％以上大きい接着剤層。
（２） 第１の接着剤層および第２の接着剤層に用いるエポキシ樹脂及びその硬化剤として、臭素原子を含むエポキシ樹脂及び／又は臭素原子を含む硬化剤を用いたことを特徴とする（１）記載の接着フィルム。
（３） 高分子量成分が、グリシジルアクリレート又はグリシジルメタクリレート０．５〜６．０重量％を含むアクリル共重合体であることを特徴とする（１）または（２）記載の接着フィルム。
（４） 動的粘弾性測定装置を用いて測定した場合の第１の接着剤層および第２の接着剤層の接着剤硬化物の貯蔵弾性率が各々２５℃で２０〜２０００ＭＰａであり、２６０℃で３〜５０ＭＰａである（１）〜（３）のいずれかに記載の接着フィルム。
（５） 配線基板の半導体チップ搭載面に（１）〜（４）のいずれかに記載の接着フィルムを、第２の接着剤層の面が配線基板に接するように備えた半導体搭載用配線基板。
（６） 半導体チップに（１）〜（４）のいずれかに記載の接着フィルムを、第１の接着剤層の面が半導体チップに接するように備えた半導体装置。
（７） 半導体チップと回路付き基板または回路付きフィルムを（１）〜（４）のいずれかに記載の接着フィルムを介して接着する半導体装置において、第１の接着剤層の面が半導体チップに、第２の接着剤層の面が回路付き基板または回路付きフィルムに接することを特徴とする半導体装置。
【０００９】
【発明の実施の形態】
本発明において、第１の接着剤層及び第２の接着剤層に使用することができるエポキシ樹脂は、硬化して接着作用を呈するものであればよく、二官能以上（１分子中にエポキシ基を２個以上含有）で、好ましくは平均分子量が５０００未満、より好ましくは平均分子量が３０００未満のエポキシ樹脂が使用できる。二官能エポキシ樹脂（１分子中にエポキシ基を２個含有するエポキシ樹脂）としては、ビスフェノールＡ型またはビスフェノールＦ型エポキシ樹脂等が例示される。ビスフェノールＡ型またはビスフェノールＦ型エポキシ樹脂は、油化シェルエポキシ株式会社から、エピコート８０７、エピコート８２７、エピコート８２８という商品名で市販されている。また、ダウケミカル日本株式会社からは、Ｄ．Ｅ．Ｒ．３３０、Ｄ．Ｅ．Ｒ．３３１、Ｄ．Ｅ．Ｒ．３６１という商品名で市販されている。さらに、東都化成株式会社から、ＹＤ８１２５、ＹＤＦ８１７０という商品名で市販されている。
【００１０】
また、本発明における前記エポキシ樹脂としては三官能以上（１分子中にエポキシ基を３個以上含有）の多官能エポキシ樹脂を用いてもよく、二官能エポキシ樹脂５０〜１００重量％と三官能以上の多官能エポキシ０〜５０重量％を用いることが好ましい。特に、高Ｔｇ化のためには二官能エポキシ樹脂５０〜９０重量％とともに、三官能以上の多官能エポキシ樹脂を１０〜５０重量％用いることが好ましい。三官能以上の多官能エポキシ樹脂としては、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂等が例示される。フェノールノボラック型エポキシ樹脂は、日本化薬株式会社から、ＥＰＰＮ−２０１という商品名で市販されている。クレゾールノボラック型エポキシ樹脂は、住友化学工業株式会社から、ＥＳＣＮ−１９０、ＥＳＣＮ−１９５という商品名で市販されている。また、前記日本化薬株式会社から、ＥＯＣＮ１０１２、ＥＯＣＮ１０２５、ＥＯＣＮ１０２７という商品名で市販されている。さらに、前記東都化成株式会社から、ＹＤＣＮ７０１、ＹＤＣＮ７０２、ＹＤＣＮ７０３、ＹＤＣＮ７０４という商品名で市販されている。
【００１１】
難燃化を効果的にするためには前記エポキシ樹脂として、臭素化エポキシ樹脂を用いることが好ましい。臭素化エポキシ樹脂としては、臭素原子を含む二官能エポキシ樹脂やノボラック型の臭素化エポキシ樹脂を使用できる。臭素原子を含む二官能エポキシ樹脂は、東都化成株式会社から、ＹＤＢ−３６０、 ＹＤＢ−４００という商品名で市販されている。また、ノボラック型の臭素化エポキシ樹脂は、日本化薬株式会社から、ＢＲＥＮ−Ｓ、 ＢＲＥＮ−１０４、 ＢＲＥＮ−３０１という商品名で市販されている。
【００１２】
前記エポキシ樹脂の硬化剤は、エポキシ樹脂の硬化剤として通常用いられているものを使用でき、アミン、ポリアミド、酸無水物、ポリスルフィド、三弗化硼素及びフェノール性水酸基を１分子中に２個以上有する化合物であるビスフェノールＡ、ビスフェノールＦ、ビスフェノールＳ等が挙げられる。特に吸湿時の耐電食性に優れるためフェノール樹脂であるフェノールノボラック樹脂、ビスフェノールノボラック樹脂またはクレゾールノボラック樹脂等を用いるのが好ましい。フェノールノボラック樹脂は、大日本インキ化学工業株式会社からバーカムＴＤ−２０９０、バーカムＴＤ−２１３１、変性フェノールノボラック樹脂は大日本インキ化学工業株式会社からプライオーフェンＶＨ４１５０、プライオーフェンＶＨ４１７０、ビスフェノールノボラック樹脂は大日本インキ化学工業株式会社からフェノライトＬＦ２８８２、フェノライトＬＦ２８２２という商品名で市販されている。
【００１３】
難燃性向上のためには臭素化エポキシ樹脂と併せて、二官能以上の臭素化フェノール化合物を硬化剤として用いることが好ましい。臭素化フェノール化合物としては、例えばテトラブロモビスフェノールＡを用いることができる。テトラブロモビスフェノールＡは、帝人化成工業株式会社から、ファイヤーガードＦＧ２０００という商品名で市販されている。
【００１４】
前記硬化剤は、エポキシ樹脂のエポキシ基１当量に対して、硬化剤のエポキシ基との反応基が０．６〜１．４当量使用することが好ましく、０．８〜１．２当量使用することがより好ましい。硬化剤が少なすぎたり多すぎると耐熱性が低下する傾向がある。
【００１５】
前記硬化剤とともに硬化促進剤を用いるのが好ましく、硬化促進剤としては、各種イミダゾール類が使用できる。イミダゾールとしては、２−メチルイミダゾール、２−エチル−４−メチルイミダゾール、１−シアノエチル−２−フェニルイミダゾール、１−シアノエチル−２−フェニルイミダゾリウムトリメリテート等が挙げられる。イミダゾール類は、四国化成工業株式会社から、２Ｅ４ＭＺ、２ＰＺ−ＣＮ、２ＰＺ−ＣＮＳという商品名で市販されている。また、フィルムの可使期間が長くなる点で、潜在性硬化促進剤が好ましく、その代表例としてはジシアンジミド、アジピン酸ジヒドラジド等のジヒドラジド化合物、グアナミン酸、メラミン酸、エポキシ化合物とイミダゾールの化合物との付加化合物、エポキシ化合物とジアルキルアミン類との付加化合物、アミンとチオ尿素との付加化合物、アミンとイソシアネートとの付加化合物が挙げられるが、これらに限定されるものではない。室温での活性を低減できる点でアダクト型の構造をとっているものが特に好ましい。アダクト型硬化促進剤の代表的な例を以下に示すがこれらに限定されるものではない。アミン−エポキシアダクト系としては、味の素株式会社からはアミキュアＰＮ−２３、アミキュアＭＹ−２４、アミキュアＭＹ−Ｄ、アミキュアＭＹ−Ｈ等、エー・シー・アール株式会社からはハードナーＸ−３６１５Ｓ、ハードナーＸ−３２９３Ｓ等、旭化成株式会社からはノバキュアＨＸ−３７４８、ノバキュアＨＸ−３０８８等、パシフィック アンカー ケミカルからはＡｎｃａｍｉｎｅ２０１４ＡＳ、Ａｎｃａｍｉｎｅ２０１４ＦＧ等がそれぞれ上記の商品名で市販されている。また、アミン−尿素型アダクト系としては富士化成株式会社からフジキュアＦＸＥ−１０００、フジキュアＦＸＲ−１０３０という商品名で市販されている。
【００１６】
前記硬化促進剤の配合量は好ましくは、エポキシ樹脂及び硬化剤の合計１００重量部に対して０．１〜２０重量部、より好ましくは０．５〜１５重量部である。０．１重量部未満であると硬化速度が遅くなる傾向にあり、また２０重量部を超えると可使期間が短くなる傾向がある。
【００１７】
本発明において第１の接着剤層及び第２の接着剤層に使用する官能基を含む重量平均分子量が１０万以上でＴｇが−５０℃以上０℃以下である高分子量成分としては、エポキシ基、カルボキシル基、水酸基などを架橋点として含むゴムを用いることができ、例えば官能基を含有した、ＮＢＲやアクリルゴムが挙げられる。ここでのアクリルゴムとはアクリル酸エステルを主成分としたゴムであり、主としてブチルアクリレートとアクリロニトリル等の共重合体や、エチルアクリレートとアクリロニトリル等の共重合体などからなるゴムである。
【００１８】
このようなゴムとしては、例えば、グリシジルアクリレート又はグリシジルメタクリレート０．５〜６．０重量％を含む、Ｔｇが−５０℃以上でかつ重量平均分子量が１０万以上のエポキシ基含有アクリル共重合体があり、帝国化学産業株式会社から市販されている商品名ＨＴＲ−８６０Ｐ３ＤＲ（Ｃ）を使用することができる。官能基モノマーがカルボン酸タイプのアクリル酸や、水酸基タイプのヒドロキシメチルアクリレート又はヒドロキシメチルメタクリレート等を用いると、架橋反応が進行しやすく、ワニス状態でのゲル化、Ｂステージ状態での硬化度の上昇により接着力が低下する傾向がある。また、官能基モノマーとして用いるグリシジルアクリレート又はグリシジルメタクリレートの共重合体比は、耐熱性を確保するため、０．５重量％以上が好ましく、ゴム添加量を低減し、ワニス固形分比を上げるために６．０重量％以下が好ましい。６．０重量％を超えた場合には、分子量が高いため、接着剤ワニスの粘度が上昇する。このワニス粘度が高いと、フィルム化が困難になるため、粘度低下を目的に適量の溶剤で希釈する必要があり、接着剤ワニスの固形分が低下し、接着剤ワニス作製量が増大して、製造の効率が低下する傾向がある。グリシジルアクリレート又はグリシジルメタクリレート以外の残部はエチルアクリレートやエチルメタクリレート、ブチルアクリレート、ブチルメタクリレート及びこれらの混合物を用いることができるが、混合比率は、共重合体のＴｇを考慮して決定する。Ｔｇが−５０℃未満であるとＢステージ状態での接着フィルムのタック性が大きくなり取扱性が悪化するので、−５０℃以上とされる。このＴｇは０℃以下であることが好ましい。このＴｇが高すぎるとフィルムの取り扱い時室温で破断しやすくなる。重合方法はパール重合、溶液重合等が挙げられ、これらにより得ることができる。
【００１９】
高分子量成分の重量平均分子量は１０万以上とされる。重量平均分子量は１０万より小さい場合、シート状、フィルム状での強度や可撓性の低下、タック性の増大がみられるため、好ましくない。また、分子量が大きくなるにつれフロー性が小さく配線の回路充填性が低下してくるので、高分子量成分の重量平均分子量は、２００万以下であることが好ましい。なお、本発明において、重量平均分子量はゲルパーミエーションクロマトグラフィーによって、標準ポリスチレンの検量線を用いて測定したものである。
【００２０】
上記高分子量成分の配合量は、エポキシ樹脂と硬化剤の合計量１００重量部に対して、１０重量部以上１００重量部以下とされる。弾性率低減や成形時のフロー性付与のため１０重量部以上が必要とされ、１００重量部を越えると貼付荷重が少ない場合に流動性が低下し、回路充填性が低下する点で好ましくない。さらに４０〜８０重量部とされることが好ましい。
【００２１】
本発明において第１の接着剤層及び第２の接着剤層に使用する接着剤には、異種材料間の界面結合をよくするために、カップリング剤を配合することもできる。カップリング剤としては、シラン系カップリング剤、チタネート系カップリング剤、アルミニウム系カップリング剤が挙げられ、その中でもシランカップリング剤が好ましい。配合量は、添加による効果や耐熱性およびコストから、接着剤の樹脂全体で１００重量部に対し、０．１〜１０重量部を配合するのが好ましい。
【００２２】
前記シランカップリング剤としては、γ−グリシドキシプロピルトリメトキシシラン、γ−メルカプトプロピルトリメトキシシラン、γ−アミノプロピルトリエトキシシラン、γ−ウレイドプロピルトリエトキシシラン、Ｎ−β−アミノエチル−γ−アミノプロピルトリメトキシシラン等が挙げられる。シランカップリング剤は、γ−グリシドキシプロピルトリメトキシシランがＮＵＣ Ａ−１８７、γ−メルカプトプロピルトリメトキシシランがＮＵＣ Ａ−１８９、γ−アミノプロピルトリエトキシシランがＮＵＣ Ａ−１１００、γ−ウレイドプロピルトリエトキシシランがＮＵＣ Ａ−１１６０、Ｎ−β−アミノエチル−γ−アミノプロピルトリメトキシシランがＮＵＣ Ａ−１１２０という商品名で、いずれも日本ユニカ−株式会社から市販されている。
【００２３】
さらに、本発明において第１の接着剤層及び第２の接着剤層に使用する接着剤には、イオン性不純物を吸着して吸湿時の絶縁信頼性をよくするために、イオン捕捉剤を配合することができる。イオン捕捉剤の配合量は、添加による効果や耐熱性、コストより、接着剤の樹脂全体で１００重量部に対し、１〜１０重量部が好ましい。イオン捕捉剤としては、銅がイオン化して溶け出すのを防止するため銅害防止剤として知られる化合物、例えば、トリアジンチオール化合物、ビスフェノール系還元剤を配合することもできる。ビスフェノール系還元剤としては、２，２’−メチレン−ビス−（４−メチル−６−第３−ブチルフェノール）、４，４’−チオ−ビス−（３−メチル−６−第３−ブチルフェノール）等が挙げられる。また、無機イオン吸着剤を配合することもできる。無機イオン吸着剤としては、ジルコニウム系化合物、アンチモンビスマス系化合物、マグネシウムアルミニウム系化合物等が挙げられる。トリアジンチオール化合物を成分とする銅害防止剤は、三協製薬株式会社から、ジスネットＤＢという商品名で市販されている。ビスフェノール系還元剤を成分とする銅害防止剤は、吉富製薬株式会社から、ヨシノックスＢＢという商品名で市販されている。また、無機イオン吸着剤は、東亜合成化学工業株式会社からＩＸＥという商品名で各種市販されている。
【００２４】
さらに、本発明において第１の接着剤層及び第２の接着剤層に使用する接着剤には、接着剤の取扱性の向上、熱伝導性の向上、溶融粘度の調整、チクソトロピック性の付与などを目的として、無機フィラーを配合することが好ましい。無機フィラーとしては、水酸化アルミニウム、水酸化マグネシウム、炭酸カルシウム、炭酸マグネシウム、ケイ酸カルシウム、ケイ酸マグネシウム、酸化カルシウム、酸化マグネシウム、アルミナ、窒化アルミニウム、ほう酸アルミウイスカ、窒化ホウ素、結晶性シリカ、非晶性シリカ、アンチモン酸化物などが挙げられる。熱伝導性向上のためには、アルミナ、窒化アルミニウム、窒化ホウ素、結晶性シリカ、非晶性シリカ等が好ましい。溶融粘度の調整やチクソトロピック性の付与の目的には、水酸化アルミニウム、水酸化マグネシウム、炭酸カルシウム、炭酸マグネシウム、ケイ酸カルシウム、ケイ酸マグネシウム、酸化カルシウム、酸化マグネシウム、アルミナ、結晶性シリカ、非晶性シリカ等が好ましい。また、耐湿性を向上させるためにはアルミナ、シリカ、水酸化アルミニウム、アンチモン酸化物が好ましい。
【００２５】
前記無機フィラーの配合量は、接着剤樹脂分１００体積部に対して１〜２０体積部が好ましい。配合の効果の点から配合量が１体積部以上、配合量が多くなると、接着剤の貯蔵弾性率の上昇、接着性の低下、ボイド残存による電気特性の低下等の問題が起きやすくなるので２０体積部以下とするのが好ましい。
【００２６】
乾燥後の接着剤の硬化度は、ＤＳＣ（デュポン社製９１２型ＤＳＣ）を用いて測定（昇温速度、１０℃／分）した場合、硬化度０〜４０％（全硬化発熱量の０〜４０％の発熱を終えた状態）であることが好ましい。
【００２７】
本発明の接着フィルムでは第１の接着剤層と比較して、第２の接着剤層の流動性が低い必要がある。このため、第２の接着剤層は第１の接着剤層に比べ、高分子量成分の重量部が１０重量部以上大きいかまたは、ＤＳＣによる硬化度が５％以上大きいことが必要である。第２の接着剤層の高分子量成分の重量部が第１の接着剤層より１０重量部以上大きくなく、かつ第２の接着剤層のＤＳＣによる硬化度が第１の接着剤層より５％以上大きくない場合、十分な回路充填性と貫通孔からのしみだし防止とが両立できない。第１の接着剤層と比較して、第２の接着剤層の高分子量成分が１０〜４０重量部大きく、かつＤＳＣによる硬化度が５〜２０％大きいことが好ましい。
【００２８】
本発明の接着フィルムに用いる第１の接着剤層及び第２の接着剤層各々において残存溶媒量は、３重量％以下であることが好ましい。また、この接着フィルムに用いる第１の接着剤層及び第２の接着剤層各々の硬化物において動的粘弾性測定装置で測定した貯蔵弾性率は２５℃で２０〜２０００ＭＰａであり、２６０℃で３〜５０ＭＰａであることが好ましい。貯蔵弾性率の測定は、接着剤硬化物に引張り荷重をかけて、周波数１０Ｈｚ、昇温速度５〜１０℃／分で−５０℃から３００℃まで測定する温度依存性測定モードで行った。貯蔵弾性率が２５℃で２０００ＭＰａを超えるものと２６０℃で５０ＭＰａを超えるものでは、半導体チップと配線基板であるインターポーザとの熱膨張係数の差によって発生する熱応力を緩和させる効果が小さくなる傾向があり、剥離やクラックを発生する恐れがある。一方、貯蔵弾性率が２５℃で２０ＭＰａ未満では接着剤の取扱性や接着剤層の厚み精度が悪くなる傾向があり、２６０℃で３ＭＰａ未満ではリフロークラックが発生しやすい傾向がある。
【００２９】
本発明の接着フィルムに用いる第１の接着剤層及び第２の接着剤層は、各々接着剤層をキャリアフィルム上に形成させて得ることができる。例えば接着剤の各成分を溶剤に溶解ないし分散してワニスとし、キャリアフィルム上に塗布、加熱し溶剤を除去することにより、接着剤層をキャリアフィルム上に形成して得られる。キャリアフィルムとしては、ポリテトラフルオロエチレンフィルム、ポリエチレンテレフタレートフィルム、離型処理したポリエチレンテレフタレートフィルム、ポリエチレンフィルム、ポリプロピレンフィルム、ポリメチルペンテンフィルム、ポリイミドフィルムなどのプラスチックフィルムが使用できる。
【００３０】
本発明で用いるキャリアフィルムとしては市販の物を利用でき、例えばポリイミドフィルムは東レ・デュポン株式会社からカプトンという商品名で、鐘淵化学工業株式会社からアピカルという商品名で市販されている。またポリエチレンテレフタレートフィルムは、東レ・デュポン株式会社からルミラーという商品名で、帝人株式会社からピューレックスという商品名で市販されている。
【００３１】
ワニス化の溶剤は、メチルエチルケトン、アセトン、メチルイソブチルケトン、２−エトキシエタノール、トルエン、ブチルセルソルブ、メタノール、エタノール、２−メトキシエタノールなどを用いることができる。また、塗膜性を向上するなどの目的で、高沸点溶剤を加えても良い。高沸点溶剤としては、ジメチルアセトアミド、ジメチルホルムアミド、メチルピロリドン、シクロヘキサノンなどが挙げられる。
【００３２】
ワニスの製造は、無機フィラーの分散を考慮した場合には、らいかい機、３本ロール及びビーズミル等により、またこれらを組み合わせて行なうことができる。フィラーと低分子量物をあらかじめ混合した後、高分子量物を配合することにより、混合に要する時間を短縮することも可能となる。また、ワニスとした後、真空脱気によりワニス中の気泡を除去することが好ましい。
【００３３】
本発明における第１の接着剤層と第２の接着剤層とを積層した接着フィルムは、第１の接着剤層と第２の接着剤層とをそれぞれキャリアフィルム上に形成した後、これらフィルム状の接着剤層を熱圧着することにより作製することができる。例えば第１の接着剤層と第２の接着剤層重ね、ホットロールラミネーターで貼りあわせることによって作製することができる。このとき接着剤層は第１の接着剤層と第２の接着剤層のどちらにおいても、キャリアフィルムを剥離してフィルム状の接着剤層のみを使用することもできるし、キャリアフィルムを剥離せずに使用してもよい。キャリアフィルムを剥離せずに使用した場合、キャリアフィルムはカバーフィルムとしても利用できる。
【００３４】
また、第２の接着剤層の成分からなるワニスをキャリアフィルム上に塗布し、加熱して溶媒を除去した後、第２の接着剤層上に第１の接着剤層の成分からなるワニスを塗布し、再度加熱することによっても、第２の接着剤層の硬化度が第１の接着剤層の硬化度よりも高い接着フィルムを作製することができる。
【００３５】
第１の接着剤層及び第２の接着剤層の厚みは、各々１０〜２００μｍが好ましいが、これに限定されるものではない。１０μｍよりも薄いと応力緩和効果が乏しくなる傾向がある。厚いとコスト高になりやすい。また、第１の接着剤層及び第２の接着剤層を積層した接着フィルムの厚さが回路厚よりも薄い場合、埋め込み性が落ちる傾向がある。
【００３６】
本発明の接着フィルムは、コア材の一方の面に第１の接着剤層を、他方の面に第２の接着剤層を積層したものであってもよい。コア材の厚みは５〜２００μｍの範囲内であることが好ましいが、これに限定されるものではない。コア材の両面に形成される接着剤の厚みは、各々１０〜２００μｍの範囲が好ましい。１０μｍより薄いと接着性や応力緩和効果に乏しい傾向がある。厚いとコスト高になりやすい。また、第２の接着剤層の厚さが回路厚よりも薄い場合、配線板側の埋め込み性が落ちる傾向がある。
【００３７】
本発明でコア材に用いられるフィルムとしては、耐熱性ポリマまたは液晶ポリマ、フッ素系ポリマなどを用いた耐熱性熱可塑フィルムが好ましく、ポリアミドイミド、ポリイミド、ポリエーテルイミド、ポリエーテルスルホン、全芳香族ポリエステル、ポリテトラフルオロエチレン、エチレンテトラフルオロエチレンコポリマー、テトラフルオロエチレン−ヘキサフルオロプロピレンコポリマー、テトラフルオロエチレン−パーフルオロアルキルビニルエーテルコポリマーなどが好適に用いられる。また、コア材は、接着フィルムの弾性率低減のために多孔質フィルムを用いることもできる。軟化点温度が２６０℃未満の熱可塑性フィルムをコア材に用いた場合は、はんだリフロー時などの高温時に接着剤との剥離を起こす場合がある。
【００３８】
ポリイミドフィルムは、宇部興産株式会社からユーピレックスという商品名で、東レ・デュポン株式会社からカプトンという商品名で、鐘淵化学工業株式会社からアピカルという商品名で市販されている。ポリテトラフルオロエチレンフィルムは、三井・デュポンフロロケミカル株式会社からテフロンという商品名で、ダイキン工業株式会社からポリフロンという商品名で市販されている。エチレンテトラフルオロエチレンコポリマーフィルムは、旭硝子株式会社からアフロンＣＯＰという商品名で、ダイキン工業株式会社からネオフロンＥＴＦＥという商品名で市販されている。テトラフルオロエチレン−ヘキサフルオロプロピレンコポリマーフィルムは、三井・デュポンフロロケミカル株式会社からテフロンＦＥＰという商品名で、ダイキン工業株式会社からネオフロンＦＥＰという商品名で市販されている。テトラフルオロエチレン−パーフルオロアルキルビニルエーテルコポリマーフィルムは、三井・デュポンフロロケミカル株式会社からテフロンＰＦＡという商品名で、ダイキン工業株式会社からネオフロンＰＦＡという商品名で市販されている。液晶ポリマフィルムは、株式会社クラレからベクトラという商品名で市販されている。さらに、多孔質ポリテトラフルオロエチレンフィルムは、住友電気工業株式会社からポアフロンという商品名で、ジャパンゴアテックス株式会社からゴアテックスという商品名で市販されている。
【００３９】
コア材の両面に形成される接着剤層は、それぞれの接着剤層の各成分を溶剤に溶解ないし分散してワニスとし、耐熱性熱可塑フィルム上に塗布、加熱し溶剤を除去することにより接着剤層を耐熱性熱可塑フィルム上に形成することができる。第２の接着剤層の成分からなるワニスをコア材となる耐熱性熱可塑フィルムの一方の面に塗布し、加熱して溶媒を除去した後、他方の面に第１の接着剤層の成分からなるワニスを塗布し、再度加熱することにより、コア材に設けられた第２の接着剤層の硬化度が第１の接着剤層の硬化度よりも高い接着フィルムを容易に作製することができる。この場合には、両面の接着剤層同士がブロッキングしないようにカバーフィルムで表面を保護することが望ましい。しかし、ブロッキングが起こらない場合には、経済的な理由からカバーフィルムを用いないことが好ましく、制限を加えるものではない。
【００４０】
また、それぞれの接着剤の各成分を溶剤に溶解ないし分散してワニスとしたものを、前述のキャリアフィルム上に塗布、加熱し溶剤を除去することによりフィルム状の接着剤層を各々キャリアフィルム上に形成し、コア材の一方の面に第１の接着剤層、他方の面に第２の接着剤層を配設し、熱圧着によって貼合わせることにより接着フィルムを作製することができる。例えば第１の接着剤層、コア材、第２の接着剤層の順で積層し、ホットロールラミネーターで貼合わせることによりコア材の両面に各接着剤層を形成した接着フィルムを作製することができる。このとき接着剤層は第１の接着剤層、第２の接着剤層のいずれにおいても、キャリアフィルムを剥離してフィルム状の接着剤層のみを使用することもできるし、キャリアフィルムを剥離せずに使用してもよい。キャリアフィルムを剥離せずに使用した場合、キャリアフィルムはカバーフィルムとしても利用できる。
【００４１】
本発明の接着フィルムを備えた半導体搭載用配線基板に用いる配線基板としては、セラミック基板や有機基板など基板材質に限定されることなく用いることができる。例えばセラミック基板としては、アルミナ基板、窒化アルミ基板などを用いることができる。また、有機基板としては、ガラスクロスにエポキシ樹脂を含浸させたＦＲ−４基板、ビスマレイミド−トリアジン樹脂を含浸させたＢＴ基板、さらにはポリイミドフィルムを基材として用いたポリイミドフィルム基板などを用いることができる。配線の形状としては、片面配線、両面配線、多層配線いずれの構造でもよく、必要に応じて電気的に接続された貫通孔、非貫通孔を設けてもよい。
【００４２】
さらに、配線が半導体装置の外部表面に現われる場合には、保護樹脂層を設けることが好ましい。接着フィルムを配線基板へ張り付ける方法としては、接着フィルムを所定の形状に切断し、その切断された接着フィルムを配線基板の所望の位置に第２の接着剤層の面が配線板に接するように配設し、熱圧着する方法が一般的ではあるが、これに限定されるものではない。
【００４３】
半導体チップと配線基板とを接着した半導体装置は、半導体チップと配線基板の間に接着フィルムを第１の接着剤層が半導体チップ側の面になるように配設し、熱圧着することによって製造することができる。また、前記の接着フィルムを備えた半導体搭載用配線基板に半導体チップを載せ、熱圧着しても良い。半導体ウエハに接着フィルム、及びダイシングテープをラミネートした後、ウエハ及び接着フィルムをチップに切断し、その後、回路付き基板または回路付きフィルムとチップを、接着フィルムを介して接着する半導体装置の製造工程は、チップ毎の接着フィルム貼付の工程を省くことができる点で好ましい。
【００４４】
本発明の半導体装置の構造としては、半導体チップの電極と配線基板とがワイヤボンディングで接続されている構造、半導体チップの電極と配線基板とがテープオートメーテッドボンディング（ＴＡＢ）のインナーリードボンディングで接続されている構造等がある。
【００４５】
半導体チップと回路付き基板または回路付きフィルムを、接着フィルムを介して接着する半導体装置の製造工程において、熱圧着の条件は配線板の回路を空隙無く埋め込み、十分な接着性を発現する程度の温度、荷重、時間で貼りつければよい。チップの破損が起こりにくい点で荷重が１９６ｋＰａ以下であることが好ましく、特に９８ｋＰａ以下が好ましい。
【００４６】
図１（ａ）は本発明による２層の接着剤層からなる接着フィルムを示す断面図であり、第１の接着剤層１と第２の接着剤層１’が積層されてなる。図１（ｂ）は本発明によるコア材の両面に各接着剤層を備えた接着フィルムを示す断面図であり、コア材（耐熱性熱可塑フィルム）２の一方の面に第１の接着剤層１が、他方の面に第２の接着剤層１’が積層されてなる。図２（ａ）は図１（ａ）に示した接着フィルムを用いた半導体搭載用配線基板を示す断面図であり、配線３を備えた配線基板４に第２の接着剤層の面が接するように接着フィルムを配設してなる。図２（ｂ）は図１（ｂ）に示した接着フィルムを用いた半導体搭載用配線基板を示す断面図であり、配線３を備えた配線基板４に第２の接着剤層の面が接するように接着フィルムを配設してなる。図３（ａ）は図１（ａ）に示した接着フィルムを第１の接着剤層の面が半導体チップ５、第２の接着剤層の面が配線基板に接するように配設し、熱圧着によって半導体チップ５と配線基板を接着させ、半導体チップのパッドと基板上の配線とをボンディングワイヤ６で接続し、封止材７で封止して外部接続端子８を設けた半導体装置の断面図であり、図３（ｂ）は図１（ｂ）に示した接着フィルムを第１の接着剤層の面が半導体チップ５、第２の接着剤層の面が配線基板に接するように配設し、熱圧着によって半導体チップ５と配線基板を接着させ、半導体チップのパッドと基板上の配線とをボンディングワイヤ６で接続し、封止材７で封止して外部接続端子８を設けた半導体装置の断面図である。また、図３（ｃ）は図１（ａ）に示した接着フィルムを第１の接着剤層の面が半導体チップ５、第２の接着剤層の面が配線基板に接するように配設し、熱圧着によって半導体チップ５と配線基板を接着させ、半導体チップ５のパッドに基板のインナーリード６’をボンディングし、封止材７で封止して外部接続端子８を設けた半導体装置の断面図であり、図３（ｄ）は図１（ｂ）に示した接着フィルムを第１の接着剤層の面が半導体チップ５、第２の接着剤層の面が配線基板に接するように配設し、熱圧着によって半導体チップ５と配線基板を接着させ、半導体チップ５のパッドに基板のインナーリード６’をボンディングし、封止材７で封止して外部接続端子８を設けた半導体装置の断面図である。
【００４７】
接着フィルムは、図１（ａ）に示すように接着剤層のみから成る接着フィルムでも、図１（ｂ）に示すようにコア材２の両面に各接着剤層を備えた接着フィルムでも良く、図２（ａ）、（ｂ）に示す配線３を形成した配線基板４の配線側の面に第２の接着フィルムが接するように、所定の大きさに切り抜いた接着フィルムを熱圧着して、接着フィルムを備えた半導体搭載用配線基板を得ることができる。また、接着フィルムの第二の接着剤層の側に配線基板を、配線基板と反対側に半導体チップ５を熱圧着し、接着フィルムの接着剤層を硬化させた後、図３（ａ）、（ｂ）では半導体チップのパッドと配線基板上の配線とをボンディングワイヤ６で接続し、図３（ｃ）、（ｄ）では半導体チップのパッドに基板のインナーリード６’をボンディングして、封止材７で封止、外部接続端子８であるはんだボールを設けて半導体装置を得ることができる。また、図２に示した半導体搭載用配線基板や図３に示した半導体装置のように、配線基板に接する接着剤層の接着後の厚さが配線基板の回路厚より厚い場合、十分な回路充填性を得ることができる点で好ましい。
【００４８】
本発明の接着フィルムを用いて半導体チップと配線基板を接着させた半導体装置は、耐リフロー性、温度サイクルテスト、耐湿性（耐ＰＣＴ性）等に優れていた。さらに接着剤の可使期間が長く、２５℃で３ヶ月保管後のものを用いて作製した半導体装置も初期とほぼ同等の特性を示していた。
【００４９】
以下実施例により本発明をさらに具体的に説明する。
【実施例】
実施例１
（１）第１の接着剤層の作製
エポキシ樹脂としてビスフェノールＡ型エポキシ樹脂（エポキシ当量１７５、東都化成株式会社製商品名ＹＤ−８１２５を使用）４５重量部、クレゾールノボラック型エポキシ樹脂（エポキシ当量２１０、東都化成株式会社製商品名ＹＤＣＮ−７０３を使用）１５重量部、エポキシ樹脂の硬化剤としてフェノールノボラック樹脂（大日本インキ化学工業株式会社製商品名プライオーフェンＬＦ２８８２を使用）４０重量部、エポキシ基含有アクリル系重合体としてエポキシ基含有アクリルゴム（ゲル パーミエーション クロマトグラフィーによる重量平均分子量１００万、グリシジルメタクリレート３重量％、Ｔｇは−７℃、帝国化学産業株式会社製商品名ＨＴＲ−８６０Ｐ−３ＤＲ（Ｃ）を使用）６６重量部、硬化促進剤としてイミダゾール系硬化促進剤（四国化成工業株式会社製キュアゾール２ＰＺ−ＣＮを使用）０．５重量部からなる組成物に、メチルエチルケトンを加えて撹拌混合し、真空脱気した。この接着剤ワニスを、厚さ７５μｍの離型処理したポリエチレンテレフタレートフィルム上に塗布し、９０℃２０分間、さらに１２０℃で５分間加熱乾燥して膜厚が３０μｍの塗膜とし、接着剤フィルムを作製した。ＤＳＣを用いて測定した硬化度は５%であった。この接着剤フィルムを１７０℃で１時間加熱硬化させてその貯蔵弾性率を動的粘弾性測定装置（レオロジ社製、ＤＶＥ−Ｖ４）を用いて測定（サンプルサイズ：長さ２０ｍｍ、幅４ｍｍ、膜厚６０μｍ、昇温速度５℃／分、引張りモード、１０Ｈｚ、自動静荷重）した結果、２５℃で６００ＭＰａ、２６０℃で５ＭＰａであった。
（２）第２の接着剤層の作製
ポリエチレンテレフタレートフィルムに塗布後、９０℃で２０分間、さらに１４０℃で５分間加熱乾燥した以外は第１の接着剤層と同様である。ＤＳＣを用いて測定した硬化度は１５%であった。
（３）第１、第２の接着剤層の積層
第１、第２の接着剤層を積層し温度１００℃、圧力０．３ＭＰａ、速度０．２ｍ／ｍｉｎの条件でホットロールラミネーターを用いて貼りあわせて接着フィルムを作成した。
【００５０】
実施例２
（１）第１の接着剤層の作製
エポキシ樹脂として臭素化フェノールノボラックのポリグリシジルエーテルである（エポキシ当量２８５、日本化薬株式会社製商品名ＢＲＥＮ−Sを使用）５５重量部、エポキシ樹脂の硬化剤として臭素化フェノール樹脂（帝人化成株式会社製のファイヤーガードＦＧ２０００を使用）４０．８重量部、フェノールノボラック樹脂（大日本インキ化学工業株式会社製商品名プライオーフェンＬＦ２８８２を使用）５．９重量部、エポキシ基含有アクリル系重合体としてエポキシ基含有アクリルゴム（重量平均分子量１００万、グリシジルメタクリレート３重量％、Ｔｇ−７℃、帝国化学産業株式会社製商品名ＨＴＲ−８６０Ｐ−３ＤＲ（Ｃ）を使用）４４重量部、硬化促進剤としてイミダゾール系硬化促進剤（四国化成工業株式会社製キュアゾール２ＰＺ−ＣＮを使用）０．５重量部、アンチモン酸化物として三酸化二アンチモン（日本精鉱株式会社製ＰＡＴＯＸ−Ｕを使用）２１重量部からなる組成物に、メチルエチルケトンを加えて撹拌混合し、真空脱気した。この接着剤ワニスを、厚さ７５μｍの離型処理したポリエチレンテレフタレートフィルム上に塗布し、９０℃２０分間、さらに１２０℃で５分間加熱乾燥して膜厚が３０μｍの塗膜とし、フィルム状の接着剤層を作製した。このフィルム状の接着剤層の残存溶媒量は、１．２重量％であった。また、このフィルム状の接着剤層を１７０℃で１時間加熱硬化させてその貯蔵弾性率を動的粘弾性測定装置（レオロジ社製、ＤＶＥ−Ｖ４）を用いて測定（サンプルサイズ：長さ２０ｍｍ、幅４ｍｍ、膜厚６０μｍ、昇温速度５℃／分、引張りモード、１０Ｈｚ、自動静荷重）した結果、２５℃で１０００ＭＰａ、２６０℃で５ＭＰａであった。
（２）第２の接着剤層の作製
ＨＴＲ−８６０Ｐ−３ＤＲの量が６８重量部である他は第１の接着剤層と同様である。
（３）第１、第２の接着剤層の積層
第１、第２の接着剤層を積層し温度１００℃、圧力０．３ＭＰａ、速度０．２ｍ／ｍｉｎの条件でホットロールラミネーターを用いて貼りあわせて接着フィルムを作成した。
【００５１】
比較例１
実施例１の第１の接着剤層を２枚積層し温度１００℃、圧力０．３ＭＰａ、速度０．２ｍ／ｍｉｎの条件でホットロールラミネーターを用いて貼りあわせて接着フィルムを作成した。
比較例２
実施例１の第２の接着剤層を２枚積層し温度１００℃、圧力０．３ＭＰａ、速度０．２ｍ／ｍｉｎの条件でホットロールラミネーターを用いて貼りあわせて接着フィルムを作成した。
比較例３
実施例２の第１の接着剤層を２枚積層し温度１００℃、圧力０．３ＭＰａ、速度０．２ｍ／ｍｉｎの条件でホットロールラミネーターを用いて貼りあわせて接着フィルムを作成した。
比較例４
実施例２の第２の接着剤層を２枚積層し温度１００℃、圧力０．３ＭＰａ、速度０．２ｍ／ｍｉｎの条件でホットロールラミネーターを用いて貼りあわせて接着フィルムを作成した。
【００５２】
得られた接着フィルムを用いて、半導体チップと厚み２５μｍのポリイミドフィルムを基材に用いた配線基板を、表１に示した条件（温度、圧力）で５秒間熱圧着し、１７０℃で１時間加熱して接着フィルムの接着剤を硬化させて貼り合せた半導体装置サンプル（片面にはんだボールを形成）を作製した。この際、実施例１、２については接着フィルムのうち第１の接着剤層が半導体チップ側、第２の接着剤層が回路付き基板に接するようにした。
【００５３】
前記半導体装置サンプルについて耐熱性、難燃性、耐湿性、発泡の有無を調べた。耐熱性の評価方法には、耐リフロークラック性と温度サイクル試験を適用した。耐リフロークラック性の評価は、サンプル表面の最高温度が２４０℃でこの温度を２０秒間保持するように温度設定したＩＲリフロー炉にサンプルを通し、室温で放置することにより冷却する処理を２回繰り返したサンプル中のクラックを目視と超音波顕微鏡で観察した。クラックの発生していないものを○とし、発生していたものを×とした。耐温度サイクル性は、サンプルを−５５℃雰囲気に３０分間放置し、その後１２５℃の雰囲気に３０分間放置する工程を１サイクルとして、１０００サイクル後において超音波顕微鏡を用いて剥離やクラック等の破壊が発生していないものを○、発生したものを×とした。また、耐湿性評価は、サンプルを温度１２１℃、湿度１００％、２気圧の雰囲気（プレッシャークッカーテスト：ＰＣＴ処理）で７２時間処理後に剥離を観察することにより行った。接着フィルムの剥離の認められなかったものを○とし、剥離のあったものを×とした。発泡の有無は前記半導体装置サンプルについて超音波顕微鏡を用いて確認し、接着フィルムに発泡が認められなかったものを○とし、発泡のあったものを×とした。また埋め込み性の評価は前記半導体装置サンプルを作製し、光学顕微鏡を用いて接着剤の回路への埋め込み性を確認した。可使期間の評価は、接着フィルムを２５℃で３ヶ月保管したものを用いて前記半導体装置サンプルを作製し、埋め込み性を確認することにより行った。配線基板に設けられた回路との間に空隙がなかったものを○、空隙が認められたものを×とした。その結果を表１に示す。
貫通孔、端部からの樹脂浸みだしは光学顕微鏡を用いて樹脂の浸みだしを確認した。浸みだしがないものを○、浸みだしがあるものを×とした。
【００５４】
【表１】

Figure 0004505769
【００５５】
【発明の効果】
以上説明したように、本発明の多層接着フィルムは低い荷重で接着しても回路の埋め込み性が良好であり、貫通孔、端部からの樹脂のしみだしがない。また耐熱性、耐湿性が良好である。これらの効果により、優れた信頼性を発現する半導体装置に必要な接着材料を効率良く提供することができる。
【図面の簡単な説明】
【図１】 （ａ）は本発明による２層の接着剤からなる接着フィルムを示す断面図、（ｂ）は本発明によるコア材の両面に各接着剤を備えた接着フィルムを示す断面図。
【図２】 （ａ）は本発明による２層の接着剤からなる接着フィルムを用いた半導体搭載用配線基板を示す断面図、（ｂ）は本発明によるコア材の両面に各接着剤を備えた接着フィルムを用いた半導体搭載用配線基板を示す断面図。
【図３】 （ａ）は本発明による２層の接着剤からなる接着フィルムを用いて半導体チップと配線基板を接着させ、半導体チップのパッドと基板上の配線とをボンディングワイヤで接続した半導体装置の断面図、（ｂ）は本発明によるコア材の両面に各接着剤を備えた接着フィルムを用いて半導体チップと配線基板を接着させ、半導体チップのパッドと基板上の配線とをボンディングワイヤで接続した半導体装置の断面図、（ｃ）は本発明による２層の接着剤からなる接着フィルムを用いて半導体チップと配線基板を接着させ、半導体チップのパッドに基板のインナーリードをボンディングした半導体装置の断面図、（ｄ）は本発明によるコア材の両面に各接着剤を備えた接着フィルムを用いて半導体チップと配線基板を接着させ、半導体チップのパッドに基板のインナーリードをボンディングした半導体装置の断面図。
【符号の説明】
１ ． 第１の接着剤層
１’． 第２の接着剤層
２ ． コア材（耐熱性熱可塑フィルム）
３ ． 配線
４ ． 配線基板
５ ． 半導体チップ
６ ． ボンディングワイヤ
６’． インナリード
７ ． 封止材
８ ． 外部接続端子[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an adhesive film, a semiconductor-mounted wiring board provided with the adhesive film, a semiconductor device, and a manufacturing method thereof.
[0002]
[Prior art]
Since CSP can be packaged together with other electronic components, the surface mounting technology 1997-3 published by Nikkan Kogyo Shimbun Co., Ltd. article “Future of CSP (Fine Pitch BGA) in practical use” Various structures have been proposed. Among them, a system using a tape or a carrier substrate for a wiring substrate called an interposer has been put into practical use. Since these are connected via a wiring board called an interposer, the IEICE Technical Report CPM 96-121, ICD 96-160 (1996-12) “Development of Tape BGA Type CSP” and Sharp Technical Report No. 66 (1996-12) “Chip As shown in “Development of Size Package (Chip Size PackAge)”, it shows excellent connection reliability.
[0003]
Between these CSP semiconductor chips and a wiring board called an interposer, an adhesive film that reduces thermal stress resulting from the difference in coefficient of thermal expansion is used. Such an adhesive film is required to have moisture resistance and high temperature durability.
[0004]
Film type adhesives are used in flexible printed wiring boards and the like, and a system mainly composed of acrylonitrile butadiene rubber is used.
[0005]
As a printed wiring board-related material having improved moisture resistance, there is an adhesive containing an acrylic resin, an epoxy resin, a polyisocyanate and an inorganic filler as disclosed in JP-A-60-243180. There are acrylic resins, epoxy resins, and adhesives in which both ends having a urethane bond in the molecule include a primary amine compound and an inorganic filler, as disclosed in JP-A-61-138680.
[0006]
[Problems to be solved by the invention]
The adhesive film must have thermal stress relaxation action, heat resistance, and moisture resistance. In addition, from the top of the manufacturing process, it is necessary that the adhesive does not flow out to the electrode part for outputting an electrical signal provided on the semiconductor chip, and when a wiring board with a through hole is used It is necessary that the adhesive does not flow out of the through hole. This is because when the adhesive flows out to the electrode portion, an electrode connection failure occurs, and when the adhesive flows out from the through hole, the mold is contaminated, which causes a failure. Furthermore, there should be no air gap between the circuit provided on the wiring board. If there is a gap between the circuit and the adhesive, heat resistance and moisture resistance are likely to decrease. However, when thermocompression bonding is performed at such a low pressure or low temperature that the circuit on the chip is not damaged, it has been difficult to prevent the adhesive from penetrating and to satisfy sufficient circuit filling properties.
[0007]
The present invention has low elasticity and circuit filling required when a semiconductor chip having a large difference in thermal expansion coefficient is mounted on a wiring board called an interposer such as a glass epoxy board or a flexible board, and impairs heat resistance and moisture resistance. It is an object of the present invention to provide an adhesive film that does not ooze out from a through-hole, a wiring board for semiconductor mounting provided with the adhesive film, and a semiconductor device in which a semiconductor chip and a wiring board are bonded using the adhesive film did.
[0008]
[Means for Solving the Problems]
  The present invention relates to each item described in the following (1) to (9).
(1) An adhesive film obtained by laminating the following two types of adhesive layers.
First adhesive layer
100 parts by weight of an epoxy resin and its curing agent, 10 to 100 parts by weight of a high molecular weight component having a weight average molecular weight of 100,000 or more and a Tg of −50 ° C. or more and 0 ° C. or less and a curing accelerator 0.1 to 20 The adhesive layer which consists of the adhesive agent containing a weight part, and has the hardening degree by the differential scanning calorimetry (DSC) in the range of 0 to 40%.
Second adhesive layer
100 parts by weight of an epoxy resin and its curing agent, 10 to 100 parts by weight of a high molecular weight component having a weight average molecular weight of 100,000 or more and a Tg of −50 ° C. or more and 0 ° C. or less and a curing accelerator 0.1 to 20 It is an adhesive layer comprising an adhesive containing parts by weight and having a degree of cure by DSC in the range of 0 to 40%, and whether the weight part of the high molecular weight component is 10 parts by weight or more larger than the first adhesive layer. Alternatively, an adhesive layer having a degree of cure by DSC of 5% or more greater than that of the first adhesive layer.
(2) The epoxy resin used for the first adhesive layer and the second adhesive layer and the curing agent thereof include an epoxy resin containing a bromine atom and / or a curing agent containing a bromine atom ( 1) The adhesive film as described.
(3) The high molecular weight component is an acrylic copolymer containing 0.5 to 6.0% by weight of glycidyl acrylate or glycidyl methacrylate (1)Or(2) The adhesive film according to the description.
(4) The storage elastic modulus of the cured adhesive product of the first adhesive layer and the second adhesive layer when measured using a dynamic viscoelasticity measuring device is 20 to 2000 MPa at 25 ° C., 260 3 to 50 MPa at (1) to (3)EitherThe adhesive film as described.
(5) A semiconductor mounting wiring board comprising the adhesive film according to any one of (1) to (4) on the semiconductor chip mounting surface of the wiring board so that the surface of the second adhesive layer is in contact with the wiring board. .
(6) A semiconductor device provided with the adhesive film according to any one of (1) to (4) on a semiconductor chip so that the surface of the first adhesive layer is in contact with the semiconductor chip.
(7) In a semiconductor device in which a semiconductor chip and a circuit board or a circuit film are bonded via the adhesive film according to any one of (1) to (4), the surface of the first adhesive layer is the semiconductor chip. A semiconductor device characterized in that the surface of the second adhesive layer is in contact with a substrate with a circuit or a film with a circuit.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
In the present invention, the epoxy resin that can be used for the first adhesive layer and the second adhesive layer only needs to be cured and exhibit an adhesive action, and is bifunctional or more (epoxy group in one molecule). And an epoxy resin having an average molecular weight of less than 5000, more preferably an average molecular weight of less than 3000 can be used. Examples of the bifunctional epoxy resin (epoxy resin containing two epoxy groups in one molecule) include bisphenol A type and bisphenol F type epoxy resins. The bisphenol A type or bisphenol F type epoxy resin is commercially available from Yuka Shell Epoxy Co., Ltd. under the trade names of Epicoat 807, Epicoat 827, and Epicoat 828. In addition, from Dow Chemical Japan, D.C. E. R. 330, D.E. E. R. 331, D.D. E. R. It is marketed under the trade name 361. Further, they are commercially available from Toto Kasei Co., Ltd. under the trade names YD8125 and YDF8170.
[0010]
In addition, as the epoxy resin in the present invention, a polyfunctional epoxy resin having trifunctional or higher functionality (containing 3 or more epoxy groups in one molecule) may be used, and the bifunctional epoxy resin is 50 to 100% by weight and trifunctional or higher functionality. It is preferable to use 0 to 50% by weight of the polyfunctional epoxy. In particular, in order to increase the Tg, it is preferable to use 10 to 50% by weight of a trifunctional or higher polyfunctional epoxy resin together with the bifunctional epoxy resin 50 to 90% by weight. Examples of the trifunctional or higher polyfunctional epoxy resin include phenol novolac type epoxy resins and cresol novolac type epoxy resins. The phenol novolac type epoxy resin is commercially available from Nippon Kayaku Co., Ltd. under the trade name EPPN-201. Cresol novolac type epoxy resins are commercially available from Sumitomo Chemical Co., Ltd. under the trade names ESCN-190 and ESCN-195. The products are commercially available from Nippon Kayaku Co., Ltd. under the trade names EOCN1012, EOCN1025, and EOCN1027. Furthermore, it is commercially available from Toto Kasei Co., Ltd. under the trade names YDCN701, YDCN702, YDCN703, and YDCN704.
[0011]
In order to make the flame retardant effective, it is preferable to use a brominated epoxy resin as the epoxy resin. As the brominated epoxy resin, a bifunctional epoxy resin containing a bromine atom or a novolak-type brominated epoxy resin can be used. Bifunctional epoxy resins containing bromine atoms are commercially available from Toto Kasei Co., Ltd. under the trade names YDB-360 and YDB-400. In addition, novolak-type brominated epoxy resins are commercially available from Nippon Kayaku Co., Ltd. under the trade names BREN-S, BREN-104, and BREN-301.
[0012]
As the curing agent for the epoxy resin, those usually used as a curing agent for the epoxy resin can be used, and two or more amines, polyamides, acid anhydrides, polysulfides, boron trifluoride and phenolic hydroxyl groups per molecule. Examples thereof include bisphenol A, bisphenol F, bisphenol S and the like. In particular, it is preferable to use phenol novolak resin, bisphenol novolak resin, cresol novolak resin, or the like, which is a phenol resin, because of its excellent electric corrosion resistance during moisture absorption. Phenol novolac resins are from Dainippon Ink Chemical Co., Ltd. Barcam TD-2090, Barcam TD-2131, modified phenol novolac resins are from Dainippon Ink Chemical Industry Co., Ltd. They are commercially available from Ink Chemical Industry Co., Ltd. under the trade names Phenolite LF2882 and Phenolite LF2822.
[0013]
In order to improve flame retardancy, it is preferable to use a bifunctional or higher functional brominated phenol compound as a curing agent in combination with a brominated epoxy resin. As the brominated phenol compound, for example, tetrabromobisphenol A can be used. Tetrabromobisphenol A is commercially available from Teijin Chemicals Ltd. under the trade name Fireguard FG2000.
[0014]
The curing agent is preferably used in an amount of 0.6 to 1.4 equivalents, and 0.8 to 1.2 equivalents of the reactive group with the epoxy group of the curing agent with respect to 1 equivalent of the epoxy group of the epoxy resin. It is more preferable. If the curing agent is too little or too much, the heat resistance tends to decrease.
[0015]
It is preferable to use a curing accelerator together with the curing agent, and various imidazoles can be used as the curing accelerator. Examples of imidazole include 2-methylimidazole, 2-ethyl-4-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-phenylimidazolium trimellitate, and the like. Imidazoles are commercially available from Shikoku Chemical Industry Co., Ltd. under the trade names 2E4MZ, 2PZ-CN, and 2PZ-CNS. In addition, a latent curing accelerator is preferable in that the useful life of the film is long, and typical examples thereof include dihydrazide compounds such as dicyandiimide and adipic acid dihydrazide, guanamic acid, melamic acid, an epoxy compound and an imidazole compound. Examples include, but are not limited to, addition compounds, addition compounds of epoxy compounds and dialkylamines, addition compounds of amines and thiourea, and addition compounds of amines and isocyanates. Those having an adduct type structure are particularly preferred in that the activity at room temperature can be reduced. Representative examples of adduct type curing accelerators are shown below, but are not limited thereto. Amine-epoxy adduct systems include Amicure PN-23, Amicure MY-24, Amicure MY-D, Amicure MY-H, etc. from Ajinomoto Co., and Hardener X-3615S, Hardener X from ACR Corporation. Asahi Kasei Co., Ltd. sells Novacure HX-3748 and Novacure HX-3088, and Pacific Anchor Chemical sells Ancamine 2014AS, Ancamine 2014FG and the like under the above-mentioned trade names. Further, amine-urea type adduct systems are commercially available from Fuji Kasei Co., Ltd. under the trade names Fujicure FXE-1000 and Fujicure FXR-1030.
[0016]
The blending amount of the curing accelerator is preferably 0.1 to 20 parts by weight, more preferably 0.5 to 15 parts by weight with respect to 100 parts by weight of the total of the epoxy resin and the curing agent. If it is less than 0.1 parts by weight, the curing rate tends to be slow, and if it exceeds 20 parts by weight, the pot life tends to be short.
[0017]
In the present invention, the high molecular weight component having a weight average molecular weight of 100,000 or more and a Tg of −50 ° C. or more and 0 ° C. or less including the functional groups used in the first adhesive layer and the second adhesive layer is an epoxy group. A rubber containing a carboxyl group, a hydroxyl group or the like as a crosslinking point can be used, and examples thereof include NBR and acrylic rubber containing a functional group. The acrylic rubber here is a rubber mainly composed of an acrylate ester, and is a rubber mainly composed of a copolymer such as butyl acrylate and acrylonitrile or a copolymer such as ethyl acrylate and acrylonitrile.
[0018]
As such a rubber, for example, an epoxy group-containing acrylic copolymer containing 0.5 to 6.0% by weight of glycidyl acrylate or glycidyl methacrylate and having a Tg of −50 ° C. or more and a weight average molecular weight of 100,000 or more. Yes, the trade name HTR-860P3DR (C) commercially available from Teikoku Chemical Co., Ltd. can be used. When the functional group monomer is carboxylic acid type acrylic acid, hydroxyl group type hydroxymethyl acrylate or hydroxymethyl methacrylate, etc., the crosslinking reaction is likely to proceed, gelation in the varnish state, and increase in the degree of cure in the B stage state This tends to reduce the adhesive strength. The copolymer ratio of glycidyl acrylate or glycidyl methacrylate used as the functional group monomer is preferably 0.5% by weight or more in order to ensure heat resistance, in order to reduce the amount of rubber added and increase the varnish solid content ratio. 6.0 weight% or less is preferable. If it exceeds 6.0% by weight, the viscosity of the adhesive varnish increases due to the high molecular weight. When this varnish viscosity is high, it becomes difficult to form a film, so it is necessary to dilute with an appropriate amount of solvent for the purpose of reducing the viscosity, the solid content of the adhesive varnish is reduced, the amount of adhesive varnish produced is increased, Manufacturing efficiency tends to decrease. As the remainder other than glycidyl acrylate or glycidyl methacrylate, ethyl acrylate, ethyl methacrylate, butyl acrylate, butyl methacrylate and a mixture thereof can be used, but the mixing ratio is determined in consideration of Tg of the copolymer. When Tg is less than −50 ° C., the tackiness of the adhesive film in the B-stage state is increased and the handleability is deteriorated. This Tg is preferably 0 ° C. or lower. If this Tg is too high, the film tends to break at room temperature during handling. Examples of the polymerization method include pearl polymerization and solution polymerization, and these can be obtained.
[0019]
The weight average molecular weight of the high molecular weight component is 100,000 or more. A weight average molecular weight of less than 100,000 is not preferable because strength and flexibility in sheet form and film form are reduced and tackiness is increased. Further, as the molecular weight increases, the flow property is small and the circuit filling property of the wiring is lowered, so that the weight average molecular weight of the high molecular weight component is preferably 2 million or less. In the present invention, the weight average molecular weight is measured by gel permeation chromatography using a standard polystyrene calibration curve.
[0020]
The blending amount of the high molecular weight component is 10 parts by weight or more and 100 parts by weight or less with respect to 100 parts by weight of the total amount of the epoxy resin and the curing agent. 10 parts by weight or more is required for reducing the elastic modulus and imparting flowability at the time of molding, and exceeding 100 parts by weight is not preferable in that the fluidity is lowered when the application load is small and the circuit filling property is lowered. Further, it is preferably 40 to 80 parts by weight.
[0021]
In the present invention, a coupling agent may be blended in the adhesive used for the first adhesive layer and the second adhesive layer in order to improve interfacial bonding between different materials. Examples of the coupling agent include a silane coupling agent, a titanate coupling agent, and an aluminum coupling agent, and among them, a silane coupling agent is preferable. The blending amount is preferably 0.1 to 10 parts by weight with respect to 100 parts by weight of the entire resin of the adhesive, from the effect of addition, heat resistance and cost.
[0022]
Examples of the silane coupling agent include γ-glycidoxypropyltrimethoxysilane, γ-mercaptopropyltrimethoxysilane, γ-aminopropyltriethoxysilane, γ-ureidopropyltriethoxysilane, N-β-aminoethyl-γ. -Aminopropyltrimethoxysilane etc. are mentioned. As for the silane coupling agent, γ-glycidoxypropyltrimethoxysilane is NUC A-187, γ-mercaptopropyltrimethoxysilane is NUC A-189, γ-aminopropyltriethoxysilane is NUC A-1100, γ-ureido. Propyltriethoxysilane is NUC A-1160 and N-β-aminoethyl-γ-aminopropyltrimethoxysilane is a product name NUC A-1120, both of which are commercially available from Nippon Unicar Co., Ltd.
[0023]
Further, in the present invention, the adhesive used for the first adhesive layer and the second adhesive layer is blended with an ion scavenger in order to adsorb ionic impurities and improve insulation reliability during moisture absorption. can do. The compounding amount of the ion scavenger is preferably 1 to 10 parts by weight with respect to 100 parts by weight of the entire resin of the adhesive, from the effect of addition, heat resistance, and cost. As the ion scavenger, a compound known as a copper damage inhibitor, for example, a triazine thiol compound or a bisphenol-based reducing agent can be blended to prevent copper from being ionized and dissolved. Examples of the bisphenol-based reducing agent include 2,2′-methylene-bis- (4-methyl-6-tert-butylphenol), 4,4′-thio-bis- (3-methyl-6-tert-butylphenol). Etc. An inorganic ion adsorbent can also be blended. Examples of inorganic ion adsorbents include zirconium compounds, antimony bismuth compounds, magnesium aluminum compounds, and the like. A copper damage inhibitor comprising a triazine thiol compound as a component is commercially available from Sankyo Pharmaceutical Co., Ltd. under the trade name Disnet DB. A copper damage inhibitor containing a bisphenol-based reducing agent as a component is commercially available from Yoshitomi Pharmaceutical Co., Ltd. under the trade name Yoshinox BB. Various inorganic ion adsorbents are commercially available from Toa Gosei Chemical Co., Ltd. under the trade name IXE.
[0024]
Further, in the present invention, the adhesive used for the first adhesive layer and the second adhesive layer has improved handling properties of the adhesive, improved thermal conductivity, adjustment of melt viscosity, and imparted thixotropic properties. For the purpose, an inorganic filler is preferably blended. Inorganic fillers include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, alumina, aluminum nitride, aluminum borate whisker, boron nitride, crystalline silica, non Examples thereof include crystalline silica and antimony oxide. In order to improve thermal conductivity, alumina, aluminum nitride, boron nitride, crystalline silica, amorphous silica and the like are preferable. For the purpose of adjusting melt viscosity and imparting thixotropic properties, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, alumina, crystalline silica, non-crystalline silica Crystalline silica and the like are preferred. In order to improve moisture resistance, alumina, silica, aluminum hydroxide, and antimony oxide are preferable.
[0025]
The blending amount of the inorganic filler is preferably 1 to 20 parts by volume with respect to 100 parts by volume of the adhesive resin. When the blending amount is 1 volume part or more and the blending amount is increased from the viewpoint of blending effects, problems such as an increase in storage elastic modulus of the adhesive, a decrease in adhesiveness, and a decrease in electrical characteristics due to residual voids are likely to occur. It is preferable that the volume be equal to or less than the volume part.
[0026]
The degree of cure of the adhesive after drying is measured using DSC (912 type DSC manufactured by DuPont) (temperature increase rate, 10 ° C./min). It is preferable that the heat generation is 40%.
[0027]
In the adhesive film of the present invention, the fluidity of the second adhesive layer needs to be lower than that of the first adhesive layer. For this reason, the second adhesive layer needs to have 10 parts by weight or more of the high molecular weight component or 5% or more greater by DSC than the first adhesive layer. The weight part of the high molecular weight component of the second adhesive layer is not more than 10 parts by weight greater than that of the first adhesive layer, and the degree of cure by DSC of the second adhesive layer is 5% than that of the first adhesive layer. If it is not larger, sufficient circuit filling properties and prevention of bleeding from the through hole cannot be achieved at the same time. Compared to the first adhesive layer, the high molecular weight component of the second adhesive layer is preferably 10 to 40 parts by weight, and the degree of cure by DSC is preferably 5 to 20% higher.
[0028]
In each of the first adhesive layer and the second adhesive layer used in the adhesive film of the present invention, the residual solvent amount is preferably 3% by weight or less. Moreover, the storage elastic modulus measured with the dynamic-viscoelasticity measuring apparatus in the hardened | cured material of each of the 1st adhesive layer used for this adhesive film and the 2nd adhesive layer is 20-2000 MPa at 25 degreeC, and 260 degreeC It is preferable that it is 3-50 MPa. The storage elastic modulus was measured in a temperature-dependent measurement mode in which a tensile load was applied to the cured adhesive and the temperature was measured from −50 ° C. to 300 ° C. at a frequency of 10 Hz and a temperature increase rate of 5 to 10 ° C./min. When the storage elastic modulus exceeds 2000 MPa at 25 ° C. and exceeds 50 MPa at 260 ° C., the effect of reducing the thermal stress generated by the difference in thermal expansion coefficient between the semiconductor chip and the interposer that is the wiring substrate tends to be small. There is a risk of peeling or cracking. On the other hand, if the storage elastic modulus is less than 20 MPa at 25 ° C., the handling property of the adhesive and the thickness accuracy of the adhesive layer tend to be poor, and if it is less than 3 MPa at 260 ° C., reflow cracks tend to occur.
[0029]
The first adhesive layer and the second adhesive layer used in the adhesive film of the present invention can be obtained by forming an adhesive layer on a carrier film, respectively. For example, each component of the adhesive is dissolved or dispersed in a solvent to obtain a varnish, which is applied on a carrier film and heated to remove the solvent, thereby forming an adhesive layer on the carrier film. As the carrier film, a plastic film such as a polytetrafluoroethylene film, a polyethylene terephthalate film, a release-treated polyethylene terephthalate film, a polyethylene film, a polypropylene film, a polymethylpentene film, or a polyimide film can be used.
[0030]
A commercially available film can be used as the carrier film used in the present invention. For example, a polyimide film is commercially available from Toray DuPont under the trade name Kapton, and from Kaneka Chemical Co., Ltd. under the trade name Apical. The polyethylene terephthalate film is commercially available from Toray DuPont under the trade name Lumirror and from Teijin under the trade name Purex.
[0031]
As the varnishing solvent, methyl ethyl ketone, acetone, methyl isobutyl ketone, 2-ethoxyethanol, toluene, butyl cellosolve, methanol, ethanol, 2-methoxyethanol or the like can be used. Moreover, you may add a high boiling point solvent for the purpose of improving coating-film property. Examples of the high boiling point solvent include dimethylacetamide, dimethylformamide, methylpyrrolidone, and cyclohexanone.
[0032]
When considering dispersion of the inorganic filler, the varnish can be manufactured using a raking machine, a three-roller, a bead mill, or the like, or a combination thereof. By mixing the filler and the low molecular weight material in advance and then blending the high molecular weight material, the time required for mixing can be shortened. In addition, after forming the varnish, it is preferable to remove bubbles in the varnish by vacuum degassing.
[0033]
In the adhesive film in which the first adhesive layer and the second adhesive layer in the present invention are laminated, the first adhesive layer and the second adhesive layer are respectively formed on the carrier film, and then these films are formed. The adhesive layer can be produced by thermocompression bonding. For example, the first adhesive layer and the second adhesive layer can be stacked and bonded together with a hot roll laminator. At this time, the adhesive layer can be either the first adhesive layer or the second adhesive layer, and the carrier film can be peeled off to use only the film-like adhesive layer, or the carrier film can be peeled off. You may use without. When used without peeling off the carrier film, the carrier film can also be used as a cover film.
[0034]
Moreover, after applying the varnish which consists of a component of a 2nd adhesive layer on a carrier film, removing a solvent by heating, the varnish which consists of a component of a 1st adhesive layer on a 2nd adhesive layer By applying and heating again, an adhesive film in which the second adhesive layer has a higher degree of cure than the first adhesive layer can be produced.
[0035]
The thicknesses of the first adhesive layer and the second adhesive layer are each preferably 10 to 200 μm, but are not limited thereto. If it is thinner than 10 μm, the stress relaxation effect tends to be poor. If it is thick, it tends to be expensive. Moreover, when the thickness of the adhesive film which laminated | stacked the 1st adhesive bond layer and the 2nd adhesive bond layer is thinner than circuit thickness, there exists a tendency for embedding property to fall.
[0036]
The adhesive film of the present invention may be obtained by laminating a first adhesive layer on one surface of the core material and a second adhesive layer on the other surface. The thickness of the core material is preferably in the range of 5 to 200 μm, but is not limited thereto. As for the thickness of the adhesive agent formed in both surfaces of a core material, the range of 10-200 micrometers is preferable respectively. If it is thinner than 10 μm, the adhesiveness and stress relaxation effect tend to be poor. If it is thick, it tends to be expensive. Further, when the thickness of the second adhesive layer is thinner than the circuit thickness, the embedding property on the wiring board side tends to be lowered.
[0037]
The film used for the core material in the present invention is preferably a heat-resistant thermoplastic film using a heat-resistant polymer, a liquid crystal polymer, a fluorine polymer, or the like, such as polyamideimide, polyimide, polyetherimide, polyethersulfone, wholly aromatic. Polyester, polytetrafluoroethylene, ethylenetetrafluoroethylene copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer and the like are preferably used. Moreover, a porous film can also be used for a core material for the elastic modulus reduction of an adhesive film. When a thermoplastic film having a softening point temperature of less than 260 ° C. is used as the core material, peeling from the adhesive may occur at a high temperature such as during solder reflow.
[0038]
The polyimide film is commercially available from Ube Industries, Ltd. under the trade name Upilex, from Toray DuPont Co., Ltd. as Kapton, and from Kaneka Chemical Co., Ltd. under the trade name Apical. The polytetrafluoroethylene film is commercially available from Mitsui DuPont Fluorochemical Co., Ltd. under the trade name Teflon and from Daikin Industries, Ltd. under the trade name Polyflon. The ethylene tetrafluoroethylene copolymer film is commercially available from Asahi Glass Co., Ltd. under the trade name Aflon COP and from Daikin Industries, Ltd. under the trade name Neoflon ETFE. The tetrafluoroethylene-hexafluoropropylene copolymer film is commercially available from Mitsui DuPont Fluorochemical Co., Ltd. under the trade name Teflon FEP and from Daikin Industries, Ltd. under the trade name Neoflon FEP. The tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer film is commercially available from Mitsui DuPont Fluorochemical Co., Ltd. under the trade name Teflon PFA and from Daikin Industries, Ltd. under the trade name Neoflon PFA. The liquid crystal polymer film is commercially available from Kuraray Co., Ltd. under the trade name Vectra. Furthermore, the porous polytetrafluoroethylene film is marketed by Sumitomo Electric Industries, Ltd. under the trade name of PORFLON and from Japan Gore-Tex Co., Ltd. under the trade name of GORE-TEX.
[0039]
Adhesive layers formed on both sides of the core material are bonded by dissolving or dispersing each component of each adhesive layer in a solvent to form a varnish, applying it on a heat-resistant thermoplastic film, and heating to remove the solvent. The agent layer can be formed on the heat resistant thermoplastic film. A varnish composed of the components of the second adhesive layer is applied to one surface of the heat-resistant thermoplastic film as the core material, heated to remove the solvent, and then the components of the first adhesive layer to the other surface By applying a varnish consisting of the above and heating again, an adhesive film in which the second adhesive layer provided on the core material has a higher degree of cure than the first adhesive layer can be easily produced. it can. In this case, it is desirable to protect the surface with a cover film so that the adhesive layers on both sides do not block each other. However, when blocking does not occur, it is preferable not to use a cover film for economic reasons, and no limitation is imposed.
[0040]
In addition, each component of each adhesive is dissolved or dispersed in a solvent to form a varnish, which is applied onto the carrier film and heated to remove the solvent, thereby forming a film-like adhesive layer on each carrier film. The first adhesive layer is disposed on one surface of the core material, the second adhesive layer is disposed on the other surface, and bonded together by thermocompression bonding, whereby an adhesive film can be produced. For example, a first adhesive layer, a core material, and a second adhesive layer may be laminated in this order, and an adhesive film in which each adhesive layer is formed on both surfaces of the core material by bonding with a hot roll laminator may be produced. it can. At this time, the adhesive layer can be either the first adhesive layer or the second adhesive layer, and the carrier film can be peeled off to use only the film-like adhesive layer, or the carrier film can be peeled off. You may use without. When used without peeling off the carrier film, the carrier film can also be used as a cover film.
[0041]
The wiring board used for the semiconductor mounting wiring board provided with the adhesive film of the present invention can be used without being limited to a substrate material such as a ceramic substrate or an organic substrate. For example, an alumina substrate, an aluminum nitride substrate, or the like can be used as the ceramic substrate. In addition, as an organic substrate, an FR-4 substrate in which a glass cloth is impregnated with an epoxy resin, a BT substrate in which a bismaleimide-triazine resin is impregnated, a polyimide film substrate using a polyimide film as a base material, or the like is used. Can do. The shape of the wiring may be a single-sided wiring, double-sided wiring, or multilayer wiring structure, and a through hole or a non-through hole that is electrically connected may be provided as necessary.
[0042]
Further, when the wiring appears on the outer surface of the semiconductor device, it is preferable to provide a protective resin layer. As a method of attaching the adhesive film to the wiring board, the adhesive film is cut into a predetermined shape, and the cut adhesive film is placed at a desired position on the wiring board so that the surface of the second adhesive layer is in contact with the wiring board. Although the method of arrange | positioning and thermocompression bonding is common, it is not limited to this.
[0043]
A semiconductor device in which a semiconductor chip and a wiring board are bonded is manufactured by disposing an adhesive film between the semiconductor chip and the wiring board so that the first adhesive layer is on the surface of the semiconductor chip and thermocompression bonding. can do. Further, a semiconductor chip may be mounted on a semiconductor mounting wiring board provided with the adhesive film and thermocompression bonded. After laminating an adhesive film and a dicing tape on a semiconductor wafer, the wafer and the adhesive film are cut into chips, and then a circuit board or a circuit film and a chip are bonded via the adhesive film. It is preferable in that the step of attaching an adhesive film for each chip can be omitted.
[0044]
The structure of the semiconductor device of the present invention includes a structure in which the electrode of the semiconductor chip and the wiring board are connected by wire bonding, and the electrode of the semiconductor chip and the wiring board are connected by inner lead bonding of tape automated bonding (TAB). There are structures etc.
[0045]
In the manufacturing process of a semiconductor device in which a semiconductor chip and a substrate with a circuit or a film with a circuit are bonded via an adhesive film, the thermocompression bonding conditions are such that the circuit of the wiring board is embedded without gaps and sufficient adhesion is exhibited. , Load and time. The load is preferably 196 kPa or less, and particularly preferably 98 kPa or less in that the chip is not easily damaged.
[0046]
FIG. 1 (a) is a cross-sectional view showing an adhesive film comprising two adhesive layers according to the present invention, in which a first adhesive layer 1 and a second adhesive layer 1 'are laminated. FIG. 1B is a cross-sectional view showing an adhesive film having adhesive layers on both sides of the core material according to the present invention, and the first adhesive on one surface of the core material (heat-resistant thermoplastic film) 2. The layer 1 is formed by laminating a second adhesive layer 1 'on the other surface. FIG. 2A is a cross-sectional view showing a semiconductor mounting wiring board using the adhesive film shown in FIG. 1A, and the surface of the second adhesive layer is in contact with the wiring board 4 provided with the wiring 3. Thus, an adhesive film is provided. FIG. 2B is a cross-sectional view showing a semiconductor mounting wiring board using the adhesive film shown in FIG. 1B, and the surface of the second adhesive layer is in contact with the wiring board 4 provided with the wiring 3. Thus, an adhesive film is provided. FIG. 3A shows the adhesive film shown in FIG. 1A in which the surface of the first adhesive layer is in contact with the semiconductor chip 5 and the surface of the second adhesive layer is in contact with the wiring board. The cross section of the semiconductor device in which the semiconductor chip 5 and the wiring substrate are bonded by pressure bonding, the pad of the semiconductor chip and the wiring on the substrate are connected by the bonding wire 6 and sealed by the sealing material 7 and the external connection terminal 8 is provided. FIG. 3B shows the adhesive film shown in FIG. 1B with the first adhesive layer surface in contact with the semiconductor chip 5 and the second adhesive layer surface in contact with the wiring board. The semiconductor chip 5 and the wiring board are bonded by thermocompression bonding, the pad of the semiconductor chip and the wiring on the board are connected by the bonding wire 6 and sealed by the sealing material 7 to provide the external connection terminal 8. It is sectional drawing of a semiconductor device. FIG. 3C shows the adhesive film shown in FIG. 1A in which the surface of the first adhesive layer is in contact with the semiconductor chip 5 and the surface of the second adhesive layer is in contact with the wiring board. The cross section of the semiconductor device in which the semiconductor chip 5 and the wiring substrate are bonded by thermocompression bonding, the inner lead 6 'of the substrate is bonded to the pad of the semiconductor chip 5, sealed with the sealing material 7, and the external connection terminal 8 is provided. FIG. 3 (d) shows the adhesive film shown in FIG. 1 (b) with the first adhesive layer surface in contact with the semiconductor chip 5 and the second adhesive layer surface in contact with the wiring board. A semiconductor device in which the semiconductor chip 5 and the wiring substrate are bonded by thermocompression bonding, the inner lead 6 ′ of the substrate is bonded to the pad of the semiconductor chip 5, and sealed with the sealing material 7 to provide the external connection terminal 8. FIG.
[0047]
The adhesive film may be an adhesive film consisting only of an adhesive layer as shown in FIG. 1 (a), or an adhesive film provided with each adhesive layer on both sides of the core material 2 as shown in FIG. 1 (b). The adhesive film cut out to a predetermined size is thermocompression bonded so that the second adhesive film is in contact with the wiring-side surface of the wiring board 4 on which the wiring 3 shown in FIGS. A wiring board for semiconductor mounting provided with an adhesive film can be obtained. In addition, after the wiring substrate is bonded to the second adhesive layer side of the adhesive film and the semiconductor chip 5 is thermocompression bonded to the opposite side of the wiring substrate to cure the adhesive layer of the adhesive film, FIG. In FIG. 3B, the pads of the semiconductor chip and the wirings on the wiring substrate are connected by bonding wires 6. In FIGS. 3C and 3D, the inner leads 6 'of the substrate are bonded to the pads of the semiconductor chip and sealed. A semiconductor device can be obtained by providing solder balls which are sealed with the stopper 7 and are external connection terminals 8. Further, when the thickness after bonding of the adhesive layer in contact with the wiring board is thicker than the circuit thickness of the wiring board as in the semiconductor mounting wiring board shown in FIG. 2 or the semiconductor device shown in FIG. It is preferable at the point which can obtain filling property.
[0048]
The semiconductor device in which the semiconductor chip and the wiring board are bonded using the adhesive film of the present invention was excellent in reflow resistance, temperature cycle test, moisture resistance (PCT resistance) and the like. Further, the usable life of the adhesive was long, and the semiconductor device manufactured using the adhesive after being stored at 25 ° C. for 3 months showed almost the same characteristics as the initial stage.
[0049]
Hereinafter, the present invention will be described more specifically with reference to examples.
【Example】
Example 1
(1) Production of first adhesive layer
45 parts by weight of bisphenol A type epoxy resin (epoxy equivalent 175, product name YD-8125 manufactured by Toto Kasei Co., Ltd.) as an epoxy resin, cresol novolak type epoxy resin (epoxy equivalent 210, product name YDCN-703 manufactured by Toto Kasei Co., Ltd.) 15 parts by weight, phenol novolac resin (using Dainippon Ink Chemical Co., Ltd., trade name Pryofen LF2882) as epoxy resin curing agent, epoxy group-containing acrylic rubber as epoxy group-containing acrylic polymer (Gel permeation chromatography weight average molecular weight 1 million, glycidyl methacrylate 3% by weight, Tg is −7 ° C., using a trade name HTR-860P-3DR (C) manufactured by Teikoku Chemical Industry Co., Ltd.) 66 parts by weight, curing acceleration Imidazo as an agent Methyl ethyl ketone was added to a composition comprising 0.5 parts by weight of a sulfur-based curing accelerator (uses Shikoku Kasei Kogyo Co., Ltd. Curazole 2PZ-CN), and the mixture was stirred and mixed, followed by vacuum degassing. This adhesive varnish was applied on a polyethylene terephthalate film having a thickness of 75 μm which was subjected to a release treatment, and dried by heating at 90 ° C. for 20 minutes and further at 120 ° C. for 5 minutes to form a coating film having a thickness of 30 μm. Produced. The degree of cure measured using DSC was 5%. This adhesive film was cured by heating at 170 ° C. for 1 hour, and its storage elastic modulus was measured using a dynamic viscoelasticity measuring device (DVE-V4, manufactured by Rheology) (sample size: length 20 mm, width 4 mm, membrane) As a result of a thickness of 60 μm, a heating rate of 5 ° C./min, a tensile mode, 10 Hz, automatic static load), it was 600 MPa at 25 ° C. and 5 MPa at 260 ° C.
(2) Production of second adhesive layer
After applying to the polyethylene terephthalate film, it is the same as the first adhesive layer except that it is dried by heating at 90 ° C. for 20 minutes and further at 140 ° C. for 5 minutes. The degree of cure measured using DSC was 15%.
(3) Lamination of first and second adhesive layers
The first and second adhesive layers were laminated and bonded using a hot roll laminator under the conditions of a temperature of 100 ° C., a pressure of 0.3 MPa, and a speed of 0.2 m / min to prepare an adhesive film.
[0050]
Example 2
(1) Production of first adhesive layer
55 parts by weight of polyglycidyl ether of brominated phenol novolac as epoxy resin (epoxy equivalent 285, using trade name BREN-S manufactured by Nippon Kayaku Co., Ltd.), brominated phenol resin (Teijin Kasei Co., Ltd.) as a curing agent for epoxy resin 40.8 parts by weight of a fire guard FG2000 manufactured by the company), 5.9 parts by weight of a phenol novolac resin (uses Dainippon Ink Chemical Co., Ltd. trade name PRIOFEN LF2882), epoxy as an epoxy group-containing acrylic polymer 44 parts by weight of a group-containing acrylic rubber (weight average molecular weight 1 million, glycidyl methacrylate 3% by weight, Tg-7 ° C., trade name HTR-860P-3DR (C) manufactured by Teikoku Chemical Industry Co., Ltd.), imidazole as a curing accelerator -Based curing accelerator (Cuazo manufactured by Shikoku Kasei Kogyo Co., Ltd. 2PZ-CN), 0.5 parts by weight, and 21 parts by weight of antimony trioxide (using PATOX-U manufactured by Nippon Seiko Co., Ltd.) as the antimony oxide, methyl ethyl ketone is added and mixed with stirring. And vacuum degassed. This adhesive varnish is applied onto a 75 μm-thick polyethylene terephthalate film that has been subjected to a release treatment, and heated and dried at 90 ° C. for 20 minutes and further at 120 ° C. for 5 minutes to form a coating film with a film thickness of 30 μm. An agent layer was prepared. The residual solvent amount of this film-like adhesive layer was 1.2% by weight. Moreover, this film-like adhesive layer was heat-cured at 170 ° C. for 1 hour, and its storage elastic modulus was measured using a dynamic viscoelasticity measuring device (DVE-V4, manufactured by Rheology) (sample size: length 20 mm). , Width 4 mm, film thickness 60 μm, heating rate 5 ° C./min, tensile mode, 10 Hz, automatic static load), the result was 1000 MPa at 25 ° C. and 5 MPa at 260 ° C.
(2) Production of second adhesive layer
The same as the first adhesive layer except that the amount of HTR-860P-3DR is 68 parts by weight.
(3) Lamination of first and second adhesive layers
The first and second adhesive layers were laminated and bonded using a hot roll laminator under the conditions of a temperature of 100 ° C., a pressure of 0.3 MPa, and a speed of 0.2 m / min to prepare an adhesive film.
[0051]
Comparative Example 1
Two first adhesive layers of Example 1 were laminated and bonded using a hot roll laminator under the conditions of a temperature of 100 ° C., a pressure of 0.3 MPa, and a speed of 0.2 m / min to prepare an adhesive film.
Comparative Example 2
Two second adhesive layers of Example 1 were laminated and bonded using a hot roll laminator under conditions of a temperature of 100 ° C., a pressure of 0.3 MPa, and a speed of 0.2 m / min to prepare an adhesive film.
Comparative Example 3
Two first adhesive layers of Example 2 were laminated and bonded using a hot roll laminator under the conditions of a temperature of 100 ° C., a pressure of 0.3 MPa, and a speed of 0.2 m / min to prepare an adhesive film.
Comparative Example 4
Two second adhesive layers of Example 2 were laminated and bonded using a hot roll laminator under the conditions of a temperature of 100 ° C., a pressure of 0.3 MPa, and a speed of 0.2 m / min to prepare an adhesive film.
[0052]
Using the obtained adhesive film, a wiring board using a semiconductor chip and a polyimide film having a thickness of 25 μm as a base material was thermocompression bonded for 5 seconds under the conditions (temperature, pressure) shown in Table 1, and 170 ° C. for 1 hour. A semiconductor device sample (a solder ball was formed on one side) was prepared by heating and curing the adhesive of the adhesive film. At this time, in Examples 1 and 2, the first adhesive layer of the adhesive film was in contact with the semiconductor chip side, and the second adhesive layer was in contact with the circuit board.
[0053]
The semiconductor device samples were examined for heat resistance, flame retardancy, moisture resistance, and foaming. As a heat resistance evaluation method, reflow crack resistance and a temperature cycle test were applied. The evaluation of reflow crack resistance was repeated twice by passing the sample through an IR reflow furnace set at a maximum temperature of 240 ° C. and maintaining the temperature for 20 seconds, and then allowing it to cool at room temperature. The cracks in the samples were observed visually and with an ultrasonic microscope. The thing which did not generate | occur | produce the crack was set to (circle), and the thing which had generate | occur | produced was set to x. The temperature cycle resistance is that the sample is left in a −55 ° C. atmosphere for 30 minutes and then left in a 125 ° C. atmosphere for 30 minutes. After 1000 cycles, an ultrasonic microscope is used to destroy peeling or cracks. The case where no occurred was marked with ◯, and the case where it occurred was marked with ×. In addition, the moisture resistance evaluation was performed by observing peeling after treating the sample for 72 hours in an atmosphere (pressure cooker test: PCT treatment) at a temperature of 121 ° C., a humidity of 100%, and 2 atmospheres. The case where peeling of the adhesive film was not recognized was rated as ◯, and the case where peeling was observed was marked as x. The presence / absence of foaming was confirmed using an ultrasonic microscope for the semiconductor device sample. A sample in which foaming was not observed in the adhesive film was marked with ◯, and a sample with foaming was marked with x. For evaluation of embedding property, the semiconductor device sample was prepared, and the embedding property of the adhesive into the circuit was confirmed using an optical microscope. The evaluation of the pot life was performed by preparing the semiconductor device sample using an adhesive film stored at 25 ° C. for 3 months and confirming the embeddability. The case where there was no space between the circuit provided on the wiring board and the case where the space was recognized was rated as x. The results are shown in Table 1.
The resin soaking from the through hole and the end was confirmed using an optical microscope. The case where there was no oozing was rated as ◯, and the case where there was oozing was rated as x.
[0054]
[Table 1]
Figure 0004505769
[0055]
【The invention's effect】
As described above, the multilayer adhesive film of the present invention has good circuit embedding properties even when bonded with a low load, and there is no oozing of resin from the through holes and end portions. Moreover, heat resistance and moisture resistance are good. With these effects, it is possible to efficiently provide an adhesive material necessary for a semiconductor device that exhibits excellent reliability.
[Brief description of the drawings]
FIG. 1A is a cross-sectional view showing an adhesive film comprising a two-layer adhesive according to the present invention, and FIG. 1B is a cross-sectional view showing an adhesive film provided with each adhesive on both surfaces of a core material according to the present invention.
2A is a cross-sectional view showing a wiring board for mounting on a semiconductor using an adhesive film made of a two-layer adhesive according to the present invention, and FIG. 2B is a diagram showing the adhesive on both surfaces of a core material according to the present invention. Sectional drawing which shows the wiring board for semiconductor mounting using the adhesive film which was prepared.
FIG. 3A is a semiconductor device in which a semiconductor chip and a wiring board are bonded using an adhesive film made of a two-layer adhesive according to the present invention, and pads of the semiconductor chip and wiring on the board are connected by bonding wires. FIG. 6B is a cross-sectional view of the core material according to the present invention, in which the semiconductor chip and the wiring board are bonded using an adhesive film having adhesives on both surfaces, and the pads of the semiconductor chip and the wiring on the board are bonded with bonding wires. Sectional view of connected semiconductor device, (c) is a semiconductor device in which a semiconductor chip and a wiring substrate are bonded using an adhesive film made of a two-layer adhesive according to the present invention, and an inner lead of the substrate is bonded to a pad of the semiconductor chip (D) is a cross-sectional view of the core material according to the present invention, wherein the semiconductor chip and the wiring board are bonded using an adhesive film having adhesives on both sides of the core material. Sectional view of a semiconductor device bonding inner leads of the substrate up pad.
[Explanation of symbols]
1. First adhesive layer
1 '. Second adhesive layer
2. Core material (heat-resistant thermoplastic film)
3. wiring
4. Wiring board
5. Semiconductor chip
6. Bonding wire
6 '. Inner lead
7. Sealing material
8. External connection terminal

Claims (7)

下記の２種類の接着剤層を積層してなることを特徴とする接着フィルム。
第１の接着剤層
エポキシ樹脂及びその硬化剤１００重量部、官能基を含む重量平均分子量が１０万以上でＴｇが−５０℃以上０℃以下である高分子量成分１０〜１００重量部、硬化促進剤０．１〜２０重量部を含有する接着剤からなり、示差走査熱分析（ＤＳＣ）による硬化度が０〜４０％の範囲にある接着剤層。
第２の接着剤層
エポキシ樹脂及びその硬化剤１００重量部、官能基を含む重量平均分子量が１０万以上でＴｇが−５０℃以上０℃以下である高分子量成分１０〜１００重量部、硬化促進剤０．１〜２０重量部を含有する接着剤からなり、ＤＳＣによる硬化度が０〜４０%の範囲にある接着剤層であって、高分子量成分の重量部が第１の接着剤層より１０重量部以上大きいかまたは、ＤＳＣによる硬化度が第１の接着剤層より５％以上大きい接着剤層。An adhesive film comprising the following two types of adhesive layers laminated.
1st adhesive layer epoxy resin and 100 parts by weight of its curing agent, 10 to 100 parts by weight of high molecular weight component having a weight average molecular weight including a functional group of 100,000 or more and Tg of −50 ° C. or more and 0 ° C. or less, curing acceleration The adhesive layer which consists of an adhesive agent containing 0.1-20 weight part of agents, and has a cure degree by the differential scanning calorimetry (DSC) in the range of 0-40%.
Second adhesive layer epoxy resin and 100 parts by weight of its curing agent, 10 to 100 parts by weight of high molecular weight component having a weight average molecular weight including a functional group of 100,000 or more and Tg of −50 ° C. or more and 0 ° C. or less, curing acceleration An adhesive layer containing 0.1 to 20 parts by weight of an agent, the degree of cure by DSC being in the range of 0 to 40%, wherein the weight part of the high molecular weight component is from the first adhesive layer An adhesive layer that is 10 parts by weight or more larger or has a degree of cure by DSC of 5% or more than that of the first adhesive layer. 第１の接着剤層および第２の接着剤層に用いるエポキシ樹脂及びその硬化剤として、臭素原子を含むエポキシ樹脂及び／又は臭素原子を含む硬化剤を用いたことを特徴とする請求項１記載の接着フィルム。  The epoxy resin used for the first adhesive layer and the second adhesive layer and the curing agent thereof are epoxy resin containing bromine atom and / or curing agent containing bromine atom. Adhesive film. 高分子量成分が、グリシジルアクリレート又はグリシジルメタクリレート０．５〜６．０重量％を含むアクリル共重合体であることを特徴とする請求項１または２記載の接着フィルム。The adhesive film according to claim 1 or 2, wherein the high molecular weight component is an acrylic copolymer containing 0.5 to 6.0% by weight of glycidyl acrylate or glycidyl methacrylate. 動的粘弾性測定装置を用いて測定した場合の第１の接着剤層および第２の接着剤層の接着剤硬化物の貯蔵弾性率が各々２５℃で２０〜２０００ＭＰａであり、２６０℃で３〜５０ＭＰａである請求項１〜３のいずれかに記載の接着フィルム。The storage elastic modulus of the cured adhesives of the first adhesive layer and the second adhesive layer when measured using a dynamic viscoelasticity measuring device is 20 to 2000 MPa at 25 ° C., and 3 at 260 ° C. The adhesive film according to any one of claims 1 to 3 , which has a viscosity of -50 MPa. 配線基板の半導体チップ搭載面に請求項１〜４のいずれかに記載の接着フィルムを、第２の接着剤層の面が配線基板に接するように備えた半導体搭載用配線基板。  A wiring board for mounting on a semiconductor, comprising the adhesive film according to any one of claims 1 to 4 on a semiconductor chip mounting surface of the wiring board so that the surface of the second adhesive layer is in contact with the wiring board. 半導体チップに請求項１〜４のいずれかに記載の接着フィルムを、第１の接着剤層の面が半導体チップに接するように備えた半導体装置。  A semiconductor device comprising the semiconductor chip and the adhesive film according to claim 1 so that a surface of the first adhesive layer is in contact with the semiconductor chip. 半導体チップと回路付き基板または回路付きフィルムを請求項１〜４のいずれかに記載の接着フィルムを介して接着する半導体装置において、第１の接着剤層の面が半導体チップに、第２の接着剤層の面が回路付き基板または回路付きフィルムに接することを特徴とする半導体装置。 In the semiconductor device which adhere | attaches a semiconductor chip and a board | substrate with a circuit, or a film with a circuit via the adhesive film in any one of Claims 1-4, the surface of a 1st adhesive bond layer is a 2nd adhesion | attachment to a semiconductor chip. A semiconductor device, wherein the surface of the agent layer is in contact with a substrate with a circuit or a film with a circuit .
JP2000101253A 2000-03-31 2000-03-31 Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof Expired - Lifetime JP4505769B2 (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP2000101253A JP4505769B2 (en) 2000-03-31 2000-03-31 Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof
KR1020027012945A KR100815314B1 (en) 2000-03-31 2001-03-30 Adhesive Composition, Method for Preparing the Same, Adhesive Film Using the Same, Substrate for Carrying Semiconductor and Semiconductor Device
TW090107672A TWI245791B (en) 2000-03-31 2001-03-30 Adhesive films, and semiconductor devices using the same
TW092115192A TWI332521B (en) 2000-03-31 2001-03-30 Adhesive films for semiconductor
US10/240,265 US7070670B2 (en) 2000-03-31 2001-03-30 Adhesive composition, method for preparing the same, adhesive film using the same, substrate for carrying semiconductor and semiconductor device
TW098125792A TWI332024B (en) 2000-03-31 2001-03-30 Method for making a semiconductor device
PCT/JP2001/002716 WO2001074962A1 (en) 2000-03-31 2001-03-30 Adhesive composition, method for preparing the same, adhesive film using the same, substrate for carrying semiconductor and semiconductor device
KR1020087011924A KR100894208B1 (en) 2000-03-31 2001-03-30 Adhesive Composition, Method for Preparing the Same, Adhesive Film Using the Same, Substrate for Carrying Semiconductor and Semiconductor Device
KR1020077022421A KR100894207B1 (en) 2000-03-31 2001-03-30 Adhesive Composition, Method for Preparing the Same, Adhesive Film Using the Same, Substrate for Carrying Semiconductor and Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000101253A JP4505769B2 (en) 2000-03-31 2000-03-31 Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JP2001279197A JP2001279197A (en) 2001-10-10
JP4505769B2 true JP4505769B2 (en) 2010-07-21

Family

ID=18615338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000101253A Expired - Lifetime JP4505769B2 (en) 2000-03-31 2000-03-31 Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP4505769B2 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101215728B1 (en) 2003-06-06 2012-12-26 히다치 가세고교 가부시끼가이샤 Semiconductor device producing method
US7216995B2 (en) * 2003-09-10 2007-05-15 Nippon Telegraph And Telephone Corporation Deployable reflector
JP4816871B2 (en) * 2004-04-20 2011-11-16 日立化成工業株式会社 Adhesive sheet, semiconductor device, and method of manufacturing semiconductor device
CN101714513B (en) 2004-04-20 2012-05-30 日立化成工业株式会社 Method for producing the semiconductor device
JP2006073825A (en) * 2004-09-02 2006-03-16 Toshiba Corp Semiconductor device and packaging method thereof
JP4859541B2 (en) * 2006-06-02 2012-01-25 株式会社ソニー・コンピュータエンタテインメント Adhesive member and semiconductor device
JP2009016803A (en) * 2007-06-05 2009-01-22 Hitachi Chem Co Ltd Thermosetting resin film for sealing electronic component
JP5137538B2 (en) * 2007-11-28 2013-02-06 リンテック株式会社 Adhesive composition, adhesive sheet and method for producing semiconductor device
JP5098851B2 (en) * 2007-12-25 2012-12-12 日立化成工業株式会社 Laminated sealing film
CN102066514A (en) * 2008-03-31 2011-05-18 住友电木株式会社 Resin composition, resin-containing carrier material, multi-layered printed circuit board, and semiconductor device
CN106024654B (en) 2012-03-08 2019-07-02 日立化成株式会社 Semiconductor device
US10163673B2 (en) 2013-10-07 2018-12-25 Globalfoundries Inc. Dual adhesive bonding with perforated wafer
JP5738456B2 (en) * 2014-05-22 2015-06-24 リンテック株式会社 Adhesive sheet and method for manufacturing semiconductor device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09298369A (en) * 1996-05-09 1997-11-18 Hitachi Chem Co Ltd Multilayer wiring board and its manufacture
JPH1093245A (en) * 1996-09-10 1998-04-10 Hitachi Chem Co Ltd Multilayer interconnection board and its manufacture
JPH10183086A (en) * 1996-12-24 1998-07-07 Hitachi Chem Co Ltd Heat-conductive adhesive composition and heat-conductive adhesive film using the composition
JPH10237410A (en) * 1997-02-27 1998-09-08 Hitachi Chem Co Ltd Thermally conductive adhesive composition and thermally conductive adhesive film prepared by using the same
JPH10242606A (en) * 1997-02-27 1998-09-11 Hitachi Chem Co Ltd Metal base board
JPH10330696A (en) * 1997-05-28 1998-12-15 Hitachi Chem Co Ltd Adhesive film for multilayer printed circuit board
JPH11209724A (en) * 1998-01-30 1999-08-03 Hitachi Chem Co Ltd Flame retarded adhesive, flame retarded bonding member, wiring board for loading semiconductor having flame retarded bonding member and semiconductor device using the same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09298369A (en) * 1996-05-09 1997-11-18 Hitachi Chem Co Ltd Multilayer wiring board and its manufacture
JPH1093245A (en) * 1996-09-10 1998-04-10 Hitachi Chem Co Ltd Multilayer interconnection board and its manufacture
JPH10183086A (en) * 1996-12-24 1998-07-07 Hitachi Chem Co Ltd Heat-conductive adhesive composition and heat-conductive adhesive film using the composition
JPH10237410A (en) * 1997-02-27 1998-09-08 Hitachi Chem Co Ltd Thermally conductive adhesive composition and thermally conductive adhesive film prepared by using the same
JPH10242606A (en) * 1997-02-27 1998-09-11 Hitachi Chem Co Ltd Metal base board
JPH10330696A (en) * 1997-05-28 1998-12-15 Hitachi Chem Co Ltd Adhesive film for multilayer printed circuit board
JPH11209724A (en) * 1998-01-30 1999-08-03 Hitachi Chem Co Ltd Flame retarded adhesive, flame retarded bonding member, wiring board for loading semiconductor having flame retarded bonding member and semiconductor device using the same

Also Published As

Publication number Publication date
JP2001279197A (en) 2001-10-10

Similar Documents

Publication Publication Date Title
KR100543428B1 (en) Adhesive, adhesive member, circuit substrate for semiconductor mounting having adhesive member, and semiconductor device containing the same
JP3617417B2 (en) Adhesive, adhesive member, wiring board for semiconductor mounting provided with adhesive member, and semiconductor device using the same
JP4165072B2 (en) Adhesive composition, adhesive film, wiring board for semiconductor mounting, semiconductor device and manufacturing method thereof
JP3559137B2 (en) Heat conductive adhesive composition and heat conductive adhesive film using the composition
KR20060024464A (en) Semiconductor device, semiconductor chip mounting substrate, methods of manufacturing the device and substrate, adhesive, and adhesive double coated film
JP3792327B2 (en) Thermally conductive adhesive composition and thermally conductive adhesive film using the composition
JP4505769B2 (en) Adhesive film, wiring board for semiconductor mounting provided with adhesive film, semiconductor device, and manufacturing method thereof
JPH11265960A (en) Semiconductor device with metal reinforcing material
JP3539242B2 (en) Adhesive member, wiring board for mounting semiconductor provided with adhesive member, and semiconductor device using the same
JP4265397B2 (en) Semiconductor device and manufacturing method of semiconductor device
JP3528639B2 (en) Adhesive, adhesive member, wiring board for mounting semiconductor provided with adhesive member, and semiconductor device using the same
JP3411748B2 (en) Metal foil with adhesive, adhesive sheet and multilayer wiring board
JPH11209724A (en) Flame retarded adhesive, flame retarded bonding member, wiring board for loading semiconductor having flame retarded bonding member and semiconductor device using the same
JP2003073641A (en) Flame-retardant adhesive film, wiring board for mounting semiconductor, semiconductor and method for manufacturing the semiconductor device
JP4534100B2 (en) Double-sided adhesive film for electronic parts, organic substrate for semiconductor mounting, and semiconductor device
JP4556472B2 (en) Adhesive, adhesive member, wiring board for semiconductor mounting provided with adhesive member, and semiconductor device using the same
JP4699620B2 (en) Photosensitive adhesive film, use thereof and method for manufacturing semiconductor device
JP4934895B2 (en) Adhesive composition, adhesive film, wiring board for semiconductor mounting, and semiconductor device
JP2001279217A (en) Adhesive composition, flame retardant adhesive composition, adhesive film, printed circuit board for mounting semiconductor, semiconductor device and method for producing the same
JP2000144077A (en) Double-sided adhesive film and semiconductor device using the same
JP2000106372A (en) Both-sided adhesive film, organic board for mounting semiconductor and semiconductor device
JP2003147323A (en) Adhesive composition, adhesive film, semiconductor carrier member, and semiconductor device and its production method
JP2000154360A (en) Adhesive, adhesive member, wiring board equipped with the adhesive member for semiconductor, and semiconductor equipment
JPH11209723A (en) Flame retarded adhesive, flame retarded bonding member, wiring board for loading semiconductor having flame retarded bonding member and semiconductor device using the same
JP2000164607A (en) Electronic part adhesive member, semiconductor mounting wiring board equipped therewith, and semiconductor device provided therewith

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070131

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100107

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100308

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100402

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100415

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 3

R151 Written notification of patent or utility model registration

Ref document number: 4505769

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130514

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

EXPY Cancellation because of completion of term