JP4484543B2 - Multiple wiring board - Google Patents

Multiple wiring board Download PDF

Info

Publication number
JP4484543B2
JP4484543B2 JP2004048235A JP2004048235A JP4484543B2 JP 4484543 B2 JP4484543 B2 JP 4484543B2 JP 2004048235 A JP2004048235 A JP 2004048235A JP 2004048235 A JP2004048235 A JP 2004048235A JP 4484543 B2 JP4484543 B2 JP 4484543B2
Authority
JP
Japan
Prior art keywords
wiring board
wiring
region
outer peripheral
mother
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004048235A
Other languages
Japanese (ja)
Other versions
JP2005243712A (en
Inventor
晴夫 久保田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2004048235A priority Critical patent/JP4484543B2/en
Publication of JP2005243712A publication Critical patent/JP2005243712A/en
Application granted granted Critical
Publication of JP4484543B2 publication Critical patent/JP4484543B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Description

本発明は、広面積の母基板の中央部に各々が半導体素子や水晶振動子等の電子部品を搭載するための小型の配線基板となる多数の配線基板領域を縦横の並びに一体的に配列形成して成る多数個取り配線基板に関するものである。   In the present invention, a large number of wiring board regions, each of which is a small wiring board for mounting electronic components such as a semiconductor element and a crystal resonator, are arranged in a central portion of a large-area mother board in a vertical and horizontal arrangement. This relates to a multi-piece wiring board.

従来、例えば半導体素子や水晶振動子等の電子部品を収納するための電子部品収納用パッケージに用いられる小型の配線基板は、酸化アルミニウム質焼結体等のセラミック材料から成り、表面に配線導体が形成された四角平板状のセラミック絶縁層を複数層、上下に積層した構造である。この配線基板に電子部品を収納し、電子部品の電極を配線導体の露出部分に半田やボンディングワイヤ等を介して電気的に接続することにより電子装置が形成される。   Conventionally, for example, a small wiring board used for an electronic component storage package for storing an electronic component such as a semiconductor element or a crystal resonator is made of a ceramic material such as an aluminum oxide sintered body, and has a wiring conductor on the surface. In this structure, a plurality of formed rectangular flat ceramic insulating layers are stacked one above the other. An electronic device is formed by housing an electronic component on the wiring board and electrically connecting the electrode of the electronic component to an exposed portion of the wiring conductor via solder, a bonding wire, or the like.

ところで、このような配線基板は近時の電子装置の小型化の要求に伴い、その大きさが数ｍｍ角程度の極めて小さなものとなってきており、さらに、その厚みも１ｍｍ以下と薄くなってきている。そして、このような小さな多数個の配線基板の取り扱いを容易なものとするとともに、配線基板および電子装置の作製を効率よく行なうために、１枚の広面積のセラミック材料等から成る母基板から多数個の配線基板を同時集約的に得るようにした、いわゆる多数個取り配線基板の形態で作製されている。   By the way, with the recent demand for miniaturization of electronic devices, the size of such wiring boards has become extremely small, about several millimeters square, and the thickness has become as thin as 1 mm or less. ing. In order to facilitate handling of such a small number of wiring boards and to efficiently manufacture the wiring board and the electronic device, a large number of mother boards made of a single large-area ceramic material or the like are used. The circuit board is manufactured in the form of a so-called multi-cavity wiring board in which a plurality of wiring boards are obtained simultaneously and collectively.

このような多数個取り配線基板の一例を図２に示す。   An example of such a multi-piece wiring board is shown in FIG.

多数個取り配線基板は、四角形状の配線基板領域３３が縦横に複数配列形成された母基板３１と、各配線基板領域３３に形成された複数の配線導体（図示せず）と、母基板３１の外周に形成された枠状の捨て代領域３７とを具備した構造である。   The multi-cavity wiring board includes a mother board 31 in which a plurality of rectangular wiring board areas 33 are formed in a matrix, a plurality of wiring conductors (not shown) formed in each wiring board area 33, and a mother board 31. It is the structure which comprised the frame-shaped discard margin area | region 37 formed in the outer periphery.

各配線基板領域３３の上面には、電子部品を搭載するための搭載部（図示せず）が形成されており、配線導体は、一部が配線基板領域３３の上面の搭載部、またはその周辺に露出するとともに、他の一部が配線基板領域３３の下面や側面となる部位等に導出されるようにして形成されている。   A mounting portion (not shown) for mounting electronic components is formed on the upper surface of each wiring board region 33, and a part of the wiring conductor is a mounting portion on the upper surface of the wiring substrate region 33 or its periphery. And the other part is formed so as to be led out to the lower surface and side surfaces of the wiring substrate region 33.

そして、配線基板領域３３の搭載部に電子部品（図示せず）を搭載固定するとともに電子部品の電極をボンディングワイヤや半田等の電気的接続手段を介して搭載部またはその周辺に露出している配線導体に電気的に接続し、配線基板領域３３の上面に搭載部を塞ぐようにして金属やガラス等から成る蓋体を接合したり、搭載部上の電子部品をエポキシ樹脂等から成る樹脂製充填材で覆うことにより、搭載部上に電子部品を気密に収納することによって、多数の電子装置が縦横の並びに配列形成された多数個取りの状態で形成される。しかる後、この多数個取りの状態の電子装置を個々の配線基板領域３３に分割することにより多数個の製品としての電子装置が形成される。なお、配線基板領域３３への電子部品の搭載は、多数個取り配線基板を個々の配線基板領域３３に分割した後に行われる場合もある。   An electronic component (not shown) is mounted and fixed on the mounting portion of the wiring board region 33, and the electrodes of the electronic component are exposed to the mounting portion or its periphery via an electrical connection means such as a bonding wire or solder. It is electrically connected to the wiring conductor, and a lid made of metal, glass or the like is joined to the upper surface of the wiring board region 33 so as to close the mounting portion, or an electronic component on the mounting portion is made of resin made of epoxy resin or the like By covering with the filler, the electronic components are housed in an airtight manner on the mounting portion, so that a large number of electronic devices are formed in a multi-piece state in which the devices are arranged vertically and horizontally. Thereafter, the electronic device in a multi-piece state is divided into individual wiring board regions 33, whereby electronic devices as a large number of products are formed. The electronic component may be mounted on the wiring board area 33 after the multi-piece wiring board is divided into the individual wiring board areas 33.

このような多数個取り配線基板においては、通常、酸化腐食の防止や半田の濡れ性、ボンディングワイヤのボンディング性を向上させること等のために、あらかじめ露出した配線導体の表面に対してニッケルや金等のめっきが施される。   In such multi-cavity wiring boards, nickel or gold is usually applied to the surface of the previously exposed wiring conductor in order to prevent oxidative corrosion, improve the wettability of solder, and improve the bonding property of bonding wires. Etc. are plated.

配線導体にめっきを施すには、多数個取り配線基板をニッケル，金等のめっき液中に浸漬し、配線導体に所定のめっき用の電流を供給する。母基板３１の対向する一対の辺部等にはめっき導通用パターン３４が、配線導体と電気的に接続するようにして形成されており、めっき用治具（ラック）に設けられた導通用端子（図示せず）をめっき導通用パターン３４に接触させるとともに、導通用端子の一対の端部でめっき導通用パターン３４を上下から挟み込むことにより、電源から導通用端子とめっき導通用パターン３４とを介して配線導体にめっき用の電流が供給される。   In order to plate the wiring conductor, a multi-piece wiring board is immersed in a plating solution such as nickel or gold, and a predetermined plating current is supplied to the wiring conductor. A plating conduction pattern 34 is formed on a pair of opposing sides of the mother board 31 so as to be electrically connected to the wiring conductor, and a conduction terminal provided on a plating jig (rack). (Not shown) is brought into contact with the plating conduction pattern 34, and the conduction terminal 34 and the plating conduction pattern 34 are connected from the power source by sandwiching the plating conduction pattern 34 from above and below between the pair of ends of the conduction terminal. Through this, a current for plating is supplied to the wiring conductor.

なお、めっき導通用パターン３４は図２に示すように、母基板３１の対向する一対の端面に形成された楕円弧状、または円弧状の切り欠き部３６の内面にメタライズ層等の導体層を被着形成することにより形成されている。   As shown in FIG. 2, the plating conduction pattern 34 is formed by applying a conductor layer such as a metallized layer on the inner surface of an elliptical arc-shaped or arc-shaped cutout 36 formed on a pair of opposed end surfaces of the mother substrate 31. It is formed by wearing.

この場合、一般に、電解めっき法においては、配線基板領域３３の外周部に近い配線導体ほど電流が流れ易く電流密度が高くなること、また、めっき液の循環供給がされやすいこと等から、めっき速度が速く、めっき厚みが厚くなることが知られている。   In this case, in general, in the electroplating method, the wiring conductor closer to the outer peripheral portion of the wiring board region 33 has a higher current density and a higher current density. Is fast and the plating thickness is known to increase.

そのため、配線基板領域３３の配線導体に被着形成されるニッケルや金等のめっきの厚みを均一なものとするために、母基板３１の捨て代領域３７の主面には枠状の外周メタライズ層３８が、めっき導通用パターン３４および配線導体と電気的に接続して形成されている。   Therefore, in order to make the thickness of the plating such as nickel or gold deposited on the wiring conductor of the wiring board region 33 uniform, the main surface of the discard margin region 37 of the mother board 31 has a frame-shaped outer peripheral metallization. The layer 38 is formed in electrical connection with the plating conduction pattern 34 and the wiring conductor.

外周メタライズ層３８は、その内側の配線導体に被着しようとするニッケル，金等のめっき金属を引き寄せて外周メタライズ層３８自身に被着させて、配線導体のめっき厚みのばらつきを抑える、いわゆる補助陰極として機能し、内側の配線基板領域３３の配線導体に被着されるめっき厚みが厚くなることを防止している。   The outer peripheral metallization layer 38 is a so-called auxiliary that suppresses variations in the plating thickness of the wiring conductor by attracting a plating metal such as nickel or gold to be deposited on the inner wiring conductor and depositing it on the outer peripheral metallization layer 38 itself. It functions as a cathode and prevents the plating thickness deposited on the wiring conductor in the inner wiring board region 33 from increasing.

なお、隣接する配線基板領域３３の境界上には、貫通導体３５が形成されており、この貫通導体３５は、隣接する配線基板領域３３の配線導体間や上下の配線導体を電気的に接続するように形成されており、個々の配線基板領域３３に分割する際に縦に分割されることにより、配線基板の側面に位置する側面導体（キャスタレーション導体）となる。   A through conductor 35 is formed on the boundary between the adjacent wiring board regions 33, and the through conductors 35 electrically connect the wiring conductors of the adjacent wiring board regions 33 and upper and lower wiring conductors. Thus, when divided into individual wiring board regions 33, they are vertically divided to become side conductors (castellation conductors) located on the side faces of the wiring board.

このような多数個取り配線基板は、例えば、母基板３１がセラミック材料から成る場合であれば、複数のグリーンシートを準備するとともに、配線基板領域３３となる領域や、その領域の境界の所定位置に貫通孔を形成し、次に、グリーンシートのうち一対の端面を半円状や半楕円状等に打ち抜いて切り欠き部３６を形成し、次に、金属ペーストをグリーンシートの表面、切り欠き部３６の内面の全面および貫通孔内に印刷塗布、充填し、次に、金属ペーストを所定の配線導体や外周メタライズ層３８，めっき導通用パターン３４等のパターンでグリーンシートの表面に印刷塗布し、最後に、このグリーンシートを積層して積層体とするとともに焼成することにより作製される。
特開２０００−３４０８９８号公報 For example, if the mother board 31 is made of a ceramic material, such a multi-cavity wiring board is prepared with a plurality of green sheets, a region to be the wiring substrate region 33, and a predetermined position of the boundary of the region. A through hole is formed in the green sheet, and then a pair of end faces of the green sheet are punched out into a semicircle or semi-elliptical shape to form a cutout portion 36, and then the metal paste is formed on the surface of the green sheet. The entire inner surface of the portion 36 and the inside of the through hole are printed and filled, and then a metal paste is printed and coated on the surface of the green sheet in a pattern such as a predetermined wiring conductor, outer peripheral metallized layer 38, and plating conduction pattern 34. Finally, the green sheets are laminated to form a laminated body and fired.
JP 2000-340898 A

しかしながら、近年、電子部品収納用パッケージ等に用いられる小型の配線基板は、電子装置に対する低背化の要求のため、より一層の小型化、特に薄型化が必要となってきており、これに応じて母基板３１は、例えば厚みが０．５ｍｍ以下と非常に薄型化されるようになってきている。   However, in recent years, small-sized wiring boards used for electronic component storage packages and the like have been required to be further reduced in size, in particular, to be thinner due to the demand for low-profile electronic devices. For example, the mother board 31 has become very thin, for example, with a thickness of 0.5 mm or less.

このように母基板３１が薄型化されると、外周メタライズ層３８となる金属ペーストと母基板３１となるグリーンシートとの焼成時の収縮率の違いにより、母基板３１の外周部分の各辺において、各辺の全長にわたる大きな応力が一方向に作用し、この応力により母基板３１が凹状、または凸状に反って、各配線基板領域３３を個片状に分割する際に、各配線基板領域３３の間や、配線基板領域３３と捨て代領域３７との間の境界線が歪むため個々の配線基板においてクラックやバリが発生するという問題点を有していた。また、母基板３１を分割しない状態で半導体素子等の電子部品を実装する際に、搭載部が変形して搭載精度が悪化してしまい、実装不良が多発するという問題点を有していた。   When the mother substrate 31 is thinned in this way, the metal paste that becomes the outer metallized layer 38 and the green sheet that becomes the mother substrate 31 have different shrinkage rates at the time of firing. A large stress over the entire length of each side acts in one direction, and when the mother substrate 31 warps in a concave shape or a convex shape due to this stress, each wiring substrate region 33 is divided into individual pieces. 33, and the boundary line between the wiring board region 33 and the disposal margin area 37 is distorted, so that there is a problem that cracks and burrs are generated in each wiring board. Further, when mounting electronic parts such as semiconductor elements without dividing the mother board 31, the mounting portion is deformed, mounting accuracy is deteriorated, and mounting defects frequently occur.

本発明はかかる問題点に鑑み案出されたものであり、その目的は、より一層の小型化、特に薄型化が進んだ配線基板３３を多数個配列形成した多数個取り配線基板において、母基板３１の外周の捨て代領域３７の主面にめっき厚みのばらつきを防止するための外周メタライズ層３８を設けたとしても、母基板３１に反り等の不具合が生じることを防止することが可能であり、その結果、各配線基板領域３３を個片状に分割する際にクラックやバリの発生を防止することが可能で、かつ配線導体の表面に良好なめっき層を被着させることが可能な多数個取り配線基板を提供することにある。   The present invention has been devised in view of such problems, and an object of the present invention is to provide a mother board in a multi-cavity wiring board in which a large number of wiring boards 33 that are further miniaturized, in particular thinned, are arranged. Even if the outer peripheral metallization layer 38 for preventing the variation in the plating thickness is provided on the main surface of the disposal margin region 37 on the outer periphery of the outer periphery 31, it is possible to prevent the occurrence of problems such as warpage in the mother substrate 31. As a result, it is possible to prevent the occurrence of cracks and burrs when dividing each wiring board region 33 into individual pieces, and to apply a good plating layer to the surface of the wiring conductor. The object is to provide a single-piece wiring board.

本発明の多数個取り配線基板は、主面の中央部に配線基板領域が縦横に配列形成されるとともに、外周部に捨て代領域が形成された四角形状の母基板と、前記各配線基板領域に形成された配線導体と、前記捨て代領域の主面に、前記配線基板領域を取り囲むようにして形成された外周メタライズ層とを具備しており、該外周メタライズ層は、前記母基板の各辺の中央部において不連続となるように非形成部を有していて、該非形成部は、その長さが該非形成部に隣接する前記配線基板領域の前記外周メタライズ層に沿った方向の長さ以上であることを特徴とするものである。 The multi-cavity wiring board according to the present invention includes a rectangular mother board in which wiring board areas are vertically and horizontally arranged at the center of the main surface and a margin area is formed on the outer periphery, and each of the wiring board areas. The outer peripheral metallization layer formed so as to surround the wiring substrate region on the main surface of the discard margin region, and the outer peripheral metallization layer is formed on each of the mother substrates. so that discontinuities in the central portion of the sides have to have a non-forming portion, said non-formed part, the direction of the length along said outer peripheral metallized layer of the wiring substrate area whose length is adjacent to the non-formation portion and it is characterized in der Rukoto than is.

また、本発明の多数個取り配線基板において、好ましくは、前記外周メタライズ層は、前記母基板の少なくとも一対の対向する各辺部において、前記非形成部の両側から前記母基板の外周端部にかけて延出するめっき導通用パターンがそれぞれ形成されていることを特徴とするものである。   In the multi-piece wiring board of the present invention, it is preferable that the outer peripheral metallization layer is formed on at least a pair of opposing sides of the mother board from both sides of the non-formed part to the outer peripheral edge of the mother board. Each of the extended plating conduction patterns is formed.

本発明の多数個取り配線基板は、その主面の前記配線基板領域の各行間または各列間に、前記一対の対向する各辺部の前記外周メタライズ層同士を接続する接続用メタライズ層が形成されており、前記各配線基板領域の前記配線導体は、前記接続用メタライズ層に電気的に接続されていることを特徴とするものである。   In the multi-cavity wiring board of the present invention, a metallization layer for connection that connects the outer peripheral metallization layers of the pair of opposing sides is formed between each row or each column of the wiring board region of the main surface. The wiring conductor in each wiring board region is electrically connected to the connection metallization layer.

本発明の多数個取り配線基板によれば、外周メタライズ層は、母基板の各辺の中央部において不連続となるように非形成部を有することから、外周メタライズ層と母基板との間で焼成時の収縮率の違いに起因して応力が生じたとしても、その応力は各非形成部で区切られた部位ごとに断続して生じることになるので、母基板の各辺の全長にわたって一方向に大きな応力が作用することはなく母基板の反りを防止することが可能となる。   According to the multi-cavity wiring board of the present invention, the outer peripheral metallized layer has a non-formed portion so as to be discontinuous at the center of each side of the mother substrate. Even if stress is generated due to the difference in shrinkage rate during firing, the stress is generated intermittently for each part delimited by each non-formed part. A large stress does not act in the direction, and it is possible to prevent the mother substrate from warping.

これにより、各配線基板領域を個片状に分割する際にクラックやバリが発生することを防止できる。また、母基板を分割しない状態で半導体素子等の電子部品を実装する際に、搭載精度の悪化を有効に防止して実装不良を有効に防止することができる。   Thereby, cracks and burrs can be prevented from occurring when each wiring board region is divided into individual pieces. Further, when mounting electronic parts such as semiconductor elements without dividing the mother board, it is possible to effectively prevent deterioration of mounting accuracy and effectively prevent mounting defects.

本発明の多数個取り配線基板によれば、非形成部は、その長さが非形成部に隣接する配線基板領域の外周メタライズ層に沿った方向の長さ以上であることから、各配線基板領域に一体的に電気導通を取る配線導体とすることができるとともに、非形成部の長さを十分に確保し、応力を確実に断続した不連続なものとすることができるため、効果的に外周メタライズ層と母基板との焼成時の磁器収縮の違いによる母基板の反りを防止することが可能となる。 According to the multi-cavity wiring board of the present invention, each non- formed portion has a length equal to or greater than the length in the direction along the outer peripheral metallization layer of the wiring board region adjacent to the non-formed portion. since it is possible to interconnect conductors take integrally electrical conduction in the region, securing a sufficient length of the non-forming portion can be made stress discontinuity and securely intermittently, effective In addition, it is possible to prevent the mother substrate from warping due to a difference in porcelain shrinkage during firing between the outer peripheral metallized layer and the mother substrate.

また、本発明の多数個取り配線基板によれば、好ましくは、外周メタライズ層は、母基板の少なくとも一対の対向する各辺部において、非形成部の両側から母基板の外周端部にかけて延出するめっき導通用パターンがそれぞれ形成されていることから、母基板の一対の対向する各辺部に形成された各めっき導通用パターンを、めっき用治具（ラック）に設けられた導通用端子で上下から挟み込むことにより、めっき導通用パターンと導通用端子との電気的な接続を容易かつ確実なものとすることができ、より確実に配線導体にめっき用の電流を供給し、均一な厚みのめっき層をより確実に配線導体に形成することができる。   Further, according to the multi-piece wiring board of the present invention, preferably, the outer peripheral metallized layer extends from both sides of the non-formed part to the outer peripheral end of the mother board in at least a pair of opposing sides of the mother board. Since the plating conduction patterns to be formed are respectively formed, the plating conduction patterns formed on the pair of opposing sides of the mother board are connected with the conduction terminals provided on the plating jig (rack). By sandwiching from above and below, the electrical connection between the plating conduction pattern and the conduction terminal can be made easy and reliable, and the current for plating can be supplied to the wiring conductor more reliably, and the uniform thickness can be obtained. The plating layer can be more reliably formed on the wiring conductor.

また、本発明の多数個取り配線基板によれば、好ましくは、その主面の配線基板領域の各行間または各列間に、一対の対向する各辺部の外周メタライズ層同士を接続する接続用メタライズ層が形成されており、各配線基板領域の配線導体は、接続用メタライズ層に電気的に接続されていることから、全ての配線基板領域に形成された配線導体と、母基板の主面に形成された外周メタライズ層および接続用メタライズ層とを配線基板領域を介すことなく直接電気導通を取ることができることから、各配線導体に流れる電流もより一層均一になり、広面積の母基板の縦横に複数配列形成した配線基板領域の主面の配線導体に被着されるめっき層の厚みをより均一で安定したものとすることができる。   Moreover, according to the multi-cavity wiring board of the present invention, preferably, a connection for connecting a pair of outer peripheral metallized layers on opposite sides between each row or each column of the wiring board region of the main surface. Since the metallized layer is formed and the wiring conductor of each wiring board region is electrically connected to the connecting metallized layer, the wiring conductors formed in all the wiring board regions and the main surface of the mother board The outer peripheral metallization layer and the connection metallization layer formed on each other can be directly electrically connected without going through the wiring board region, so that the current flowing through each wiring conductor becomes even more uniform and the mother board with a large area The thickness of the plating layer deposited on the wiring conductor in the main surface of the wiring board region formed in a plurality of rows and columns can be made more uniform and stable.

その結果、電気的な接続信頼性に優れた配線基板を作製可能な多数個取り配線基板を提供することができる。   As a result, it is possible to provide a multi-piece wiring board capable of producing a wiring board having excellent electrical connection reliability.

次に、本発明の多数個取り配線基板を添付の図面を基に説明する。   Next, a multi-piece wiring board according to the present invention will be described with reference to the accompanying drawings.

図１は本発明の多数個取り配線基板の実施の形態の一例を示す平面図である。同図において１は母基板、３は配線基板領域、４はめっき導通用パターン、８は外周メタライズ層である。なお、各配線基板領域３には配線導体が形成されているが、配線導体は、図面を見易くするために省略している。   FIG. 1 is a plan view showing an example of an embodiment of a multi-piece wiring board according to the present invention. In the figure, 1 is a mother board, 3 is a wiring board region, 4 is a pattern for plating conduction, and 8 is an outer metallization layer. In addition, although the wiring conductor is formed in each wiring board area | region 3, the wiring conductor is abbreviate | omitted in order to make drawing easy to see.

そして、主として母基板１、配線基板領域３、配線導体、外周メタライズ層８で本発明の多数個取り配線基板が構成されている。   The mother board 1, the wiring board region 3, the wiring conductor, and the outer peripheral metallized layer 8 constitute the multi-piece wiring board of the present invention.

ここで、母基板１は、酸化アルミニウム質焼結体や窒化アルミニウム質焼結体，ムライト質焼結体，ガラスセラミックス等のセラミック材料から成るセラミック層を積層して成る。また、各配線基板領域３は、例えば一辺の長さが２〜２０ｍｍ程度で厚みが０．２〜２ｍｍ程度の四角形状である。そして、各配線基板領域３の上面中央部に電子部品を収納し搭載するための搭載部（図示せず）が設けられている。   Here, the mother substrate 1 is formed by laminating ceramic layers made of a ceramic material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, or a glass ceramic. Moreover, each wiring board area | region 3 is the square shape whose length of one side is about 2-20 mm and thickness is about 0.2-2 mm, for example. A mounting portion (not shown) for storing and mounting electronic components is provided at the center of the upper surface of each wiring board region 3.

このような母基板１は、例えば酸化アルミニウム質焼結体から成る場合であれば、酸化アルミニウム等の原料粉末をシート状に成形したグリーンシートを複数枚準備するとともに縦横に区画して配線基板領域３を設け、次に、このグリーンシートの一部のものについて適当な打ち抜き加工を施した後、積層、焼成することによって作製される。   If such a mother substrate 1 is made of, for example, an aluminum oxide sintered body, a plurality of green sheets obtained by forming a raw material powder such as aluminum oxide into a sheet shape are prepared, and the substrate is partitioned vertically and horizontally. Next, a part of the green sheet is subjected to an appropriate punching process, and then laminated and fired.

各配線基板領域３には、配線導体（図示せず）が形成されている。配線導体は、搭載部に搭載される電子部品の電極をボンディングワイヤや半田等を介して電気的に接続するとともに、これを配線基板領域３の下面や側面に導出するための導電路として機能する。   A wiring conductor (not shown) is formed in each wiring board region 3. The wiring conductor functions as a conductive path for electrically connecting the electrodes of the electronic components mounted on the mounting portion via bonding wires, solder, or the like and leading them to the lower surface or side surface of the wiring board region 3. .

配線導体は、タングステンやモリブデン，銅，銀等の金属材料から成り、例えば、タングステンから成る場合であれば、タングステンの金属ペーストを母基板１となるグリーンシートに所定の配線導体のパターンで印刷しておくことにより形成される。   The wiring conductor is made of a metal material such as tungsten, molybdenum, copper, or silver. For example, when the wiring conductor is made of tungsten, a metal paste of tungsten is printed on a green sheet as the mother substrate 1 in a predetermined wiring conductor pattern. It is formed by keeping.

配線導体の表面には、酸化腐食を防止するとともに、半田やボンディングワイヤを接続する際の半田の濡れ性、ボンディングワイヤのボンディング性等の特性を向上させるために、ニッケルや金等のめっき層（図示せず）が被着されている。   On the surface of the wiring conductor, a plating layer (such as nickel or gold) is used to prevent oxidative corrosion and to improve characteristics such as solder wettability when bonding solder and bonding wires and bonding wire bonding properties. (Not shown) is attached.

このめっき層は、めっき液中で被めっき部である配線導体の表面にめっき被着用の電流を供給し、電解めっきを施すことにより形成される。   This plating layer is formed by supplying a plating current to the surface of the wiring conductor which is a portion to be plated in the plating solution, and performing electrolytic plating.

外周メタライズ層８は、このときに被着されるめっき層のばらつきを低減し、均一にするためのものである。すなわち、外周メタライズ層８は、いわゆる補助陰極として機能し、これにより、内側の配線基板領域３の配線導体に被着されるめっき厚みが厚くなってめっき層の厚さにばらつきが生じることを防止している。   The outer peripheral metallized layer 8 is for reducing and making uniform the plating layer deposited at this time. In other words, the outer peripheral metallization layer 8 functions as a so-called auxiliary cathode, thereby preventing the plating layer deposited on the wiring conductor in the inner wiring board region 3 from becoming thick and causing variations in the plating layer thickness. is doing.

外周メタライズ層８は、配線導体のめっき厚みのばらつきを防止するためには、２ｍｍ以上の幅で形成することが好ましい。この場合、外周メタライズ層８の全周にわたって同じ幅とする必要はない。例えば、特にめっき用の電流密度が高くなる配線基板領域３の並びの各角部の外側における幅を、他の部位における幅よりも広くし、より確実にめっき厚みのばらつきを防止するようにしてもよい。   The outer peripheral metallized layer 8 is preferably formed with a width of 2 mm or more in order to prevent variation in the plating thickness of the wiring conductor. In this case, it is not necessary to have the same width over the entire circumference of the outer peripheral metallized layer 8. For example, the width on the outer side of each corner portion of the wiring substrate region 3 where the current density for plating is particularly high is made wider than the width at other portions, so that variations in plating thickness can be prevented more reliably. Also good.

なお、外周メタライズ層８は、配線導体を形成するのと同様の金属ペーストを、グリーンシートの外周の捨て代領域７の主面に枠状に印刷塗布しておくことにより形成される。外周メタライズ層８は、生産性等を考慮すると、配線導体と同じ材料で形成することが好ましい。   The outer peripheral metallization layer 8 is formed by printing and applying a metal paste similar to that for forming the wiring conductor in a frame shape on the main surface of the disposal margin region 7 on the outer periphery of the green sheet. The outer peripheral metallization layer 8 is preferably formed of the same material as the wiring conductor in consideration of productivity and the like.

本発明の多数個取り配線基板において、外周メタライズ層８は、母基板１の各辺の中央部において不連続となるように非形成部１０を有する。   In the multi-piece wiring board of the present invention, the outer peripheral metallized layer 8 has a non-formed part 10 so as to be discontinuous at the center part of each side of the mother board 1.

この構成により、外周メタライズ層８と母基板１との間で焼成時の収縮率の違いに起因して応力が生じたとしても、その応力は各非形成部１０で区切られた部位ごとに断続して生じることになるので、母基板１の各辺の全長にわたって一方向に大きな応力が作用することはなく母基板１の反りを防止することが可能となる。   With this configuration, even if a stress is generated between the outer peripheral metallized layer 8 and the mother substrate 1 due to a difference in shrinkage rate during firing, the stress is intermittent for each part delimited by each non-forming portion 10. Therefore, a large stress does not act in one direction over the entire length of each side of the mother board 1, and it is possible to prevent the mother board 1 from warping.

これにより、各配線基板領域３を個片状に分割する際にクラックやバリが発生することを防止できる。また、母基板１を分割しない状態で半導体素子等の電子部品を実装する際に、搭載精度の悪化を防止して実装不良を防止することができる。   As a result, it is possible to prevent cracks and burrs from occurring when the respective wiring board regions 3 are divided into individual pieces. In addition, when mounting electronic components such as semiconductor elements without dividing the mother board 1, mounting accuracy can be prevented from being deteriorated and mounting defects can be prevented.

この場合、非形成部１０は、母基板１の各辺における中央部に設けることが好ましい。各辺部の中央部に非形成部１０を設けると、各辺部において、辺の全長にわたって一方向に応力が集中することをより効果的に防止することができ、母基板１に反り等の変形が生じることをより一層確実に防止することができる。また、めっき用の電流は、上述のように、配線基板領域３の並びの角部において大きくなるため、角部に非形成部１０を設けると、めっき厚みのばらつきを効果的に防止することが難しくなるおそれがある。   In this case, the non-forming part 10 is preferably provided at the central part of each side of the mother board 1. When the non-forming portion 10 is provided in the central portion of each side portion, it is possible to more effectively prevent stress from being concentrated in one direction over the entire length of each side, and warping or the like on the mother substrate 1 can be prevented. It is possible to more reliably prevent the deformation from occurring. Further, as described above, the plating current is increased at the corners of the wiring substrate regions 3 arranged. Therefore, if the non-forming portion 10 is provided at the corner, it is possible to effectively prevent variations in the plating thickness. May be difficult.

また、本発明の多数個取り配線基板は、非形成部１０は、その長さが非形成部１０に隣接する配線基板領域３の外周メタライズ層８に沿った方向の長さ以上である。 Also, multiple patterning wiring board of the present invention, the non-formation portion 10, Ru der direction than the length along the outer peripheral metallized layer 8 of the wiring substrate region 3 whose length is adjacent to the non-formation portion 10.

これにより、非形成部１０の長さを十分に確保し、応力をより一層確実に断続した不連続なものとすることができるため、より効果的に外周メタライズ層８と母基板１との焼成時の磁器収縮の違いによる母基板１の反りを防止することが可能となる。   Thereby, since the length of the non-forming part 10 can be sufficiently secured and the stress can be made more discontinuous and intermittent, the outer peripheral metallized layer 8 and the mother substrate 1 can be fired more effectively. It is possible to prevent warping of the mother board 1 due to the difference in porcelain contraction at the time.

この場合、非形成部１０の長さが、母基板１の各辺の長さに対して３０％を超えると、めっき厚みのばらつきを防止する効果が不十分になる。従って、非形成部１０の長さは、隣接する配線基板領域３の長さ以上で、かつ母基板１の各辺の長さの３０％以下とすることがより一層好ましい。また、非形成部１０は、図１の例では各辺に１箇所ずつ設けているが、各辺に複数個設けてもよい。 In this case, if the length of the non-formed portion 10 exceeds 30% with respect to the length of each side of the mother substrate 1, the effect of preventing variation in the plating thickness becomes insufficient. Therefore, the length of the non-formed portion 10 is more preferably set to be not less than the length of the adjacent wiring board region 3 and not more than 30% of the length of each side of the mother board 1 . In addition, in the example of FIG. 1, one non-forming portion 10 is provided on each side, but a plurality of non-forming portions 10 may be provided on each side.

また、本発明の多数個取り配線基板は、外周メタライズ層８は、母基板１の少なくとも一対の対向する各辺部において、非形成部１０の両側から母基板１の外周端部にかけて延出するめっき導通用パターン４がそれぞれ形成されていることが好ましい。   Further, in the multi-piece wiring board of the present invention, the outer peripheral metallized layer 8 extends from both sides of the non-formed part 10 to the outer peripheral end of the mother board 1 in each of at least a pair of opposing sides of the mother board 1. It is preferable that the plating conduction patterns 4 are respectively formed.

このめっき導通用パターン４は、外周メタライズ層８を介してそれぞれ配線基板領域３の配線導体に電気的に接続されている。   The plating conduction pattern 4 is electrically connected to the wiring conductor of the wiring board region 3 through the outer peripheral metallized layer 8.

この構成により、母基板１の一対の対向する各辺部に形成された各めっき導通用パターン４を、めっき用治具（ラック）に設けられた導通用端子で上下から挟み込むことにより、めっき導通用パターン４と導通用端子との電気的な接続を容易かつ確実なものとすることができ、より確実に配線導体にめっき用の電流を供給し、均一な厚みのめっき層をより確実に配線導体に形成することができる。   With this configuration, the plating conduction patterns 4 formed on the pair of opposing sides of the mother board 1 are sandwiched from above and below by the conduction terminals provided on the plating jig (rack), so that the plating conduction is performed. The electrical connection between the common pattern 4 and the conduction terminal can be made easy and reliable, and the current for plating is supplied to the wiring conductor more reliably, and the plating layer of uniform thickness is more reliably wired. It can be formed on a conductor.

めっき導通用パターン４にラックの導通用端子の金属ピンを嵌め込で接触させ、めっき液中で導通用端子からめっき導通用パターン４を介して各配線基板領域３の配線導体にめっき被着用の電流を供給することにより、めっき液中の金属成分（ニッケル、金等）が析出し、配線導体にめっきが施される。   The metal pin of the rack conduction terminal is fitted and brought into contact with the plating conduction pattern 4, and plating is applied to the wiring conductor in each wiring board region 3 from the conduction terminal via the plating conduction pattern 4 in the plating solution. By supplying an electric current, metal components (nickel, gold, etc.) in the plating solution are deposited, and the wiring conductor is plated.

また、本発明の多数個取り配線基板は、その主面の配線基板領域３の各行間または各列間に、一対の対向する各辺部の外周メタライズ層８同士を接続する接続用メタライズ層２が形成されており、各配線基板領域３の配線導体は、接続用メタライズ層２に電気的に接続されていることが好ましい。   In addition, the multi-piece wiring board of the present invention has a metallization layer 2 for connection that connects a pair of outer peripheral metallization layers 8 on each side between the rows or columns of the wiring board region 3 on the main surface. It is preferable that the wiring conductor of each wiring board region 3 is electrically connected to the connection metallization layer 2.

この構成により、全ての配線基板領域３に形成された配線導体（図示せず）と、母基板１の主面に形成された引き回し配線導体としての外周メタライズ層８と接続用メタライズ層２とを配線基板領域３を介すことなく、直接電気導通を取ることができることから、
各配線導体３に流れる電流もより一層均一になり、広面積の母基板１の縦横に複数配列形成した配線基板領域３の主面の配線導体に被着されるめっき層の厚みをより均一で安定したものとすることができる。 With this configuration, the wiring conductor (not shown) formed in all the wiring board regions 3, the outer peripheral metallization layer 8 as the lead wiring conductor formed on the main surface of the mother board 1, and the connection metallization layer 2 are provided. Since direct electrical conduction can be achieved without going through the wiring board region 3,
The current flowing through each wiring conductor 3 is also made more uniform, and the thickness of the plating layer deposited on the wiring conductor in the main surface of the wiring board region 3 formed in a plurality of rows and columns of the large-sized mother board 1 is made more uniform. It can be stable.

接続用メタライズ層２は、図１に示したようにすべての列間（または行間）に形成する必要はなく、配線基板領域３の外形寸法や個数等に応じて、適宜、接続用メタライズ層２が形成されない列や行を設けてもよい。ただし、接続用メタライズ層２の間の間隔は等間隔にしておくことが、電流の均等な供給の上では好ましい。   The connection metallization layer 2 does not have to be formed between all the columns (or between the rows) as shown in FIG. 1, and the connection metallization layer 2 is appropriately selected according to the external dimensions and number of wiring board regions 3. Columns or rows in which no can be formed may be provided. However, it is preferable that the intervals between the connection metallization layers 2 be equal to each other in terms of uniform supply of current.

なお、接続用メタライズ層２およびめっき導通用パターン４は、配線導体を形成するのと同様の金属ペーストを、グリーンシートの外周の捨て代領域７の主面や、辺部に予め形成しておいた切り欠き部６の内面に印刷しておくこと等により形成される。   Note that the metallization layer 2 for connection and the pattern 4 for plating conduction are formed in advance on the main surface and sides of the disposal margin region 7 on the outer periphery of the green sheet by using the same metal paste as that for forming the wiring conductor. It is formed, for example, by printing on the inner surface of the cutout portion 6.

この場合、外周メタライズ層８や接続用メタライズ層２，めっき導通用パターン４は、例えば、厚みを１０〜３０μｍとすることが、電気特性や多数個取り配線基板の生産性、焼成時の反りの効果的な防止等のうえで好ましい。   In this case, the outer peripheral metallization layer 8, the connection metallization layer 2, and the plating conduction pattern 4, for example, have a thickness of 10 to 30 μm. It is preferable in terms of effective prevention.

以上の結果、本発明によれば、電気的な接続信頼性に優れた配線基板を作製可能な多数個取り配線基板を提供することができる。   As a result, according to the present invention, it is possible to provide a multi-piece wiring board capable of producing a wiring board excellent in electrical connection reliability.

なお、本発明は以上の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更を加えても何ら差し支えない。例えば、この例では５行×１０列の５０個の配線基板領域３で構成された母基板１としたが、その他の配列個数の母基板で構成してもよいのは言うまでもない。   It should be noted that the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the present invention. For example, in this example, the mother board 1 is constituted by 50 wiring board regions 3 of 5 rows × 10 columns. However, it goes without saying that the mother board 1 may be constituted by other arrangement numbers of mother boards.

本発明の多数個取り配線基板の実施の形態の一例を示す平面図であるIt is a top view which shows an example of embodiment of the multi-cavity wiring board of this invention. 従来の多数個取り配線基板の平面図であるIt is a top view of the conventional multi-piece wiring board.

符号の説明Explanation of symbols

１・・・母基板
２・・・接続用メタライズ層
３・・・配線基板領域
４・・・めっき導通用パターン
７・・・捨て代領域
８・・・外周メタライズ層
１０・・非形成部 DESCRIPTION OF SYMBOLS 1 ... Mother board | substrate 2 ... Connection metallization layer 3 ... Wiring board area | region 4 ... Plating conduction | electrical_connection pattern 7 ... Discard allowance area | region 8 ... Outer periphery metallization layer 10 .... non-formation part

Claims (3)

主面の中央部に配線基板領域が縦横に配列形成されるとともに、外周部に捨て代領域が形成された四角形状の母基板と、前記各配線基板領域に形成された配線導体と、前記捨て代領域の主面に、前記配線基板領域を取り囲むようにして形成された外周メタライズ層とを具備しており、該外周メタライズ層は、前記母基板の各辺の中央部において不連続となるように非形成部を有していて、該非形成部は、その長さが該非形成部に隣接する前記配線基板領域の前記外周メタライズ層に沿った方向の長さ以上であることを特徴とする多数個取り配線基板。 A wiring board region is formed in the central portion of the main surface in vertical and horizontal directions, and a rectangular mother board in which a margin area is formed on the outer periphery, wiring conductors formed in each wiring board region, and the discarding An outer peripheral metallization layer formed so as to surround the wiring substrate region is provided on the main surface of the substitute region, and the outer peripheral metallization layer is discontinuous at the center of each side of the mother substrate. have have a non-forming portion, the non-forming portion, the length and wherein the outer peripheral metallized layer der Rukoto direction or length along the wiring substrate region adjacent to the non-formation portion Multi-piece wiring board. 前記外周メタライズ層は、前記母基板の少なくとも一対の対向する各辺部において、前記非形成部の両側から前記母基板の外周端部にかけて延出するめっき導通用パターンがそれぞれ形成されていることを特徴とする請求項１記載の多数個取り配線基板。 The outer peripheral metallized layer is formed with a plating conduction pattern extending from both sides of the non-formed portion to the outer peripheral end of the mother substrate at each of at least a pair of opposing sides of the mother substrate. multiple patterning wiring board according to claim 1 Symbol mounting features. 前記母基板は、その主面の前記配線基板領域の各行間または各列間に、前記一対の対向する各辺部の前記外周メタライズ層同士を接続する接続用メタライズ層が形成されており、前記各配線基板領域の前記配線導体は、前記接続用メタライズ層に電気的に接続されていることを特徴とする請求項２記載の多数個取り配線基板。 In the mother board, a connection metallization layer that connects the outer peripheral metallization layers of each of the pair of opposing sides is formed between each row or each column of the wiring board region of the main surface, 3. The multi-piece wiring board according to claim 2 , wherein the wiring conductor in each wiring board region is electrically connected to the connection metallization layer.
JP2004048235A 2004-02-24 2004-02-24 Multiple wiring board Expired - Fee Related JP4484543B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004048235A JP4484543B2 (en) 2004-02-24 2004-02-24 Multiple wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004048235A JP4484543B2 (en) 2004-02-24 2004-02-24 Multiple wiring board

Publications (2)

Publication Number Publication Date
JP2005243712A JP2005243712A (en) 2005-09-08
JP4484543B2 true JP4484543B2 (en) 2010-06-16

Family

ID=35025157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004048235A Expired - Fee Related JP4484543B2 (en) 2004-02-24 2004-02-24 Multiple wiring board

Country Status (1)

Country Link
JP (1) JP4484543B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017096855A (en) * 2015-11-26 2017-06-01 日立オートモティブシステムズ株式会社 Physical quantity detection device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5247376B2 (en) * 2008-11-26 2013-07-24 京セラ株式会社 Multi-wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017096855A (en) * 2015-11-26 2017-06-01 日立オートモティブシステムズ株式会社 Physical quantity detection device

Also Published As

Publication number Publication date
JP2005243712A (en) 2005-09-08

Similar Documents

Publication Publication Date Title
JP2004103811A (en) Multiple arrangement wiring board
KR101458481B1 (en) Multi-part wired substrate, wired substrate, and electronic device
JP5383407B2 (en) Multi-wiring board
JP3404375B2 (en) Multi-cavity wiring board
JP4484543B2 (en) Multiple wiring board
JP4605945B2 (en) Multi-circuit board and method for manufacturing electronic device
JP3472492B2 (en) Multi-cavity wiring board
JP4272550B2 (en) Multiple wiring board
JP6258677B2 (en) Multi-cavity wiring board, wiring board and electronic device
JP4272560B2 (en) Multiple wiring board
JP4566046B2 (en) Multiple wiring board
JP5546352B2 (en) Multiple wiring board
JP4535893B2 (en) Multiple wiring board
JP4721926B2 (en) Multiple wiring board
JP4606303B2 (en) Multi-circuit board and method for manufacturing electronic device
JP4272506B2 (en) Multiple wiring board
JP4458933B2 (en) Multiple wiring board
JP2006128297A (en) Multiple wiring board and electronic device
JP4557786B2 (en) Multiple wiring board
JP2006128409A (en) Multiple patterning wiring substrate and electronic device
JP2005285866A (en) Multiple wiring board
JP2005159083A (en) Multipiece wiring board
JP4749165B2 (en) Multi-wiring board
JP4594253B2 (en) Multiple wiring board
JP2005277073A (en) Multipiece wiring board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070119

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20091117

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091222

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100223

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100323

R150 Certificate of patent or registration of utility model

Ref document number: 4484543

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130402

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130402

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140402

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees