JP4180352B2 - Lead frame for pre-mold package and method for manufacturing pre-mold package - Google Patents

Lead frame for pre-mold package and method for manufacturing pre-mold package Download PDF

Info

Publication number
JP4180352B2
JP4180352B2 JP2002332245A JP2002332245A JP4180352B2 JP 4180352 B2 JP4180352 B2 JP 4180352B2 JP 2002332245 A JP2002332245 A JP 2002332245A JP 2002332245 A JP2002332245 A JP 2002332245A JP 4180352 B2 JP4180352 B2 JP 4180352B2
Authority
JP
Japan
Prior art keywords
lead frame
package
die pad
inner lead
mirror
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002332245A
Other languages
Japanese (ja)
Other versions
JP2004165567A (en
Inventor
義泰 伊東
努 入江
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui High Tech Inc
Original Assignee
Mitsui High Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui High Tech Inc filed Critical Mitsui High Tech Inc
Priority to JP2002332245A priority Critical patent/JP4180352B2/en
Publication of JP2004165567A publication Critical patent/JP2004165567A/en
Application granted granted Critical
Publication of JP4180352B2 publication Critical patent/JP4180352B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体素子(ダイ)を封入するプリモールドパッケージ用リードフレーム及びプリモールドパッケージの製造方法に関する。
【0002】
【従来の技術】
従来、リードフレームと封止樹脂の密着性を向上させる方法として、例えば特許文献1に記載されているように、リードフレームの樹脂封止部分を化学エッチングにより粗面化処理を施し、リードフレームの表面を凹凸にすることが知られている。粗面化処理は通常、リードフレームの樹脂封止領域内のみに限られず、リードフレームの全面に施す場合も多い。特に近年のようにICのパッケージサイズが小型化するほどリードフレームと樹脂との密着性の向上を図ることが困難となってきているため、リードフレームの粗面化処理が注目されている。
ところが、粗面化処理をリードフレーム全面に施すと、樹脂との密着性は向上する一方で、完成樹脂成形体の半分程度を予め封止樹脂で成形する例えば特許文献2に示すような所謂プリモールドパッケージにおいては、プリモールドによる樹脂封止の際に樹脂封止領域外(ダイパッドやインナーリード部先端領域の表面)に樹脂バリが発生する。この付着した樹脂バリは例えば特許文献3に記載されているような方法によって除去している。
【0003】
【特許文献1】
特開平8−46116号公報(第3頁)
【特許文献2】
特開平6−69366号公報(図1)
【特許文献3】
特開平4−96238号公報(第3頁、第1図)
【0004】
【発明が解決しようとする課題】
しかしながら、粗面化処理が施されたリードフレームの場合、樹脂との密着性が特に高いため、特許文献3に記載の方法による技術を適用しても、樹脂バリが容易に除去できないという問題が発生している。
この問題の対策として、例えばリードフレームの粗面化処理の際に非樹脂封止領域を予めマスキングし、粗面化を防ぐことも可能ではあるが、非樹脂封止領域が狭い範囲であるため、正確なマスキングが困難であり、また、マスキングによる作業性、生産性の低下を招くという問題が新たに発生する。
本発明はかかる事情に鑑みてなされたもので、リードフレームと樹脂との密着性は確保でき、かつ樹脂封止される以外の部分に樹脂が付着しても、その除去が容易なプリモールドパッケージ用リードフレーム及びプリモールドパッケージの製造方法を提供することを目的とする。
【0005】
【課題を解決するための手段】
【0006】
前記目的に沿うの発明に係るプリモールドパッケージ用リードフレームの製造方法は、導電性材料を基材とし、所望の形状にパターニングされたプリモールドパッケージ用リードフレームの製造方法において、リードフレームの全面に粗面化処理を施す工程と、ダイパッド及びインナーリード部の領域をプレス加工によって押し曲げる工程とを有し、前記押し曲げる工程の際又はその直後に、使用にあってはパッケージ内に露出する前記ダイパッド及びインナーリード部の表面を、前記ダイパッド及びインナーリード部に当接する面が予め鏡面処理されたパンチ又はダイを用いて、鏡面加工している。
【0007】
【0008】
【0009】
の発明に係るプリモールドパッケージの製造方法は、導電性材料を基材とし、所望の形状にパターニングされたリードフレームを用いたプリモールドパッケージの製造方法において、リードフレームの全面に粗面化処理を施す工程と、ダイパッド及びインナーリード部の領域をプレス加工によって押し曲げる工程とを有し、前記押し曲げる工程の際又はその直後に、パッケージ内に露出する前記ダイパッド及びインナーリード部の表面を、前記ダイパッド及びインナーリード部に当接する面が予め鏡面処理されたパンチ又はダイを用いて、鏡面加工している。
【0010】
第1、第2の発明においては、ダイパッド(素子搭載部)及びその周囲に配置されるインナーリード部の表面が鏡面加工されている。これによって、仮にこのリードフレームのプリモールドの過程において、樹脂バリがインナーリード部やダイパッドの表面に付着しても、これらの表面が鏡面加工されているので、樹脂との接合力が弱く、容易に剥離できる。
【0011】
【発明の実施の形態】
続いて、添付した図面を参照しつつ、本発明を具体化した実施の形態につき説明し、本発明の理解に供する。
ここに、図1は本発明の一実施の形態に係るプリモールドパッケージ用リードフレームの製造工程を示す断面図、図2(A)〜(D)は本発明の一実施の形態に係るプリモールドパッケージの製造方法を示す工程図である。
【0012】
導電性材料の一例である銅又は銅合金を基材とする薄い条材から、スタンピング加工(即ち、プレス加工)又はエッチング加工によって所望の形状にパターニングされたリードフレーム10を製造する。このリードフレーム10(図1参照、特許文献1の図1参照)は中央にダイパッド11を、その周囲にリード12を有し、リード12の内側先部にはインナーリード部13が形成されている。
このリードフレーム10の表面に化学エッチング(特許文献1の実施の形態参照)やブラスト処理を行って、リードフレーム10の全面に粗面化処理を施す。
【0013】
次に、図1に示すように、リードフレーム10を金型(プレス加工装置)に入れてダイパッド11及びインナーリード部13の押し曲げ加工を施す。この際、曲げ加工のためのダイ(固定状態の金型ダイ)14の底面部15を鏡面仕上げ(鏡面処理)にしておくことで、押し曲げ加工されたダイパッド11及びインナーリード部13の表面が鏡面状となる。なお、ダイ14の底面部15の鏡面加工は電解研磨、バフ研磨等の周知の方法が用いられる。また、図1において16はパンチ(移動可能な金型)を示す。以上の工程によって完成したリードフレーム10が製造される。なお、リードフレームによっては、パンチの面が予め鏡面処理されている場合もある。また、ダイパッド11及びインナーリード部13の鏡面加工は、押し曲げる工程の直後に(即ち、押し曲げ加工とは別に)、行ってもよい。
【0014】
次に、この製造されたリードフレーム10を用いてプリモールドパッケージ型半導体装置17を製造する方法を図2(A)〜(D)を参照しながら説明する。
まず、押し曲げ加工されたリードフレーム10を樹脂封止金型に入れて、封止樹脂を注入し図2(A)に示すような樹脂封止を行い、パッケージ(モールド枠)18にリードフレーム10を固定する。この場合、鏡面加工されたダイパッド11及びインナーリード部13の表面はパッケージ18内に露出させているが、鏡面加工は、インナーリード部13が封止樹脂19の内部に多少(1mm以内)食い込む部分まで行うのが好ましい。この理由は、仮にパッケージ18内の一部(特に周囲)に鏡面加工されない部分が残ると、その部分に樹脂が付着して不用な樹脂の除去が困難となるからである。
【0015】
この後、ダイパッド11及びインナーリード部13上に付着した樹脂を、酸洗やウォータージェットにより除去する。ダイパッド11及びインナーリード部13の表面が鏡面となっているので、樹脂の付着力が弱く容易に付着した樹脂の除去ができる。
次に、図2(B)に示すように、パッケージ18より露出するダイパッド11及びインナーリード部13の表面にニッケル下地めっきを行い、更にその上に薄い金めっきを施す。なお、パッケージ18から外部に露出するアウターリード部20に同一のめっきを行ってもよい。これによって一応プリモールドパッケージ本体21は完成する。なお、このプリモールドパッケージ本体21と蓋22とでプリモールドパッケージとなる。また、図2において21aはニッケルと金のめっき層を示す。
【0016】
以上の方法によって製造されたプリモールドパッケージ本体21内のダイパッド11上に、図2(C)に示すように、ICチップ23等を接着ペースト等により固着載置させる。そして、このICチップ23とインナーリード部13とをボンディングワイヤ24で接続し、プリモールドパッケージ本体21の上に蓋22を被せて、プリモールドパッケージ型半導体装置17が完成する。なお、図2(D)において25は中空部を示す。
【0017】
前記実施の形態においては、単独のプリモールドパッケージ用リードフレームを用いて一つのプリモールドパッケージ型半導体装置を製造する場合について説明したが、複数のプリモールドパッケージ用リードフレームを基材に所定間隔で格子状又は直線状に形成し、同時に複数のプリモールドパッケージ型半導体装置を製造する場合についても当然適用できる。
また、前記実施の形態においては、図1に示すように、ダイ14を下にパンチ16を上にし、パンチ16を押し下げてリードフレーム10の押し曲げ加工を行っているが、ダイ(即ち、固定金型)を上にしパンチ(即ち、移動金型)を下にし、パンチを押し上げてリードフレーム10の押し曲げ加工を行う場合にも本発明は適用される。
【0018】
【発明の効果】
本発明に係るプリモールドパッケージ用リードフレーム及びプリモールドパッケージの製造方法は、以上の説明からも明らかなように、ダイパッド及びインナーリード部の表面が鏡面となるように形成されているので、樹脂が付着しても容易に除去することができる。
そして、リードフレームのダイパッド及びインナーリード部の鏡面状となっている以外の部分は粗面化されているので、封止樹脂との密着性が向上する。
【図面の簡単な説明】
【図1】本発明の一実施の形態に係るプリモールドパッケージ用リードフレームの製造工程を示す断面図である。
【図2】(A)〜(D)は、本発明の一実施の形態に係るプリモールドパッケージの製造方法を示す工程図である。
【符号の説明】
10:リードフレーム、11:ダイパッド、12:リード、13:インナーリード部、14:ダイ、15:底面部、16:パンチ、17:プリモールドパッケージ型半導体装置、18:パッケージ、19:封止樹脂、20:アウターリード部、21:プリモールドパッケージ本体、21a:めっき層、22:蓋、23:ICチップ、24:ボンディングワイヤ、25:中空部
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a lead frame for a premold package enclosing a semiconductor element (die) and a method for manufacturing the premold package.
[0002]
[Prior art]
Conventionally, as a method for improving the adhesion between the lead frame and the sealing resin, for example, as described in Patent Document 1, the resin sealing portion of the lead frame is subjected to a roughening process by chemical etching, and the lead frame It is known to make the surface uneven. The roughening treatment is usually not limited to the resin sealing region of the lead frame, and is often performed on the entire surface of the lead frame. In particular, as the IC package size becomes smaller as in recent years, it has become difficult to improve the adhesion between the lead frame and the resin.
However, when the roughening treatment is applied to the entire surface of the lead frame, the adhesion to the resin is improved, while about half of the finished resin molded body is molded in advance with a sealing resin. In the mold package, a resin burr is generated outside the resin sealing region (the surface of the die pad or the tip region of the inner lead portion) during resin sealing by pre-molding. The adhered resin burrs are removed by a method as described in Patent Document 3, for example.
[0003]
[Patent Document 1]
JP-A-8-46116 (page 3)
[Patent Document 2]
JP-A-6-69366 (FIG. 1)
[Patent Document 3]
Japanese Unexamined Patent Publication No. 4-96238 (page 3, FIG. 1)
[0004]
[Problems to be solved by the invention]
However, in the case of a lead frame that has been subjected to a surface roughening treatment, the adhesiveness to the resin is particularly high, and therefore there is a problem that even if the technique according to the method described in Patent Document 3 is applied, the resin burr cannot be removed easily. It has occurred.
As a countermeasure for this problem, for example, it is possible to mask the non-resin sealing region in advance during the roughening process of the lead frame to prevent the roughening, but the non-resin sealing region is a narrow range. Therefore, there arises a new problem that accurate masking is difficult, and workability and productivity are reduced due to masking.
The present invention has been made in view of such circumstances, and it is possible to ensure adhesion between the lead frame and the resin, and even if the resin adheres to a portion other than the resin-sealed portion, the premold package can be easily removed. It is an object of the present invention to provide a manufacturing method for a lead frame and a pre-mold package.
[0005]
[Means for Solving the Problems]
[0006]
According to a first aspect of the present invention, there is provided a method for manufacturing a lead frame for a pre-mold package, wherein the lead frame for a pre-mold package is made of a conductive material and patterned into a desired shape. It has a step of roughening the entire surface and a step of pressing and bending the die pad and inner lead area by pressing, and is exposed in the package during use or immediately after the pressing and bending step. The surfaces of the die pad and the inner lead part to be processed are mirror-finished using a punch or die whose surface abutting against the die pad and the inner lead part is mirror-finished in advance .
[0007]
[0008]
[0009]
According to a second aspect of the present invention, there is provided a pre-mold package manufacturing method comprising: a pre-mold package using a conductive material as a base material and patterned into a desired shape; And a step of pressing and bending the region of the die pad and the inner lead portion by press working, and the surface of the die pad and the inner lead portion exposed in the package at or immediately after the pressing and bending step. , by using the die pad and the punch or die abutting surface is previously mirror-processed inner lead portion are mirror finished.
[0010]
In the first and second inventions, the surface of the die pad (element mounting portion) and the inner lead portion disposed around the die pad is mirror-finished. As a result, even if a resin burr adheres to the inner lead portion or the surface of the die pad during the pre-molding process of the lead frame, the surface is mirror-finished, so the bonding force with the resin is weak and easy Can be peeled off.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the accompanying drawings for understanding of the present invention.
FIG. 1 is a sectional view showing a manufacturing process of a lead frame for a premold package according to an embodiment of the present invention, and FIGS. 2A to 2D are premolds according to an embodiment of the present invention. It is process drawing which shows the manufacturing method of a package.
[0012]
A lead frame 10 that is patterned into a desired shape by stamping (ie, pressing) or etching is manufactured from a thin strip based on copper or copper alloy, which is an example of a conductive material. The lead frame 10 (see FIG. 1, see FIG. 1 of Patent Document 1) has a die pad 11 at the center and leads 12 around it, and an inner lead portion 13 is formed at the inner front portion of the lead 12. .
The surface of the lead frame 10 is subjected to chemical etching (see the embodiment of Patent Document 1) and blasting, and the entire surface of the lead frame 10 is roughened.
[0013]
Next, as shown in FIG. 1, the lead frame 10 is put into a mold (press processing apparatus), and the die pad 11 and the inner lead portion 13 are subjected to a press bending process. At this time, the surface of the die pad 11 and the inner lead portion 13 that has been subjected to the push-bending process can be obtained by making the bottom surface portion 15 of the die (fixed mold die) 14 for bending into a mirror finish (mirror surface treatment). It becomes mirror-like. The mirror processing of the bottom surface portion 15 of the die 14 uses a known method such as electrolytic polishing or buffing. In FIG. 1, reference numeral 16 denotes a punch (movable mold). The completed lead frame 10 is manufactured through the above steps. Depending on the lead frame, the punch surface may be mirror-finished in advance. Moreover, you may perform the mirror surface process of the die pad 11 and the inner lead part 13 immediately after the process of pushing and bending (namely, apart from pushing bending process).
[0014]
Next, a method of manufacturing the premold package type semiconductor device 17 using the manufactured lead frame 10 will be described with reference to FIGS.
First, the lead frame 10 subjected to the push-bending process is put into a resin-sealing mold, a sealing resin is injected, and resin sealing as shown in FIG. 2A is performed, and the lead frame is mounted on the package (mold frame) 18. 10 is fixed. In this case, the mirror-finished surface of the die pad 11 and the inner lead part 13 is exposed in the package 18, but the mirror-finishing is a part where the inner lead part 13 bites into the sealing resin 19 (within 1 mm). Is preferably performed. This is because if a part that is not mirror-finished remains in a part (particularly the periphery) of the package 18, the resin adheres to the part and it becomes difficult to remove unnecessary resin.
[0015]
Thereafter, the resin adhering to the die pad 11 and the inner lead portion 13 is removed by pickling or water jet. Since the surface of the die pad 11 and the inner lead part 13 is a mirror surface, the adhesive force of the resin is weak and the attached resin can be easily removed.
Next, as shown in FIG. 2B, nickel base plating is performed on the surfaces of the die pad 11 and the inner lead portion 13 exposed from the package 18, and then a thin gold plating is applied thereon. The same plating may be performed on the outer lead portion 20 exposed from the package 18 to the outside. As a result, the pre-mold package body 21 is completed. The premold package body 21 and the lid 22 form a premold package. In FIG. 2, reference numeral 21a denotes a nickel and gold plating layer.
[0016]
As shown in FIG. 2C, an IC chip 23 or the like is fixedly mounted on the die pad 11 in the pre-mold package body 21 manufactured by the above method with an adhesive paste or the like. Then, the IC chip 23 and the inner lead portion 13 are connected by the bonding wire 24, and the lid 22 is put on the premold package main body 21, so that the premold package type semiconductor device 17 is completed. In FIG. 2D, reference numeral 25 denotes a hollow portion.
[0017]
In the above-described embodiment, the case where one premold package type semiconductor device is manufactured using a single premold package lead frame has been described. Naturally, the present invention can also be applied to a case where a plurality of pre-mold package type semiconductor devices are manufactured at the same time in the form of a lattice or a line.
In the above embodiment, as shown in FIG. 1, the lead frame 10 is pushed and bent by pressing the die 16 downward and the punch 16 upward and pressing the punch 16 down. The present invention is also applied to the case where the lead frame 10 is pushed and bent by pressing the punch (that is, the moving mold) downward and pushing the punch upward.
[0018]
【The invention's effect】
As is apparent from the above description, the premold package lead frame and the premold package manufacturing method according to the present invention are formed so that the surfaces of the die pad and the inner lead portion are mirror surfaces. Even if it adheres, it can be easily removed.
Since the portions other than the die pad of the lead frame and the mirror-like shape of the inner lead portion are roughened, the adhesion with the sealing resin is improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a manufacturing process of a lead frame for a premold package according to an embodiment of the present invention.
FIGS. 2A to 2D are process diagrams illustrating a method for manufacturing a pre-mold package according to an embodiment of the present invention. FIGS.
[Explanation of symbols]
10: lead frame, 11: die pad, 12: lead, 13: inner lead portion, 14: die, 15: bottom surface portion, 16: punch, 17: premold package type semiconductor device, 18: package, 19: sealing resin , 20: outer lead portion, 21: pre-molded package body, 21a: plating layer, 22: lid, 23: IC chip, 24: bonding wire, 25: hollow portion

Claims (2)

導電性材料を基材とし、所望の形状にパターニングされたプリモールドパッケージ用リードフレームの製造方法において、
リードフレームの全面に粗面化処理を施す工程と、
ダイパッド及びインナーリード部の領域をプレス加工によって押し曲げる工程とを有し、
前記押し曲げる工程の際又はその直後に、使用にあってはパッケージ内に露出する前記ダイパッド及びインナーリード部の表面を、前記ダイパッド及びインナーリード部に当接する面が予め鏡面処理されたパンチ又はダイを用いて、鏡面加工することを特徴とするプリモールドパッケージ用リードフレームの製造方法。
In a method for manufacturing a lead frame for a pre-mold package, which is made of a conductive material as a base material and patterned into a desired shape,
A process of roughening the entire surface of the lead frame;
A process of pressing and bending the area of the die pad and the inner lead part by press working,
In use or immediately after the step of bending, the surface of the die pad and inner lead part exposed in the package is used for punch or die whose surface abutting against the die pad and inner lead part is mirror- finished in advance. A method for manufacturing a lead frame for a pre-mold package, characterized in that a mirror finish is used .
導電性材料を基材とし、所望の形状にパターニングされたリードフレームを用いたプリモールドパッケージの製造方法において、
リードフレームの全面に粗面化処理を施す工程と、
ダイパッド及びインナーリード部の領域をプレス加工によって押し曲げる工程とを有し、
前記押し曲げる工程の際又はその直後に、パッケージ内に露出する前記ダイパッド及びインナーリード部の表面を、前記ダイパッド及びインナーリード部に当接する面が予め鏡面処理されたパンチ又はダイを用いて、鏡面加工することを特徴とするプリモールドパッケージの製造方法。
In a method for manufacturing a pre-mold package using a lead frame that has a conductive material as a base material and is patterned into a desired shape,
A process of roughening the entire surface of the lead frame;
A process of pressing and bending the area of the die pad and the inner lead part by press working,
The surface of the die pad and inner lead part exposed in the package during or after the pushing and bending step is mirror-finished using a punch or die whose surface abutting against the die pad and inner lead part is previously mirror- finished. method for producing a pre-molded package which is characterized in that machining.
JP2002332245A 2002-11-15 2002-11-15 Lead frame for pre-mold package and method for manufacturing pre-mold package Expired - Fee Related JP4180352B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002332245A JP4180352B2 (en) 2002-11-15 2002-11-15 Lead frame for pre-mold package and method for manufacturing pre-mold package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002332245A JP4180352B2 (en) 2002-11-15 2002-11-15 Lead frame for pre-mold package and method for manufacturing pre-mold package

Publications (2)

Publication Number Publication Date
JP2004165567A JP2004165567A (en) 2004-06-10
JP4180352B2 true JP4180352B2 (en) 2008-11-12

Family

ID=32809378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002332245A Expired - Fee Related JP4180352B2 (en) 2002-11-15 2002-11-15 Lead frame for pre-mold package and method for manufacturing pre-mold package

Country Status (1)

Country Link
JP (1) JP4180352B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004058815A1 (en) * 2004-12-07 2006-06-08 Robert Bosch Gmbh Chip module and method for its production
JP4783647B2 (en) * 2006-02-27 2011-09-28 パナソニック株式会社 Semiconductor device using package parts for semiconductor device
TW201250964A (en) * 2011-01-27 2012-12-16 Dainippon Printing Co Ltd Resin-attached lead frame, method for manufacturing same, and lead frame
US10698005B2 (en) * 2017-04-20 2020-06-30 Asahi Kasei Microdevices Corporation Magnetic detection device, current detection device, method for manufacturing magnetic detection device, and method for manufacturing current detection device

Also Published As

Publication number Publication date
JP2004165567A (en) 2004-06-10

Similar Documents

Publication Publication Date Title
JP3169919B2 (en) Ball grid array type semiconductor device and method of manufacturing the same
JPS6396947A (en) Lead frame semiconductor device
JP2006319109A (en) Lead frame for semiconductor device, package for semiconductor device and using same lead frame, and manufacturing method of same package
US8114713B2 (en) Method of manufacturing a lead frame with a nickel coating
JP4892033B2 (en) Lead frame manufacturing method
JP4180352B2 (en) Lead frame for pre-mold package and method for manufacturing pre-mold package
JP2009099871A (en) Lead frame and manufacturing method thereof, and resin-sealed semiconductor device and manufacturing method thereof
JP4418764B2 (en) Manufacturing method of resin-encapsulated semiconductor package
JPH10116846A (en) Method for manufacturing resin-encapsulated semiconductor device and mold
JP5299411B2 (en) Lead frame manufacturing method
JPH05102364A (en) Manufacture of lead frame for electronic component
JP4243178B2 (en) Manufacturing method of semiconductor device
JPH08172153A (en) Method of lead forming for semiconductor device and metal mold therefor
JPH0574999A (en) Semiconductor device and its manufacture
JP3583403B2 (en) LOC lead frame and method of manufacturing the same
JP2018081967A (en) Semiconductor device and manufacturing method of the same
JP3569642B2 (en) Semiconductor device carrier substrate, method of manufacturing the same, and method of manufacturing a semiconductor device
JP3340305B2 (en) Semiconductor device manufacturing method and dummy semiconductor device
JP2582683B2 (en) Lead frame
JPH10154784A (en) Manufacture of lead frame
JPH0828449B2 (en) Lead frame manufacturing method
JP4426685B2 (en) Electronic component lead processing method
JPH0823062A (en) Manufacture of resin-sealed type semiconductor device
JP2002026192A (en) Lead frame
JP3007891B1 (en) Semiconductor hollow package and method of manufacturing the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050921

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070620

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070703

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070829

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080819

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080827

R150 Certificate of patent or registration of utility model

Ref document number: 4180352

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110905

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120905

Year of fee payment: 4

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130905

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees