JP3992683B2 - 試験を行うための電子回路及び方法 - Google Patents

試験を行うための電子回路及び方法 Download PDF

Info

Publication number: JP3992683B2
Authority: JP; Japan
Prior art keywords: terminal; input; output; redefinable; integrated circuit
Prior art date: 2001-08-16
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

JP2003521376A

Other languages

English (en)

Japanese (ja)

Other versions

JP2005500536A5 (de

JP2005500536A (ja

Inventor

アレクサンダーエスビエウェンガ

デログトレオンエムエイファン

ジョングフランシスカスジーエムデ

グイラウメイーエイロウスベルグ

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Koninklijke Philips NV

Original Assignee

Koninklijke Philips NV

Koninklijke Philips Electronics NV

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2001-08-16

Filing date

2002-07-09

Publication date

2007-10-17

2002-07-09 Application filed by Koninklijke Philips NV, Koninklijke Philips Electronics NV filed Critical Koninklijke Philips NV

2005-01-06 Publication of JP2005500536A publication Critical patent/JP2005500536A/ja

2006-01-05 Publication of JP2005500536A5 publication Critical patent/JP2005500536A5/ja

2007-10-17 Application granted granted Critical

2007-10-17 Publication of JP3992683B2 publication Critical patent/JP3992683B2/ja

2022-07-09 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318544—Scanning methods, algorithms and patterns
- G01R31/318547—Data generators or compressors
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/36—Data generation devices, e.g. data inverters
- G11C2029/3602—Pattern generator

Landscapes

Engineering & Computer Science (AREA)
General Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Semiconductor Integrated Circuits (AREA)
Tests Of Electronic Circuits (AREA)
Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
Filters And Equalizers (AREA)
Oscillators With Electromechanical Resonators (AREA)
Electric Clocks (AREA)

JP2003521376A 2001-08-16 2002-07-09 試験を行うための電子回路及び方法 Expired - Lifetime JP3992683B2 (ja)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
EP01203126		2001-08-16
PCT/IB2002/002916 WO2003016922A2 (en)	2001-08-16	2002-07-09	Electronic circuit and method for testing

Publications (3)

Publication Number	Publication Date
JP2005500536A JP2005500536A (ja)	2005-01-06
JP2005500536A5 JP2005500536A5 (de)	2006-01-05
JP3992683B2 true JP3992683B2 (ja)	2007-10-17

Family

ID=8180805

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP2003521376A Expired - Lifetime JP3992683B2 (ja)	2001-08-16	2002-07-09	試験を行うための電子回路及び方法

Country Status (9)

Country	Link
US (1)	US6883129B2 (de)
EP (1)	EP1417502B1 (de)
JP (1)	JP3992683B2 (de)
KR (1)	KR100906513B1 (de)
CN (1)	CN100371727C (de)
AT (1)	ATE376189T1 (de)
DE (1)	DE60223043T2 (de)
TW (1)	TWI223094B (de)
WO (1)	WO2003016922A2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6971045B1 (en) *	2002-05-20	2005-11-29	Cyress Semiconductor Corp.	Reducing tester channels for high pinout integrated circuits
JP3901151B2 (ja) *	2003-12-25	2007-04-04	セイコーエプソン株式会社	ドライバｉｃ並びにドライバｉｃ及び出力装置の検査方法
US7685483B1 (en) *	2005-06-20	2010-03-23	Lattice Semiconductor Corporation	Design features for testing integrated circuits
CN100417098C (zh) *	2005-08-04	2008-09-03	上海华为技术有限公司	E1/t1连接错误检测方法
DE102010002460A1 (de) *	2010-03-01	2011-09-01	Robert Bosch Gmbh	Verfahren zum Testen eines integrierten Schaltkreises
FR3051285B1 (fr) *	2016-05-13	2018-05-18	Zodiac Aerotechnics	Circuit electronique a fonctions modifiables

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4658225A (en) *	1984-07-05	1987-04-14	Hewlett-Packard Company	Amplitude insensitive delay lines in a transversal filter
US4703484A (en) *	1985-12-19	1987-10-27	Harris Corporation	Programmable integrated circuit fault detection apparatus
EP0358376B1 (de)	1988-09-07	1995-02-22	Texas Instruments Incorporated	Integrierte Prüfschaltung
US5392297A (en) *	1989-04-18	1995-02-21	Vlsi Technology, Inc.	Method for automatic isolation of functional blocks within integrated circuits
US5155733A (en) *	1990-12-26	1992-10-13	Ag Communication Systems Corporation	Arrangement for testing digital circuit devices having bidirectional outputs
US5481471A (en) *	1992-12-18	1996-01-02	Hughes Aircraft Company	Mixed signal integrated circuit architecture and test methodology
TW307927B (de) *	1994-08-29	1997-06-11	Matsushita Electric Ind Co Ltd
JPH08147110A (ja) *	1994-11-18	1996-06-07	Sony Corp	データ記録媒体管理方法、データ記録媒体管理装置およびデータ記録媒体
JP3673027B2 (ja)	1996-09-05	2005-07-20	沖電気工業株式会社	テスト対象の半導体記憶回路を備えた半導体記憶装置
US6087968A (en) *	1997-04-16	2000-07-11	U.S. Philips Corporation	Analog to digital converter comprising an asynchronous sigma delta modulator and decimating digital filter
JP2001520780A (ja)	1998-02-02	2001-10-30	コーニンクレッカフィリップスエレクトロニクスエヌヴィ	相互接続部テストユニットを有する回路及び第１電子回路と第２電子回路との間の相互接続部をテストする方法
US6378090B1 (en)	1998-04-24	2002-04-23	Texas Instruments Incorporated	Hierarchical test access port architecture for electronic circuits including embedded core having built-in test access port
US6499125B1 (en) *	1998-11-24	2002-12-24	Matsushita Electric Industrial Co., Ltd.	Method for inserting test circuit and method for converting test data
US6456961B1 (en) *	1999-04-30	2002-09-24	Srinivas Patil	Method and apparatus for creating testable circuit designs having embedded cores
DE10066260B4 (de)	1999-04-30	2013-11-14	Fujitsu Semiconductor Ltd.	Halbleiter-Speicheranordnung, Leiterplatte, auf welcher eine Halbleiter-Speicheranordnung montiert ist, und Verfahren zum Testen der Zwischenverbindung zwischen einer Halbleiter-Speicheranordnung und einer Leiterplatte
JP3483130B2 (ja) *	1999-11-29	2004-01-06	松下電器産業株式会社	集積回路の検査方法

2002
- 2002-07-09 WO PCT/IB2002/002916 patent/WO2003016922A2/en active IP Right Grant
- 2002-07-09 KR KR1020047002151A patent/KR100906513B1/ko not_active IP Right Cessation
- 2002-07-09 DE DE60223043T patent/DE60223043T2/de not_active Expired - Lifetime
- 2002-07-09 AT AT02749176T patent/ATE376189T1/de not_active IP Right Cessation
- 2002-07-09 EP EP02749176A patent/EP1417502B1/de not_active Expired - Lifetime
- 2002-07-09 CN CNB028159004A patent/CN100371727C/zh not_active Expired - Lifetime
- 2002-07-09 JP JP2003521376A patent/JP3992683B2/ja not_active Expired - Lifetime
- 2002-08-12 US US10/217,811 patent/US6883129B2/en not_active Expired - Lifetime
- 2002-09-05 TW TW091120292A patent/TWI223094B/zh not_active IP Right Cessation

Also Published As

Publication number	Publication date
DE60223043D1 (de)	2007-11-29
CN100371727C (zh)	2008-02-27
KR20040027889A (ko)	2004-04-01
TWI223094B (en)	2004-11-01
JP2005500536A (ja)	2005-01-06
WO2003016922A2 (en)	2003-02-27
EP1417502B1 (de)	2007-10-17
CN1541336A (zh)	2004-10-27
ATE376189T1 (de)	2007-11-15
EP1417502A2 (de)	2004-05-12
KR100906513B1 (ko)	2009-07-07
US6883129B2 (en)	2005-04-19
US20030051198A1 (en)	2003-03-13
DE60223043T2 (de)	2008-07-24
WO2003016922A3 (en)	2003-05-30

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Publication	Publication Date	Title
US9417283B2 (en)	2016-08-16	Semiconductor test system and method
KR0138114B1 (ko)	1998-06-15	집적 회로의 다중 전원 접속부 검사 방법 및 그 장치
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JPH03180936A (ja)	1991-08-06	内部バスのテスト回路
US6408414B1 (en)	2002-06-18	Semiconductor device provided with a boundary-scan test circuit
JP3992683B2 (ja)	2007-10-17	試験を行うための電子回路及び方法
EP0422912A2 (de)	1991-04-17	Integriertes Halbleiterschaltungsgerät mit Prüfschaltung
US6275055B1 (en)	2001-08-14	Semiconductor integrated circuit
US6720785B2 (en)	2004-04-13	Integrated circuit with test mode, and test configuration for testing an integrated circuit
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JPH05172907A (ja)	1993-07-13	集積回路を試験するための回路装置
JPH09211076A (ja)	1997-08-15	回路基板検査装置および半導体回路
US7622947B1 (en)	2009-11-24	Redundant circuit presents connections on specified I/O ports
JP4480880B2 (ja)	2010-06-16	半導体回路
JP3316387B2 (ja)	2002-08-19	半導体集積回路
KR20030085182A (ko)	2003-11-05	멀티 프로빙 패드를 구비한 반도체 테스트 장치
JPH10115666A (ja)	1998-05-06	テスト回路を組み込んだ集積回路、テスト回路及びテストボードを有する集積回路装置、並びに集積回路の試験方法