JP3950466B2 - フーリエ変換装置 - Google Patents
フーリエ変換装置 Download PDFInfo
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- JP3950466B2 JP3950466B2 JP2006033084A JP2006033084A JP3950466B2 JP 3950466 B2 JP3950466 B2 JP 3950466B2 JP 2006033084 A JP2006033084 A JP 2006033084A JP 2006033084 A JP2006033084 A JP 2006033084A JP 3950466 B2 JP3950466 B2 JP 3950466B2
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- fourier transform
- data
- intermediate buffer
- buffer memory
- long
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Description
2 n2 長フーリエ変換手段
3 回転演算手段
4 中間バッファメモリ
5 n1 長フーリエ変換手段
6 第2の並べ替え手段
Claims (1)
- 横方向に周期n1、縦方向に周期n2の2次元状に配置された周期N(=n1×n2)の時間成分の信号に対して、縦方向に対する周期n2のフーリエ変換を行うm個のn2長フーリエ変換手段と、
上記m個のn2長フーリエ変換手段による変換結果を一時記憶するためのm個の中間バッファメモリと、
上記m個の中間バッファメモリに記憶されたデータに対して回転演算を施す回転演算手段と、
上記回転演算手段による演算結果に対して、横方向に対する周期n1のフーリエ変換を行うm個のn1長フーリエ変換手段と、
複数サイクルに亘って同じn2長フーリエ変換手段により求められたデータが同じ中間バッファメモリ内に記憶されることがないようにするとともに、同じn1長フーリエ変換手段により使用されるデータが同じ中間バッファメモリ内に記憶されることがないようにして、上記m個のn2長フーリエ変換手段によりそれぞれ求められたm個のデータを上記m個の中間バッファメモリに1個ずつ振り分けて記憶するようにするデータ振り分け手段とを有し、
上記m個のn2長フーリエ変換手段を用いてn1回のn2長フーリエ変換処理を並列に行うとともに、上記m個のn1長フーリエ変換手段を用いてn2回のn1長フーリエ変換処理を並列に行うようにし、上記データ振り分け手段によって同一サイクルで振り分けられたm個のデータに対して、同じn1長フーリエ変換手段を用いて互いに異なるサイクルでn1長フーリエ変換処理を行うようにしたことを特徴とするフーリエ変換装置。
Priority Applications (1)
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JP2006033084A JP3950466B2 (ja) | 2006-02-09 | 2006-02-09 | フーリエ変換装置 |
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JP2006033084A JP3950466B2 (ja) | 2006-02-09 | 2006-02-09 | フーリエ変換装置 |
Related Parent Applications (1)
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JP20381795A Division JP3839504B2 (ja) | 1995-07-18 | 1995-07-18 | フーリエ変換装置 |
Publications (2)
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JP2006164308A JP2006164308A (ja) | 2006-06-22 |
JP3950466B2 true JP3950466B2 (ja) | 2007-08-01 |
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JP2006033084A Expired - Lifetime JP3950466B2 (ja) | 2006-02-09 | 2006-02-09 | フーリエ変換装置 |
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JP (1) | JP3950466B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5821104B2 (ja) * | 2010-10-22 | 2015-11-24 | 株式会社レイトロン | フーリエ変換処理装置 |
JP5654373B2 (ja) * | 2011-02-01 | 2015-01-14 | 株式会社富士通アドバンストエンジニアリング | 演算装置、演算方法およびプログラム |
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2006
- 2006-02-09 JP JP2006033084A patent/JP3950466B2/ja not_active Expired - Lifetime
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