JP3944921B2 - Manufacturing method of multilayer wiring board - Google Patents

Manufacturing method of multilayer wiring board Download PDF

Info

Publication number
JP3944921B2
JP3944921B2 JP8411896A JP8411896A JP3944921B2 JP 3944921 B2 JP3944921 B2 JP 3944921B2 JP 8411896 A JP8411896 A JP 8411896A JP 8411896 A JP8411896 A JP 8411896A JP 3944921 B2 JP3944921 B2 JP 3944921B2
Authority
JP
Japan
Prior art keywords
layer
conductive paste
conductor pattern
wiring board
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP8411896A
Other languages
Japanese (ja)
Other versions
JPH09275273A (en
Inventor
昭士 中祖
健 斑目
直之 浦崎
浩 清水
信之 小川
和仁 小林
茂晴 有家
和久 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP8411896A priority Critical patent/JP3944921B2/en
Publication of JPH09275273A publication Critical patent/JPH09275273A/en
Application granted granted Critical
Publication of JP3944921B2 publication Critical patent/JP3944921B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Description

【0001】
【発明の属する技術分野】
本発明は、層間の電気的接続を導電性ペーストで行う多層配線板の製造方法に関する。
【0002】
【従来の技術】
導電性ペーストで層間接続を行う多層配線板の製造方法として接着性を有する基材に貫通穴をあけ、その貫通穴に導電性ペーストを充填し、その両面に回路導体を重ねて加圧加熱一体化して層間の導通化と多層化積層を同時に行う方法が特開平6-21619号公報に開示されている。
【0003】
【発明が解決しようとする課題】
特開平6-21619号公報の方法は半硬化状態の接着性樹脂を有する基材に層間接続のための貫通穴をあけ、その貫通穴に導電性ペーストを充填した後、回路導体と重ね合わせて加圧加熱して一体化するものである。この製造方法では基材が回路導体で拘束されておらず半硬化状態の樹脂が加圧加熱工程で流動することや使用樹脂の硬化収縮のため、層間接続のため導電性ペーストを充填した貫通穴の位置がずれる心配がある。多層配線板では導通穴と内層回路の位置が一致していることが基本的に重要である。特開平6-21619号公報ではこの位置ずれを避けるために加圧加熱工程で変形しにくい芳香族ポリアミド繊維布を基材として使用している。芳香族ポリアミド繊維は堅くて変形しにくいという長所がある反面、高価であり、多層板の製造工程で不可欠の位置合わせ用の穴あけや外形加工で従来のドリルマシンやパンチングマシン、ルータマシン等の使用が困難または加工速度が著しく低いという問題がある。本発明は、加工性が容易であり配線の高密度化と薄板化が可能な多層配線板の製造方法を提供することを目的とする。
【0004】
【課題を解決するための手段】
本発明は、導電性ペーストで層間接続を行う多層配線板の製造方法に関するものであり、以下の第1から第5までの5種類の製造方法を提供するものである。第1の製造法は、導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法である。
(a)片面銅張積層板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設けた多層板用材料の有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、銅箔に到達する非貫通穴をあける工程
(b)非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程
(c)有機フイルムを引き剥がす工程
(d)内層回路を形成した配線基板の表面に(c)の工程で得た材料の銅箔が外側になるように位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行う工程
(e)エッチングにより外側の銅箔に導体パターンを形成する工程
(f)更に多層化する場合に(a)から(e)までの工程を繰り返して多層配線板を製造する工程。
【0005】
第2の製造法は、導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法である。
(a)絶縁層の一方の面に金属銅導体パターンを形成した片面導体パターン形成基板を製造する工程
(b)片面導体パターン形成基板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程
(c)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、金属銅導体パターンの裏面に到達する非貫通穴をあける工程
(d)非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程
(e)有機フイルムを引き剥がす工程
(f)内層回路を形成した配線基板の表面に(e)の工程で得た導電性ペーストを充填した片面導体パターン形成基板の導体パターンが外側になるように位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行う工程
(g)更に多層化する場合に(a)から(f)までの工程を繰り返して多層配線板を製造する工程。
【0006】
第3の製造法は、導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法である。
(a)第1層目となる導体パターンを形成した内層回路板を製造する工程
(b)絶縁層の一方の面に第2層目の導体パターンを形成した片面導体パターン形成基板を製造する工程
(c)片面導体パターン形成基板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程
(d)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、片面導体パターンの裏面に到達する非貫通穴をあける工程
(e)非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程
(f)第2層目を越える導体層についても(b)から(e)の工程を繰り返すことにより、第n層目の導体パターンをそれぞれ形成した片面導体パターン形成基板を製造する工程
(g)片面導体パターン形成基板から有機フイルムを引き剥がす工程
(h)第1層目となる導体パターンを形成した内層回路板の導体パターン表面に(b)から(g)の工程で得た導電性ペーストを充填した片面導体パターン形成基板を位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行うことにより多層配線板を製造する工程。
【0007】
第4の製造法は、導電性ペーストで層間接続を行うn層からなる多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法である。
(a)第n層目の導体層となる銅箔を絶縁層の片面に設けた片面銅張積層板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程
(b)第2層目から第(n−1)層目の金属銅導体パターンを形成した片面導体パターン形成基板を製造する工程
(c)第2層目から第(n−1)層目の片面導体パターン形成基板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程
(d)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、第n層目の銅箔と第2層目から第(n−1)層目の片面導体パターン形成基板の裏面に到達する非貫通穴をあける工程
(e)この非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程
(f)有機フイルムを引き剥がす工程
(g)第1層目の導体を形成するための銅箔と(a)から(f)までの工程で得た導電性ペーストを充填した片面導体パターン形成基板および第n層目の片面銅張積層板を位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行うことによって多層基板を製造する工程
(h)最外層の銅箔をエッチングすることにより第1層目および第n層目の外層回路を形成し多層配線板を製造する工程。
【0008】
第5の製造法は、導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法である。
(a)内層回路を形成した配線基板として、層間接続穴を導電性ペーストまたは絶縁性樹脂で充填し、両面に配線を形成した内層回路を形成した配線基板を作製する工程
(b)最外層用基板として、導体層となる銅箔を絶縁層の片面に設けた片面銅張積層板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程
(c)最外層用基板と内層回路を形成した配線基板を除く導体層用基板として、金属銅導体パターンを形成した片面導体パターン形成基板を作製し、その絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程
(d)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、最外層用基板の銅箔と金属銅導体パターンの裏面に到達する非貫通穴をあける工程
(e)この非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程
(f)有機フイルムを引き剥がす工程
(g)内層回路を形成した配線基板の両面に、(b)(c)(d)(e)(f)の工程で作製した片面導体パターン形成基板とその外側に最外層用基板を位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行うことにより多層基板を製造する工程
(h)最外層の銅箔をエッチングして外層回路を形成し多層配線板を製造する工程。
【0009】
【発明の実施の形態】
本発明で使用する片面銅張積層板で使用する銅箔は、その銅箔が単層の場合には、9μmから70μmであることが好ましい。またライン/スペースが50μm/50μm未満の極めて微細な配線を形成する場合には、銅箔の厚さは更に薄いものが望ましく、このような場合には3〜8μmの極薄銅箔とその極薄銅箔の強化層からなる複合箔を使用することが好ましい。この強化層は加圧加熱積層後に、引き剥がして剥離するか、もしくはエッチングにより除去する。引き剥がし可能な複合箔の例として、70μm厚さの銅箔と9μmの極薄銅箔からなるピーラブル銅箔(古河サーキットホイル(株)、商品名)がある。エッチングによって強化層が除去できるものとしてアルミニウム箔に5μmの極薄銅箔を複合化した複合箔(三井金属工業(株))等があり、アルミニウム箔をエッチングで除去する。片面銅張積層板の絶縁層樹脂としては、フェノール、エポキシ、ポリイミド類等の樹脂が使用できる。この絶縁層にはレーザを照射して層間接続のための穴をあける。層間接続の直径を越える無機質繊維がこの絶縁層に含まれていると、レーザ加工に要する時間が長くなるため生産性が著しく低くなる。そのため、この絶縁層にはレーザであける穴の直径以上の長さの無機繊維を含まないことが好ましい。
【0010】
絶縁性接着剤層としては配線板用として市販されている接着剤あるいは接着フィルムが使用できる。これらは、エポキシ樹脂やポリイミド樹脂等を成分として含むものが好ましく、例えば、分子量10万以上の高分子量エポキシ重合体を主成分としたエポキシ樹脂系接着フイルムとしてAS-3000(日立化成工業(株)製、商品名)がある。また、変成ゴムを添加したエポキシ樹脂系接着フィルムとしてGF-3500(日立化成工業(株)製、商品名)がある。ポリイミド樹脂系接着フィルムとしてはAS-2500(日立化成工業(株)製、商品名)がある。直径が0.1μm〜6μmで長さが約5μm〜100μmの繊維状物質を樹脂中に分散させたエポキシ樹脂系接着フイルムとしてAS-6000(日立化成工業(株)製、商品名)がある。
【0011】
これらの絶縁性接着剤層は、接着剤や接着フィルムを絶縁層表面に塗布したり貼付ることによって設けることもできる。また、引き剥がし可能な有機フイルム上に例えば、熱硬化性樹脂等を溶剤に溶解したワニスを塗布した後、溶剤分を乾燥することによって得られる。このようにすると絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設けることがより容易にできて好ましい。この絶縁性接着剤層の厚さは内層回路の導体層の厚さと関係しており、内層回路導体層の充填性の点から、少なくとも内層回路導体層の厚さ以上であることが必要である。内層回路導体層の厚さが12μmの場合には25μm程度の絶縁性接着剤層の厚さのものにする。内層回路導体層の厚さが5μm程度であれば、10μm程度でも内層回路導体層を充填することができる。一般にはこの絶縁性接着剤層の厚さは10〜500μmの範囲である。片面銅張積層板の絶縁層表面に設けた絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設けた多層板用材料を得るには、片面銅張積層板の絶縁層表面に引き剥がし可能な有機フイルムに絶縁性接着剤層を塗布したものを貼り合わせることによって得られる。
【0012】
引き剥がし可能な有機フイルムは、非貫通穴をあけるために用いるレーザで容易に加工できることが必要である。この点から有機フイルムが好適である。引き剥がし可能な有機フイルムに絶縁性接着剤層となる熱硬化性樹脂等を塗布する場合には、塗布後に溶剤分を加熱乾燥除去するために、この加熱温度での耐熱性が必要である。このような有機フイルムとしては、ポリエチレンテレフタレート、ポリプロピレン、ポリ−4−メチルペンテン−1、ポリフッ化エチレン等が使用できる。これらの有機フイルムの厚さは5μm以上であり、レーザ加工速度の点からは薄いことが望ましい。取り扱い性の点からはある程度の厚さが必要である。このような点から厚さは、10μm〜70μmであることが好ましい。 この有機フイルムは、非貫通穴に導電性ペーストを印刷充填した後に引き剥がされる。導電性ペーストの非貫通穴への充填は印刷法が好ましい。この印刷時に非貫通穴の周辺部分の絶縁部分にも導電性ペーストが塗布される。この不都合な導電性ペーストは、除去する必要がある。本発明では塗布された導電性ペーストをこの有機フイルムの引き剥がしによって除去する。
【0013】
非貫通穴の穴あけには、レーザを使用する。レーザとしては、エキシマレーザ、炭酸ガスレーザ等があるが、加工速度や加工費等の点から炭酸ガスレーザが好ましいものである。
非貫通穴に充填する導電性ペーストとしては、金属粒子、導電性有機物、カーボン等の導電性粒子を混入した熱硬化性の導電性ペーストあるいは紫外線硬化性と熱硬化性を併用した導電性ペースト、同じく金属粒子、導電性有機物、カーボン等の導電性粒子を混入した熱可塑性の導電性ペーストが使用できる。これらの導電性ペーストは印刷等によって非貫通穴に充填される。印刷後に引き剥がし可能な有機フイルムを除去する。その結果、有機フイルムの厚さに関係した量ほど厚く導電性ペーストが印刷される。導電性ペーストの充填量は絶縁性接着剤層面とほぼ同じ高さが望ましい。加熱によって導電性ペースト中の溶剤分を除去すると共に半硬化状態にした場合、導電性ペーストは収縮する。この収縮量は溶剤濃度に左右される。したがって、望ましい充填量は、フイルムの厚さと溶剤分の組み合わせを最適化することにより得られる。
【0014】
本発明で使用する内層回路を形成した配線基板として用いる内層回路基板としては、紙基材やガラス基材を含むエポキシ樹脂系、フェノール樹脂系、ポリイミド樹脂系の片面銅張積層板を使用することができる。また、これらの樹脂と基材からなる両面銅張積層板を使用することができる。これらの基板を使用してエッチングやめっきとエッチングの両方を用いて導体パターンを形成する。また、紙基材やガラス基材を含むエポキシ樹脂系、フェノール樹脂系、ポリイミド樹脂系基板にアディティブ法で導体パターンを形成したものも使用できる。また、金属基板やセラミック基板等の表面に導体パターンを形成したものも使用できる。内層基板がその両面に回路を形成した両面回路基板の場合には、層間接続穴は導電性ペーストまたは絶縁性樹脂で充填した両面回路基板を使用することもできる。これらの内層回路を形成した配線基板と非貫通穴に導電性ペーストを充填した絶縁性接着剤層とが接するように、位置合わせを行い、加圧加熱して一体化させる。この工程で、半硬化状態の導電性ペーストと絶縁性接着剤層が接着硬化して層間の電気的接続が行われると同時に多層化される。加熱温度は使用する樹脂に依存するが、一般には160℃〜280℃の範囲である。圧力は一般に5MPa〜50MPaの範囲である。この後、表面の銅箔をエッチングによって配線形成する。更にこの表面に多層化する場合には、同様の工程を経て製造した導電性ペースト充填絶縁性接着剤層を重ね合わせて多層化し、表面の銅箔をエッチングによって配線形成することによって順次、多層化する。
【0015】
絶縁層の一方の面に金属銅導体パターンを形成した片面導体パターン形成基板に使用する絶縁層としては、フェノール樹脂系、エポキシ樹脂系、ポリイミド樹脂系等の熱硬化性樹脂を使用する。この絶縁層はレーザを照射して層間接続のための穴をあける。層間接続の直径を越える無機質繊維がこの絶縁層に含まれていると、レーザ加工に要する時間が長くなるために生産性が著しく低くなる。そのため、この絶縁層にはレーザであける穴の直径以上の長さの無機繊維を含まないことが望ましい。
この絶縁層基板にアディティブ法で金属銅導体パターンを形成して片面導体パターン形成基板を製造する。または上述の片面銅張積層板の銅箔をエッチングすることによって片面導体パターン形成基板を製造する。
【0016】
この片面導体パターン形成基板の絶縁層表面に上述の方法で絶縁性接着剤層と引き剥がし可能な有機フイルムを設ける。次に上述の方法で非貫通穴をあけ、導電性ペーストを充填してこの導電性ペーストを半硬化状態にした後、有機フイルムを引き剥がす。上述の方法で内層回路を形成した配線基板の表面に、導電性ペーストを充填した絶縁性接着剤層付きの片面導体パターン形成基板を位置合わせし、上述の条件で加圧加熱して一体化する。この方法では既に導体パターンが形成されているので、加圧加熱一体化と同時に多層化が行われる。この工程を順次繰り返して多層化する。また、上述の方法で内層回路を形成した配線基板と上述の方法で作製した第2層目から第n層目の導電性ペーストを充填した絶縁性接着剤層付きの片面導体パターン形成基板を位置合わせし、上述の加圧加熱条件で一体化することによって、全層を一回の加圧加熱で一体化し、同時に全層の導体パターンの形成と導通を完了させることができる。また、内層回路を形成した配線基板の代わりに銅箔を使用し、第2層目から第(n-1)層目までは上記の方法で得られた導体パターン形成基板を使用し、最外層のn層目に上述の片面銅張積層板を使用することによって全層を一回の加圧加熱で一体化した後、外層のみエッチングで導体パターンを形成することによって、多層配線板を得ることもできる。
【0017】
本方法は、上記したように、多層化積層工程と層間接続工程を同時に行なっているので、従来の複雑な工程を経て製造していた多層配線板の製造工程が大幅に簡略化できる。また、レーザによって非貫通穴をあけるために直径が0.1mmレベルの微小径が加工できるので高密度の多層配線板の製造が可能である。
【0018】
【実施例】
(実施例1)
図1(1)に示すように、厚さ18μm銅箔に、絶縁層としてエポキシ樹脂系接着フィルムAS-6000(日立化成工業(株)製、商品名)を貼り合わせて硬化させ全体の厚さが0.1mmの片面銅張積層板を準備した。
次に図1(2)に示すように、引き剥がし可能な有機フィルムとして厚さ30μmのポリエチレンテレフタレートフイルムに絶縁性接着剤層となるAS-6000を塗工し半硬化状態にした厚さ30μmの絶縁性接着剤層塗布フイルムの絶縁性接着剤層の面が片面銅張積層板の絶縁層の面と接するように貼り合わせ多層板用材料を準備した。
次に図1(3)に示すように、層間の電気的接続を行なう場所に炭酸ガスレーザを照射して銅箔に到達する直径0.15mmの非貫通穴をあけた。
次に図1(4)に示すように、銅ペーストNF-2000(タツタ電線(株)製、商品名)をポリエチレンテレフタレートフイルム面に印刷して非貫通穴に銅ペーストを充填し、150℃で10分間乾燥した。
次に図1(5)に示すようにポリエチレンテレフタレートフイルムを引き剥がした。
次に図1(6)に示すように、銅箔の厚さが18μmで全体の厚さが0.2mmのガラスエポキシ片面銅張積層板をエッチング法で配線パターンを形成し、この内層回路を形成した配線基板の表面に、非貫通穴に銅ペーストを充填した多層板用材料を重ね合わせて、圧力2.5MPa、温度170℃、60分間、加圧加熱して多層板を作製し、外側の銅箔をエッチング法で配線形成した。
更に図(7)(8)(9)に示すように、同様の工程を繰り返して第3層、第4層、第5層の多層配線板を製造した。
【0019】
(実施例2)
図2(1)に示すように、厚さが0.1mmのガラスエポキシ両面板を用意した。
次に図2(2)に示すように0.2mmの貫通穴をあけた。
次に図2(3)に示すように、貫通穴を含め全体に厚さ12μmの銅めっきを行い、その後、貫通穴に絶縁性樹脂を充填した。
次に図2(4)に示すようにエッチングによって内層回路を形成した配線基板を得た。
次に図2(5)および(6)に示すように、実施例1で示したのと同様な方法で多層板用材料を作製した。
次に図2(7)に示すように内層回路を形成した基板の表面に多層板用材料を位置合わせして重ね、圧力2.5MPa、温度170℃、60分間、加圧加熱して多層板を作製した。
次に図2(8)に示すようにエッチングによって回路を形成した。
更に、図2(5)(6)(7)と同様の工程を経て多層化し、表面の銅箔をエッチングすることにより、図2の(9)に示すような多層配線板を製造した。
【0020】
(実施例3)
図3(1)に示すように、厚さ18μm銅箔に、絶縁層としてエポキシ樹脂系接着フィルムAS-6000(日立化成工業(株)製、商品名)を貼り合わせ硬化させて全体の厚さが0.1mmの片面銅張積層板を準備した。
次に図3(2)に示すように、銅箔をエッチングして第2層目の導体パターンを形成した。
次に図3(3)に示すように、引き剥がし可能な有機フィルムとして厚さ50μmのポリエチレンテレフタレートフィルムに、絶縁性接着剤層となるAS-6000を塗工して半硬化状態にした厚さ30μmの絶縁性接着剤層塗布フィルムの絶縁性接着剤層の面が片面銅張積層板の絶縁層の面と接するように貼り合わせた。
次に図3(4)に示すように、層間の接続を行なう場所に炭酸ガスレーザを照射して銅箔に到達する直径0.15mmの非貫通穴をあけた。
次に図3(5)に示すように、銅ペーストNF-2000(タツタ電線(株)製、商品名)をポリエチレンテレフタレートフイルム面に印刷して非貫通穴に銅ペーストを充填し、150℃で10分間乾燥した。
次に図3(6)に示すようにポリエチレンテレフタレートフィルムを引き剥がした。
次に図3(7)に示すように、銅箔の厚さが18μmで全体の厚さが0.2mmのガラスエポキシ片面銅張積層板をエッチング法で配線パターンを形成して内層板を作製しその内層回路を形成した配線基板表面に銅ペーストを充填した片面配線形成基板を位置合わせして、圧力2.5MPa、温度170℃、60分間、加圧加熱して第2層目導体層を作製した。
次に図3(8)(9)(10)に示すように、(1)から(6)と同様の工程によって、第3層目、第4層目、第5層目の銅ペースト充填片面配線形成基板を作製し、(7)の工程と同様にして多層配線板を製造した。
【0021】
(実施例4)
図4(1)に示すように、厚さが0.1mmのガラスエポキシ両面板を用意した。
次に図4(2)に示すように0.2mmの貫通穴をあけた。
次に図4(3)に示すように、貫通穴を含め厚さ12μmの銅めっきを行い、貫通穴に絶縁樹脂を充填した。
次に図4(4)に示すようにエッチングによって内層回路を形成した配線基板を作製した。
次に図4(5)および(6)に示すように、実施例3で示したのと同様な方法で銅ペーストを充填した片面導体パターン形成基板を作製した。
次に図4(7)に示すように内層回路を形成した配線基板の表面に銅ペーストを充填した片面導体パターン形成基板を位置合わせして重ね、圧力2.5MPa、温度170℃、60分間、加圧加熱して多層板を作製した。
更に図4(8)に示すように、図4(5)(6)(7)と同様の工程を経て多層配線板を製造した。
【0022】
(実施例5)
図5(1)に示すように、厚さ18μm銅箔に、絶縁層としてエポキシ樹脂系接着フィルムAS-6000(日立化成工業(株)製、商品名)を貼り合わせ硬化させて全体の厚さが0.1mmの片面銅張積層板を準備した。
次に図5(2)に示すように、銅箔をエッチングして第2層目の導体パターンを形成した。
次に図5(3)に示すように引き剥がし可能な有機フィルムとして厚さ50μmのポリエチレンテレフタレートフイルムに、絶縁性接着剤層となるAS-6000を塗工して半硬化状態にした厚さ30μmの絶縁性接着剤層塗布フイルムの絶縁性接着剤層の面が片面銅張積層板の絶縁層の面と接するように貼り合わせた。 次に図5(4)に示すように、層間の電気的接続を行なう場所に炭酸ガスレーザを照射して銅箔に到達する直径0.15mmの非貫通穴をあけた。
次に図5(5)に示すように、銅ペーストNF-2000(タツタ電線(株)製、商品名)をポリエチレンテレフタレートフィルム面に印刷して非貫通穴に銅ペーストを充填し、150℃で10分間乾燥した。
次に図5(6)に示すようにポリエチレンテレフタレートフイルムを引き剥がし、銅ペーストを充填した片面導体パターン形成基板を作製した。
同様にして図5(9)(8)(7)に示すように第3層目、第4層目、第5層目となる片面導体パターン形成基板を作製した。
次に図5(10)に示すように、、銅箔の厚さが18μmで全体の厚さが0.2mmのガラスエポキシ片面銅張積層板をエッチング法で配線パターンを形成して内層回路を形成した配線基板を作製した。
次に図5(11)に示すように、内層回路を形成した配線基板表面に第2層目から第5層目の銅ペーストを充填した片面導体パターン形成基板を順番に重ねて位置合わせし、圧力2.5MPa,温度170℃、60分間、加圧加熱して多層配線板を製造した。
【0023】
(実施例6)
図6(1)に示すように、厚さ18μm銅箔に、絶縁層としてエポキシ樹脂系接着フィルムAS-6000(日立化成工業(株)製、商品名)を貼り合わせ硬化させて全体の厚さが0.1mmの片面銅張積層板を準備した。
次に図6(2)に示すように、銅箔をエッチングして第2層目の導体パターンを形成した。
次に図6(3)に示すように引き剥がし可能な有機フィルムとして厚さ50μmのポリエチレンテレフタレートフイルムに、絶縁性接着剤層としてAS-6000を塗工して半硬化状態にした厚さ30μmの絶縁性接着剤層塗布フイルムの絶縁性接着剤層の面が片面銅張積層板の絶縁層の面と接するように貼り合わせた。 次に図6(4)に示すように、層間の電気的接続を行なう場所に炭酸ガスレーザを照射して銅箔に到達する直径0.15mmの非貫通穴をあけた。
次に図6(5)に示すように、銅ペーストNF-2000(タツタ電線(株)製、商品名)をポリエチレンテレフタレートフイルム面に印刷して非貫通穴に銅ペーストを充填し、150℃で10分間乾燥した。
次に図6(6)に示すようにポリエチレンテレフタレートフイルムを引き剥がし、第2層目の銅ペーストを充填した片面導体パターン形成基板を作製した。
同様にして、図6(8)に示すように、第3層目の銅ペーストを充填した片面導体パターン形成基板を作製した。
図6(7)に示すように、実施例1の図1(1)から(5)と同様の工程によって、第4層目の銅ペーストを充填した多層板用材料を作製した。
次に図6(9)に示すように厚さ18μm銅箔を準備し、図6(10)に示すように、第1層目の銅箔と第2層目、第3層目の銅ペーストを充填した片面導体パターン形成基板と第4層目の銅ペーストを充填した多層板用材料を順番に重ねて位置合わせし、圧力2.5MPa、温度170℃、60分間、加圧加熱して一体化した多層板を作製した。
次に図6(11)に示すように、エッチング法によって最外層の配線を形成して多層配線板を製造した。
【0024】
【発明の効果】
以上に説明したように、本発明により、簡略な工程で配線の高密度化が可能な多層配線板の製造が可能になる。
【図面の簡単な説明】
【図1】(1)〜(9)は、本発明の多層配線板の製造方法の一実施例を示す基板の断面図である。
【図2】(1)〜(9)は、本発明の多層配線板の製造方法の一実施例を示す基板の断面図である。
【図3】(1)〜(10)は、本発明の多層配線板の製造方法の一実施例を示す基板の断面図である。
【図4】(1)〜(8)は、本発明の多層配線板の製造方法の一実施例を示す基板の断面図である。
【図5】(1)〜(11)は、本発明の多層配線板の製造方法の一実施例を示す基板の断面図である。
【図6】(1)〜(11)は、本発明の多層配線板の製造方法の一実施例を示す基板の断面図である。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer wiring board in which electrical connection between layers is performed with a conductive paste.
[0002]
[Prior art]
As a manufacturing method of multilayer wiring board that performs interlayer connection with conductive paste, through holes are made in an adhesive substrate, conductive paste is filled in the through holes, circuit conductors are stacked on both sides, and pressure heating is integrated Japanese Patent Laid-Open No. 6-21619 discloses a method in which inter-layer conduction and multilayer lamination are simultaneously performed.
[0003]
[Problems to be solved by the invention]
In the method of Japanese Patent Laid-Open No. 6-21619, a through hole for interlayer connection is formed in a base material having a semi-cured adhesive resin, and the through hole is filled with a conductive paste, and then overlapped with a circuit conductor. It is integrated by applying pressure and heating. In this manufacturing method, the base material is not constrained by the circuit conductor, and the semi-cured resin flows in the pressurizing and heating process, and the through hole filled with conductive paste for interlayer connection due to the curing shrinkage of the resin used There is a concern that the position of the. In a multilayer wiring board, it is basically important that the positions of the conduction hole and the inner layer circuit are the same. In JP-A-6-21619, an aromatic polyamide fiber cloth that is not easily deformed in a pressure heating process is used as a base material in order to avoid this positional shift. Aromatic polyamide fibers have the advantage of being hard and difficult to deform, but they are expensive, and are used in conventional drilling machines, punching machines, router machines, etc., for drilling and contouring, which are indispensable in the multilayer board manufacturing process. However, there is a problem that it is difficult or the processing speed is extremely low. It is an object of the present invention to provide a method for manufacturing a multilayer wiring board that is easy to process and that can increase the density and thickness of the wiring.
[0004]
[Means for Solving the Problems]
  The present invention relates to a method for manufacturing a multilayer wiring board that performs interlayer connection with a conductive paste, and provides the following five types of manufacturing methods from first to fifth. The first manufacturing method includes the following steps in a method for manufacturing a multilayer wiring board in which interlayer connection is made with a conductive paste.In order of the following stepsThis is a method for manufacturing a multilayer wiring board.
(A) A laser is applied to the surface of the organic film of the multilayer board material in which an insulating adhesive layer and a peelable organic film are provided on the surface of the insulating layer of the single-sided copper-clad laminate. Irradiating and making a non-through hole that reaches the copper foil at the place where electrical connection between layers is made,
(B) A step of filling a non-through hole with a conductive paste and making this conductive paste semi-cured,
(C) Step of peeling off the organic film,
(D) Align and overlap the surface of the wiring board on which the inner layer circuit is formed so that the copper foil of the material obtained in the step (c) is on the outside, and integrate by pressurizing and heating.Adhesive cure of semi-cured conductive paste and insulating adhesive layer to make electrical connection between layersProcess,
(E) Step of forming a conductor pattern on the outer copper foil by etching,
(F) A step of manufacturing a multilayer wiring board by repeating the steps (a) to (e) in the case of further multilayering.
[0005]
  The second manufacturing method includes the following steps in a method for manufacturing a multilayer wiring board in which interlayer connection is made with a conductive paste.In order of the following stepsThis is a method for manufacturing a multilayer wiring board.
(A) The process of manufacturing the single-sided conductor pattern formation board which formed the metal copper conductor pattern in one side of an insulating layer,
(B) A step of providing an insulating adhesive layer on the surface of the insulating layer of the single-sided conductor pattern forming substrate and a peelable organic film on the surface of the insulating adhesive layer.,
(C) A step of irradiating the surface of the peelable organic film with a laser to form a non-through hole that reaches the back surface of the metal copper conductor pattern in a place where electrical connection between layers is performed,
(D) A step of filling a non-through hole with a conductive paste and making this conductive paste semi-cured,
(E) The process of peeling off the organic film,
(F) Align and overlap the surface of the wiring board on which the inner layer circuit is formed with the conductive pattern of the single-sided conductor pattern forming board filled with the conductive paste obtained in the step (e), and pressurize and heat IntegratedAdhesive cure of semi-cured conductive paste and insulating adhesive layer to make electrical connection between layersProcess,
(G) A step of manufacturing a multilayer wiring board by repeating the steps (a) to (f) in the case of further multilayering.
[0006]
  The third manufacturing method includes the following steps in a method for manufacturing a multilayer wiring board in which interlayer connection is made with a conductive paste.In order of the following stepsThis is a method for manufacturing a multilayer wiring board.
(A) The process of manufacturing the inner-layer circuit board in which the conductor pattern used as the 1st layer was formed,
(B) The process of manufacturing the single-sided conductor pattern formation board which formed the conductor pattern of the 2nd layer in one side of an insulating layer,
(C) A step of providing an insulating adhesive layer on the surface of the insulating layer of the single-sided conductor pattern forming substrate and an organic film that can be peeled off on the surface of the insulating adhesive layer.,
(D) A step of irradiating the surface side of the peelable organic film with a laser to form a non-through hole reaching the back surface of the single-sided conductor pattern at a place where electrical connection between layers is performed.,
(E) A step of filling a non-through hole with a conductive paste and making this conductive paste semi-cured,
(F) The process of manufacturing the single-sided conductor pattern formation board | substrate which respectively formed the conductor pattern of the nth layer by repeating the process of (b) to (e) also about the conductor layer exceeding the 2nd layer.,
(G) The process of peeling an organic film from a single-sided conductor pattern forming substrate,
(H) A single-sided conductor pattern forming substrate filled with the conductive paste obtained in the steps (b) to (g) is positioned on the conductor pattern surface of the inner layer circuit board on which the conductor pattern as the first layer is formed. Stack, press and heat to integrateAdhesive cure of semi-cured conductive paste and insulating adhesive layer to make electrical connection between layersThe process which manufactures a multilayer wiring board by this.
[0007]
  In the fourth manufacturing method, interlayer connection is performed using a conductive paste.n layersIn the method of manufacturing a multilayer wiring board, the following steps are included.In order of the following stepsThis is a method for manufacturing a multilayer wiring board.
(A) The copper foil as the nth conductor layer can be peeled off on the surface of the insulating adhesive layer and the surface of the insulating adhesive layer on the insulating layer surface of the single-sided copper-clad laminate provided on one side of the insulating layer Process of providing a simple organic film,
(B) The process of manufacturing the single-sided conductor pattern formation board in which the metal copper conductor pattern of the 2nd layer to the (n-1) th layer was formed.,
(C) The insulating adhesive layer and the peelable organic film are provided on the surface of the insulating layer of the single-sided conductor pattern forming substrate from the second layer to the (n-1) -th layer. Process,
(D) The surface side of the peelable organic film is irradiated with laser, and the n-th layer copper foil and the second to (n−1) -th layers are placed at the place where electrical connection between the layers is performed. ofOne sideConductor patternForming substrateTo make a non-through hole to reach the back of,
(E) A step of filling the non-through hole with a conductive paste to make the conductive paste semi-cured,
(F) The process of peeling off the organic film,
(G) A single-sided conductor pattern-formed substrate filled with a copper foil for forming a first-layer conductor and the conductive paste obtained in the steps (a) to (f), and a single-sided copper-clad n-th layer Laminate and align the laminated plates, and pressurize and heat to integrateAdhesive cure of semi-cured conductive paste and insulating adhesive layer to make electrical connection between layersManufacturing a multilayer substrate,
(H) A step of manufacturing a multilayer wiring board by etching the outermost copper foil to form first and nth outer layer circuits.
[0008]
  The fifth manufacturing method includes the following steps in a method for manufacturing a multilayer wiring board in which interlayer connection is made with a conductive paste.In order of the following stepsThis is a method for manufacturing a multilayer wiring board.
(A) A step of producing a wiring board having an inner layer circuit in which interlayer connection holes are filled with conductive paste or insulating resin and wiring is formed on both surfaces as a wiring board on which an inner layer circuit is formed,
(B) As a substrate for the outermost layer, a copper foil serving as a conductor layer is peeled off on the surface of the insulating adhesive layer and the surface of the insulating adhesive layer on the insulating layer surface of the single-sided copper clad laminate provided on one side of the insulating layer. Process for providing possible organic film,
(C) As a conductor layer substrate excluding the outermost layer substrate and the wiring substrate on which the inner layer circuit is formed, a single-sided conductor pattern forming substrate in which a metal copper conductor pattern is formed is prepared, and an insulating adhesive layer is formed on the insulating layer surface. Step of providing a peelable organic film on the surface of the insulating adhesive layer,
(D) The surface of the peelable organic film is irradiated with a laser, and a non-through hole that reaches the back surface of the copper foil of the outermost layer substrate and the metal copper conductor pattern is formed at a place where electrical connection between layers is performed. Process,
(E) A step of filling the non-through hole with a conductive paste to make the conductive paste semi-cured,
(F) The process of peeling off the organic film,
(G) The single-sided conductor pattern forming substrate prepared in the steps (b), (c), (d), (e), and (f) and the outermost layer substrate are aligned on both sides of the wiring substrate on which the inner layer circuit is formed. And then press and heat to integrateAdhesive cure of semi-cured conductive paste and insulating adhesive layer to make electrical connection between layersManufacturing a multilayer substrate,
(H) A step of etching the outermost copper foil to form an outer layer circuit and manufacturing a multilayer wiring board.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
The copper foil used in the single-sided copper clad laminate used in the present invention is preferably 9 μm to 70 μm when the copper foil is a single layer. In addition, when an extremely fine wiring having a line / space of less than 50 μm / 50 μm is formed, it is desirable that the thickness of the copper foil is thinner. In such a case, a 3-8 μm ultrathin copper foil and its pole It is preferable to use a composite foil composed of a reinforcing layer of thin copper foil. This reinforcing layer is peeled off and peeled off after pressurization and heating, or removed by etching. As an example of the composite foil that can be peeled off, there is a peelable copper foil (Furukawa Circuit Foil Co., Ltd., trade name) made of a 70 μm thick copper foil and a 9 μm ultrathin copper foil. There is a composite foil (Mitsui Kinzoku Kogyo Co., Ltd.) in which an ultrathin copper foil of 5 μm is combined with an aluminum foil, and the aluminum foil is removed by etching. As the insulating layer resin of the single-sided copper-clad laminate, resins such as phenol, epoxy and polyimide can be used. This insulating layer is irradiated with a laser to make a hole for interlayer connection. When inorganic fibers exceeding the diameter of the interlayer connection are included in this insulating layer, the time required for laser processing becomes longer, and the productivity is significantly reduced. Therefore, it is preferable that this insulating layer does not contain inorganic fibers having a length equal to or larger than the diameter of the hole formed in the laser.
[0010]
As the insulating adhesive layer, an adhesive or an adhesive film that is commercially available for wiring boards can be used. These preferably contain an epoxy resin or a polyimide resin as a component. For example, AS-3000 (Hitachi Chemical Co., Ltd.) is used as an epoxy resin adhesive film mainly composed of a high molecular weight epoxy polymer having a molecular weight of 100,000 or more. Product name). Moreover, there is GF-3500 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an epoxy resin adhesive film to which modified rubber is added. As the polyimide resin adhesive film, there is AS-2500 (trade name, manufactured by Hitachi Chemical Co., Ltd.). AS-6000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is an epoxy resin-based adhesive film in which a fibrous material having a diameter of 0.1 μm to 6 μm and a length of about 5 μm to 100 μm is dispersed in a resin.
[0011]
These insulating adhesive layers can also be provided by applying or sticking an adhesive or an adhesive film on the surface of the insulating layer. Moreover, after apply | coating the varnish which melt | dissolved the thermosetting resin etc. in the solvent on the peelable organic film, it obtains by drying a solvent part. If it does in this way, it is easier to provide an insulating adhesive layer on the surface of the insulating layer and a peelable organic film on the surface of the insulating adhesive layer, which is preferable. The thickness of the insulating adhesive layer is related to the thickness of the conductor layer of the inner circuit, and it is necessary that the thickness of the inner circuit conductor layer is at least equal to or greater than the thickness of the inner circuit conductor layer from the viewpoint of the filling property of the inner circuit conductor layer. . When the thickness of the inner circuit conductor layer is 12 μm, the thickness of the insulating adhesive layer is about 25 μm. If the thickness of the inner circuit conductor layer is about 5 μm, the inner circuit conductor layer can be filled even with about 10 μm. Generally, the thickness of this insulating adhesive layer is in the range of 10 to 500 μm. In order to obtain a multilayer board material provided with an insulating adhesive layer provided on the insulating layer surface of the single-sided copper-clad laminate and a peelable organic film on the surface of the insulating adhesive layer, a single-sided copper-clad laminate is provided. It can be obtained by attaching a peelable organic film coated with an insulating adhesive layer to the surface of the insulating layer.
[0012]
The peelable organic film needs to be easily processed with a laser used for forming a non-through hole. From this point, an organic film is preferable. In the case where a thermosetting resin or the like serving as an insulating adhesive layer is applied to a peelable organic film, heat resistance at this heating temperature is required to remove the solvent by heating after application. As such an organic film, polyethylene terephthalate, polypropylene, poly-4-methylpentene-1, polyfluorinated ethylene and the like can be used. These organic films have a thickness of 5 μm or more, and are desirably thin from the viewpoint of laser processing speed. A certain amount of thickness is necessary from the viewpoint of handleability. From such points, the thickness is preferably 10 μm to 70 μm. This organic film is peeled off after the conductive paste is printed and filled in the non-through holes. The filling of the conductive paste into the non-through holes is preferably a printing method. At the time of printing, the conductive paste is also applied to the insulating portion around the non-through hole. This inconvenient conductive paste needs to be removed. In the present invention, the applied conductive paste is removed by peeling off the organic film.
[0013]
A laser is used for drilling non-through holes. Examples of the laser include an excimer laser, a carbon dioxide gas laser, and the like, and a carbon dioxide laser is preferable from the viewpoint of processing speed and processing cost.
As the conductive paste filled in the non-through holes, a thermosetting conductive paste mixed with conductive particles such as metal particles, conductive organic matter, carbon, or a conductive paste using both ultraviolet curable and thermosetting, Similarly, a thermoplastic conductive paste in which conductive particles such as metal particles, conductive organic matter, and carbon are mixed can be used. These conductive pastes are filled in the non-through holes by printing or the like. The peelable organic film is removed after printing. As a result, the conductive paste is printed as thick as the amount related to the thickness of the organic film. The filling amount of the conductive paste is desirably substantially the same as the surface of the insulating adhesive layer. When the solvent is removed from the conductive paste by heating and the semi-cured state is obtained, the conductive paste shrinks. The amount of shrinkage depends on the solvent concentration. Thus, the desired loading can be obtained by optimizing the combination of film thickness and solvent content.
[0014]
As an inner layer circuit board used as a wiring board on which an inner layer circuit used in the present invention is formed, an epoxy resin type, phenol resin type or polyimide resin type single side copper clad laminate including a paper base material or a glass base material should be used. Can do. Moreover, the double-sided copper clad laminated board which consists of these resin and a base material can be used. Using these substrates, a conductor pattern is formed using both etching and plating and etching. Moreover, what formed the conductor pattern by the additive method on the epoxy resin type | system | group containing a paper base material and a glass base material, a phenol resin type | system | group, and a polyimide resin type | system | group can also be used. Moreover, what formed the conductor pattern in the surfaces, such as a metal substrate and a ceramic substrate, can also be used. When the inner layer substrate is a double-sided circuit board in which circuits are formed on both sides thereof, a double-sided circuit board filled with a conductive paste or an insulating resin can be used as the interlayer connection hole. Positioning is performed so that the wiring board on which these inner layer circuits are formed and the insulating adhesive layer filled with the conductive paste in the non-through holes are in contact with each other, and they are integrated by being pressurized and heated. In this step, the semi-cured conductive paste and the insulating adhesive layer are bonded and cured, and electrical connection between the layers is performed, and at the same time, the layers are multilayered. The heating temperature depends on the resin used, but is generally in the range of 160 ° C to 280 ° C. The pressure is generally in the range of 5 MPa to 50 MPa. Thereafter, wiring is formed on the surface copper foil by etching. Furthermore, in the case of multilayering on this surface, the conductive paste-filled insulating adhesive layer produced through the same process is superimposed to form a multilayer, and the copper foil on the surface is formed by etching to form a multilayer. To do.
[0015]
A thermosetting resin such as phenol resin, epoxy resin, polyimide resin or the like is used as an insulating layer used for a single-sided conductor pattern forming substrate in which a metal copper conductor pattern is formed on one surface of the insulating layer. This insulating layer is irradiated with a laser to make a hole for interlayer connection. When inorganic fibers exceeding the diameter of the interlayer connection are contained in this insulating layer, the time required for laser processing becomes long, and thus the productivity is remarkably lowered. For this reason, it is desirable that this insulating layer does not contain inorganic fibers having a length equal to or larger than the diameter of the hole in the laser.
A metal copper conductor pattern is formed on this insulating layer substrate by an additive method to produce a single-sided conductor pattern forming substrate. Alternatively, a single-sided conductor pattern forming substrate is manufactured by etching the copper foil of the above-mentioned single-sided copper-clad laminate.
[0016]
An organic film that can be peeled off from the insulating adhesive layer is provided on the surface of the insulating layer of the single-sided conductor pattern forming substrate by the method described above. Next, a non-through hole is formed by the above-described method, and after filling the conductive paste to make the conductive paste semi-cured, the organic film is peeled off. A single-sided conductor pattern-formed substrate with an insulating adhesive layer filled with a conductive paste is aligned with the surface of the wiring substrate on which the inner layer circuit is formed by the above-described method, and integrated by pressurizing and heating under the above-described conditions. . In this method, since the conductor pattern is already formed, multilayering is performed simultaneously with the pressure heating integration. This process is sequentially repeated to form a multilayer. In addition, the wiring board on which the inner layer circuit is formed by the above-described method and the single-sided conductor pattern forming substrate with the insulating adhesive layer filled with the second to n-th conductive pastes prepared by the above-described method are positioned. By combining them and integrating them under the above-mentioned pressure heating conditions, all the layers can be integrated by one pressurization heating, and at the same time, the formation and conduction of the conductor patterns of all the layers can be completed. Also, copper foil is used instead of the wiring board on which the inner layer circuit is formed, and the conductor pattern forming board obtained by the above method is used from the second layer to the (n-1) layer, and the outermost layer. By using the above-mentioned single-sided copper-clad laminate for the nth layer, all layers are integrated by a single pressurization and heating, and then the outer layer is etched to form a conductor pattern to obtain a multilayer wiring board You can also.
[0017]
As described above, since this method performs the multi-layer stacking step and the interlayer connection step at the same time, the manufacturing process of the multilayer wiring board manufactured through the conventional complicated steps can be greatly simplified. Further, since a minute diameter with a diameter of 0.1 mm can be processed in order to make a non-through hole with a laser, a high-density multilayer wiring board can be manufactured.
[0018]
【Example】
Example 1
As shown in FIG. 1 (1), an epoxy resin adhesive film AS-6000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is bonded to an 18 μm thick copper foil as an insulating layer and cured to obtain an overall thickness. A single-sided copper-clad laminate having a thickness of 0.1 mm was prepared.
Next, as shown in FIG. 1 (2), AS-6000 as an insulating adhesive layer was applied to a 30 μm thick polyethylene terephthalate film as a peelable organic film to make it a semi-cured state. A laminated multilayer board material was prepared such that the surface of the insulating adhesive layer of the insulating adhesive layer-coated film was in contact with the surface of the insulating layer of the single-sided copper-clad laminate.
Next, as shown in FIG. 1 (3), a non-through hole with a diameter of 0.15 mm reaching the copper foil was formed by irradiating a carbon dioxide laser to a place where electrical connection between layers was performed.
Next, as shown in FIG. 1 (4), copper paste NF-2000 (trade name, manufactured by Tatsuta Electric Co., Ltd.) is printed on the polyethylene terephthalate film surface, and the copper paste is filled into the non-through holes at 150 ° C. Dried for 10 minutes.
Next, as shown in FIG. 1 (5), the polyethylene terephthalate film was peeled off.
Next, as shown in FIG. 1 (6), a wiring pattern is formed by etching a glass epoxy single-sided copper-clad laminate having a copper foil thickness of 18 μm and an overall thickness of 0.2 mm. A multilayer board material in which a copper paste is filled in a non-through hole is superimposed on the surface of the formed wiring board, and a multilayer board is produced by pressurizing and heating at a pressure of 2.5 MPa and a temperature of 170 ° C. for 60 minutes. The copper foil was formed by etching.
Further, as shown in FIGS. 7, 8, and 9, the same steps were repeated to manufacture a multilayer wiring board having a third layer, a fourth layer, and a fifth layer.
[0019]
(Example 2)
As shown in FIG. 2 (1), a glass epoxy double-sided plate having a thickness of 0.1 mm was prepared.
Next, as shown in FIG. 2 (2), a 0.2 mm through hole was made.
Next, as shown in FIG. 2 (3), copper plating having a thickness of 12 μm was performed on the entire surface including the through holes, and then the through holes were filled with an insulating resin.
Next, as shown in FIG. 2 (4), a wiring board on which an inner layer circuit was formed by etching was obtained.
Next, as shown in FIGS. 2 (5) and (6), a multilayer board material was produced by the same method as shown in Example 1.
Next, as shown in FIG. 2 (7), the multilayer board material is aligned and stacked on the surface of the substrate on which the inner layer circuit is formed, and the multilayer board is heated under pressure at a pressure of 2.5 MPa and a temperature of 170 ° C. for 60 minutes. Was made.
Next, as shown in FIG. 2 (8), a circuit was formed by etching.
Further, a multilayer wiring board as shown in FIG. 2 (9) was manufactured by multilayering through the same steps as in FIGS. 2 (5), (6) and (7), and etching the copper foil on the surface.
[0020]
(Example 3)
As shown in FIG. 3 (1), an epoxy resin adhesive film AS-6000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an insulating layer is bonded and cured on a 18 μm thick copper foil, and the entire thickness is obtained. A single-sided copper-clad laminate having a thickness of 0.1 mm was prepared.
Next, as shown in FIG. 3B, the copper foil was etched to form a second layer conductor pattern.
Next, as shown in FIG. 3 (3), a thickness of 50 μm thick polyethylene terephthalate film as a peelable organic film coated with AS-6000 as an insulating adhesive layer to make it semi-cured. The 30 μm insulating adhesive layer-coated film was bonded so that the surface of the insulating adhesive layer was in contact with the surface of the insulating layer of the single-sided copper-clad laminate.
Next, as shown in FIG. 3 (4), a non-through hole with a diameter of 0.15 mm reaching the copper foil was formed by irradiating a carbon dioxide laser to a place where the connection between the layers was performed.
Next, as shown in FIG. 3 (5), copper paste NF-2000 (trade name, manufactured by Tatsuta Electric Wire Co., Ltd.) is printed on the polyethylene terephthalate film surface, and the copper paste is filled into the non-through holes at 150 ° C. Dried for 10 minutes.
Next, as shown in FIG. 3 (6), the polyethylene terephthalate film was peeled off.
Next, as shown in FIG. 3 (7), a glass epoxy single-sided copper-clad laminate with a copper foil thickness of 18 μm and an overall thickness of 0.2 mm is formed by etching to form an inner layer plate. Then, the single-sided wiring forming substrate filled with the copper paste is aligned on the surface of the wiring substrate on which the inner layer circuit is formed, and the second conductor layer is formed by pressurizing and heating at a pressure of 2.5 MPa and a temperature of 170 ° C. for 60 minutes. Produced.
Next, as shown in FIGS. 3 (8), (9), and (10), the copper paste-filled one side of the third layer, the fourth layer, and the fifth layer is performed by the same steps as (1) to (6). A wiring formation substrate was prepared, and a multilayer wiring board was manufactured in the same manner as in the step (7).
[0021]
(Example 4)
As shown in FIG. 4A, a glass epoxy double-sided plate having a thickness of 0.1 mm was prepared.
Next, as shown in FIG. 4 (2), a 0.2 mm through hole was made.
Next, as shown in FIG. 4 (3), copper plating with a thickness of 12 μm including the through holes was performed, and the through holes were filled with an insulating resin.
Next, as shown in FIG. 4 (4), a wiring board having an inner layer circuit formed by etching was produced.
Next, as shown in FIGS. 4 (5) and (6), a single-sided conductor pattern-formed substrate filled with a copper paste was produced by the same method as shown in Example 3.
Next, as shown in FIG. 4 (7), the single-sided conductor pattern forming substrate filled with the copper paste is aligned and overlapped on the surface of the wiring substrate on which the inner layer circuit is formed, pressure 2.5 MPa, temperature 170 ° C., 60 minutes, A multilayer board was produced by heating under pressure.
Further, as shown in FIG. 4 (8), a multilayer wiring board was manufactured through the same steps as in FIGS. 4 (5), (6), and (7).
[0022]
(Example 5)
As shown in FIG. 5 (1), an epoxy resin adhesive film AS-6000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an insulating layer is bonded to an 18 μm thick copper foil and cured to obtain an overall thickness. A single-sided copper-clad laminate having a thickness of 0.1 mm was prepared.
Next, as shown in FIG. 5 (2), the copper foil was etched to form a second layer conductor pattern.
Next, as shown in FIG. 5 (3), as a peelable organic film, a 50 μm thick polyethylene terephthalate film was coated with AS-6000 as an insulating adhesive layer to a semi-cured thickness of 30 μm. The insulating adhesive layer-coated film was bonded so that the surface of the insulating adhesive layer was in contact with the surface of the insulating layer of the single-sided copper-clad laminate. Next, as shown in FIG. 5 (4), a non-through hole with a diameter of 0.15 mm that reaches the copper foil was formed by irradiating a carbon dioxide laser at a place where electrical connection between layers was performed.
Next, as shown in FIG. 5 (5), copper paste NF-2000 (product name, manufactured by Tatsuta Electric Wire Co., Ltd.) is printed on the surface of the polyethylene terephthalate film, and the copper paste is filled in the non-through holes at 150 ° C. Dried for 10 minutes.
Next, as shown in FIG. 5 (6), the polyethylene terephthalate film was peeled off to produce a single-sided conductor pattern-formed substrate filled with copper paste.
Similarly, as shown in FIGS. 5 (9), (8) and (7), single-sided conductor pattern-formed substrates serving as the third layer, the fourth layer, and the fifth layer were produced.
Next, as shown in FIG. 5 (10), a wiring pattern is formed by etching a glass epoxy single-sided copper-clad laminate having a copper foil thickness of 18 μm and an overall thickness of 0.2 mm to form an inner layer circuit. The formed wiring board was produced.
Next, as shown in FIG. 5 (11), the single-sided conductor pattern forming substrate filled with the copper paste of the second layer to the fifth layer is sequentially stacked and aligned on the surface of the wiring substrate on which the inner layer circuit is formed, A multilayer wiring board was manufactured by applying pressure and heating at a pressure of 2.5 MPa and a temperature of 170 ° C. for 60 minutes.
[0023]
(Example 6)
As shown in FIG. 6 (1), an epoxy resin adhesive film AS-6000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an insulating layer is bonded to an 18 μm thick copper foil and cured to obtain an overall thickness. A single-sided copper-clad laminate having a thickness of 0.1 mm was prepared.
Next, as shown in FIG. 6 (2), the copper foil was etched to form a second layer conductor pattern.
Next, as shown in FIG. 6 (3), as a peelable organic film, a polyethylene terephthalate film having a thickness of 50 μm is coated with AS-6000 as an insulating adhesive layer so as to be in a semi-cured state. The films were bonded so that the surface of the insulating adhesive layer of the insulating adhesive layer-coated film was in contact with the surface of the insulating layer of the single-sided copper-clad laminate. Next, as shown in FIG. 6 (4), a non-through hole with a diameter of 0.15 mm that reaches the copper foil was formed by irradiating a carbon dioxide laser at a place where electrical connection between layers was performed.
Next, as shown in FIG. 6 (5), copper paste NF-2000 (trade name, manufactured by Tatsuta Electric Wire Co., Ltd.) is printed on the polyethylene terephthalate film surface, and the copper paste is filled in the non-through holes at 150 ° C. Dried for 10 minutes.
Next, as shown in FIG. 6 (6), the polyethylene terephthalate film was peeled off to produce a single-sided conductor pattern-formed substrate filled with the second layer of copper paste.
Similarly, as shown in FIG. 6 (8), a single-sided conductor pattern-formed substrate filled with the third-layer copper paste was produced.
As shown in FIG. 6 (7), a multilayer board material filled with a fourth layer of copper paste was produced by the same steps as those in FIGS. 1 (1) to (5) of Example 1.
Next, as shown in FIG. 6 (9), a 18 μm thick copper foil was prepared, and as shown in FIG. 6 (10), the first layer copper foil, the second layer, and the third layer copper paste The single-sided conductor pattern-formed substrate filled with the material and the multilayer board material filled with the fourth layer of copper paste are sequentially stacked and aligned, and the pressure is 2.5 MPa, the temperature is 170 ° C. and the pressure is heated for 60 minutes to be integrated. A multilayer board was prepared.
Next, as shown in FIG. 6 (11), the outermost layer wiring was formed by an etching method to manufacture a multilayer wiring board.
[0024]
【The invention's effect】
As described above, according to the present invention, it is possible to manufacture a multilayer wiring board capable of increasing the wiring density by a simple process.
[Brief description of the drawings]
FIGS. 1 (1) to (9) are cross-sectional views of a substrate showing an embodiment of a method for producing a multilayer wiring board according to the present invention.
FIGS. 2 (1) to (9) are cross-sectional views of a substrate showing an embodiment of a method for producing a multilayer wiring board according to the present invention.
FIGS. 3 (1) to (10) are cross-sectional views of a substrate showing an embodiment of a method for producing a multilayer wiring board according to the present invention.
4 (1) to (8) are cross-sectional views of a substrate showing an embodiment of a method for producing a multilayer wiring board according to the present invention.
5 (1) to (11) are cross-sectional views of a substrate showing an embodiment of a method for producing a multilayer wiring board according to the present invention.
6 (1) to (11) are cross-sectional views of a substrate showing an embodiment of a method for producing a multilayer wiring board according to the present invention.

Claims (7)

導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法。
(a)片面銅張積層板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設けた多層板用材料の有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、銅箔に到達する非貫通穴をあける工程、
(b)非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程、
(c)有機フイルムを引き剥がす工程、
(d)内層回路を形成した配線基板の表面に(c)の工程で得た材料の銅箔が外側になるように位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行う工程、
(e)エッチングにより外側の銅箔に導体パターンを形成する工程、
(f)更に多層化する場合に(a)から(e)までの工程を繰り返して多層配線板を製造する工程。
In the manufacturing method of the multilayer wiring board which performs interlayer connection with an electrically conductive paste, the manufacturing method of a multilayer wiring board characterized by performing the following process order including the following processes.
(A) A laser is applied to the surface of the organic film of the multilayer board material in which an insulating adhesive layer and a peelable organic film are provided on the surface of the insulating layer of the single-sided copper-clad laminate. Irradiating and making a non-through hole that reaches the copper foil at a place where electrical connection between layers is made,
(B) filling the non-through holes with a conductive paste and making the conductive paste semi-cured;
(C) a step of peeling off the organic film,
(D) The copper foil of the material obtained in the step (c) is aligned and overlapped on the surface of the wiring board on which the inner layer circuit is formed, and is heated and integrated to form a semi-cured state. A process of bonding and curing the conductive paste and the insulating adhesive layer to electrically connect the layers;
(E) forming a conductor pattern on the outer copper foil by etching;
(F) A step of manufacturing a multilayer wiring board by repeating the steps (a) to (e) in the case of further multilayering.
導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法。
(a)絶縁層の一方の面に金属銅導体パターンを形成した片面導体パターン形成基板を製造する工程、
(b)片面導体パターン形成基板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程、
(c)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、金属銅導体パターンの裏面に到達する非貫通穴をあける工程、
(d)非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程、
(e)有機フイルムを引き剥がす工程、
(f)内層回路を形成した配線基板の表面に(e)の工程で得た導電性ペーストを充填した片面導体パターン形成基板の導体パターンが外側になるように位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行う工程、
(g)更に多層化する場合に(a)から(f)までの工程を繰り返して多層配線板を製造する工程。
In the manufacturing method of the multilayer wiring board which performs interlayer connection with an electrically conductive paste, the manufacturing method of a multilayer wiring board characterized by performing the following process order including the following processes.
(A) a step of producing a single-sided conductor pattern forming substrate in which a metal copper conductor pattern is formed on one surface of the insulating layer;
(B) a step of providing an insulating adhesive layer on the surface of the insulating layer of the single-sided conductor pattern forming substrate and a peelable organic film on the surface of the insulating adhesive layer;
(C) irradiating the surface side of the peelable organic film with a laser to form a non-through hole reaching the back surface of the metallic copper conductor pattern at a place where electrical connection between layers is performed;
(D) filling a non-through hole with a conductive paste and making the conductive paste semi-cured;
(E) a step of peeling off the organic film,
(F) Align and overlap the surface of the wiring board on which the inner layer circuit is formed with the conductive pattern of the single-sided conductor pattern forming board filled with the conductive paste obtained in the step (e), and pressurize and heat A step of bonding and curing the semi-cured conductive paste and the insulating adhesive layer to make electrical connection between the layers,
(G) A step of manufacturing a multilayer wiring board by repeating the steps (a) to (f) in the case of further multilayering.
内層回路を形成した配線基板として層間接続穴が導電性ペーストまたは絶縁性樹脂で充填され、両面に配線が形成された配線基板を使用する請求項1または請求項2に記載の多層配線板の製造方法。  3. The multilayer wiring board according to claim 1, wherein a wiring board in which interlayer connection holes are filled with a conductive paste or an insulating resin and wiring is formed on both surfaces is used as a wiring board on which an inner layer circuit is formed. Method. 導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法。
(a)第1層目となる導体パターンを形成した内層回路板を製造する工程、
(b)絶縁層の一方の面に第2層目の導体パターンを形成した片面導体パターン形成基板を製造する工程、
(c)片面導体パターン形成基板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程、
(d)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、片面導体パターンの裏面に到達する非貫通穴をあける工程、
(e)非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程、
(f)第2層目を越える導体層についても(b)から(e)の工程を繰り返すことにより、第n層目の導体パターンをそれぞれ形成した片面導体パターン形成基板を製造する工程、
(g)片面導体パターン形成基板から有機フイルムを引き剥がす工程、
(h)第1層目となる導体パターンを形成した内層回路板の導体パターン表面に(b)から(g)の工程で得た導電性ペーストを充填した片面導体パターン形成基板を位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行うことにより多層配線板を製造する工程。
In the manufacturing method of the multilayer wiring board which performs interlayer connection with an electrically conductive paste, the manufacturing method of a multilayer wiring board characterized by performing the following process order including the following processes.
(A) a step of producing an inner circuit board on which a conductor pattern serving as a first layer is formed;
(B) a step of producing a single-sided conductor pattern forming substrate in which a second layer conductor pattern is formed on one surface of the insulating layer;
(C) a step of providing an insulating adhesive layer on the surface of the insulating layer of the single-sided conductor pattern forming substrate and a peelable organic film on the surface of the insulating adhesive layer;
(D) irradiating the surface of the peelable organic film with a laser to form a non-through hole reaching the back surface of the single-sided conductor pattern at a place where electrical connection between layers is performed;
(E) filling a non-through hole with a conductive paste to make the conductive paste semi-cured;
(F) A step of manufacturing a single-sided conductor pattern forming substrate in which the nth layer conductor pattern is formed by repeating the steps (b) to (e) for the conductor layer exceeding the second layer,
(G) a step of peeling the organic film from the single-sided conductor pattern forming substrate;
(H) A single-sided conductor pattern forming substrate filled with the conductive paste obtained in the steps (b) to (g) is positioned on the conductor pattern surface of the inner layer circuit board on which the conductor pattern as the first layer is formed. A process of manufacturing a multilayer wiring board by stacking, heating and integrating to form a semi-cured conductive paste and an insulating adhesive layer, and to make an electrical connection between the layers.
内層回路板として層間接続穴が導電性ペーストまたは絶縁性樹脂で充填され、両面に配線が形成された両面板を使用し、その表面に第2層目以上の片面導体パターン形成基板を位置合わせして重ね、加圧加熱して一体化する請求項4に記載の多層配線板の製造方法。  Use a double-sided board in which interlayer connection holes are filled with conductive paste or insulating resin and wiring is formed on both sides as the inner-layer circuit board. The method for producing a multilayer wiring board according to claim 4, wherein the layers are integrated by pressing and heating. 導電性ペーストで層間接続を行うn層からなる多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法。
(a)第n層目の導体層となる銅箔を絶縁層の片面に設けた片面銅張積層板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程、
(b)第2層目から第(n−1)層目の金属銅導体パターンを形成した片面導体パターン形成基板を製造する工程、
(c)第2層目から第(n−1)層目の片面導体パターン形成基板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程、
(d)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、第n層目の銅箔と第2層目から第(n−1)層目の片面導体パターン形成基板の裏面に到達する非貫通穴をあける工程、
(e)この非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程、
(f)有機フイルムを引き剥がす工程、
(g)第1層目の導体を形成するための銅箔と(a)から(f)までの工程で得た導電性ペーストを充填した片面導体パターン形成基板および第n層目の片面銅張積層板を位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行うことによって多層基板を製造する工程、
(h)最外層の銅箔をエッチングすることにより第1層目および第n層目の外層回路を形成し多層配線板を製造する工程。
In the manufacturing method of the multilayer wiring board which consists of n layer which performs interlayer connection with an electrically conductive paste, the manufacturing method of a multilayer wiring board characterized by performing the following process order including the following processes.
(A) The copper foil as the nth conductor layer can be peeled off on the surface of the insulating adhesive layer and the surface of the insulating adhesive layer on the insulating layer surface of the single-sided copper-clad laminate provided on one side of the insulating layer Providing an organic film,
(B) a step of producing a single-sided conductor pattern-formed substrate on which the second to (n-1) th layer metal copper conductor patterns are formed;
(C) The insulating adhesive layer and the peelable organic film are provided on the surface of the insulating layer of the single-sided conductor pattern forming substrate from the second layer to the (n-1) -th layer. Process,
(D) The surface side of the peelable organic film is irradiated with laser, and the n-th layer copper foil and the second to (n−1) -th layers are placed at the place where electrical connection between the layers is performed. A process of making a non-through hole reaching the back surface of the single-sided conductor pattern forming substrate of
(E) filling the non-through holes with a conductive paste to make the conductive paste semi-cured;
(F) a step of peeling off the organic film;
(G) A single-sided conductor pattern-formed substrate filled with a copper foil for forming a first-layer conductor and the conductive paste obtained in the steps (a) to (f), and a single-sided copper-clad n-th layer A process for manufacturing a multilayer substrate by aligning and stacking laminated plates, and applying pressure to heat and integrating them to bond and cure a semi-cured conductive paste and an insulating adhesive layer to make electrical connection between the layers ,
(H) A step of manufacturing a multilayer wiring board by etching the outermost copper foil to form first and nth outer layer circuits.
導電性ペーストで層間接続を行う多層配線板の製造方法において、以下の工程を含み以下の工程順に行うことを特徴とする多層配線板の製造方法。
(a)内層回路を形成した配線基板として、層間接続穴を導電性ペーストまたは絶縁性樹脂で充填し、両面に配線を形成した内層回路を形成した配線基板を作製する工程、
(b)最外層用基板として、導体層となる銅箔を絶縁層の片面に設けた片面銅張積層板の絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程、
(c)最外層用基板と内層回路を形成した配線基板を除く導体層用基板として、金属銅導体パターンを形成した片面導体パターン形成基板を作製し、その絶縁層表面に絶縁性接着剤層とその絶縁性接着剤層の表面に引き剥がし可能な有機フイルムを設ける工程、
(d)引き剥がし可能な有機フイルムの面側にレーザを照射して、層間の電気的接続を行う場所に、最外層用基板の銅箔と金属銅導体パターンの裏面に到達する非貫通穴をあける工程、
(e)この非貫通穴に導電性ペーストを充填して、この導電性ペーストを半硬化状態にする工程、
(f)有機フイルムを引き剥がす工程、
(g)内層回路を形成した配線基板の両面に、(b)(c)(d)(e)(f)の工程で作製した片面導体パターン形成基板とその外側に最外層用基板を位置合わせして重ね、加圧加熱して一体化させて半硬化状態の導電性ペーストと絶縁性接着剤層を接着硬化させ層間の電気的接続を行うことにより多層基板を製造する工程、
(h)最外層の銅箔をエッチングして外層回路を形成し多層配線板を製造する工程。
In the manufacturing method of the multilayer wiring board which performs interlayer connection with an electrically conductive paste, the manufacturing method of a multilayer wiring board characterized by performing the following process order including the following processes.
(A) As a wiring board on which an inner layer circuit is formed, a step of producing a wiring board in which an interlayer connection hole is filled with a conductive paste or an insulating resin and an inner layer circuit in which wiring is formed on both surfaces is formed;
(B) As a substrate for the outermost layer, a copper foil serving as a conductor layer is peeled off on the surface of the insulating adhesive layer and the surface of the insulating adhesive layer on the insulating layer surface of the single-sided copper clad laminate provided on one side of the insulating layer. Providing a possible organic film,
(C) As a conductor layer substrate excluding the outermost layer substrate and the wiring substrate on which the inner layer circuit is formed, a single-sided conductor pattern forming substrate in which a metal copper conductor pattern is formed is prepared, and an insulating adhesive layer is formed on the insulating layer surface. Providing a peelable organic film on the surface of the insulating adhesive layer;
(D) The surface of the peelable organic film is irradiated with a laser, and a non-through hole that reaches the back surface of the copper foil of the outermost layer substrate and the metal copper conductor pattern is formed at a place where electrical connection between layers is performed. Manufacturing process,
(E) filling the non-through holes with a conductive paste to make the conductive paste semi-cured;
(F) a step of peeling off the organic film;
(G) The single-sided conductor pattern forming substrate prepared in the steps (b), (c), (d), (e), and (f) and the outermost layer substrate are aligned on both sides of the wiring substrate on which the inner layer circuit is formed. A process of producing a multilayer substrate by stacking, pressing and heating to integrate and semi-curing a conductive paste and an insulating adhesive layer to bond and cure, and to make electrical connection between the layers,
(H) A step of etching the outermost copper foil to form an outer layer circuit and manufacturing a multilayer wiring board.
JP8411896A 1996-04-05 1996-04-05 Manufacturing method of multilayer wiring board Expired - Fee Related JP3944921B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8411896A JP3944921B2 (en) 1996-04-05 1996-04-05 Manufacturing method of multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8411896A JP3944921B2 (en) 1996-04-05 1996-04-05 Manufacturing method of multilayer wiring board

Publications (2)

Publication Number Publication Date
JPH09275273A JPH09275273A (en) 1997-10-21
JP3944921B2 true JP3944921B2 (en) 2007-07-18

Family

ID=13821613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8411896A Expired - Fee Related JP3944921B2 (en) 1996-04-05 1996-04-05 Manufacturing method of multilayer wiring board

Country Status (1)

Country Link
JP (1) JP3944921B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105072830A (en) * 2015-09-10 2015-11-18 江门崇达电路技术有限公司 Layer deviation detection method

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MY144573A (en) 1998-09-14 2011-10-14 Ibiden Co Ltd Printed circuit board and method for its production
JP4489899B2 (en) * 2000-03-08 2010-06-23 イビデン株式会社 Method for manufacturing double-sided circuit board for multilayer printed wiring board
JP2001320167A (en) * 2000-05-10 2001-11-16 Ibiden Co Ltd Method of manufacturing multilayer circuit board
JP2001320169A (en) * 2000-05-10 2001-11-16 Ibiden Co Ltd Multilayer circuit board and its manufacturing method
JP3407737B2 (en) 2000-12-14 2003-05-19 株式会社デンソー Multilayer substrate manufacturing method and multilayer substrate formed by the manufacturing method
JP2002280742A (en) * 2001-03-16 2002-09-27 Hitachi Chem Co Ltd Multilayer printed wiring board and its manufacturing method
JP2002280741A (en) * 2001-03-16 2002-09-27 Hitachi Chem Co Ltd Multilayer printed wiring board and its manufacturing method
JP4683758B2 (en) * 2001-04-26 2011-05-18 京セラ株式会社 Wiring board manufacturing method
JP4691850B2 (en) * 2001-08-06 2011-06-01 住友ベークライト株式会社 WIRING BOARD FOR MANUFACTURING MULTILAYER WIRING BOARD, MULTILAYER WIRING BOARD, AND METHOD FOR PRODUCING THEM
JP2007266323A (en) * 2006-03-28 2007-10-11 Matsushita Electric Works Ltd Substrate incorporating electronic component, manufacturing method thereof, and manufacturing method of electronic component
CN112888198A (en) * 2020-12-30 2021-06-01 恩达电路(深圳)有限公司 Production method of multilayer blind buried hole heat-conducting thick copper plate
CN114501855B (en) * 2021-12-08 2024-02-02 江苏普诺威电子股份有限公司 Manufacturing process of double-sided buried wire ultrathin circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105072830A (en) * 2015-09-10 2015-11-18 江门崇达电路技术有限公司 Layer deviation detection method
CN105072830B (en) * 2015-09-10 2019-04-02 江门崇达电路技术有限公司 A kind of inclined detection method of layer

Also Published As

Publication number Publication date
JPH09275273A (en) 1997-10-21

Similar Documents

Publication Publication Date Title
KR101116079B1 (en) Method for manufacturing multilayer printed circuit board and multilayer printed circuit board
US20020016018A1 (en) Method of manufacturing multi-layer printed wiring board
JP3944921B2 (en) Manufacturing method of multilayer wiring board
JP2002094200A (en) Circuit board, electric insulating material therefor and method of manufacturing the same
KR20090068227A (en) Multilayer printed wiring board and method for manufacturing the same
TW201406224A (en) Multilayer printed circuit board and method for manufacturing same
JP3899544B2 (en) Manufacturing method of multilayer wiring board
JPH0837380A (en) Multilayred wiring board with terminal
JPH07106765A (en) Multilayered adhesive sheet and manufacture of multilayered wiring board using same
JP3705370B2 (en) Manufacturing method of multilayer printed wiring board
JPH1187922A (en) Manufacture of multilayered wiring board
JPH10261872A (en) Material for multilayer wiring board, its manufacture, and manufacture of multilayer wiring board using it
JPH1187923A (en) Manufacture of multilayered wiring board
JPH0199288A (en) Manufacture of multi-layer printed wiring board
JP2002329967A (en) Method of manufacturing multilayer printed wiring board
JP2002344141A (en) Multilayer circuit board and manufacturing method thereof
JPH07221460A (en) Manufacture of multilater printed wiring board
JP4058218B2 (en) Method for manufacturing printed wiring board
JPH06196862A (en) Manufacture of multilayer printed-wiring board
JP3968600B2 (en) Manufacturing method of multilayer printed wiring board
JP2005026548A (en) Method for manufacturing multi-wire wiring board
JPH08288656A (en) Manufacture of multilayered printed wiring board
JP3973654B2 (en) Method for manufacturing printed wiring board
JPH07336002A (en) Wiring board and manufacture thereof
JP2008181915A (en) Multilayer printed-wiring board and manufacturing method thereof

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060308

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060412

A521 Written amendment

Effective date: 20060605

Free format text: JAPANESE INTERMEDIATE CODE: A523

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20060605

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20061212

A521 Written amendment

Effective date: 20070129

Free format text: JAPANESE INTERMEDIATE CODE: A523

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070320

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070402

LAPS Cancellation because of no payment of annual fees