JP3785126B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP3785126B2
JP3785126B2 JP2002264014A JP2002264014A JP3785126B2 JP 3785126 B2 JP3785126 B2 JP 3785126B2 JP 2002264014 A JP2002264014 A JP 2002264014A JP 2002264014 A JP2002264014 A JP 2002264014A JP 3785126 B2 JP3785126 B2 JP 3785126B2
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Prior art keywords
substrate
resin
semiconductor device
case member
resin portion
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JP2004103842A (en
Inventor
昭光 長岡
隆 大友
秀明 加藤
哲男 野本
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Shindengen Electric Manufacturing Co Ltd
Sanyo Electric Co Ltd
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Shindengen Electric Manufacturing Co Ltd
Sanyo Electric Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

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  • Casings For Electric Apparatus (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【0001】
【発明の属する技術分野】
この発明は、電子部品を搭載した複数の基板を有する半導体装置に関する。
【0002】
【従来の技術】
一般に、大電力電子部品モジュールとして使用される半導体装置には、パワートランジスタモジュールやスイッチング電源モジュール等がある。従来、このような半導体装置は、図3に示すように、箱状部材100と、箱状部材100の底部に配置され、下面に放熱部材との接続面を有するベース基板101と、ベース基板101の上面に実装された電子部品102と、ベース基板101の上方に箱状部材100に支えられるように配置された制御基板104と、制御基板104の上面に実装された電子部品105とを備えている(例えば、特許文献1参照)。
【0003】
ベース基板101の上面側には電子部品102を埋没させる第1の樹脂部107が形成されており、この第1の樹脂部107の上面側には第2の樹脂部108が形成されている。第1の樹脂部107としてはゲル状のシリコーン樹脂が使用され、第2の樹脂部108としてはエポキシ樹脂が使用されている。なお、ゲル状のシリコーン樹脂は、エポキシ樹脂と比較して熱膨張係数が大きい。
【0004】
【特許文献1】
特開2001−210758号公報
【0005】
【発明が解決しようとする課題】
しかしながら、上記従来の半導体装置においては、シリコーン樹脂の熱膨張係数はエポキシ樹脂よりも大きく、また、シリコーン樹脂からなる第1の樹脂部107は、ベース基板101と第2の樹脂部108との間の空間に隙間なく満たされている。このため、モジュール全体の温度上昇に伴って第1の樹脂部107、第2の樹脂部108が膨張する場合には、この熱膨張係数の違いに基づいてベース基板101に応力が働き、ベース基板101に反りやクラックが発生して強度的信頼性が損なわれるという問題があった。
【0006】
また、上記従来の半導体装置では、この種の応力を緩和するために、第1の樹脂部107の上部にその一部を収納する空間を設けていたが、シリコーン樹脂の上面にエポキシ樹脂を充填していたため、この空間から離れた位置では応力を有効に緩和できず、上記の問題を依然解決することができなかった。
この発明は、上述した事情に鑑みてなされたものであって、ベース基板のクラック、反りを防止して強度信頼性の向上を図ることができる半導体装置を提供することを目的としている。
【0007】
【課題を解決するための手段】
上記課題を解決するために、この発明は以下の手段を提案している。
請求項1に係る発明は、エポキシ樹脂よりも熱膨張係数が大きいゲル状の樹脂部により被覆される半導体チップを搭載した第1の基板と、該第1の基板に電気的に接続される第2の基板と、これら第1、第2の基板を厚み方向に離した状態で固定するケース部材とを備え、該ケース部材は、前記第1および第2の基板間を仕切る板状の仕切壁を有し、該仕切壁と前記樹脂部との間に間隔をあけた状態で前記第1の基板を収容する凹部とを備え、前記第1の基板が、前記凹部の開口を閉塞し、前記ケース部材の外方の空間と、前記仕切壁と前記樹脂部との間に形成された内部空間とを連通する貫通孔が、前記ケース部材に設けられている半導体装置を提案している。
【0008】
この発明に係る半導体装置によれば、樹脂部と仕切壁との間に空間が形成されているため、ヒートサイクルに起因して樹脂部が膨張収縮しても、第1の基板に応力が働くことがない。
また、第1の基板が凹部の開口を閉塞しているため、第1の基板に形成されるゲル状の樹脂部が凹部の開口からケース部材の外方に漏れ出すことがない。
また、この発明に係る半導体装置によれば、仕切壁と樹脂部との間に形成された内部空間が、ケース部材の外側の空間に連通しているため、ヒートサイクルに起因して樹脂部が膨張収縮したり、内部空間内の温度が変化したりしても、この内部空間内の気圧がケース部材外側の空間の気圧と等しい状態に保持され、第1の基板に応力が働くことがない。
【0009】
また、請求項2に係る発明は、請求項1に記載の半導体装置において、前記貫通孔が、前記樹脂部に対向する前記凹部の底面に開口している半導体装置を提案している。
【0010】
また、請求項3に係る発明は、請求項1または請求項2に記載の半導体装置において、前記第1の基板が金属板からなり、該第1の基板に、放熱部材が直接取り付けられている半導体装置を提案している。
この発明に係る半導体装置によれば、半導体装置の内部、特に、第1の基板に搭載された半導体チップから発生した熱は、金属板を備えた第1の基板を介して放熱部材から外方に放熱することになるため、効率よく外部に放熱することが可能となる。
【0011】
また、請求項4に係る発明は、請求項1から請求項3のいずれかに記載の半導体装置において、前記第2の基板を被覆すると共に、該第2の基板を前記ケース部材に一体的に固定する前記樹脂部よりも硬度の高い樹脂からなる硬質樹脂部を備える半導体装置を提案している。
この発明によれば、第2の基板が硬質樹脂部により被覆されているため、外方からの衝撃に対して第2の基板の損傷を防止できる。
【0012】
【発明の実施の形態】
図1および図2はこの発明に係る一実施形態を示す。この実施の形態に係る半導体装置1は、図1に示すように、箱状部材(ケース部材)2と、ベース基板(第1の基板)3と、制御基板(第2の基板)4とを備えている。
箱状部材2は、ポリブチレンテレフタレートから形成されており、図2に示すように、平面視略矩形の薄板状に形成された薄板壁部(仕切壁)5と、薄板壁部5の周囲を取り囲む4つの側壁部6とを備えている。対向に配置された一対の側壁部6の間には、薄板壁部5の裏面5a側に突出する突出壁部7が形成されている。これら薄板壁部5と、側壁部6と、突出壁部7とにより、第1の凹部(凹部)9が形成されている。また、薄板壁部5の表面5b側には、薄板壁部5と側壁部6とにより第2の凹部11が形成されている。
【0013】
第1の凹部9を形成する側壁部6および突出壁部7の下端部には切欠部12が形成されている。この切欠部12にベース基板3を嵌め込むことにより、ベース基板3により第1の凹部9の開口9bを閉塞すると共に、箱状部材2に対するベース基板3の位置決めが行われることになる。
薄板壁部5の表面5bには、1つの側壁部6の内面6aから延在する段部13が形成されている。また、側壁部6に隣接する別の側壁部6の内面6aから突出する突出部14が形成されており、突出部14の上面14aは、段部13の上面13aと同じ高さに位置している。制御基板4は、箱状部材2に取り付けられる際に、これら段部13および突出部14の上面13a,14aに当接するように配置されることになる。
【0014】
段部13および薄板壁部5には、その表面13aから裏面5aまで貫通する複数の貫通孔15が形成されており、これら貫通孔15は、ベース基板3と制御基板4とを電気的に接続するための接続導線を挿通させるためのものである。
また、薄板壁部5のうち、第1の凹部9を構成する部分には、裏面5aから表面5bに貫通する貫通孔31が形成されている。この貫通孔31は、ベース基板3を第1の凹部9の切欠部12に嵌めた状態で後述するシリコーン樹脂を流し込むためのものである。なお、この貫通孔31は、図1に示す状態においては、粘着テープ等のシール部材32により閉塞されている。
さらに、段部13、薄板壁部5およびこれらに隣接する側壁部6には、第1の凹部9の底面9aから外面6bに貫通する貫通孔16が形成されている。
【0015】
ベース基板3は、その表面3aに半導体チップ21がボンディングワイヤによりベース基板3の回路と電気的に接続されると共に、制御基板4の回路と電気的に接続するための金属製の接続導線22がベース基板3の回路と電気的に接続されたものである。また、このベース基板3は、金属板の表面に絶縁シートを形成し、この絶縁シートの表面3aに回路を形成したものであり、この金属板の裏面3bに直接放熱部材(図示せず)を設けることで、半導体チップ21から発生する熱が、金属板を介して放熱部材から効率よく外方に放熱できるようになっている。
【0016】
半導体チップ21は、埃等から保護するために第1の樹脂部(樹脂部)24の内部に埋没しており、この第1の樹脂部24は、ゲル状のシリコーン樹脂から形成されている。
このベース基板3は、半導体チップ21および第1の樹脂部24を第1の凹部9の底面9aに間隔を空けて対向させた状態で、第1の凹部9の開口9bを閉塞して箱状部材2に固定されている。この状態では、接続導線22が、貫通孔15に挿入されると共に、その先端部が段部13の表面13aから突出することになる。そして、第1の凹部9の底面9aと第1の樹脂部24との間に内部空間S1が形成されることになり、この内部空間S1は、箱状部材2の外側の空間と貫通孔16により連通している。
【0017】
制御基板4は、その表面4aおよび裏面4bに電子部品25を半田により制御基板4の回路と電気的に接続したものである。この電子部品25は、第2の凹部11に充填された第2の樹脂部(硬質樹脂部)26の内部に埋没している。第2の樹脂部26は、電気的絶縁性の高いエポキシ樹脂から形成されており、制御基板4と箱状部材2とを一体化させている。
【0018】
以下、上記のように構成された半導体装置1の製造方法について説明する。
はじめに、ベース基板3の表面3aに半導体チップ21および接続導線22を装着する。次いで、切欠部12にベース基板3を嵌め込んで、第1の凹部9の開口9bを閉塞させた状態で箱状部材2にベース基板3を固定すると共に、接続導線22を貫通孔15に挿入して段部13の表面13a側に貫通させる。この状態では、ベース基板3の裏面3bが箱状部材2の外側に向けて位置する。
【0019】
そして、貫通孔31から第1の凹部9の内部にシリコーン樹脂を流し込み、シリコーン樹脂によりベース基板3に搭載された半導体チップ21をボンディングワイヤと共に埋没させる第1の樹脂部24を形成する。その後、この貫通孔31をシール部材32により閉塞する。この状態では、第1の樹脂部24の表面が第1の凹部9の底面9aに当接しないようになっている。
【0020】
そして、制御基板4の表面4aおよび裏面4bに電子部品25を装着する。その後、第2の凹部11内に制御基板4を配置して、制御基板4の回路と接続導線22とを半田等により固定して、ベース基板3と制御基板4とを電気的に接続する。最後に、第2の凹部11内にエポキシ樹脂を充填することにより、制御基板4を埋没させると共に、箱状部材2と制御基板4とを一体化させる第2の樹脂部26を形成する。以上により、半導体装置1の製造が終了する。
【0021】
上記のように、この半導体装置1によれば、ベース基板3および制御基板4が薄板壁部5により仕切られた状態で箱状部材2に配置されるため、第1、第2の樹脂部24,26が互いに接触することがない。そして、第1の樹脂部24と、第1の凹部9の底面9aとの間に内部空間S1が形成されているため、ヒートサイクルに起因して第1の樹脂部24が膨張収縮しても、ベース基板3に応力が働くことがない。
【0022】
さらに、内部空間S1と箱状部材2の外側の空間とが貫通孔16により連通されるため、ヒートサイクルに起因して第1の樹脂部24が膨張収縮したり、内部空間S1内の温度が変化したりしても、この内部空間S1内の気圧が箱状部材2外側の空間の気圧と等しい状態に保持され、ベース基板3に応力が働くことがない。
以上のことから、ベース基板3のクラック、反りを防止して強度信頼性の向上を図ることができる。
【0023】
また、ベース基板3が、ベース基板3は、金属板から構成されると共に、この金属板の裏面3bに直接放熱部材を設けるため、半導体装置1の内部、特に、ベース基板3に実装された半導体チップ21からの発熱を効率よく外方に放熱することが可能となる。
さらに、第2の樹脂部26が、薄板壁部5の表面5b側に配置された制御基板4を被覆すると共に、制御基板4を箱状部材2に一体的に固定するため、外方からの衝撃に対して制御基板4の損傷を防止できる。
【0024】
なお、上記の実施の形態においては、箱状部材2は、平面視略矩形状に形成されるとしたが、これに限ることはなく、少なくともベース基板3を設置するための第1の凹部9が形成された形状であればよい。また、第2の凹部11を形成する必要はなく、制御基板4は、第2の樹脂部26により箱状部材2と一体化されていればよい。
【0025】
さらに、箱状部材2に突出壁部7を設けるとしたが、突出壁部7を設けなくてもよい。この場合には、4つの側壁部6および薄板壁部5により第1の凹部9を形成し、第1の樹脂部24を第1の凹部9の底面9aに間隔を空けて対向させた状態で、第1の凹部9に嵌め込むことができる大きさのベース基板3を用意すればよい。
【0026】
また、内部空間S1と箱状部材2の外側の空間とを連通する貫通孔16は、第1の凹部9の底面9aから側壁部6bの外面6bに貫通しているとしたが、これに限ることはなく、例えば、側壁部6bの内面6aから外面6bに貫通するとしてもよい。ただし、この場合には、貫通孔16が内部空間S1を画定する側壁部の内面6aに開口している必要がある。
【0027】
さらに、シリコーン樹脂を流し込むための貫通孔31を薄板壁部5に形成するとしたが、形成しなくてもよい。この場合には、半導体チップ21を搭載したベース基板3を箱状部材2に固定する前に、シリコーン樹脂をベース基板3の表面3aに塗布して、半導体チップ21をボンディングワイヤと共に埋没させる第1の樹脂部24を形成しておけばよい。
以上、本発明の実施形態について図面を参照して詳述したが、具体的な構成はこの実施形態に限られるものではなく、本発明の要旨を逸脱しない範囲の設計変更等も含まれる。
【0028】
【発明の効果】
以上説明したように、請求項1に係る発明によれば、ヒートサイクルに起因して樹脂部が膨張収縮しても、第1の基板に応力が働くことがないため、第1の基板のクラック、反りを防止して強度信頼性の向上を図ることができる。
【0029】
また、請求項2に係る発明によれば、内部空間とケース部材外側の空間とが連通する貫通孔が形成されているため、内部空間内の気圧がケース部材外側の空間の気圧と等しい状態に保持されて、第1の基板に応力が働くことがない。したがって、第1の基板の強度信頼性向上をさらに図れる。
【0030】
また、請求項3に係る発明によれば、第1の基板の表面に放熱部材が設けられているため、半導体装置の内部、特に、第1の基板に搭載された半導体チップから発生した熱を効率よく外部に放熱することが可能となる。
【0031】
また、請求項4に係る発明によれば、硬質樹脂部により仕切壁の他面側に配置された第2の基板を被覆すると共に、第2の基板をケース部材に一体的に固定するため、外方からの衝撃に対して第2の基板の損傷を防止できる。
【図面の簡単な説明】
【図1】 この発明の実施形態に係る半導体装置の側断面図である。
【図2】 図1の半導体装置において、箱状部材を示す斜視図である。
【図3】 従来の半導体装置の一例を示す側断面図である。
【符号の説明】
1 半導体装置
2 箱状部材(ケース部材)
3 ベース基板(第1の基板)
4 制御基板(第2の基板)
5 薄板壁部(仕切壁)
9 第1の凹部(凹部)
9b 開口
16 貫通孔
21 半導体チップ
24 第1の樹脂部(樹脂部)
26 第2の樹脂部(硬質樹脂部)
S1 内部空間
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a plurality of substrates on which electronic components are mounted.
[0002]
[Prior art]
Generally, semiconductor devices used as high power electronic component modules include power transistor modules and switching power supply modules. Conventionally, as shown in FIG. 3, such a semiconductor device includes a box-shaped member 100, a base substrate 101 disposed on the bottom of the box-shaped member 100 and having a connection surface with a heat dissipation member on a lower surface, and a base substrate 101. An electronic component 102 mounted on the upper surface of the control board 104, a control board 104 disposed above the base substrate 101 so as to be supported by the box-like member 100, and an electronic component 105 mounted on the upper surface of the control board 104. (For example, refer to Patent Document 1).
[0003]
A first resin portion 107 for burying the electronic component 102 is formed on the upper surface side of the base substrate 101, and a second resin portion 108 is formed on the upper surface side of the first resin portion 107. As the first resin portion 107, a gel-like silicone resin is used, and as the second resin portion 108, an epoxy resin is used. Note that the gel-like silicone resin has a larger coefficient of thermal expansion than the epoxy resin.
[0004]
[Patent Document 1]
Japanese Patent Laid-Open No. 2001-210758
[Problems to be solved by the invention]
However, in the conventional semiconductor device, the thermal expansion coefficient of the silicone resin is larger than that of the epoxy resin, and the first resin portion 107 made of the silicone resin is between the base substrate 101 and the second resin portion 108. The space is filled with no gaps. Therefore, when the first resin portion 107 and the second resin portion 108 expand as the temperature of the entire module increases, stress acts on the base substrate 101 based on this difference in thermal expansion coefficient, and the base substrate There was a problem that warp and cracks occurred in 101 and strength reliability was impaired.
[0006]
Further, in the above conventional semiconductor device, in order to relieve this kind of stress, a space for storing a part of the first resin portion 107 is provided, but the upper surface of the silicone resin is filled with an epoxy resin. Therefore, the stress cannot be effectively relieved at a position away from this space, and the above problem still cannot be solved.
The present invention has been made in view of the above-described circumstances, and an object thereof is to provide a semiconductor device capable of improving strength reliability by preventing cracks and warpage of a base substrate.
[0007]
[Means for Solving the Problems]
In order to solve the above problems, the present invention proposes the following means.
According to a first aspect of the present invention, there is provided a first substrate on which a semiconductor chip covered with a gel-like resin portion having a thermal expansion coefficient larger than that of an epoxy resin is mounted, and a first substrate electrically connected to the first substrate. 2 and a case member that fixes the first and second substrates in a state of being separated in the thickness direction, and the case member is a plate-shaped partition wall that partitions the first and second substrates A recess for accommodating the first substrate in a state of being spaced from the partition wall and the resin portion, and the first substrate closes an opening of the recess, A semiconductor device has been proposed in which a through hole is provided in the case member to communicate a space outside the case member with an internal space formed between the partition wall and the resin portion.
[0008]
According to the semiconductor device of the present invention, since the space is formed between the resin portion and the partition wall, even if the resin portion expands and contracts due to the heat cycle, stress acts on the first substrate. There is nothing.
Moreover, since the 1st board | substrate has obstruct | occluded the opening of a recessed part, the gel-like resin part formed in a 1st board | substrate does not leak out of the case member from the opening of a recessed part.
Further, according to the semiconductor device of the present invention, the internal space formed between the partition wall and the resin portion communicates with the space outside the case member, so that the resin portion is caused by the heat cycle. Even if the expansion or contraction or the temperature in the internal space changes, the atmospheric pressure in the internal space is maintained in a state equal to the atmospheric pressure in the space outside the case member, and no stress acts on the first substrate. .
[0009]
The invention according to claim 2 proposes the semiconductor device according to claim 1, wherein the through hole is opened in a bottom surface of the recess facing the resin portion .
[0010]
According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the first substrate is made of a metal plate, and a heat dissipation member is directly attached to the first substrate. A semiconductor device is proposed.
According to the semiconductor device of the present invention, the heat generated from the inside of the semiconductor device, particularly from the semiconductor chip mounted on the first substrate, is outward from the heat dissipation member via the first substrate provided with the metal plate. Therefore, heat can be efficiently radiated to the outside.
[0011]
According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, the second substrate is covered and the second substrate is integrated with the case member. The semiconductor device provided with the hard resin part which consists of resin whose hardness is higher than the said resin part to fix is proposed.
According to this invention, since the 2nd board | substrate is coat | covered with the hard resin part, the damage of a 2nd board | substrate with respect to the impact from the outside can be prevented.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
1 and 2 show an embodiment according to the present invention. As shown in FIG. 1, the semiconductor device 1 according to this embodiment includes a box-shaped member (case member) 2, a base substrate (first substrate) 3, and a control substrate (second substrate) 4. I have.
The box-shaped member 2 is made of polybutylene terephthalate. As shown in FIG. 2, a thin plate wall portion (partition wall) 5 formed in a thin plate shape having a substantially rectangular shape in plan view, and a periphery of the thin plate wall portion 5. Four side wall portions 6 are provided. A protruding wall portion 7 that protrudes toward the back surface 5a side of the thin plate wall portion 5 is formed between the pair of side wall portions 6 that are arranged to face each other. The thin plate wall portion 5, the side wall portion 6, and the protruding wall portion 7 form a first concave portion (concave portion) 9. Further, on the surface 5 b side of the thin plate wall portion 5, a second concave portion 11 is formed by the thin plate wall portion 5 and the side wall portion 6.
[0013]
A notch 12 is formed at the lower end of the side wall 6 and the protruding wall 7 that form the first recess 9. By fitting the base substrate 3 into the notch 12, the base substrate 3 closes the opening 9 b of the first recess 9, and the base substrate 3 is positioned with respect to the box-shaped member 2.
On the surface 5 b of the thin plate wall portion 5, a step portion 13 extending from the inner surface 6 a of one side wall portion 6 is formed. In addition, a protruding portion 14 protruding from the inner surface 6a of another side wall portion 6 adjacent to the side wall portion 6 is formed, and the upper surface 14a of the protruding portion 14 is located at the same height as the upper surface 13a of the stepped portion 13. Yes. When the control board 4 is attached to the box-shaped member 2, the control board 4 is disposed so as to come into contact with the upper surfaces 13 a and 14 a of the stepped portion 13 and the protruding portion 14.
[0014]
The step portion 13 and the thin plate wall portion 5 are formed with a plurality of through holes 15 penetrating from the front surface 13 a to the back surface 5 a, and these through holes 15 electrically connect the base substrate 3 and the control substrate 4. It is for inserting the connection conducting wire for doing.
Further, a through-hole 31 penetrating from the back surface 5a to the front surface 5b is formed in a portion of the thin plate wall portion 5 constituting the first recess 9. The through hole 31 is for pouring a silicone resin, which will be described later, in a state where the base substrate 3 is fitted in the notch 12 of the first recess 9. The through hole 31 is closed by a sealing member 32 such as an adhesive tape in the state shown in FIG.
Furthermore, a through-hole 16 that penetrates from the bottom surface 9 a of the first recess 9 to the outer surface 6 b is formed in the step portion 13, the thin plate wall portion 5, and the side wall portion 6 adjacent thereto.
[0015]
The base substrate 3 has a semiconductor chip 21 on the surface 3a thereof electrically connected to the circuit of the base substrate 3 by a bonding wire, and metal connection conductors 22 for electrical connection to the circuit of the control substrate 4 are provided. It is electrically connected to the circuit of the base substrate 3. The base substrate 3 is formed by forming an insulating sheet on the surface of a metal plate and forming a circuit on the surface 3a of the insulating sheet. A heat radiating member (not shown) is directly provided on the back surface 3b of the metal plate. By providing, heat generated from the semiconductor chip 21 can be efficiently radiated outward from the heat radiating member via the metal plate.
[0016]
The semiconductor chip 21 is buried in a first resin portion (resin portion) 24 in order to protect it from dust and the like, and the first resin portion 24 is formed from a gel-like silicone resin.
The base substrate 3 has a box shape in which the opening 9b of the first recess 9 is closed with the semiconductor chip 21 and the first resin portion 24 facing the bottom surface 9a of the first recess 9 with a space therebetween. It is fixed to the member 2. In this state, the connecting conductor 22 is inserted into the through hole 15 and the tip thereof protrudes from the surface 13 a of the stepped portion 13. An internal space S1 is formed between the bottom surface 9a of the first recess 9 and the first resin portion 24. The internal space S1 is formed between the space outside the box-shaped member 2 and the through hole 16. It communicates with.
[0017]
The control board 4 is obtained by electrically connecting electronic components 25 to the circuit of the control board 4 by soldering on the front surface 4a and the back surface 4b. The electronic component 25 is buried in the second resin portion (hard resin portion) 26 filled in the second recess 11. The second resin portion 26 is formed from an epoxy resin having high electrical insulation, and integrates the control board 4 and the box-shaped member 2.
[0018]
Hereinafter, a method for manufacturing the semiconductor device 1 configured as described above will be described.
First, the semiconductor chip 21 and the connection conductor 22 are mounted on the surface 3 a of the base substrate 3. Next, the base substrate 3 is fitted into the notch 12 to fix the base substrate 3 to the box-like member 2 with the opening 9 b of the first recess 9 closed, and the connection conductor 22 is inserted into the through hole 15. Then, the step portion 13 is penetrated to the surface 13a side. In this state, the back surface 3 b of the base substrate 3 is positioned toward the outside of the box-shaped member 2.
[0019]
Then, a silicone resin is poured into the first recess 9 from the through hole 31 to form the first resin portion 24 in which the semiconductor chip 21 mounted on the base substrate 3 is buried together with the bonding wire by the silicone resin. Thereafter, the through hole 31 is closed by the seal member 32. In this state, the surface of the first resin portion 24 is not in contact with the bottom surface 9 a of the first recess 9.
[0020]
Then, electronic components 25 are mounted on the front surface 4 a and the back surface 4 b of the control board 4. Thereafter, the control board 4 is disposed in the second recess 11, the circuit of the control board 4 and the connection conductor 22 are fixed with solder or the like, and the base board 3 and the control board 4 are electrically connected. Finally, by filling the second recess 11 with an epoxy resin, the control substrate 4 is buried, and the second resin portion 26 for integrating the box-shaped member 2 and the control substrate 4 is formed. Thus, the manufacture of the semiconductor device 1 is completed.
[0021]
As described above, according to the semiconductor device 1, since the base substrate 3 and the control substrate 4 are arranged on the box-shaped member 2 in a state of being partitioned by the thin plate wall portion 5, the first and second resin portions 24 are arranged. , 26 do not touch each other. And since internal space S1 is formed between the 1st resin part 24 and the bottom face 9a of the 1st recessed part 9, even if the 1st resin part 24 expands and contracts due to a heat cycle, The base substrate 3 is not stressed.
[0022]
Further, since the internal space S1 and the space outside the box-shaped member 2 are communicated with each other through the through-hole 16, the first resin portion 24 expands and contracts due to the heat cycle, or the temperature in the internal space S1 is increased. Even if it changes, the atmospheric pressure in the internal space S1 is maintained in a state equal to the atmospheric pressure in the space outside the box-shaped member 2, and no stress acts on the base substrate 3.
From the above, the strength reliability can be improved by preventing the base substrate 3 from cracking and warping.
[0023]
Further, since the base substrate 3 is made of a metal plate and a heat radiating member is directly provided on the back surface 3b of the metal plate, the semiconductor device 1 is mounted inside, particularly, a semiconductor mounted on the base substrate 3. It is possible to efficiently dissipate heat generated from the chip 21 to the outside.
Furthermore, since the second resin portion 26 covers the control board 4 disposed on the surface 5b side of the thin plate wall portion 5 and fixes the control board 4 to the box-shaped member 2 integrally, It is possible to prevent the control substrate 4 from being damaged by the impact.
[0024]
In the above-described embodiment, the box-shaped member 2 is formed in a substantially rectangular shape in plan view. However, the present invention is not limited to this, and at least the first recess 9 for installing the base substrate 3 is used. Any shape may be used. Further, it is not necessary to form the second concave portion 11, and the control substrate 4 only needs to be integrated with the box-shaped member 2 by the second resin portion 26.
[0025]
Furthermore, although the protruding wall portion 7 is provided on the box-shaped member 2, the protruding wall portion 7 may not be provided. In this case, the first concave portion 9 is formed by the four side wall portions 6 and the thin plate wall portion 5, and the first resin portion 24 is opposed to the bottom surface 9a of the first concave portion 9 with a space therebetween. The base substrate 3 having a size that can be fitted into the first recess 9 may be prepared.
[0026]
Moreover, although the through-hole 16 which connects internal space S1 and the space outside the box-shaped member 2 has penetrated from the bottom face 9a of the 1st recessed part 9 to the outer surface 6b of the side wall part 6b, it is restricted to this. For example, it may be possible to penetrate from the inner surface 6a of the side wall 6b to the outer surface 6b. However, in this case, the through-hole 16 needs to open to the inner surface 6a of the side wall portion that defines the internal space S1.
[0027]
Furthermore, although the through-hole 31 for pouring the silicone resin is formed in the thin plate wall portion 5, it may not be formed. In this case, before fixing the base substrate 3 on which the semiconductor chip 21 is mounted to the box-shaped member 2, a silicone resin is applied to the surface 3 a of the base substrate 3, and the semiconductor chip 21 is buried together with the bonding wires. The resin portion 24 may be formed.
As mentioned above, although embodiment of this invention was explained in full detail with reference to drawings, the concrete structure is not restricted to this embodiment, The design change etc. of the range which does not deviate from the summary of this invention are included.
[0028]
【The invention's effect】
As described above, according to the first aspect of the present invention, even if the resin portion expands and contracts due to the heat cycle, no stress acts on the first substrate. Therefore, it is possible to prevent warpage and improve strength reliability.
[0029]
According to the second aspect of the present invention, since the through-hole that connects the internal space and the space outside the case member is formed, the atmospheric pressure in the internal space is equal to the atmospheric pressure in the space outside the case member. The stress is not exerted on the first substrate by being held. Therefore, the strength reliability of the first substrate can be further improved.
[0030]
According to the invention of claim 3, since the heat dissipation member is provided on the surface of the first substrate, the heat generated from the semiconductor device, particularly the semiconductor chip mounted on the first substrate, is generated. It is possible to efficiently dissipate heat to the outside.
[0031]
Moreover, according to the invention which concerns on Claim 4, while covering the 2nd board | substrate arrange | positioned by the hard resin part on the other surface side of a partition wall, and fixing a 2nd board | substrate to a case member integrally, The second substrate can be prevented from being damaged by an impact from the outside.
[Brief description of the drawings]
FIG. 1 is a side sectional view of a semiconductor device according to an embodiment of the present invention.
2 is a perspective view showing a box-shaped member in the semiconductor device of FIG. 1; FIG.
FIG. 3 is a side sectional view showing an example of a conventional semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Box-shaped member (case member)
3 Base substrate (first substrate)
4 Control board (second board)
5 Thin plate wall (partition wall)
9 First recess (recess)
9b Opening 16 Through-hole 21 Semiconductor chip 24 1st resin part (resin part)
26 Second resin part (hard resin part)
S1 internal space

Claims (4)

エポキシ樹脂よりも熱膨張係数が大きいゲル状の樹脂部により被覆される半導体チップを搭載した第1の基板と、
該第1の基板に電気的に接続される第2の基板と、
これら第1、第2の基板を厚み方向に離した状態で固定するケース部材とを備え、
該ケース部材は、前記第1および第2の基板間を仕切る板状の仕切壁を有し、該仕切壁と前記樹脂部との間に間隔をあけた状態で前記第1の基板を収容する凹部とを備え、
前記第1の基板が、前記凹部の開口を閉塞し、
前記ケース部材の外方の空間と、前記仕切壁と前記樹脂部との間に形成された内部空間とを連通する貫通孔が、前記ケース部材に設けられている半導体装置。
A first substrate on which a semiconductor chip covered with a gel-like resin portion having a thermal expansion coefficient larger than that of an epoxy resin is mounted;
A second substrate electrically connected to the first substrate;
A case member for fixing the first and second substrates in a state separated in the thickness direction;
The case member has a plate-like partition wall that partitions the first and second substrates, and accommodates the first substrate with a space between the partition wall and the resin portion. With a recess,
The first substrate closes the opening of the recess;
The semiconductor device in which the case member is provided with a through hole that communicates an outer space of the case member and an internal space formed between the partition wall and the resin portion.
前記貫通孔が、前記樹脂部に対向する前記凹部の底面に開口している請求項1に記載の半導体装置。The semiconductor device according to claim 1, wherein the through-hole opens at a bottom surface of the concave portion facing the resin portion . 前記第1の基板が金属板からなり、
該第1の基板に、放熱部材が直接取り付けられている請求項1または請求項2に記載の半導体装置。
The first substrate is made of a metal plate;
The semiconductor device according to claim 1, wherein a heat dissipation member is directly attached to the first substrate.
前記第2の基板を被覆すると共に、該第2の基板を前記ケース部材に一体的に固定する前記樹脂部よりも硬度の高い樹脂からなる硬質樹脂部を備える請求項1から請求項3のいずれかに記載の半導体装置。The hard resin part which consists of resin whose hardness is higher than the said resin part which coat | covers the said 2nd board | substrate and fixes this 2nd board | substrate to the said case member integrally. A semiconductor device according to claim 1.
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