JP3734039B2 - 半導体装置及びその製造方法、回路基板並びに電子機器 - Google Patents
半導体装置及びその製造方法、回路基板並びに電子機器 Download PDFInfo
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- JP3734039B2 JP3734039B2 JP2004073013A JP2004073013A JP3734039B2 JP 3734039 B2 JP3734039 B2 JP 3734039B2 JP 2004073013 A JP2004073013 A JP 2004073013A JP 2004073013 A JP2004073013 A JP 2004073013A JP 3734039 B2 JP3734039 B2 JP 3734039B2
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Description
前記半導体ウエハに、相互に間隔をあけて配置されてなる複数の第1の樹脂層と、
前記半導体ウエハに、それぞれの前記第1の樹脂層の隣に配置されるように設けられ、前記半導体ウエハの少なくともいずれかひとつの前記集積回路に電気的に接続されてなる複数の電極と、
それぞれの前記第1の樹脂層上に位置する第1及び第2の部分を含む配線と、
前記配線の前記第1の部分上に設けられてなる外部端子と、
前記配線の前記第2の部分を覆うように、それぞれの前記第1の樹脂層上に形成されてなる第2の樹脂層と、
を有し、
前記複数の第1の樹脂層は、第1の方向において隣り合う一対の前記第1の樹脂層間の第1の間隔が、前記第1の方向とは異なる第2の方向において隣り合う一対の前記第1の樹脂層間の第2の間隔よりも小さくなるように配置され、
前記第2の樹脂層は、前記第1の方向において隣り合う一対の前記第1の樹脂層間の領域を避けるように形成されてなる。本発明では、第2の樹脂層は、隣同士の第1の樹脂層の狭い間隔(第1の間隔)の領域には厚く形成されやすいが、この領域を避けるように設けられている。しかも、第2の樹脂層は、その内部応力の集中しやすい端部が、第1の間隔の領域を避けている。したがって、第2の樹脂層の内部応力の集中による半導体ウエハへの影響を抑制することができる。
(2)この半導体装置において、
前記第2の樹脂層は、前記第2の方向において前記第1の樹脂層を越えるように形成され、前記第1の方向において側縁の位置が異なるように曲線を描く部分を有してもよい。
(3)本発明に係る半導体装置は、集積回路が形成され、多辺形面を有し、前記集積回路に電気的に接続されてなる複数の電極が前記多辺形面に設けられてなる半導体チップと、
前記半導体チップの前記多辺形面に形成された第1の樹脂層と、
前記第1の樹脂層上に位置する第1及び第2の部分を含む配線と、
前記配線の前記第1の部分上に設けられてなる外部端子と、
前記配線の前記第2の部分を覆うように、前記第1の樹脂層上に形成されてなる第2の樹脂層と、
を有し、
前記複数の電極は、前記多辺形面の少なくとも1つの第1の辺を除く残りの第2の辺に沿って配列され、
前記第2の樹脂層は、前記第1の樹脂層の前記第1の辺側に位置する側縁と前記第1の辺との間の領域を避けるように形成されてなる。本発明では、第2の樹脂層は、電極が配列されていない領域を避けるように設けられている。しかも、第2の樹脂層は、その内部応力の集中しやすい端部が、電極が配列されていない領域を避けている。したがって、第2の樹脂層の内部応力の集中による半導体チップへの影響を抑制することができる。
(4)この半導体装置において、
前記第2の樹脂層の前記第1の辺側に位置する側縁は、前記第1の辺からの距離が異なるように曲線を描く部分を有してもよい。
(5)本発明に係る回路基板は、上記半導体装置が実装されてなる。
(6)本発明に係る電子機器は、上記半導体装置を有する。
(7)本発明に係る半導体装置の製造方法は、複数の集積回路が形成されているとともに少なくともいずれかひとつの前記集積回路に電気的に接続されてなる複数グループからなる電極を有してなる半導体ウエハに、相互に間隔をあけて複数の第1の樹脂層を形成すること、
それぞれの前記第1の樹脂層上に位置する第1及び第2の部分を含むように配線を形成すること、
前記配線の前記第2の部分を覆うように、それぞれの前記第1の樹脂層上に第2の樹脂層を形成すること、及び、
前記配線の前記第1の部分上に外部端子を設けること、
を含み、
それぞれの前記第1の樹脂層を、1グループの前記電極が隣に配置されるように形成し、
前記複数の第1の樹脂層を、第1の方向において隣り合う一対の前記第1の樹脂層間の第1の間隔が、前記第1の方向とは異なる第2の方向において隣り合う一対の前記第1の樹脂層間の第2の間隔よりも小さくなるように形成し、
前記第2の樹脂層を、前記第1の方向において隣り合う一対の前記第1の樹脂層間の領域を避けるように形成してもよい。本発明では、第2の樹脂層は、隣同士の第1の樹脂層の狭い間隔(第1の間隔)の領域には厚く形成されやすいが、この領域を避けるように設けられる。しかも、第2の樹脂層は、その内部応力の集中しやすい端部が、第1の間隔の領域を避けて形成される。したがって、第2の樹脂層の内部応力の集中による半導体ウエハへの影響を抑制することができる。
Claims (7)
- 複数の集積回路が形成されてなる半導体ウエハと、
前記半導体ウエハに、相互に間隔をあけて配置されてなる複数の第1の樹脂層と、
前記半導体ウエハに、それぞれの前記第1の樹脂層の隣に配置されるように設けられ、前記半導体ウエハの少なくともいずれかひとつ前記集積回路に電気的に接続されてなる複数の電極と、
それぞれの前記第1の樹脂層上に位置する第1及び第2の部分を含む配線と、
前記配線の前記第1の部分上に設けられてなる外部端子と、
前記配線の前記第2の部分を覆うように、それぞれの前記第1の樹脂層上に形成されてなる第2の樹脂層と、
を有し、
前記複数の第1の樹脂層は、第1の方向において隣り合う一対の前記第1の樹脂層間の第1の間隔が、前記第1の方向とは異なる第2の方向において隣り合う一対の前記第1の樹脂層間の第2の間隔よりも小さくなるように配置され、
前記第2の樹脂層は、前記第1の方向において隣り合う一対の前記第1の樹脂層間の領域を避けるように形成されてなる半導体装置。 - 請求項1記載の半導体装置において、
前記第2の樹脂層は、前記第2の方向において前記第1の樹脂層を越えるように形成され、前記第1の方向において側縁の位置が異なるように曲線を描く部分を有する半導体装置。 - 集積回路が形成され、多辺形面を有し、前記集積回路に電気的に接続されてなる複数の電極が前記多辺形面に設けられてなる半導体チップと、
前記半導体チップの前記多辺形面に形成された第1の樹脂層と、
前記第1の樹脂層上に位置する第1及び第2の部分を含む配線と、
前記配線の前記第1の部分上に設けられてなる外部端子と、
前記配線の前記第2の部分を覆うように、前記第1の樹脂層上に形成されてなる第2の樹脂層と、
を有し、
前記複数の電極は、前記多辺形面の少なくとも1つの第1の辺を除く残りの第2の辺に沿って配列され、
前記第2の樹脂層は、前記第1の樹脂層の前記第1の辺側に位置する側縁と前記第1の辺との間の領域を避けるように形成されてなる半導体装置。 - 請求項3記載の半導体装置において、
前記第2の樹脂層の前記第1の辺側に位置する側縁は、前記第1の辺からの距離が異なるように曲線を描く部分を有する半導体装置。 - 請求項3又は請求項4記載の半導体装置が実装されてなる回路基板。
- 請求項3又は請求項4記載の半導体装置を有する電子機器。
- 複数の集積回路が形成されているとともに少なくともいずれかひとつの前記集積回路に電気的に接続されてなる複数グループからなる電極を有してなる半導体ウエハに、相互に間隔をあけて複数の第1の樹脂層を形成すること、
それぞれの前記第1の樹脂層上に位置する第1及び第2の部分を含むように配線を形成すること、
前記配線の前記第2の部分を覆うように、それぞれの前記第1の樹脂層上に第2の樹脂層を形成すること、及び、
前記配線の前記第1の部分上に外部端子を設けること、
を含み、
それぞれの前記第1の樹脂層を、1グループの前記電極が隣に配置されるように形成し、
前記複数の第1の樹脂層を、第1の方向において隣り合う一対の前記第1の樹脂層間の第1の間隔が、前記第1の方向とは異なる第2の方向において隣り合う一対の前記第1の樹脂層間の第2の間隔よりも小さくなるように形成し、
前記第2の樹脂層を、前記第1の方向において隣り合う一対の前記第1の樹脂層間の領域を避けるように形成する半導体装置の製造方法。
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JP2004073013A JP3734039B2 (ja) | 2004-03-15 | 2004-03-15 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
US11/079,399 US7459637B2 (en) | 2004-03-15 | 2005-03-14 | Semiconductor device, manufacturing method thereof, circuit board, and electronic appliance |
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