JP3676379B2 - Metal foil with resin for multilayer wiring board, manufacturing method thereof, multilayer wiring board, and electronic device - Google Patents

Metal foil with resin for multilayer wiring board, manufacturing method thereof, multilayer wiring board, and electronic device Download PDF

Info

Publication number
JP3676379B2
JP3676379B2 JP50039798A JP50039798A JP3676379B2 JP 3676379 B2 JP3676379 B2 JP 3676379B2 JP 50039798 A JP50039798 A JP 50039798A JP 50039798 A JP50039798 A JP 50039798A JP 3676379 B2 JP3676379 B2 JP 3676379B2
Authority
JP
Japan
Prior art keywords
resin
metal foil
multilayer wiring
wiring board
thermosetting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP50039798A
Other languages
Japanese (ja)
Inventor
照雄 片寄
昌三 木下
雄史 新井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Kasei EMD Corp
Original Assignee
Asahi Kasei EMD Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Kasei EMD Corp filed Critical Asahi Kasei EMD Corp
Application granted granted Critical
Publication of JP3676379B2 publication Critical patent/JP3676379B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142Metallic substrates having insulating layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/032Organic insulating material consisting of one material
    • H05K1/0326Organic insulating material consisting of one material containing O
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/024Dielectric details, e.g. changing the dielectric material around a transmission line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0358Resin coated copper [RCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/249921Web or sheet containing structurally defined element or component
    • Y10T428/249994Composite having a component wherein a constituent is liquid or is contained within preformed walls [e.g., impregnant-filled, previously void containing component, etc.]
    • Y10T428/249999Differentially filled foam, filled plural layers, or filled layer with coat of filling material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/25Web or sheet containing structurally defined element or component and including a second component containing structurally defined particles
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/31504Composite [nonstructural laminate]
    • Y10T428/31511Of epoxy ether
    • Y10T428/31529Next to metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)

Abstract

The invention provides resin-carrying metal foil for a multilayered wiring board which comprises metal foil having provided on one side thereof a film of a thermosetting resin having a relative dielectric constant of not higher than 3.3 at a frequency range of not lower than 1 MHz and having a resin flow of from 1 to 50% or from 5 to 50%, and a process for producing the same. The invention also provides a (successive) multilayered wiring board produced by using the resin-carrying metal foil and an electronic device comprising the multilayered wiring board and an electronic element connected thereto with a wiring means. <IMAGE>

Description

技術分野
本発明は熱硬化性樹脂の膜を片面に有する多層配線板用樹脂付金属箔、その製造方法、該多層配線板用樹脂付金属箔を用いた多層配線板、および該多層配線板と電子素子が配線手段を用いて接続された電子装置に関する。本発明の多層配線板は配線層間の距離が多層配線板の面内の位置にかかわらず実用上一定と見なせ、特性インピーダンスのばらつきが小さい。そのため、超高速ディジタル回路用の配線板として非常に優れた特性を有する。本発明の電子装置は特性インピーダンスの安定性が優れており、電子素子としてディジタル半導体が搭載されていれば、ディジタル半導体がより高速に動作することができる。電子素子としてアナログ部分を有する半導体が搭載されていれば、アナログ部分を有する半導体は、信号のクロストークが減少するためより高周波の信号を扱うことができる。また、熱硬化した樹脂のガラス転移温度が180℃以上であることにより本発明の多層配線板および電子装置は非常に高い信頼性を有する。熱硬化前の熱硬化性樹脂の比誘電率が1メガヘルツ以上の周波数で3.3以下と低いことにより、その熱硬化性樹脂が硬化されて用いられた本発明の多層配線板は特性インピーダンスの安定性、信号の高速伝送性、低クロストーク性に優れる。この多層配線板を用いた電子装置においては、ディジタル半導体は最も高速に、アナログ信号を扱う半導体は最も高い周波数で動作することができる。
背景技術
熱硬化性の樹脂膜を有する金属箔としては従来エポキシ樹脂付銅箔が知られている。しかしながら、樹脂付金属箔を繰り返し積層することを特徴とする多層配線板(逐次多層配線板)の製造方法、いわゆる積層ビルドアップ工法においてこのような従来の樹脂付金属箔を用いた場合には、電気絶縁体として機能する該熱硬化性樹脂の膜厚を配線板内のいたるところ一定として配線の特性インピーダンスを一定範囲内に収めることが困難であった。また、該熱硬化性樹脂の誘電特性や耐熱性は、該熱硬化性樹脂が高速回路および高周波アナログ回路を考慮したものではないためそれらの用途に用いるには不十分であった。従来の銅張積層板製造用エポキシ樹脂を用いた樹脂付金属箔においては、樹脂の誘電率は3.6〜3.9、硬化した樹脂のガラス転移温度は120〜150℃に過ぎなかった。
電気用配線板産業の分野では、めっきスルーホール工法よりも高密度な配線を形成しうる積層ビルドアップ工法の確立が急務とされているが、高速ディジタル回路および高周波アナログ回路に用いることができる適切な多層配線板用樹脂付金属箔がなかった。本発明は特定範囲の樹脂フロー、比誘電率、硬化後のガラス転移温度の熱硬化性樹脂の膜を片面に有する金属箔を用い、高速ディジタル回路および高周波アナログ回路に用い得る多層配線板およびそれを用いた電子装置を提供しようとするものである。
発明の開示
本発明者らは鋭意検討の結果、樹脂付金属箔の発明に到った。本発明は次に述べる13の発明より構成される。
本願の第1発明は、金属箔の片面に比誘電率が1メガヘルツ以上の周波数領域で3.3以下の熱硬化性樹脂の膜を有し、樹脂フロー量が1%以上50%以下であることを特徴とする逐次多層配線板用の樹脂付金属箔。
本願の第2発明は、金属箔の片面に比誘電率が1メガヘルツ以上の周波数領域で3.3以下の熱硬化性樹脂の膜を有し、樹脂フロー量が5%以上50%以下であることを特徴とする逐次多層配線板の樹脂付金属箔。
本願の第3発明は、請求の範囲第1項または請求の範囲第2項の逐次多層配線板用の樹脂付金属箔のうち、熱硬化性樹脂が無機充填材を含んでなることを特徴とする逐次多層配線板用の樹脂付金属箔。
本願の第4発明は、請求の範囲第1項、請求の範囲第2項または請求の範囲第3項の逐次多層配線板用の樹脂付金属箔のうち、熱硬化性樹脂が硬化されたときガラス転移温度が180℃以上であることを特徴とする逐次多層配線板用の樹脂付金属箔。
本願の第5発明は、請求の範囲第1項、請求の範囲第2項、請求の範囲第3項または請求の範囲第4項の逐次多層配線板用の樹脂付金属箔のうち、熱硬化性樹脂が熱硬化性ポリフェニレンエーテル樹脂であることを特徴とする逐次多層配線板用の樹脂付金属箔。
本願の第6発明は、請求の範囲第5項の逐次多層配線板用の樹脂付金属箔において、熱硬化性樹脂がポリスチレン系重合体を含む熱硬化性ポリフェニレンエーテル樹脂であることを特徴とする逐次多層配線板用の樹脂付金属箔。
本願の第7発明は、熱硬化性ポリフェニレンエーテル樹脂と溶剤からなる樹脂ワニスを金属箔に塗布し、得られた塗布膜を乾燥するにあたって、溶剤の蒸発速度が0.10g/(cm2・分)以下となる条件下で乾燥することを特徴とする請求の範囲第5項または請求の範囲第6項の逐次多層配線板用の樹脂付金属箔の製造方法。
本願の第8発明は、熱硬化性ポリフェニレンエーテル樹脂と溶剤からなる樹脂ワニスを金属箔に塗布し、得られた塗布膜を乾燥するにあたって、熱硬化性樹脂の塗布膜の残存溶媒濃度が200000ppmに達するまでの溶剤の蒸発速度が0.10g/(cm2・分)以下となる条件下で乾燥することを特徴とする請求の範囲第5項または請求の範囲第6項の逐次多層配線板用の樹脂付金属箔の製造方法。
本願の第9発明は、請求の範囲第5項または請求の範囲第6項の逐次多層配線板用の樹脂付金属箔の製造方法において、熱硬化性ポリフェニレンエーテル樹脂を実質的に分解させない条件下で溶融、押し出しすることを特徴とする逐次多層配線板用樹脂付金属箔の製造方法。
本願の第10発明は、容易に剥離可能な樹脂面保護シートを有することを特徴とする請求の範囲第1項〜第6項の何れか一項に記載の逐次多層配線板用の樹脂付金属箔。
本願の第11発明は、請求の範囲第1項、請求の範囲第2項、請求の範囲第3項、請求の範囲第4項または請求の範囲第5項の逐次多層配線板用の樹脂付金属箔を逐次に積層することにより配線層を形成したことを特徴とする逐次多層配線板。
本願の第12発明は、上記第11発明の逐次多層配線板に配線手段を用いて電子素子を接続したことを特徴とする電子装置。
本願の第13発明は、電気信号の伝搬速度が1ナノ秒当たり16.5cm以上であり、かつ耐熱温度が180℃以上である上記第11発明の逐次多層配線板と電子素子からなる上記第12発明の電子装置。
【図面の簡単な説明】
第1図は、本発明の熱硬化性樹脂付着金属箔の構造を示す断面図である。第2図は、第11発明の逐次多層配線板の構造の一例を示す断面図である。第3図は、第11発明の逐次多層配線板の製造工程の一例を示す断面図である。第4図乃至第6図は、第12発明の電子装置の構造の例を示す断面図である。
発明を実施するための最良の形態
以下にこの発明を詳しく説明する。
本発明中の金属箔としてはどのようなものも用いることができるが、例えば銅箔、アルミ箔、錫箔、金箔などが挙げられる。容易に入手できかつ容易にエッチングできることから銅箔、アルミ箔が好ましく、銅箔は最も好ましい。金属箔の厚みは特に限定されないが、扱い易さの点から500μm以下が好ましく、200μm以下がより好ましく、105μm以下が最も好ましい。金属箔の熱硬化性樹脂の膜が形成される側の面は該樹脂との密着性を強めるため、粗面化および/またはカップリング処理されていてもよい。配線板製造用として製造販売されている粗化処理電解銅箔は、本発明の多層配線板用樹脂付銅箔の製造にそのまま用いることができる。金属箔は本発明の多層配線板の導体として主に使用されるが、放熱を目的として使用されることもある。金属箔はそれらの目的に応じても選ばれる。
第1図に、本発明の熱硬化性樹脂付金属箔の構造を断面図として示す。同図において、1は金属箔、2は熱硬化性樹脂の膜である。
本発明中の熱硬化性樹脂については、樹脂フロー量が1%以上50%以下の熱硬化性樹脂であれば所望の著しい効果を得ることができる。樹脂フロー量は5%以上50%以下がより好ましく、7%以上45%以下が最も好ましい。1%未満の樹脂フロー量では内層回路の埋め込み不良を発生し、多層配線板の形成が困難である。樹脂フロー量は大きい方が内層回路の埋め込みが容易であるが、50%を越える樹脂フロー量では絶縁層の厚みを配線板内で一定に保つことができず、配線の特性インピーダンスを一定に保つことができない。
樹脂フロー量は、以下の方法で測定される。
(1)10cm×10cmの金属箔の重量を測定し、この重量をaとする。
(2)10cm×10cmの樹脂付金属箔の重量を測定し、この重量をbとする。
(3)上記の樹脂付金属箔を温度170℃において圧力22kg/cm2で10分間加圧した後、金属箔からはみ出した樹脂分を取り除き、残った樹脂付金属箔の重量を測定し、この重量をb’とする。
(4)下記に示す式により、樹脂フロー量を求める。

Figure 0003676379
本発明に用いられる熱硬化性樹脂としては例えば、熱硬化性ポリフェニレンエーテル樹脂、フェノール樹脂、低誘電率化エポキシ樹脂、ジアリルフタレート樹脂、ジビニルベンゼン樹脂、多官能性アクリロイル樹脂、多官能性メタクリロイル樹脂、多官能性マレイミド樹脂、多官能性シアン酸エステル樹脂、多官能性イソシアネート樹脂、不飽和ポリエステル樹脂、ポリブタジエン樹脂、スチレン−ブタジエン・スチレン−ブタジエン−スチレン等の架橋性ポリマーなどが挙げられる。これらの樹脂は、工業技術上当然のことであるが、単一の化合物とは限らず、所望の性質を得るために様々な他の物質が添加され、あるいは変性が施されて用いられる。熱硬化性樹脂に熱可塑性樹脂がブレンドされてもよい。本発明においては熱硬化性樹脂の比誘電率が3.3以下であって、かつ多層配線板用樹脂付金属箔となされたときに樹脂フロー量が請求の範囲に規定の範囲であることが必須である。
上記の熱硬化性樹脂の例のうち、本発明の樹脂付金属箔に用いられる熱硬化性樹脂として好ましいものは、熱硬化性ポリフェニレンエーテル樹脂、ポリスチレン系重合体を含む熱硬化性ポリフェニレンエーテル樹脂、ポリジビニルベンゼンを含む樹脂組成物、ポリブタジエンを含む樹脂組成物、トリアリルシアヌレートおよび/またはトリアリルイソシアヌレートの重合体および/または共重合体を含む樹脂組成物である。
以下、これらの熱硬化性樹脂について説明する。
一般に硬化物のガラス転移温度が高く、しかも比誘電率が硬化前後とも3.0以下であり、かつフロー特性の調節が可能な熱硬化性ポリフェニレンエーテル樹脂は特に好ましい樹脂である。熱硬化性ポリフェニレンエーテル樹脂としては、例えば特許公開平7−165846に記載の組成物、特許公開平7−166049に記載の組成物、特許公告平7−37567に記載の組成物、特許公告平7−26013に記載の組成物等が挙げられる。ポリスチレン系重合体を樹脂組成物全体を100重量部としてそのうち1〜20重量部となるように添加したものは、樹脂膜の平滑性および強靭性に優れるというより好ましい特徴を有する。
ここに言うポリスチレン系重合体とは、スチレンのホモポリマーもしくはスチレンの構造単位数が全繰り返し単位数の80%以上であるような任意の熱可塑性コポリマーを指す。重量平均分子量は、1万以上であることが好ましい。
本発明におけるポリジビニルベンゼンとは、ジビニルベンゼンおよび/またはその水素原子が任意の原子団で置換されたジビニルベンゼン誘導体を重合あるいは共重合して得られる重合体のうち、ジビニルベンゼンおよび/またはジビニルベンゼン誘導体の2個の不飽和2重結合の片方だけが重合され片方が残った物を指す。このような重合体としては、例えば特許公告平4−1902に記載の重合体が挙げられる。全繰り返し単位数のうちジビニルベンゼンまたはジビニルベンゼン誘導体由来の繰り返し単位が占める割合は5%以上が好ましく、10%以上がより好ましい。重量平均分子量は、1万以上が好ましい。
本発明における多官能性シアン酸エステル樹脂について説明する。多官能シアン酸エステルは、炭素−窒素三重結合の熱3量化反応でトリアジン環を形成して架橋し、硬化する。多官能性シアン酸エステルは、単量体のまま、あるいは部分的に3量化を施したプレポリマーの形で、多官能性シアン酸エステル樹脂として用いられる。本発明においては、膜状の形態をなして用いる都合上、室温で半固体状のプレポリマーが好ましい。
本発明におけるポリブタジエンとは、公知のポリ(1,3−ブタジエン)を指す。数平均分子量は500以上5万以下が好ましい。500以上1万以下がより好ましく、500以上5000以下が最も好ましい。数平均分子量が500未満では粘度が低すぎるし、5万を越えると粘度が高くなりすぎる。
トリアリルシアヌレートおよび/またはトリアリルイソシアヌレートの重合体および/または共重合体も本発明の樹脂付金属箔の熱硬化性樹脂として好適に用いることができる。この重合体または共重合体は、トリアリルシアヌレートおよび/またはトリアリルイソシアヌレートを、例えばトルエンのような溶媒中で、例えば有機過酸化物のような重合開始剤の存在下に加熱し、アリル基の一部を重合することによって得られる。分子構造は直線状であっても分岐を有していても、どちらでもよい。重量平均分子量は、1000以上10万以下が好ましく、2000以上10万以下がより好ましい。
本発明では、熱硬化性樹脂に、その用途に応じて所望の性能を付与させる目的で本来の性質を損なわない範囲の量の充填剤や添加剤を配合して用いることができる。充填剤は繊維状であっても粉末状であってもよく、シリカ、アルミナ、酸化チタン、チタン酸バリウム、タルク、雲母、ガラスビーズ、ガラス中空球、アラミド繊維等を挙げることができる。充填材は熱膨張率の低減、誘電率の調節などの目的で本発明において有効に利用される。添加剤としては、難燃剤、酸化防止剤、熱安定剤、帯電防止剤、可塑剤、顔料、染料、着色剤等が挙げられる。
無機充填材の添加は、樹脂層の耐熱性および電気特性において著しい効果を有するので好ましい。シリカおよびガラス中空球は最も好ましい無機充填剤の例である。
熱硬化性樹脂膜の厚さは特に限定されないが、10μm以上が好ましく、20μm以上がより好ましく、30μm以上が最も好ましい。極端に膜厚が小さいと積層ビルドアップ工法を行うことが困難になる。
熱硬化性樹脂膜を形成する方法としては、どのような手段によってもよいが、好ましい方法としては例えば、該樹脂を溶剤に溶解もしくは分散させたワニスを塗布、乾燥させる方法が挙げられる。溶剤は樹脂の選択に応じて適した物が選ばれる。また、別の好ましい方法として、無溶剤で溶解製膜する方法も挙げられる。
金属箔と熱硬化性樹脂膜を密着した形態になす方法は、一切限定されない。樹脂膜は直接に金属箔上に形成してもよいし、あらかじめ別にフィルム状に形成したものを金属箔に加熱加圧等の手段によって密着させてもよい。膜状になされた樹脂の上に蒸着、スパッタリングあるいは化学めっきなどの公知の手段によって金属皮膜を形成するという手順を取ることもできる。
熱硬化性樹脂が熱硬化性ポリフェニレンエーテル樹脂もしくはポリスチレン系重合体を含む熱硬化性ポリフェニレンエーテル樹脂であって、熱硬化性樹脂の樹脂ワニスからの製膜による製造方法を採用する場合は、本件第7発明および第8発明の特別な製造方法を用いることにより、樹脂膜から粉落ちすることがなく、かつ樹脂膜表面に乾燥割れのない良好な品質の樹脂付金属箔を、高い生産性で製造することができる。
ポリフェニレンエーテル樹脂のワニスの調製に用いる溶剤としては、ベンゼン、トルエン、キシレンなどの芳香族系炭化水素、ジクロロメタン、クロロホルム、トリクロロエチレンなどのハロゲン系溶剤、さらにはTHF等があげられるが、これらは単体もしくは混合して使用できる。熱硬化性ポリフェニレンエーテル樹脂と溶剤とからなるワニスを塗布する方法としては、エアードコータ、ブレードコータ、ロッドコータ、ナイフコータ、グラビアコータ、リバースコータ、キャストコータなどの装置を用いる方法が挙げられる。塗布膜を乾燥する方法としては、熱風乾燥、ロール加熱乾燥、赤外線乾燥、遠赤外線乾燥等の装置を用いる方法が挙げられ、実施にあたってはこれらの装置が単独で、あるいは2種以上を組み合わせて用いられてもよい。
次に、熱硬化性ポリフェニレンエーテル樹脂と溶剤からなる樹脂ワニスを塗布し、塗布膜を乾燥するにあたっての蒸発速度について説明する。本発明における塗布膜を乾燥するにあたっての蒸発速度の具体的コントロール方法としては、例えば、乾燥するための熱風の温度、風量を調節することが挙げられる。また、蒸発温度をコントロールするため、高沸点溶剤をワニスに添加しても良い。このような高沸点溶剤としては、クロルベンゼン、テトラリン、アニソール等が挙げられる。
本発明において、溶剤の蒸発温度は、0.10g/(cm2・分)以下であることが必要であるが、好ましくは、蒸発速度が0.001g/(cm2・分)以上、0.10g/(cm2・分)以下である。0.10g/(cm2・分)を越えるとシート面に乾燥割れをおこす。一方、塗布膜を乾燥するにあたっての蒸発速度が0.001g/(cm2・分)を下回ると樹脂付金属箔の生産性が低下することがあるので好ましくない。
熱硬化性樹脂が熱硬化性ポリフェニレンエーテル樹脂もしくはポリスチレン系重合体を含む熱硬化性ポリフェニレンエーテル樹脂であって、樹脂の溶融製膜による製造方法を採用する場合は、本件第9発明の特別な製造方法を用いることにより、樹脂膜から粉落ちすることがなく、かつ樹脂膜表面に割れのない良好な品質の樹脂付金属箔を、高い生産性で製造することができる。
本件第9発明の製造方法においては、熱硬化性ポリフェニレンエーテル樹脂を実質的に分解させない樹脂溶融温度が選択されることが特徴である。
熱硬化性ポリフェニレンエーテル系樹脂を実質的に分解させないで溶融させ、押し出すために、溶融押し出し機の装置や溶融押し出し温度が選択される。熱硬化性ポリフェニレンエーテル系樹脂を実質的に分解させないで溶融させ、押し出すため溶融押し出しの温度は、50℃以上、300℃以下の範囲で選択される。
溶融押し出しの方法としては、押し出し部の先端にTダイを有した単軸、あるいは多軸スクリュー型の溶融押し出し機、混練ゾーンを有する押し出し部の先端にTダイを有した単軸、あるいは多軸スクリュー型の溶融押し出し機などの装置を用いる方法等が挙げられる。
樹脂フロー量を1%以上50%以下、好ましくは5%以上50%以下、更に好ましくは7%以上45%以下に調節する方法は限定されない。例えば樹脂の化学構造あるいは組成の調節による方法が挙げられる。樹脂フロー量が大き過ぎる熱硬化性樹脂を熱処理あるいは光化学的処理など各樹脂に適した方法により部分的に硬化させ、樹脂フロー量を調節することも有効な手段として挙げられる。
本発明の多層配線板用樹脂付金属箔は、熱硬化性樹脂膜表面を容易に剥離可能な保護シートで被覆されることにより、実用上極めて扱いやすい、有用な多層配線板用資材となる。この、金属箔、熱硬化性樹脂膜、樹脂膜から容易に剥離可能な保護シートがこの順に密着してなる複合シートがすなわち本件第10発明である。製造方法としては、樹脂付金属箔に保護シートを加熱加圧等により圧着する手順と、逆に保護シート上に熱硬化性樹脂膜が先に形成されたものに金属箔を密着させる手順との両方が可能である。
容易に剥離可能なシートとしては、樹脂フィルムが好ましい。その中でも、耐熱性の観点からポリエチレン、ポリプロピレン、ポリエチレンテレフタレートなどが好ましい。フィルム表面がシリコン樹脂やフッ素樹脂で離型加工されても良い。
本件第1〜6発明の多層配線板用樹脂付金属箔は、これを用いることにより多層配線板の各絶縁層の厚さがいたるところ実用上一定となり、特性インピーダンスがいたるところ実用上一定と見なせる多層配線板が得られるため、ひいてはその多層配線板を用いた電子機器、特に電子装置の電気特性を著しく向上させることができるため、産業上極めて有用である。絶縁層の厚み、ひいては特性インピーダンスのばらつきは±10%以内であれば実用上一定と見なせ、ばらつきが多層配線板や半導体装置の電気的特性に悪影響を及ぼさなくなる。また、熱硬化性樹脂の比誘電率が1メガヘルツ以上の周波数領域で3.3以下、好ましくは3.0以下であることにより、熱硬化後の該樹脂も比誘電率が小さい。絶縁層の比誘電率が小さいと配線の幅を広げることができるため、配線形成について同一のプロセスマージンのもとで製造しても特性インピーダンスのばらつきが小さくなる。また、クロストークが小さくなる。これらの効果が相まってはじめて、本発明の多層配線板および電子装置が極めて優れた電気的特性を有するのである。
第3〜6発明においては、硬化した熱硬化性樹脂のガラス転移温度が180以上であることで多層配線板の優秀な信頼性が得られる。熱硬化した樹脂のガラス転移温度が180℃未満の場合、長期的な装置の使用で導体のマイグレーションによる絶縁抵抗の劣化、樹脂の劣化に起因する装置の機能の障害が発生する可能性がある。ガラス転移温度は200℃以上であることがより好ましい。なお、ガラス転移温度はオリエンテック社製のレオバイブロン(動的粘弾性測定装置)にて昇温速度2℃/分、35Hzの条件で測定する。
第11発明及び第12発明においては、熱硬化した樹脂の比誘電率が1メガヘルツ以上の周波数で3.3以下であることにより、これらの多層配線板および半導体装置の優秀な電気特性が得られる。比誘電率は3.0以下であることがより好ましい。比誘電率が3.3を超えると、配線の単位長さあたりの遅延時間が大きくなり、高速ディジタル回路においてタイミングマージンが小さくなってしまいクロック周波数を高くできない。また比誘電率の平方根に比例する導体損失が大きくなるため、高周波回路において信号レベルマージンが小さくなってしまい利用できる周波数帯域が狭くなる。また、特性インピーダンスのばらつきおよびクロストークが大きくなり回路の動作に悪影響を及ぼすことは前に述べた通りである。
第11発明の多層配線板の構造の例を第2図に示す。第2図において、3は硬化した熱硬化性樹脂膜。4は電気絶縁性の任意の板材料、5はバイア接続ホール、6はめっきスルーホールである。
第11発明の逐次多層配線板の製造方法の例を第3図に示す。製造方法の例を順を追って説明する。
(1)例えば両面銅張積層板のように、電気絶縁性板状物8の両面に予め導体層7が形成されたものから製造を開始する。
(2)導体7を例えばエッチング等の既知の手段により回路パターン7’となす。
(3)本発明の熱硬化性樹脂付金属箔を例えば加熱加圧等の既知の手段によって積層する。導体層9と熱硬化した熱硬化性樹脂の層10が形成される。
(4)ビア穴11を形成する。
(5)無電解めっきに続いて電気銅めっきを行う等の公知の方法によって導体膜12を形成してビア接続を得た後、(2)と同様に回路パターンを形成する。
(6)(3)と同様に本発明の熱硬化性樹脂付金属箔により新たな導体層13及び新たな熱硬化した熱硬化性樹脂の層12を形成する。
(7)必要に応じ、従来の多層配線板製造法と同様、全層を貫くスルーホールを形成する。
(8)(5)と同様、無電解めっきに続いて電気銅めっきを行う等の公知の方法によって導体層16を形成してビア接続およびスルーホール接続を得た後、回路パターンを形成する。
第3図では6層基板を例示したが、本発明の熱硬化性樹脂付金属箔を用いれば、ビア形成、ビア接続及び回路形成を繰り返すことにより。いかなる層数の多層配線板をも逐次的に製造できることは明らかである。
第12発明の電子装置の構造の例を第4図乃至第6図に示す。本件第12発明は任意の構造の電子装置において使用される多層配線板に、本件発明の多層配線板を用いることによって電子装置の優秀な電気特性が得られることが特徴である。電子素子と多層配線板を接続する配線手段は構造に応じて適切な物を選べばよい。ワイヤボンディング、フリップチップ接続等が例として挙げられる。
第4図乃至第6図において、17は本発明の多層配線板、18は導体、19は半導体チップ、20は誘電体、キャパシタ、インダクタ、及び/または抵抗体等の個別電子素子、21は封止手段、22ははんだボール、23は放熱板、24はボンディングワイヤ、25は金属ピン、26はシリコンチップの接着手段である。
第12発明の電子装置のうち、特に電気信号の伝搬速度が到るところ1ナノ秒当たり16.5cm以上になるように設計し、かつ多層配線板の総合的な耐熱温度が180℃以上になるように選んだものが本件第13発明である。
電子装置には様々な構造のものが存在するが、本発明に関するものは、シリコンやガリウムヒ素などの半導体ウェハやインゴットから切り出された半導体又はそれをキャリアに搭載するなど扱いやすい形にしたもの、誘電体、キャパシタ、インダクタ、および/または抵抗体等の電子素子、およびそれを搭載する多層配線板を必須の構成要素とするものである。多層配線板の内部及び表面に形成されている配線を信号が伝搬する速度が1ナノ秒当たり16.5cm以上のものを使用すると、電子装置に由来する遅延時間が小さくなるばかりでなく、高速信号の扱いで問題となるディジタル信号の立ち上がりおよび立ち下がりの波形の乱れが小さくなり、極めて優秀な電子装置が得られる。これが本発明の著しい効果の一つである。実際の多層配線板においては、電気信号は信号線と、それに対応する接地電位面との間の電場の振動により伝搬されるので、信号線と接地電位導体の相互の位置関係と、その間の空間を占める絶縁材料の誘電特性が設計時に考慮されなければならない。逆に、接地電位導体と電源電位導体の相互の位置関係およびその間の絶縁材料の誘電特性は重要ではない。
今一つの効果は多層配線板の耐熱温度が180℃以上であることにより得られる。電子装置の動作特性は高速ディジタル回路や高速ディジタル/アナログ混載回路においては極めて安定であることが要求される。多層配線板の耐熱温度を180℃以上とすることにより、本発明の電子装置の特性が温度および湿度の変化に対して極めて変動しにくくなる。この2点の著しい効果が相まって、本件第13発明の電子装置が高速ディジタル回路および高速ディジタル/アナログ混載回路用の部品として真に有用なものとなっているのである。
第13発明に言う耐熱温度とは、例えば熱分解開始温度、相転移点など室温以上の温度において物質の特性が著しい変化を示すいくつかの温度のうち、最も室温に近い温度を指す。本発明における多層配線板は実用上当然各種材料の複合体であるが、本発明においてはそれら各種材料の個別の耐熱温度のうち最も室温に近い温度が多層配線板の耐熱温度である。実用上、樹脂、セラミック等混合されて一つの材料として機能する物は、複合された物を一つの成分として扱うことは言うまでもない。
本発明の逐次多層配線板において、逐次に形成する各配線層間の電気的接続を行うために従来のめっきスルーホールを形成しても良いが、高密度配線を可能にするためにはバイア接続ホール形成により層毎の接続とすることが好ましい。スルーホールとバイア接続ホールは混在させても良い。穴明けおよび層間の電気的接続は任意の方法によることができる。限定する意図ではないが、バイア接続ホールの形成手順の例を以下に説明する。バイア接続ホール形成は表面の金属箔にエッチング等の加工によりバイア接続ホールを形成したい部分にのみ穴を明けて熱硬化性樹脂層を露出させ、エキシマーレーザ、炭酸ガスレーザ、YAGレーザ等によるレーザ加工、イオンないしプラズマ等によるドライエッチング、もしくは腐食性薬品によるウェットエッチング等の方法により樹脂部分を取り除いて下の金属箔層を露出させた後、めっきあるいはスパッタリング等の方法により樹脂の穴内壁に金属膜を形成して層間接続するか、あるいは樹脂の穴内に導電性ペーストを詰めることにより接続しても良い。金属箔と樹脂層の穴明けを別々に行う方法を説明したが、勿論ドリルを用いて貫通しない深さの穴を明ける方法によっても構わない。
本発明の多層配線板は積層ビルドアップ工法によるものであるが、一部の層に感光性絶縁樹脂もしくは熱硬化性樹脂のレーザ加工と無電解厚付めっき技術による導体形成による方法などの、他の層形成法を適用しても構わない。
本発明の電子装置において、電子素子は本発明の多層配線板の上に搭載される場合と別の板状物、例えば放熱板を兼ねた金属板やセラミック板など、の上に搭載され本発明の多層配線板は電子素子をよける形でキャビティ状に加工されて該板状物と密着される場合等が挙げられる。また、本発明の多層配線板は積層ビルドアップ工法によるものであるから、任意の板状物の上に多層配線を形成し得る。この板状物自体が金属板、メタルコア配線板、セラミック板、セラミック多層配線板等、放熱、配線機能、または特別な電気特性を実現するための機能を有するものであってもよい。
以下、本発明を一層明確にするために実施例を挙げて説明するが、本発明の範囲をこれらの実施例に限定するものではない。
(実施例1)
熱硬化性樹脂として1メガヘルツにおける比誘電率が2.7の熱硬化性ポリフェニレンエーテル樹脂を用い、金属箔として厚さ12μmのプリント配線板用電解銅箔を用い、金属箔として厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。樹脂膜の厚みは60μmとした。樹脂フロー量は3%であった。熱硬化性ポリフェニレンエーテル樹脂を熱硬化させてガラス転移温度を測定したところ、220℃であった。比誘電率は1メガヘルツの周波数において2.8であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記熱硬化性ポリフェニレンエーテル樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。この4層配線板の一部をエポキシ樹脂に包埋し、断面を研磨した後光学顕微鏡で観察したところ、内層回路は熱硬化性ポリフェニレンエーテル樹脂によって完全に埋め込まれており、ボイドは見い出されなかった。
(実施例2)
熱硬化性樹脂として1メガヘルツにおける比誘電率が2.8の熱硬化性ポリフェニレンエーテル樹脂を用い、金属箔として厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。樹脂膜の厚みは60μmとした。樹脂フロー量は39%であった。熱硬化性ポリフェニレンエーテル樹脂を熱硬化させてガラス転移温度を測定したところ、210℃であった。比誘電率は1メガヘルツの周波数において2.9であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記熱硬化性ポリフェニレンエーテル樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。同じ多層配線板用樹脂付き銅箔と両面銅張積層板を用いて35mm×35mmの半導体装置用4層配線板を作成し、ディジタル半導体を搭載して半導体装置を作成した。可変クロック発生装置を備える試験用回路に該半導体装置を搭載して動作可能クロック周波数範囲を測定したところ、100メガヘルツまで動作した。この半導体装置を121℃、2気圧のプレッシャークッカーで吸湿処理し、100メガヘルツの動作を確認したところ、処理時間3000時間まで動作に影響が表れなかった。また、−65℃と125℃の間を往復させる冷熱衝撃試験を行ったところ、1000サイクルまで動作に影響が表れなかった。
(実施例3)
実施例2の熱硬化性ポリフェニレンエーテル樹脂100重量部に対して、重量平均分子量50万のポリスチレンを4重量部添加した。このポリスチレンを含む熱硬化性ポリフェニレンエーテル樹脂の1メガヘルツにおける比誘電率は2.8であった。このポリスチレンを含む熱硬化性ポリフェニレンエーテル樹脂と厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。滑らかな光沢を有する、厚み60μmの樹脂膜が容易に形成できた。樹脂フロー量は40%であった。該熱硬化性ポリフェニレンエーテル樹脂を熱硬化させてガラス転移温度を測定したところ、210℃であった。比誘電率は1メガヘルツの周波数において2.9であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記熱硬化性ポリフェニレンエーテル樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。同じ多層配線板用樹脂付き銅箔と両面銅張積層板を用いて35mm×35mmの半導体装置用4層配線板を作成し、ディジタル半導体を搭載して半導体装置を作成した。可変クロック発生装置を備える試験用回路に該半導体装置を搭載して動作可能クロック周波数範囲を測定したところ、100メガヘルツまで動作した。この半導体装置を121℃、2気圧のプレッシャークッカーで吸湿処理し、100メガヘルツの動作を確認したところ、処理時間3000時間まで動作に影響が表れなかった。また、−65℃と125℃の間を往復させる冷熱衝撃試験を行ったところ、1000サイクルまで動作に影響が表れなかった。
(実施例4)
分子量5万のポリ(パラジビニルベンゼン)90重量部と下記構造式1のビスマレイミド10重量部を混合して熱硬化性樹脂を調製した。この熱硬化性樹脂の1メガヘルツにおける誘電率は2.7であった。
Figure 0003676379
このポリジビニルベンゼンを含む熱硬化性樹脂と厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。樹脂膜の厚みは60μmとした。樹脂フロー量は15%であった。該熱硬化性ポリポリジビニルベンゼン樹脂を熱硬化させてガラス転移温度を測定したところ、460℃であった。比誘電率は1メガヘルツの周波数において2.8であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記ポリジビニルベンゼン樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。同じ多層配線板用樹脂付き銅箔と両面銅張積層板を用いて35mm×35mmの半導体装置用4層配線板を作成し、ディジタル半導体を搭載して半導体装置を作成した。可変クロック発生装置を備える試験用回路に該半導体装置を搭載して動作可能クロック周波数範囲を測定したところ、100メガヘルツまで動作した。この半導体装置を121℃、2気圧のプレッシャークッカーで吸湿処理し、100メガヘルツの動作を確認したところ、処理時間3000時間まで動作に影響が表れなかった。また、−65℃と125℃の間を往復させる冷熱衝撃試験を行ったところ、1000サイクルまで動作に影響が表れなかった。
(実施例5)
下記構造式2の2官能シアン酸エステルを部分的に重合させてプレポリマーを調製した。このプレポリマーの数平均分子量は560、重量平均分子量は1310であった。プレポリマー100重量部、ノニルフェノール1重量部、コバルトオクテート0.25重量部を混合して多官能性シアン酸エステル樹脂を調製した。この熱硬化性樹脂の1メガヘルツにおける誘電率は2.9であった。
Figure 0003676379
この多官能性シアン酸エステル樹脂と厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。樹脂膜の厚みは60μmとした。樹脂フロー量は41%であった。該多官能性シアン酸エステル樹脂を熱硬化させてガラス転移温度を測定したところ、280℃であった。比誘電率は1メガヘルツの周波数において3.0であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記多官能性シアン酸エステル樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。同じ多層配線板用樹脂付き銅箔と両面銅張積層板を用いて35mm×35mmの半導体装置用4層配線板を作成し、ディジタル半導体を搭載して半導体装置を作成した。可変クロック発生装置を備える試験用回路に該半導体装置を搭載して動作可能クロック周波数範囲を測定したところ、100メガヘルツまで動作した。この半導体装置を121℃、2気圧のプレッシャークッカーで吸湿処理し、100メガヘルツの動作を確認したところ、処理時間3000時間まで動作に影響が表れなかった。また、−65℃と125℃の間を往復させる冷熱衝撃試験を行ったところ、1000サイクルまで動作に影響が表れなかった。
(実施例6)
数平均分子量3100のポリブタジエン100重量部、過酸化ジクミル2重量部を混合して熱硬化性樹脂を調製した。この熱硬化性樹脂の1メガヘルツにおける誘電率は2.4であった。
このポリブタジエン系熱硬化性樹脂と厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。樹脂膜の厚みは60μmとした。樹脂フロー量は43%であった。該ポリブタジエン系熱硬化性樹脂を熱硬化させてガラス転移温度を測定したところ、150℃であった。比誘電率は1メガヘルツの周波数において2.5であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記ポリブタジエン系熱硬化性樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。同じ多層配線板用樹脂付き銅箔と両面銅張積層板を用いて35mm×35mmの半導体装置用4層配線板を作成し、ディジタル半導体を搭載して半導体装置を作成した。可変クロック発生装置を備える試験用回路に該半導体装置を搭載して動作可能クロック周波数範囲を測定したところ、100メガヘルツまで動作した。
(実施例7)
トリアリルイソシアヌレートをトルエン中、過酸化物と共に加熱して重量平均分子量3000のポリ(トリアリルイソシアヌレート)を得た。このポリトリアリルイソシアヌレート90重量部、トリアリルイソシアヌレートモノマー10重量部、および2,5−ジメチル−2,5−ジ(t−ブチルパーオキシ)ヘキシン−3を3重量部混合して熱硬化性ポリ(トリアリルイソシアヌレート)樹脂を調製した。この熱硬化性樹脂の1メガヘルツにおける誘電率は3.1であった。
このポリ(トリアリルイソシアヌレート)を含む熱硬化性樹脂と厚さ12μmのプリント配線板用電解銅箔を用いて、多層配線板用樹脂付銅箔を作成した。樹脂膜の厚みは60μmとした。樹脂フロー量は25%であった。該熱硬化性ポリ(トリアリルイソシアヌレート)樹脂を熱硬化させてガラス転移温度を測定したところ、350℃であった。比誘電率は1メガヘルツの周波数において3.3であった。18μmの銅箔を両面に張った0.3mm厚の熱硬化性ポリフェニレンエーテル両面銅張積層板に内層回路を形成し、その両面に上記ポリ(トリアリルイソシアヌレート)樹脂付金属箔を積層した。さらに外層回路を形成して330mm×400mmの4層配線板とした。この4層配線板の配線の特性インピーダンスを測定したところ、至る所プラスマイナス10%以内の安定した特性であった。同じ多層配線板用樹脂付き銅箔と両面銅張積層板を用いて35mm×35mmの半導体装置用4層配線板を作成し、ディジタル半導体を搭載して半導体装置を作成した。可変クロック発生装置を備える試験用回路に該半導体装置を搭載して動作可能クロック周波数範囲を測定したところ、100メガヘルツまで動作した。この半導体装置を121℃、2気圧のプレッシャークッカーで吸湿処理し、100メガヘルツの動作を確認したところ、処理時間3000時間まで動作に影響が表れなかった。また、−65℃と125℃の間を往復させる冷熱衝撃試験を行ったところ、1000サイクルまで動作に影響が表れなかった。
(比較例1)
実施例2の熱硬化性ポリフェニレンエーテル樹脂の代わりに銅張積層板用エポキシ樹脂を用いて樹脂付銅箔を作成し、樹脂フロー量を測定したところ65%であった。また該エポキシ樹脂を熱硬化してガラス転移温度を測定したところ、150℃であった。比誘電率は1メガヘルツの周波数において3.8であった。実施例1と同様に4層配線板を作成し、特性インピーダンスを測定したところ、プラスマイナス16%のばらつきがあった。ディジタル半導体を搭載した半導体装置を作成し、動作可能なクロック周波数を測定したところ80メガヘルツであった。121℃、2気圧のプレッシャークッカーで加湿試験を行ったところ、1000時間で80メガヘルツ動作が不能となった。この半導体装置について−65℃と125℃の間を往復させる冷熱衝撃試験を行ったところ、300サイクルにて動作不能となった。
(実施例8〜10)
厚さ12μmのプリント基板用電解銅箔の片面に、乾燥後の樹脂厚さが50μmとなるように実施例2の熱硬化性ポリフェニレンエーテル系樹脂とトルエン溶剤からなる樹脂ワニスを塗布した。塗布膜を乾燥するにあたっては、熱風乾燥機を用い、塗布膜の残存溶媒濃度が200000ppmに達するまでの溶剤の蒸発速度が実施例8;0.005g・(cm2・分)、実施例9;0.01g/(cm2・分)、実施例10;0.05g/(cm2・分)となるように熱風の温度・風量を調節した。得られた樹脂付シートは、塗布面の乾燥割れもなく、樹脂付金属箔のカットなどの加工時や逐次積層による多層配線板を作製する際のハンドリングにおいて粉落ちはなく、信頼性の高い多層配線板を作製することができた。
(比較例2)
実施例2の塗布膜を乾燥するにあたって、溶剤の蒸発速度が0.2g/(cm2・分)になるように熱風の温度・風量を調節する以外は、実施例8〜10と同様に樹脂付金属箔を作製した。得られたシートは、塗布面には乾燥割れが見られ、樹脂付金属箔のカットなどの加工時や逐次積層による多層配線板を作製する際のハンドリングにおいて粉落ちが見られた。作製した多層配線板の断面を観察したところ回路部に樹脂の埋込み不良が発生していた。
(実施例11〜13)
実施例2の熱硬化性ポリフェニレンエーテル系樹脂を用い、厚さ12μmのプリント基板用電解銅箔の片面に乾燥後の樹脂厚さが50μmとなるように、樹脂を溶融押し出しして銅箔上に樹脂膜を形成させた。溶融押し出しの装置としては、押し出し部の先端にTダイを有した2軸スクリュー型の溶融押し出し機を用い、溶融押し出しの温度は、実施例11;80℃、実施例12;120℃、実施例13;250℃となるように装置を調整し実施した。得られた樹脂付金属箔は、表面が滑らかであり、樹脂付金属箔のカットなどの加工時や逐次積層による多層配線板を作製する際のハンドリングにおいて粉落ちはなく、信頼性の高い多層配線板を作製することができた。
(比較例3)
実施例2の熱硬化性ポリフェニレンエーテル樹脂の溶融成形膜を作製するあたって、溶融押し出しの温度が350℃となる以外は、実施例11〜13と同様に樹脂付金属箔を作製した。得られた樹脂付金属箔の表面は滑らかではなく、樹脂付基材のカットなどの加工時や逐次積層による多層配線板を作製する際のハンドリングにおいて粉落ちが見られないものの、作製した多層配線板の断面を観察したところ回路部に樹脂の埋込み不良が発生していた。
(実施例14)
実施例2で作成した熱硬化性ポリフェニレンエーテル樹脂付金属箔の樹脂面に厚み10μmポリエチレンフィルムを100℃のホットロールにて圧着し、該樹脂付金属箔の保護シートとした。保護シートを付けたまま、直径10cmの円筒に巻き付けて23℃にて1週間保存したところ、金属箔の表面が熱硬化性ポリフェニレンエーテル樹脂で汚染されることはなかった。また、圧着したポリエチレンフィルムの縁を指でこすったところ、端から容易に剥離できた。
(実施例15)
耐熱温度200℃の熱硬化ポリフェニレンエーテル樹脂を絶縁樹脂とする多層配線板を作成した。配線総数を6層とした。この多層配線板の耐熱温度は200℃であった。TDR(時間領域反射測定法)によりこの多層配線板の電気信号伝搬速度を測定したところ、いたるところ1ナノ秒当たり17.5cm以上であった。この多層配線板にフィールドプログラマブルゲートアレイチップ、ダンピング抵抗、およびキャパシタを搭載した後樹脂封止して電子装置とした。この電子装置を基準クロックが100メガヘルツであるディジタル回路基板に搭載したところ問題なく動作した。このディジタル回路基板を60℃、相対湿度90%の条件で1000時間加湿した後再び動作するかどうか調べたところ、問題なく動作した。
(比較例4)
実施例15の多層配線板の代わりに通常の銅張積層板用エポキシ樹脂を絶縁樹脂とする多層配線板を用いたところ、TDRにより電気信号伝搬速度が最も大きい場所でも1ナノ秒当たり15.0cmであることがわかった。実施例15と同じ素子を用いて電子装置を作成し、基準クロック100メガヘルツの動作試験を行ったが正常に動作しなかった。基準クロックを70メガヘルツに下げたところ動作した。このディジタル回路基板を60℃、相対湿度90%の条件で1000時間加湿した後再び動作するかどうか調べたところ、正常に動作しなかった。
産業上の利用可能性
本発明の多層配線板用熱硬化性樹脂付金属箔により、積層ビルドアップ工法による特性インピーダンスの安定した高性能な多層配線板が製造できる。本発明の製造方法により、優れた品質のポリフェニレンエーテル樹脂付金属箔が製造できる。本発明の樹脂付金属箔には安価な樹脂面保護シートを圧着することができ、保管および取り扱い性に優れた樹脂付金属箔として利用できる。本発明の多層配線板は特性インピーダンスが安定し電気的に優れた特性を有するので、従来にない高性能な高速ディジタル回路および高周波回路を製造することができる。本発明の電子装置は、従来にない高速動作、高周波動作が可能な優れた装置である。Technical field
The present invention relates to a resin-coated metal foil for a multilayer wiring board having a thermosetting resin film on one side, a manufacturing method thereof, a multilayer wiring board using the resin-coated metal foil for a multilayer wiring board, and the multilayer wiring board and an electronic element. Relates to an electronic device connected using wiring means. In the multilayer wiring board of the present invention, the distance between the wiring layers can be regarded as practically constant regardless of the position in the plane of the multilayer wiring board, and variation in characteristic impedance is small. Therefore, it has very excellent characteristics as a wiring board for an ultrahigh-speed digital circuit. The electronic device of the present invention has excellent characteristic impedance stability, and if a digital semiconductor is mounted as an electronic element, the digital semiconductor can operate at higher speed. If a semiconductor having an analog portion is mounted as an electronic element, a semiconductor having an analog portion can handle a higher frequency signal because signal crosstalk is reduced. Further, since the glass transition temperature of the thermosetting resin is 180 ° C. or higher, the multilayer wiring board and the electronic device of the present invention have very high reliability. Since the relative permittivity of the thermosetting resin before thermosetting is as low as 3.3 or less at a frequency of 1 megahertz or more, the multilayer wiring board of the present invention used by curing the thermosetting resin has a characteristic impedance. Excellent stability, high-speed signal transmission, and low crosstalk. In an electronic device using this multilayer wiring board, a digital semiconductor can operate at the highest speed, and a semiconductor that handles analog signals can operate at the highest frequency.
Background art
Conventionally, copper foil with an epoxy resin is known as a metal foil having a thermosetting resin film. However, in the case of using such a conventional resin-coated metal foil in a multilayer wiring board (sequential multilayer wiring board) manufacturing method characterized by repeatedly laminating a resin-coated metal foil, a so-called laminated buildup method, It was difficult to keep the characteristic impedance of the wiring within a certain range by keeping the film thickness of the thermosetting resin functioning as an electrical insulator constant throughout the wiring board. Further, the dielectric properties and heat resistance of the thermosetting resin are insufficient for use in such applications because the thermosetting resin does not take into account high-speed circuits and high-frequency analog circuits. In a resin-coated metal foil using a conventional epoxy resin for producing a copper-clad laminate, the resin has a dielectric constant of 3.6 to 3.9, and the cured resin has a glass transition temperature of only 120 to 150 ° C.
In the field of electrical wiring board industry, it is urgently required to establish a laminated build-up method that can form higher-density wiring than plating through-hole method, but it can be used for high-speed digital circuits and high-frequency analog circuits. There was no metal foil with resin for multilayer wiring boards. The present invention relates to a multilayer wiring board that can be used for high-speed digital circuits and high-frequency analog circuits using a metal foil having a thermosetting resin film on one side with a specific range of resin flow, dielectric constant, and glass transition temperature after curing. It is an object of the present invention to provide an electronic device using the.
Disclosure of the invention
As a result of intensive studies, the present inventors have reached the invention of a metal foil with resin. The present invention comprises the following thirteen inventions.
1st invention of this application has the film | membrane of a thermosetting resin of 3.3 or less in the frequency range whose relative dielectric constant is 1 megahertz or more on one side of the metal foil, and the resin flow amount is 1% or more and 50% or less. A resin-coated metal foil for sequential multilayer wiring boards.
The second invention of the present application has a thermosetting resin film of 3.3 or less in a frequency region having a relative dielectric constant of 1 megahertz or more on one side of a metal foil, and a resin flow amount of 5% or more and 50% or less. A resin-coated metal foil for a sequential multilayer wiring board.
The third invention of the present application is characterized in that, among the resin-coated metal foils for the sequential multilayer wiring board according to claim 1 or claim 2, the thermosetting resin contains an inorganic filler. Resin metal foil for sequential multilayer wiring boards.
According to a fourth aspect of the present invention, when the thermosetting resin is cured among the resin-coated metal foils for the sequential multilayer wiring board according to claim 1, claim 2, or claim 3. A resin-coated metal foil for sequential multilayer wiring boards, wherein the glass transition temperature is 180 ° C. or higher.
5th invention of this application is thermosetting among the metal foil with resin for sequential multilayer wiring boards of Claim 1, Claim 2, Claim 3, or Claim 4 of a multilayer wiring board. A resin-coated metal foil for sequential multilayer wiring boards, wherein the functional resin is a thermosetting polyphenylene ether resin.
The sixth invention of the present application is characterized in that, in the metal foil with resin for sequential multilayer wiring boards according to claim 5, the thermosetting resin is a thermosetting polyphenylene ether resin containing a polystyrene-based polymer. Metal foil with resin for sequential multilayer wiring boards.
In the seventh invention of the present application, when a resin varnish comprising a thermosetting polyphenylene ether resin and a solvent is applied to a metal foil, and the resulting coating film is dried, the evaporation rate of the solvent is 0.10 g / (cm 2 The process for producing a metal foil with resin for sequential multilayer wiring boards according to claim 5 or claim 6, wherein the drying is performed under the following conditions:
In the eighth invention of the present application, when a resin varnish comprising a thermosetting polyphenylene ether resin and a solvent is applied to a metal foil and the resulting coating film is dried, the residual solvent concentration of the thermosetting resin coating film is 200,000 ppm. The solvent evaporation rate to reach 0.10 g / (cm 2 The process for producing a metal foil with resin for sequential multilayer wiring boards according to claim 5 or claim 6, wherein the drying is performed under the following conditions:
According to a ninth aspect of the present invention, in the method for producing a metal foil with a resin for a sequential multilayer wiring board according to claim 5 or claim 6, the thermosetting polyphenylene ether resin is not substantially decomposed. A method for producing a metal foil with resin for sequential multilayer wiring boards, characterized by melting and extruding in a step.
10th invention of this application has a resin surface protection sheet which can be peeled easily, The metal with a resin for sequential multilayer wiring boards as described in any one of Claim 1-6 characterized by the above-mentioned Foil.
According to an eleventh aspect of the present invention, a resin for a sequential multilayer wiring board according to claim 1, claim 2, claim 3, claim 4 or claim 5 is provided. A sequential multilayer wiring board, wherein a wiring layer is formed by sequentially laminating metal foils.
According to a twelfth aspect of the present invention, an electronic device is characterized in that an electronic element is connected to the sequential multilayer wiring board according to the eleventh aspect of the present invention using a wiring means.
According to a thirteenth aspect of the present invention, the electric signal propagation speed is 16.5 cm or more per nanosecond and the heat resistant temperature is 180 ° C. or higher. The electronic device of the invention.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing the structure of the thermosetting resin-attached metal foil of the present invention. FIG. 2 is a sectional view showing an example of the structure of the sequential multilayer wiring board according to the eleventh aspect of the present invention. FIG. 3 is a cross-sectional view showing an example of the manufacturing process of the sequential multilayer wiring board according to the eleventh aspect of the present invention. 4 to 6 are sectional views showing examples of the structure of the electronic device of the twelfth invention.
BEST MODE FOR CARRYING OUT THE INVENTION
The present invention will be described in detail below.
Any metal foil can be used in the present invention, and examples thereof include copper foil, aluminum foil, tin foil, and gold foil. A copper foil and an aluminum foil are preferable because they are easily available and can be easily etched, and a copper foil is most preferable. The thickness of the metal foil is not particularly limited, but is preferably 500 μm or less, more preferably 200 μm or less, and most preferably 105 μm or less from the viewpoint of ease of handling. The surface of the metal foil on the side where the thermosetting resin film is formed may be roughened and / or coupled in order to enhance the adhesion to the resin. The roughened electrolytic copper foil manufactured and sold for the production of a wiring board can be used as it is for the production of a resin-coated copper foil for a multilayer wiring board of the present invention. The metal foil is mainly used as a conductor of the multilayer wiring board of the present invention, but may be used for the purpose of heat dissipation. Metal foils are also selected according to their purpose.
In FIG. 1, the structure of the metal foil with a thermosetting resin of this invention is shown as sectional drawing. In the figure, 1 is a metal foil and 2 is a film of a thermosetting resin.
About the thermosetting resin in this invention, if the amount of resin flows is 1% or more and 50% or less, a desired remarkable effect can be acquired. The resin flow amount is more preferably 5% or more and 50% or less, and most preferably 7% or more and 45% or less. If the amount of resin flow is less than 1%, an inner layer circuit embedding failure occurs and it is difficult to form a multilayer wiring board. The larger the resin flow amount, the easier it is to embed the inner layer circuit. However, when the resin flow amount exceeds 50%, the insulating layer thickness cannot be kept constant in the wiring board, and the characteristic impedance of the wiring is kept constant. I can't.
The resin flow amount is measured by the following method.
(1) The weight of a 10 cm × 10 cm metal foil is measured, and this weight is defined as a.
(2) The weight of the metal foil with resin of 10 cm × 10 cm is measured, and this weight is defined as b.
(3) Pressure of 22 kg / cm for the above resin-coated metal foil at a temperature of 170 ° C. 2 After pressing for 10 minutes, the resin component protruding from the metal foil is removed, the weight of the remaining metal foil with resin is measured, and this weight is defined as b ′.
(4) The resin flow amount is obtained by the following formula.
Figure 0003676379
Examples of the thermosetting resin used in the present invention include thermosetting polyphenylene ether resin, phenol resin, low dielectric constant epoxy resin, diallyl phthalate resin, divinylbenzene resin, polyfunctional acryloyl resin, polyfunctional methacryloyl resin, Examples thereof include a polyfunctional maleimide resin, a polyfunctional cyanate ester resin, a polyfunctional isocyanate resin, an unsaturated polyester resin, a polybutadiene resin, and a crosslinkable polymer such as styrene-butadiene / styrene-butadiene-styrene. These resins are naturally used in industrial technology, but are not limited to a single compound, and various other substances are added or modified in order to obtain desired properties. A thermoplastic resin may be blended with the thermosetting resin. In the present invention, when the relative permittivity of the thermosetting resin is 3.3 or less and the metal foil with resin for multilayer wiring boards is used, the resin flow amount is within the range specified in the claims. It is essential.
Among the examples of the thermosetting resin, those preferable as the thermosetting resin used for the resin-coated metal foil of the present invention are a thermosetting polyphenylene ether resin, a thermosetting polyphenylene ether resin containing a polystyrene polymer, A resin composition containing polydivinylbenzene, a resin composition containing polybutadiene, and a resin composition containing a polymer and / or copolymer of triallyl cyanurate and / or triallyl isocyanurate.
Hereinafter, these thermosetting resins will be described.
In general, a thermosetting polyphenylene ether resin having a high glass transition temperature of a cured product, a relative dielectric constant of 3.0 or less before and after curing, and capable of adjusting flow characteristics is a particularly preferable resin. Examples of the thermosetting polyphenylene ether resin include a composition described in Japanese Patent Application Laid-Open No. 7-165646, a composition described in Japanese Patent Application Laid-Open No. 7-16649, a composition described in Japanese Patent Application No. 7-37567, and a patent publication No. 7 -26013 composition etc. are mentioned. What added the polystyrene-type polymer so that it might become 1-20 weight part out of 100 weight part of the whole resin composition has the more preferable characteristic that it is excellent in the smoothness and toughness of a resin film.
The term “polystyrene polymer” used herein refers to any thermoplastic copolymer in which the number of styrene homopolymers or styrene structural units is 80% or more of the total number of repeating units. The weight average molecular weight is preferably 10,000 or more.
The polydivinylbenzene in the present invention is divinylbenzene and / or divinylbenzene among polymers obtained by polymerizing or copolymerizing divinylbenzene and / or divinylbenzene derivatives in which hydrogen atoms thereof are substituted with arbitrary atomic groups. It refers to a product in which only one of the two unsaturated double bonds of the derivative is polymerized and the other remains. Examples of such a polymer include polymers described in Japanese Patent Publication No. Hei 4-1902. The proportion of the repeating units derived from divinylbenzene or divinylbenzene derivatives in the total number of repeating units is preferably 5% or more, and more preferably 10% or more. The weight average molecular weight is preferably 10,000 or more.
The polyfunctional cyanate ester resin in the present invention will be described. The polyfunctional cyanate ester is crosslinked and cured by forming a triazine ring by a thermal trimerization reaction of a carbon-nitrogen triple bond. The polyfunctional cyanate ester is used as the polyfunctional cyanate ester resin as a monomer or in the form of a prepolymer partially trimerized. In the present invention, a prepolymer that is semisolid at room temperature is preferred for the convenience of use in the form of a film.
The polybutadiene in the present invention refers to known poly (1,3-butadiene). The number average molecular weight is preferably 500 or more and 50,000 or less. More preferably, it is 500 or more and 10,000 or less, and most preferably 500 or more and 5000 or less. When the number average molecular weight is less than 500, the viscosity is too low, and when it exceeds 50,000, the viscosity becomes too high.
Triallyl cyanurate and / or a polymer and / or copolymer of triallyl isocyanurate can also be suitably used as the thermosetting resin of the resin-coated metal foil of the present invention. The polymer or copolymer is prepared by heating triallyl cyanurate and / or triallyl isocyanurate in a solvent such as toluene in the presence of a polymerization initiator such as an organic peroxide. It is obtained by polymerizing a part of the group. The molecular structure may be either linear or branched. The weight average molecular weight is preferably 1000 or more and 100,000 or less, and more preferably 2000 or more and 100,000 or less.
In the present invention, the thermosetting resin can be used by blending an amount of filler or additive in a range that does not impair the original properties for the purpose of imparting desired performance depending on the application. The filler may be fibrous or powdery, and examples thereof include silica, alumina, titanium oxide, barium titanate, talc, mica, glass beads, glass hollow spheres, and aramid fibers. The filler is effectively used in the present invention for the purpose of reducing the coefficient of thermal expansion and adjusting the dielectric constant. Examples of the additive include a flame retardant, an antioxidant, a heat stabilizer, an antistatic agent, a plasticizer, a pigment, a dye, and a colorant.
The addition of an inorganic filler is preferable because it has a significant effect on the heat resistance and electrical characteristics of the resin layer. Silica and glass hollow spheres are examples of the most preferred inorganic fillers.
Although the thickness of a thermosetting resin film is not specifically limited, 10 micrometers or more are preferable, 20 micrometers or more are more preferable, and 30 micrometers or more are the most preferable. When the film thickness is extremely small, it is difficult to perform the laminated buildup method.
As a method for forming the thermosetting resin film, any means may be used, but a preferable method is, for example, a method of applying and drying a varnish in which the resin is dissolved or dispersed in a solvent. A suitable solvent is selected according to the selection of the resin. Another preferred method is a method of dissolving and forming a film without using a solvent.
The method for forming the metal foil and the thermosetting resin film in close contact with each other is not limited at all. The resin film may be directly formed on the metal foil, or a film previously formed in a film shape may be adhered to the metal foil by means such as heating and pressing. A procedure of forming a metal film on the resin formed into a film by a known means such as vapor deposition, sputtering or chemical plating can also be taken.
When the thermosetting resin is a thermosetting polyphenylene ether resin or a thermosetting polyphenylene ether resin containing a polystyrene-based polymer, and the production method by film formation of the thermosetting resin from the resin varnish is adopted, By using the special manufacturing method of the seventh and eighth inventions, it is possible to produce a metal foil with resin of good quality that does not fall off from the resin film and has no dry cracks on the resin film surface with high productivity. can do.
Examples of the solvent used for the preparation of the varnish of the polyphenylene ether resin include aromatic hydrocarbons such as benzene, toluene and xylene, halogen solvents such as dichloromethane, chloroform and trichloroethylene, and THF. Can be mixed and used. Examples of a method for applying a varnish composed of a thermosetting polyphenylene ether resin and a solvent include a method using an apparatus such as an air coater, a blade coater, a rod coater, a knife coater, a gravure coater, a reverse coater, and a cast coater. Examples of the method for drying the coating film include methods using apparatuses such as hot air drying, roll heat drying, infrared drying, and far infrared drying. These apparatuses are used alone or in combination of two or more. May be.
Next, the evaporation rate in applying a resin varnish composed of a thermosetting polyphenylene ether resin and a solvent and drying the coating film will be described. As a specific method for controlling the evaporation rate in drying the coating film in the present invention, for example, adjusting the temperature and air volume of hot air for drying can be mentioned. In order to control the evaporation temperature, a high boiling point solvent may be added to the varnish. Examples of such a high boiling point solvent include chlorobenzene, tetralin, and anisole.
In the present invention, the evaporation temperature of the solvent is 0.10 g / (cm 2 Min) or less, but preferably the evaporation rate is 0.001 g / (cm 2 Min) or more, 0.10 g / (cm 2 ・ Min. 0.10 g / (cm 2 ・ If it exceeds min), dry cracks will occur on the sheet surface. On the other hand, the evaporation rate for drying the coating film is 0.001 g / (cm 2 If less than (min), the productivity of the metal foil with resin may decrease, which is not preferable.
When the thermosetting resin is a thermosetting polyphenylene ether resin or a thermosetting polyphenylene ether resin containing a polystyrene-based polymer, and a manufacturing method by melt film formation of the resin is adopted, the special manufacturing of the ninth invention of the present invention By using this method, it is possible to produce a metal foil with resin of good quality that does not fall off from the resin film and has no cracks on the surface of the resin film with high productivity.
In the manufacturing method of the ninth invention, a resin melting temperature that does not substantially decompose the thermosetting polyphenylene ether resin is selected.
In order to melt and extrude the thermosetting polyphenylene ether-based resin without substantially decomposing, the apparatus of the melt extruder and the melt extrusion temperature are selected. In order to melt and extrude the thermosetting polyphenylene ether resin without substantially decomposing it, the temperature of the melt extrusion is selected in the range of 50 ° C. or more and 300 ° C. or less.
As a method of melt extrusion, a single-shaft having a T-die at the tip of the extrusion portion or a multi-screw screw type melt extruder, a single-shaft having a T-die at the tip of the extrusion portion having a kneading zone, or a multi-axis Examples thereof include a method using an apparatus such as a screw-type melt extruder.
The method of adjusting the resin flow amount to 1% to 50%, preferably 5% to 50%, more preferably 7% to 45% is not limited. For example, a method by adjusting the chemical structure or composition of the resin can be mentioned. An effective means is to partially cure a thermosetting resin having an excessive resin flow amount by a method suitable for each resin, such as heat treatment or photochemical treatment, and adjust the resin flow amount.
The metal foil with resin for multilayer wiring boards of the present invention is a useful material for multilayer wiring boards that is extremely easy to handle practically by coating the thermosetting resin film surface with a protective sheet that can be easily peeled off. This composite sheet formed by adhering a metal foil, a thermosetting resin film, and a protective sheet easily peelable from the resin film in this order is the tenth invention. As a manufacturing method, there are a procedure for pressure-bonding a protective sheet to a resin-coated metal foil by heating and pressurizing and the like, and conversely, a procedure for closely attaching the metal foil to a protective sheet on which a thermosetting resin film has been previously formed. Both are possible.
As the easily peelable sheet, a resin film is preferable. Among these, polyethylene, polypropylene, polyethylene terephthalate and the like are preferable from the viewpoint of heat resistance. The film surface may be mold-released with silicon resin or fluororesin.
By using the metal foil with resin for multilayer wiring boards of the first to sixth inventions, the thickness of each insulating layer of the multilayer wiring board is practically constant everywhere, and the characteristic impedance is considered practically constant everywhere. Since a multilayer wiring board can be obtained, the electrical characteristics of an electronic device using the multilayer wiring board, in particular, an electronic device can be remarkably improved, which is extremely useful industrially. If the variation of the thickness of the insulating layer, and thus the characteristic impedance, is within ± 10%, it can be regarded as practically constant, and the variation does not adversely affect the electrical characteristics of the multilayer wiring board or semiconductor device. Further, when the relative permittivity of the thermosetting resin is 3.3 or less, preferably 3.0 or less in the frequency region of 1 megahertz or more, the resin after thermosetting also has a small relative permittivity. If the relative dielectric constant of the insulating layer is small, the width of the wiring can be widened. Therefore, even if the wiring is formed under the same process margin, the variation in characteristic impedance is reduced. In addition, crosstalk is reduced. Only when these effects are combined, the multilayer wiring board and the electronic device of the present invention have extremely excellent electrical characteristics.
In the third to sixth inventions, excellent reliability of the multilayer wiring board can be obtained when the glass transition temperature of the cured thermosetting resin is 180 or more. When the glass transition temperature of the thermosetting resin is less than 180 ° C., the long-term use of the device may cause deterioration of insulation resistance due to conductor migration and failure of the function of the device due to deterioration of the resin. The glass transition temperature is more preferably 200 ° C. or higher. The glass transition temperature is measured with a Leovibron (dynamic viscoelasticity measuring device) manufactured by Orientech under the conditions of a temperature rising rate of 2 ° C./min and 35 Hz.
In the eleventh invention and the twelfth invention, when the relative permittivity of the thermoset resin is 3.3 or less at a frequency of 1 megahertz or more, excellent electrical characteristics of these multilayer wiring boards and semiconductor devices can be obtained. . The relative dielectric constant is more preferably 3.0 or less. When the relative dielectric constant exceeds 3.3, the delay time per unit length of the wiring increases, and the timing margin decreases in the high-speed digital circuit, so that the clock frequency cannot be increased. In addition, since the conductor loss proportional to the square root of the relative permittivity increases, the signal level margin decreases in the high frequency circuit, and the usable frequency band becomes narrow. In addition, as described above, variation in characteristic impedance and crosstalk increase and adversely affect the operation of the circuit.
An example of the structure of the multilayer wiring board of the eleventh invention is shown in FIG. In FIG. 2, 3 is a cured thermosetting resin film. 4 is an arbitrary electrically insulating plate material, 5 is a via connection hole, and 6 is a plated through hole.
FIG. 3 shows an example of the manufacturing method of the sequential multilayer wiring board according to the eleventh invention. An example of a manufacturing method will be described step by step.
(1) For example, production is started from a conductor layer 7 previously formed on both surfaces of an electrically insulating plate-like material 8 such as a double-sided copper-clad laminate.
(2) The conductor 7 is formed into a circuit pattern 7 ′ by known means such as etching.
(3) The metal foil with thermosetting resin of the present invention is laminated by a known means such as heating and pressing. The conductor layer 9 and the thermosetting resin layer 10 which is thermoset are formed.
(4) The via hole 11 is formed.
(5) After the conductor film 12 is formed by a known method such as electrolytic copper plating following electroless plating to obtain via connection, a circuit pattern is formed in the same manner as in (2).
(6) A new conductor layer 13 and a new thermoset thermosetting resin layer 12 are formed by the thermosetting resin-attached metal foil of the present invention as in (3).
(7) If necessary, through holes penetrating all layers are formed as in the conventional multilayer wiring board manufacturing method.
(8) Similarly to (5), the conductor layer 16 is formed by a known method such as electro copper plating following electroless plating to obtain via connection and through hole connection, and then a circuit pattern is formed.
FIG. 3 illustrates a six-layer substrate, but by using the metal foil with thermosetting resin of the present invention, by repeating via formation, via connection and circuit formation. Obviously, any number of multilayer wiring boards can be manufactured sequentially.
Examples of the structure of the electronic device of the twelfth invention are shown in FIGS. The twelfth aspect of the present invention is characterized in that excellent electrical characteristics of an electronic device can be obtained by using the multilayer wiring board of the present invention for a multilayer wiring board used in an electronic device having an arbitrary structure. An appropriate wiring means for connecting the electronic element and the multilayer wiring board may be selected according to the structure. Examples include wire bonding and flip chip connection.
4 to 6, 17 is a multilayer wiring board according to the present invention, 18 is a conductor, 19 is a semiconductor chip, 20 is an individual electronic element such as a dielectric, capacitor, inductor, and / or resistor, and 21 is a seal. Stopping means, 22 a solder ball, 23 a heat sink, 24 a bonding wire, 25 a metal pin, and 26 a silicon chip bonding means.
Among the electronic devices of the twelfth aspect of the invention, particularly, the electrical signal propagation speed is designed to be 16.5 cm or more per nanosecond, and the overall heat resistance temperature of the multilayer wiring board is 180 ° C. or more. This is the thirteenth invention.
There are various types of electronic devices, but the present invention relates to a semiconductor wafer such as silicon or gallium arsenide, a semiconductor cut out from an ingot, or a form that is easy to handle such as mounting it on a carrier, Electronic elements such as a dielectric, a capacitor, an inductor, and / or a resistor, and a multilayer wiring board on which the electronic element is mounted are essential components. When the signal propagation speed of 16.5 cm or more per nanosecond is used in the wiring formed inside and on the surface of the multilayer wiring board, not only the delay time derived from the electronic device is reduced but also the high-speed signal is transmitted. As a result, the disturbance of the rising and falling waveforms of the digital signal, which is a problem in handling, is reduced, and an extremely excellent electronic device can be obtained. This is one of the remarkable effects of the present invention. In an actual multilayer wiring board, an electric signal is propagated by the vibration of the electric field between the signal line and the corresponding ground potential plane, so the positional relationship between the signal line and the ground potential conductor and the space between them The dielectric properties of the insulating material that occupies must be taken into account during design. Conversely, the positional relationship between the ground potential conductor and the power supply potential conductor and the dielectric properties of the insulating material therebetween are not important.
Another effect can be obtained when the heat resistance temperature of the multilayer wiring board is 180 ° C. or higher. The operating characteristics of electronic devices are required to be extremely stable in high-speed digital circuits and high-speed digital / analog mixed circuits. By setting the heat resistant temperature of the multilayer wiring board to 180 ° C. or higher, the characteristics of the electronic device of the present invention are extremely difficult to fluctuate with respect to changes in temperature and humidity. Combined with these two remarkable effects, the electronic device of the thirteenth aspect of the present invention is truly useful as a component for a high-speed digital circuit and a high-speed digital / analog mixed circuit.
The heat-resistant temperature referred to in the thirteenth invention refers to the temperature closest to room temperature among several temperatures at which the properties of the substance exhibit significant changes at temperatures above room temperature such as the thermal decomposition start temperature and phase transition point. The multilayer wiring board in the present invention is naturally a composite of various materials in practice, but in the present invention, the temperature closest to room temperature among the individual heat resistance temperatures of these various materials is the heat resistance temperature of the multilayer wiring board. Needless to say, a substance that functions as a single material by being mixed with resin, ceramic or the like is treated as a single component in practice.
In the sequential multilayer wiring board of the present invention, a conventional plated through hole may be formed in order to make electrical connection between the wiring layers formed sequentially. It is preferable to form connection for each layer by formation. Through holes and via connection holes may be mixed. Drilling and electrical connection between layers can be by any method. Although not intended to be limiting, an example of a procedure for forming via connection holes is described below. Via connection hole formation is to drill a hole only in the portion where the via connection hole is to be formed by processing such as etching on the metal foil on the surface to expose the thermosetting resin layer, laser processing by excimer laser, carbon dioxide laser, YAG laser, etc. After removing the resin portion by dry etching such as ion or plasma, or wet etching using corrosive chemicals to expose the lower metal foil layer, a metal film is formed on the inner wall of the resin hole by plating or sputtering. It may be formed and connected between layers, or may be connected by filling a conductive paste in a resin hole. Although the method of drilling the metal foil and the resin layer separately has been described, it is of course possible to use a method of drilling a hole having a depth not penetrating using a drill.
The multilayer wiring board of the present invention is based on a laminated buildup method, but other methods such as laser processing of photosensitive insulating resin or thermosetting resin on some layers and conductor formation by electroless thick plating technology, etc. The layer forming method may be applied.
In the electronic device of the present invention, the electronic element is mounted on a plate-like material different from that mounted on the multilayer wiring board of the present invention, such as a metal plate or a ceramic plate that also serves as a heat sink. The multilayer wiring board is processed into a cavity shape so as to avoid the electronic element and is in close contact with the plate-like object. In addition, since the multilayer wiring board of the present invention is based on the laminated buildup method, the multilayer wiring can be formed on an arbitrary plate-like object. The plate itself may be a metal plate, a metal core wiring board, a ceramic board, a ceramic multilayer wiring board, or the like having a function for realizing heat dissipation, wiring function, or special electrical characteristics.
Hereinafter, the present invention will be described with reference to examples in order to further clarify the present invention, but the scope of the present invention is not limited to these examples.
(Example 1)
A thermosetting polyphenylene ether resin having a relative dielectric constant of 2.7 at 1 megahertz is used as the thermosetting resin, a 12 μm thick electrolytic copper foil for printed wiring boards is used as the metal foil, and a 12 μm thick printed metal foil is used. A resin-coated copper foil for multilayer wiring boards was prepared using the electrolytic copper foil for wiring boards. The thickness of the resin film was 60 μm. The amount of resin flow was 3%. It was 220 degreeC when the thermosetting polyphenylene ether resin was thermosetted and the glass transition temperature was measured. The relative dielectric constant was 2.8 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with the thermosetting polyphenylene ether resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. Part of this four-layer wiring board was embedded in epoxy resin, the cross-section was polished and observed with an optical microscope. The inner layer circuit was completely embedded with thermosetting polyphenylene ether resin, and no void was found. It was.
(Example 2)
Using thermosetting polyphenylene ether resin with a relative dielectric constant of 2.8 at 1 megahertz as the thermosetting resin, and using electrolytic copper foil for printed wiring boards with a thickness of 12 μm as the metal foil, resin-coated copper for multilayer wiring boards A foil was created. The thickness of the resin film was 60 μm. The resin flow rate was 39%. It was 210 degreeC when thermosetting polyphenylene ether resin was thermosetted and the glass transition temperature was measured. The relative dielectric constant was 2.9 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with the thermosetting polyphenylene ether resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. A four-layer wiring board for a semiconductor device of 35 mm × 35 mm was prepared using the same copper foil with resin for multilayer wiring board and double-sided copper-clad laminate, and a semiconductor device was prepared by mounting a digital semiconductor. When the semiconductor device was mounted on a test circuit equipped with a variable clock generator and the operable clock frequency range was measured, it operated up to 100 megahertz. When this semiconductor device was subjected to moisture absorption treatment at 121 ° C. and a pressure cooker of 2 atm and operation of 100 MHz was confirmed, the operation was not affected until the treatment time of 3000 hours. Further, when a thermal shock test in which the temperature was reciprocated between −65 ° C. and 125 ° C. was performed, the operation was not affected until 1000 cycles.
(Example 3)
4 parts by weight of polystyrene having a weight average molecular weight of 500,000 were added to 100 parts by weight of the thermosetting polyphenylene ether resin of Example 2. The relative dielectric constant at 1 MHz of the thermosetting polyphenylene ether resin containing polystyrene was 2.8. Using this thermosetting polyphenylene ether resin containing polystyrene and an electrolytic copper foil for printed wiring boards having a thickness of 12 μm, a resin-coated copper foil for multilayer wiring boards was prepared. A resin film having a smooth gloss and a thickness of 60 μm could be easily formed. The amount of resin flow was 40%. When the thermosetting polyphenylene ether resin was thermoset and the glass transition temperature was measured, it was 210 ° C. The relative dielectric constant was 2.9 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with the thermosetting polyphenylene ether resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. A 4-layer wiring board for a semiconductor device having a size of 35 mm × 35 mm was prepared using the same copper foil with resin for multilayer wiring board and double-sided copper-clad laminate, and a semiconductor device was prepared by mounting a digital semiconductor. When the semiconductor device was mounted on a test circuit equipped with a variable clock generator and the operable clock frequency range was measured, it operated up to 100 megahertz. When this semiconductor device was subjected to moisture absorption treatment at 121 ° C. and a pressure cooker of 2 atm and operation of 100 MHz was confirmed, the operation was not affected until the treatment time of 3000 hours. Further, when a thermal shock test in which the temperature was reciprocated between −65 ° C. and 125 ° C. was performed, the operation was not affected until 1000 cycles.
(Example 4)
A thermosetting resin was prepared by mixing 90 parts by weight of poly (paradivinylbenzene) having a molecular weight of 50,000 and 10 parts by weight of bismaleimide having the following structural formula 1. The dielectric constant of this thermosetting resin at 1 megahertz was 2.7.
Figure 0003676379
Using this thermosetting resin containing polydivinylbenzene and an electrolytic copper foil for printed wiring boards having a thickness of 12 μm, a resin-coated copper foil for multilayer wiring boards was prepared. The thickness of the resin film was 60 μm. The amount of resin flow was 15%. When the thermosetting polypolydivinylbenzene resin was thermoset and the glass transition temperature was measured, it was 460 ° C. The relative dielectric constant was 2.8 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper-clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with polydivinylbenzene resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. A 4-layer wiring board for a semiconductor device having a size of 35 mm × 35 mm was prepared using the same copper foil with resin for multilayer wiring board and double-sided copper-clad laminate, and a semiconductor device was prepared by mounting a digital semiconductor. When the semiconductor device was mounted on a test circuit equipped with a variable clock generator and the operable clock frequency range was measured, it operated up to 100 megahertz. When this semiconductor device was subjected to moisture absorption treatment at 121 ° C. and a pressure cooker of 2 atm and operation of 100 MHz was confirmed, the operation was not affected until the treatment time of 3000 hours. Further, when a thermal shock test in which the temperature was reciprocated between −65 ° C. and 125 ° C. was performed, the operation was not affected until 1000 cycles.
(Example 5)
A prepolymer was prepared by partially polymerizing a bifunctional cyanate ester of the following structural formula 2. The number average molecular weight of this prepolymer was 560, and the weight average molecular weight was 1310. A polyfunctional cyanate ester resin was prepared by mixing 100 parts by weight of a prepolymer, 1 part by weight of nonylphenol and 0.25 parts by weight of cobalt octate. The dielectric constant of this thermosetting resin at 1 megahertz was 2.9.
Figure 0003676379
Using this polyfunctional cyanate ester resin and an electrolytic copper foil for printed wiring board having a thickness of 12 μm, a copper foil with resin for multilayer wiring board was prepared. The thickness of the resin film was 60 μm. The resin flow amount was 41%. The polyfunctional cyanate ester resin was thermally cured and the glass transition temperature was measured and found to be 280 ° C. The relative dielectric constant was 3.0 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper-clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with the polyfunctional cyanate ester resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. A 4-layer wiring board for a semiconductor device having a size of 35 mm × 35 mm was prepared using the same copper foil with resin for multilayer wiring board and double-sided copper-clad laminate, and a semiconductor device was prepared by mounting a digital semiconductor. When the semiconductor device was mounted on a test circuit equipped with a variable clock generator and the operable clock frequency range was measured, it operated up to 100 megahertz. When this semiconductor device was subjected to moisture absorption treatment at 121 ° C. and a pressure cooker of 2 atm and operation of 100 MHz was confirmed, the operation was not affected until the treatment time of 3000 hours. Further, when a thermal shock test in which the temperature was reciprocated between −65 ° C. and 125 ° C. was performed, the operation was not affected until 1000 cycles.
(Example 6)
A thermosetting resin was prepared by mixing 100 parts by weight of polybutadiene having a number average molecular weight of 3100 and 2 parts by weight of dicumyl peroxide. This thermosetting resin had a dielectric constant of 2.4 at 1 megahertz.
Using this polybutadiene-based thermosetting resin and an electrolytic copper foil for printed wiring board having a thickness of 12 μm, a resin-coated copper foil for multilayer wiring board was prepared. The thickness of the resin film was 60 μm. The resin flow rate was 43%. The polybutadiene-based thermosetting resin was thermoset and the glass transition temperature was measured and found to be 150 ° C. The relative dielectric constant was 2.5 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with the polybutadiene-based thermosetting resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. A 4-layer wiring board for a semiconductor device having a size of 35 mm × 35 mm was prepared using the same copper foil with resin for multilayer wiring board and double-sided copper-clad laminate, and a semiconductor device was prepared by mounting a digital semiconductor. When the semiconductor device was mounted on a test circuit equipped with a variable clock generator and the operable clock frequency range was measured, it operated up to 100 megahertz.
(Example 7)
Triallyl isocyanurate was heated with a peroxide in toluene to obtain poly (triallyl isocyanurate) having a weight average molecular weight of 3000. 90 parts by weight of this polytriallyl isocyanurate, 10 parts by weight of triallyl isocyanurate monomer, and 3 parts by weight of 2,5-dimethyl-2,5-di (t-butylperoxy) hexyne-3 are mixed and heat cured. A poly (triallyl isocyanurate) resin was prepared. The dielectric constant of this thermosetting resin at 1 megahertz was 3.1.
Using this thermosetting resin containing poly (triallyl isocyanurate) and an electrolytic copper foil for printed wiring board having a thickness of 12 μm, a resin-coated copper foil for multilayer wiring board was prepared. The thickness of the resin film was 60 μm. The resin flow rate was 25%. The thermosetting poly (triallyl isocyanurate) resin was thermoset and the glass transition temperature was measured and found to be 350 ° C. The relative dielectric constant was 3.3 at a frequency of 1 megahertz. An inner layer circuit was formed on a 0.3 mm thick thermosetting polyphenylene ether double-sided copper-clad laminate with 18 μm copper foil stretched on both sides, and the metal foil with poly (triallyl isocyanurate) resin was laminated on both sides. Further, an outer layer circuit was formed to form a 330 mm × 400 mm four-layer wiring board. When the characteristic impedance of the wiring of this four-layer wiring board was measured, the characteristic was stable everywhere within plus or minus 10%. A 4-layer wiring board for a semiconductor device having a size of 35 mm × 35 mm was prepared using the same copper foil with resin for multilayer wiring board and double-sided copper-clad laminate, and a semiconductor device was prepared by mounting a digital semiconductor. When the semiconductor device was mounted on a test circuit equipped with a variable clock generator and the operable clock frequency range was measured, it operated up to 100 megahertz. When this semiconductor device was subjected to moisture absorption treatment at 121 ° C. and a pressure cooker of 2 atm and operation of 100 MHz was confirmed, the operation was not affected until the treatment time of 3000 hours. Further, when a thermal shock test in which the temperature was reciprocated between −65 ° C. and 125 ° C. was performed, the operation was not affected until 1000 cycles.
(Comparative Example 1)
A copper foil with resin was prepared using an epoxy resin for copper-clad laminate instead of the thermosetting polyphenylene ether resin of Example 2, and the resin flow amount was measured and found to be 65%. The epoxy resin was thermoset and the glass transition temperature was measured and found to be 150 ° C. The relative dielectric constant was 3.8 at a frequency of 1 megahertz. When a four-layer wiring board was prepared in the same manner as in Example 1 and the characteristic impedance was measured, there was a variation of plus or minus 16%. A semiconductor device equipped with a digital semiconductor was created, and the operable clock frequency was measured and found to be 80 MHz. When a humidification test was performed with a pressure cooker at 121 ° C. and 2 atm, 80 MHz operation was disabled in 1000 hours. When this semiconductor device was subjected to a thermal shock test that reciprocates between −65 ° C. and 125 ° C., it became inoperable in 300 cycles.
(Examples 8 to 10)
A resin varnish composed of a thermosetting polyphenylene ether resin of Example 2 and a toluene solvent was applied to one side of a 12 μm thick electrolytic copper foil for printed circuit boards so that the resin thickness after drying was 50 μm. In drying the coating film, a hot air dryer was used, and the solvent evaporation rate until the residual solvent concentration of the coating film reached 200,000 ppm was Example 8; 0.005 g · (cm 2 Min), Example 9; 0.01 g / (cm 2 Min), Example 10; 0.05 g / (cm 2 ・ The temperature and air volume of the hot air were adjusted so that The obtained resin-coated sheet has no dry cracking on the coated surface, and there is no powder falling off during processing such as cutting of resin-coated metal foil or when producing multilayer wiring boards by sequential lamination, and a highly reliable multilayer A wiring board could be produced.
(Comparative Example 2)
In drying the coating film of Example 2, the solvent evaporation rate was 0.2 g / (cm 2 A metal foil with a resin was produced in the same manner as in Examples 8 to 10 except that the temperature and air volume of hot air were adjusted so that In the obtained sheet, dry cracks were observed on the coated surface, and powdered off was observed during processing such as cutting of the resin-coated metal foil or during handling when producing a multilayer wiring board by sequential lamination. When a cross section of the produced multilayer wiring board was observed, a resin embedding defect occurred in the circuit portion.
(Examples 11 to 13)
Using the thermosetting polyphenylene ether resin of Example 2, the resin was melt-extruded on one side of a 12 μm thick electrolytic copper foil for printed circuit boards so that the resin thickness after drying was 50 μm on the copper foil. A resin film was formed. As a melt-extrusion apparatus, a twin screw type melt extruder having a T-die at the end of the extrusion part was used, and the melt extrusion temperatures were as follows: Example 11: 80 ° C., Example 12: 120 ° C. 13: The apparatus was adjusted to 250 ° C. The obtained resin-coated metal foil has a smooth surface, and there is no powder falling off during processing such as cutting of resin-coated metal foil or when producing multilayer wiring boards by sequential lamination, and highly reliable multilayer wiring A plate could be made.
(Comparative Example 3)
Resin-coated metal foils were prepared in the same manner as in Examples 11 to 13, except that the melt-molded film of the thermosetting polyphenylene ether resin of Example 2 was 350 ° C. The surface of the obtained resin-coated metal foil is not smooth, and although there is no powder falling off during processing such as cutting of the resin-coated base material or when manufacturing a multilayer wiring board by sequential lamination, the prepared multilayer wiring When the cross section of the plate was observed, a resin embedding defect occurred in the circuit portion.
(Example 14)
A 10 μm-thick polyethylene film was pressure-bonded to the resin surface of the thermosetting polyphenylene ether resin-attached metal foil prepared in Example 2 with a hot roll at 100 ° C. to obtain a protective sheet for the resin-attached metal foil. With the protective sheet attached, the sample was wound around a cylinder having a diameter of 10 cm and stored at 23 ° C. for 1 week. As a result, the surface of the metal foil was not contaminated with the thermosetting polyphenylene ether resin. Further, when the edge of the pressure-bonded polyethylene film was rubbed with a finger, it was easily peeled off from the end.
(Example 15)
A multilayer wiring board using a thermosetting polyphenylene ether resin having a heat resistant temperature of 200 ° C. as an insulating resin was prepared. The total number of wirings was 6 layers. The heat resistance temperature of this multilayer wiring board was 200 ° C. When the electric signal propagation speed of this multilayer wiring board was measured by TDR (time domain reflectometry), it was 17.5 cm or more per nanosecond. After mounting a field programmable gate array chip, a damping resistor, and a capacitor on this multilayer wiring board, resin sealing was performed to obtain an electronic device. When this electronic device was mounted on a digital circuit board having a reference clock of 100 megahertz, it operated without problems. When this digital circuit board was humidified for 1000 hours at 60 ° C. and a relative humidity of 90%, it was examined whether it would operate again.
(Comparative Example 4)
When a multilayer wiring board using an ordinary epoxy resin for copper-clad laminate as an insulating resin was used instead of the multilayer wiring board of Example 15, it was 15.0 cm per nanosecond even in a place where the electric signal propagation speed was highest by TDR. I found out that An electronic device was created using the same elements as in Example 15, and an operation test was performed with a reference clock of 100 megahertz, but it did not operate normally. It operated when the reference clock was lowered to 70 MHz. When this digital circuit board was humidified for 1000 hours at 60 ° C. and a relative humidity of 90%, it was examined whether it would operate again.
Industrial applicability
By the metal foil with thermosetting resin for multilayer wiring board of the present invention, a high-performance multilayer wiring board having stable characteristic impedance by the laminated buildup method can be manufactured. By the production method of the present invention, an excellent quality metal foil with polyphenylene ether resin can be produced. An inexpensive resin surface protective sheet can be pressure-bonded to the metal foil with resin of the present invention, and can be used as a metal foil with resin excellent in storage and handling. Since the multilayer wiring board of the present invention has stable characteristic impedance and excellent electrical characteristics, it is possible to manufacture unprecedented high-performance high-speed digital circuits and high-frequency circuits. The electronic device according to the present invention is an excellent device capable of high-speed operation and high-frequency operation that has not been conventionally available.

Claims (13)

金属箔の片面に比誘電率が1メガヘルツ以上の周波数領域で3.3以下の熱硬化性樹脂の膜を有し、樹脂フロー量が1%以上50%以下であることを特徴とする逐次多層配線板用の樹脂付金属箔。A sequential multilayer having a thermosetting resin film of 3.3 or less in a frequency region having a relative dielectric constant of 1 megahertz or more on one side of a metal foil, and a resin flow amount of 1% or more and 50% or less Metal foil with resin for wiring boards. 金属箔の片面に比誘電率が1メガヘルツ以上の周波数領域で3.3以下の熱硬化性樹脂の膜を有し、樹脂フロー量が5%以上50%以下であることを特徴とする逐次多層配線板用の樹脂付金属箔。A sequential multilayer having a thermosetting resin film of 3.3 or less in a frequency region with a relative dielectric constant of 1 megahertz or more on one side of a metal foil, and a resin flow rate of 5% or more and 50% or less Metal foil with resin for wiring boards. 請求の範囲第1項または請求の範囲第2項の逐次多層配線板用樹脂付金属箔のうち、熱硬化性樹脂が無機充填材を含んでなることを特徴とする逐次多層配線板用の樹脂付金属箔。A resin for sequential multilayer wiring boards, wherein the thermosetting resin of the metal foil with resin for sequential multilayer wiring boards according to claim 1 or claim 2 comprises an inorganic filler. Attached metal foil. 請求の範囲第1項、請求の範囲第2項または請求の範囲第3項の逐次多層配線板用の樹脂付金属箔のうち、熱硬化性樹脂が硬化されたときガラス転移温度が180℃以上であることを特徴とする逐次多層配線板用の樹脂付金属箔。Of the metal foils with resin for sequential multilayer wiring boards according to claim 1, claim 2 or claim 3, the glass transition temperature is 180 ° C. or higher when the thermosetting resin is cured. Metal foil with resin for sequential multilayer wiring board, characterized in that 請求の範囲第1項、請求の範囲第2項、請求の範囲第3項または請求の範囲第4項の逐次多層配線板用の樹脂付金属箔のうち、熱硬化性樹脂が熱硬化性ポリフェニレンエーテル樹脂であることを特徴とする逐次多層配線板用の樹脂付金属箔。Of the metal foils with resin for sequential multilayer wiring boards according to claim 1, claim 2, claim 3 or claim 4, the thermosetting resin is thermosetting polyphenylene. A resin-attached metal foil for sequential multilayer wiring boards, which is an ether resin. 請求の範囲第5項の逐次多層配線板用の樹脂付金属箔において、熱硬化性樹脂がポリスチレン系重合体を含む熱硬化性ポリフェニレンエーテル樹脂であることを特徴とする逐次多層配線板用の樹脂付金属箔。Resin for metal foil for sequential multilayer wiring boards according to claim 5, characterized in that the thermosetting resin is a thermosetting polyphenylene ether resin containing a polystyrene polymer. Attached metal foil. 熱硬化性ポリフェニレンエーテル樹脂と溶剤からなる樹脂ワニスを金属箔に塗布し、得られた塗布膜を乾燥するにあたって、溶剤の蒸発速度が0.10g/(cm2・分)以下となる条件下で乾燥することを特徴とする請求の範囲第5項または請求の範囲第6項の逐次多層配線板用の樹脂付金属箔の製造方法。When a resin varnish composed of a thermosetting polyphenylene ether resin and a solvent is applied to a metal foil and the resulting coating film is dried, the solvent evaporation rate is 0.10 g / (cm 2 · min) or less. The method for producing a resin-coated metal foil for a sequential multilayer wiring board according to claim 5 or 6, wherein the metal foil is dried. 熱硬化性ポリフェニレンエーテル樹脂と溶剤からなる樹脂ワニスを金属箔に塗布し、得られた塗布膜を乾燥するにあたって、熱硬化性樹脂の塗布膜の残存溶媒濃度が200000ppmに達するまでの溶剤の蒸発速度が0.10g/(cm2・分)以下となる条件下で乾燥することを特徴とする請求の範囲第5項または請求の範囲第6項の逐次多層配線板用の樹脂付金属箔の製造方法。When a resin varnish comprising a thermosetting polyphenylene ether resin and a solvent is applied to a metal foil, and the resulting coating film is dried, the solvent evaporation rate until the residual solvent concentration of the thermosetting resin coating film reaches 200,000 ppm The metal foil with resin for sequential multilayer wiring boards according to claim 5 or 6, characterized in that the film is dried under a condition of 0.10 g / (cm 2 · min) or less. Method. 請求の範囲第5項または請求の範囲第6項の逐次多層配線板用の樹脂付金属箔の製造方法において、熱硬化性ポリフェニレンエーテル樹脂を実質的に分解させない条件下で溶融、押し出しすることを特徴とする逐次多層配線板用の樹脂付金属箔の製造方法。The method for producing a resin-coated metal foil for sequential multilayer wiring boards according to claim 5 or claim 6, wherein the thermosetting polyphenylene ether resin is melted and extruded under conditions that do not substantially decompose. A method for producing a resin-coated metal foil for a sequential multilayer wiring board. 容易に剥離可能な樹脂面保護シートを有することを特徴とする請求の範囲第1項〜第6項の何れか一項に記載の逐次多層配線板用の樹脂付金属箔。The resin-coated metal foil for sequential multilayer wiring boards according to any one of claims 1 to 6, further comprising a resin surface protective sheet that can be easily peeled off. 請求の範囲第1項、請求の範囲第2項、請求の範囲第3項、請求の範囲第4項または請求の範囲第5項の逐次多層配線板用の樹脂付金属箔を逐次に積層することにより配線層を形成したことを特徴とする逐次多層配線板。The resin-attached metal foil for successive multilayer wiring boards according to claim 1, claim 2, claim 3, claim 4, claim 4 or claim 5 is sequentially laminated. A sequential multilayer wiring board characterized in that a wiring layer is formed. 請求の範囲第12項の逐次多層配線板に配線手段を用いて電子素子を接続したことを特徴とする電子装置。An electronic device comprising an electronic element connected to the sequential multilayer wiring board according to claim 12 using wiring means. 電気信号の伝搬速度が1ナノ秒当たり16.5cm以上であり、かつ耐熱温度が180℃以上である請求の範囲第12項の逐次多層配線板と電子素子からなる請求の範囲第13項の電子装置。14. The electron according to claim 13, comprising a sequential multilayer wiring board according to claim 12 and an electronic element, wherein the propagation speed of the electric signal is 16.5 cm or more per nanosecond and the heat resistant temperature is 180 ° C. or more. apparatus.
JP50039798A 1996-06-07 1996-12-19 Metal foil with resin for multilayer wiring board, manufacturing method thereof, multilayer wiring board, and electronic device Expired - Lifetime JP3676379B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP14534896 1996-06-07
JP17957996 1996-07-09
PCT/JP1996/003712 WO1997047165A1 (en) 1996-06-07 1996-12-19 Resin-carrying metal foil for multilayered wiring board, process for manufacturing the same, multilayered wiring board, and electronic device

Publications (1)

Publication Number Publication Date
JP3676379B2 true JP3676379B2 (en) 2005-07-27

Family

ID=26476502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50039798A Expired - Lifetime JP3676379B2 (en) 1996-06-07 1996-12-19 Metal foil with resin for multilayer wiring board, manufacturing method thereof, multilayer wiring board, and electronic device

Country Status (6)

Country Link
US (1) US6254971B1 (en)
EP (1) EP0957664B1 (en)
JP (1) JP3676379B2 (en)
KR (1) KR100280911B1 (en)
DE (1) DE69629061T2 (en)
WO (1) WO1997047165A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013098393A (en) * 2011-11-01 2013-05-20 Fujitsu Ltd Manufacturing method of electronic apparatus

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6898180B2 (en) 1999-06-08 2005-05-24 Nokia Corporation Connection admission in a communications network
EP2028915A1 (en) * 1999-08-12 2009-02-25 Ibiden Co., Ltd. Multilayer printed wiring board, solder resist composition, method for manufacturing multilayer printed wiring board, and semiconductor device
US6871396B2 (en) * 2000-02-09 2005-03-29 Matsushita Electric Industrial Co., Ltd. Transfer material for wiring substrate
JP2002033581A (en) * 2000-07-13 2002-01-31 Mitsui Mining & Smelting Co Ltd Manufacturing method for copper-clad laminate
KR20020018078A (en) * 2000-08-28 2002-03-07 나카히로 마오미 Method of producing through-hole in aromatic polyimide film
JP2002093853A (en) * 2000-09-07 2002-03-29 Internatl Business Mach Corp <Ibm> Printed wiring board, and method of flip-chip bonding
JP4529262B2 (en) * 2000-09-14 2010-08-25 ソニー株式会社 High frequency module device and manufacturing method thereof
JP2002111222A (en) * 2000-10-02 2002-04-12 Matsushita Electric Ind Co Ltd Multilayer substrate
EP1481796B1 (en) 2002-03-05 2015-08-19 Hitachi Chemical Co., Ltd. Metal foil with resin and metal-clad laminate, and printed wiring board using the same and method for production thereof
US6734259B1 (en) * 2002-10-24 2004-05-11 International Business Machines Corporation Resin composition with a polymerizing agent and method of manufacturing prepreg and other laminate structures therefrom
US7023084B2 (en) * 2003-03-18 2006-04-04 Sumitomo Metal (Smi) Electronics Devices Inc. Plastic packaging with high heat dissipation and method for the same
US8414962B2 (en) 2005-10-28 2013-04-09 The Penn State Research Foundation Microcontact printed thin film capacitors
US8440916B2 (en) * 2007-06-28 2013-05-14 Intel Corporation Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method
US8877565B2 (en) * 2007-06-28 2014-11-04 Intel Corporation Method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method
WO2009037332A1 (en) * 2007-09-20 2009-03-26 Agfa-Gevaert N.V. Security laminates with interlaminated transparent embossed polymer hologram
EP2042576A1 (en) * 2007-09-20 2009-04-01 Agfa-Gevaert Security laminates with interlaminated transparent embossed polymer hologram.
TWI611922B (en) * 2008-03-25 2018-01-21 Ajinomoto Co., Inc. Insulating resin sheet and method of manufacturing multilayer printed circuit board using the same
US20100320743A1 (en) * 2008-04-01 2010-12-23 Agfa-Gevaert Security laminate having a security feature
CN102256789A (en) * 2008-04-01 2011-11-23 爱克发-格法特公司 Lamination process for producung security laminates
CN101990497A (en) * 2008-04-01 2011-03-23 爱克发-格法特公司 Security laminates with a security feature detectable by touch
JP2009283739A (en) * 2008-05-23 2009-12-03 Shinko Electric Ind Co Ltd Wiring substrate and production method thereof
EP2181858A1 (en) * 2008-11-04 2010-05-05 Agfa-Gevaert N.V. Security document and methods of producing it
EP2199100A1 (en) * 2008-12-22 2010-06-23 Agfa-Gevaert N.V. Security laminates for security documents.
US20110052473A1 (en) * 2009-08-25 2011-03-03 Tdk Corporation Method of manufacturing active material
JP5444944B2 (en) * 2009-08-25 2014-03-19 Tdk株式会社 Active material and method for producing active material
JP5482062B2 (en) * 2009-09-29 2014-04-23 Tdk株式会社 Thin film capacitor and method for manufacturing thin film capacitor
EP2332738B1 (en) 2009-12-10 2012-07-04 Agfa-Gevaert Security document with security feature on edge
PL2335937T3 (en) 2009-12-18 2013-06-28 Agfa Gevaert Laser markable security film
EP2335938B1 (en) 2009-12-18 2013-02-20 Agfa-Gevaert Laser markable security film
KR101328235B1 (en) * 2010-05-07 2013-11-14 제이엑스 닛코 닛세키 킨조쿠 가부시키가이샤 Copper foil for printed circuit
CN102371649A (en) * 2010-08-19 2012-03-14 鸿富锦精密工业(深圳)有限公司 Manufacturing method of metal-resin complex
US20120090883A1 (en) * 2010-10-13 2012-04-19 Qualcomm Incorporated Method and Apparatus for Improving Substrate Warpage
US9076600B2 (en) 2012-03-27 2015-07-07 Tdk Corporation Thin film capacitor
US9030800B2 (en) 2012-03-29 2015-05-12 Tdk Corporation Thin film capacitor
WO2014046014A1 (en) * 2012-09-20 2014-03-27 株式会社クラレ Circuit board and method for manufacturing same
JP5874697B2 (en) * 2013-08-28 2016-03-02 株式会社デンソー Multilayer printed circuit board and manufacturing method thereof
US11437304B2 (en) * 2014-11-06 2022-09-06 Semiconductor Components Industries, Llc Substrate structures and methods of manufacture
JP6520085B2 (en) 2014-12-05 2019-05-29 Tdk株式会社 Thin film capacitor
WO2016201076A1 (en) 2015-06-09 2016-12-15 Rogers Corporation Circuit materials and articles formed therefrom
KR102411998B1 (en) * 2015-06-25 2022-06-22 삼성전기주식회사 Circuit board and method of manufacturing the same
EP3502150A4 (en) * 2016-08-22 2020-01-22 Osaka Soda Co., Ltd. Photocurable resin composition, ink and coating material
US10993333B2 (en) * 2017-07-15 2021-04-27 Sanmina Corporation Methods of manufacturing ultra thin dielectric printed circuit boards with thin laminates
JP2020083931A (en) * 2018-11-16 2020-06-04 利昌工業株式会社 Resin composition, prepreg, and, laminate sheet

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6025296A (en) * 1983-07-22 1985-02-08 三菱瓦斯化学株式会社 Method of producing multilayer board
JPS6142872U (en) * 1984-08-22 1986-03-19 カシオ計算機株式会社 flexible circuit board
JPH0686534B2 (en) * 1985-10-31 1994-11-02 三井東圧化学株式会社 Flexible printed circuit board manufacturing method
JPH0653261B2 (en) * 1988-12-13 1994-07-20 日本ジーイープラスチックス株式会社 Painted resin molded article having low temperature impact resistance and method for coating such resin molded article
JPH0716089B2 (en) * 1989-08-25 1995-02-22 松下電工株式会社 Electric laminate
JPH03165596A (en) * 1989-11-25 1991-07-17 Matsushita Electric Works Ltd Multilayer laminated board
JPH03166935A (en) * 1989-11-25 1991-07-18 Matsushita Electric Works Ltd Laminated sheet
JPH0491940A (en) * 1990-08-07 1992-03-25 Dainippon Printing Co Ltd Metal foil-laminated film
CN1036402C (en) * 1991-01-11 1997-11-12 旭化成工业株式会社 Curable polyphenylene ether resin composition and cured resin composition obtainable therefrom
JP3166935B2 (en) 1992-03-26 2001-05-14 株式会社リコー Decoding method and apparatus
JPH06232553A (en) * 1993-01-29 1994-08-19 Hitachi Chem Co Ltd Single-sided flexible copper plated board for lamination
JP3516473B2 (en) * 1993-12-28 2004-04-05 新日鐵化学株式会社 Heat-resistant adhesive film for printed circuit boards
JP3165596B2 (en) 1994-08-31 2001-05-14 シャープ株式会社 Air conditioner human body detection method
WO1996037915A1 (en) * 1995-05-26 1996-11-28 Sheldahl, Inc. Adherent film with low thermal impedance and high electrical impedance used in an electronic assembly with a heat sink
US5928767A (en) * 1995-06-07 1999-07-27 Dexter Corporation Conductive film composite

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013098393A (en) * 2011-11-01 2013-05-20 Fujitsu Ltd Manufacturing method of electronic apparatus

Also Published As

Publication number Publication date
EP0957664B1 (en) 2003-07-09
DE69629061D1 (en) 2003-08-14
KR100280911B1 (en) 2001-02-01
EP0957664A1 (en) 1999-11-17
WO1997047165A1 (en) 1997-12-11
US6254971B1 (en) 2001-07-03
KR20000016429A (en) 2000-03-25
DE69629061T2 (en) 2004-05-13
EP0957664A4 (en) 1999-11-17

Similar Documents

Publication Publication Date Title
JP3676379B2 (en) Metal foil with resin for multilayer wiring board, manufacturing method thereof, multilayer wiring board, and electronic device
JP3745653B2 (en) Polymer / ceramic composite electronic substrate
US7164197B2 (en) Dielectric composite material
US6881293B2 (en) Process for producing a multi-layer printer wiring board
US6500529B1 (en) Low signal loss bonding ply for multilayer circuit boards
KR20190090031A (en) Dielectric layer with improved thermal conductivity
KR102433141B1 (en) Multilayer circuit board using interposer layer and conductive paste
US20150296614A1 (en) Crosslinked fluoropolymer circuit materials, circuit laminates, and methods of manufacture thereof
JP5263297B2 (en) RF tag and manufacturing method thereof
JP2011132507A (en) Epoxy resin composition
JP3514647B2 (en) Multilayer printed wiring board and method of manufacturing the same
EP1408726B1 (en) Method of manufacturing a printed wiring board
EP3589093A1 (en) Multi-layer wiring substrate and semiconductor device
JP4433651B2 (en) High laser processability insulating resin material, high laser processability prepreg, and high laser processability metal-clad laminate
JP2005353781A (en) Conductive paste composition for multilayer interconnection substrate
JP3236812B2 (en) Multilayer wiring board
JPH06322157A (en) High-dielectric constant prepreg for interlaminar bonding
CN1224567A (en) Resin-carrying metal foil for multilayered wiring board, process for mfg. same, multilayered wiring board, and electronic device
JPH10335834A (en) Multilayered wiring board
JP2000013031A (en) Manufacture of multilayered printed wiring board
TW449614B (en) Resin-carrying metal foil for multilayered wiring board, process for manufacturing the same, multilayered wiring board, and electronic device
JP2005050860A (en) Porosity wiring board and electronic component using it
JP2001015877A (en) Metal base printed wiring board, metal base multilayered printed wiring board and manufacture thereof
JPH11150366A (en) Production of sequential multilayer wiring board
JPH10178275A (en) Composite sheet for multilayered wiring board

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20031216

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20050426

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050428

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080513

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090513

Year of fee payment: 4

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090513

Year of fee payment: 4

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100513

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100513

Year of fee payment: 5

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100513

Year of fee payment: 5

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110513

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110513

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120513

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120513

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130513

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130513

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140513

Year of fee payment: 9

EXPY Cancellation because of completion of term