JP3582286B2 - Manufacturing method of wiring board - Google Patents

Manufacturing method of wiring board Download PDF

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Publication number
JP3582286B2
JP3582286B2 JP07026497A JP7026497A JP3582286B2 JP 3582286 B2 JP3582286 B2 JP 3582286B2 JP 07026497 A JP07026497 A JP 07026497A JP 7026497 A JP7026497 A JP 7026497A JP 3582286 B2 JP3582286 B2 JP 3582286B2
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Japan
Prior art keywords
hole
substrate
electrode
wiring board
forming
Prior art date
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JP07026497A
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JPH10270594A (en
Inventor
康男 山▲崎▼
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Seiko Epson Corp
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明はスルーホールを有した基板に関するものであって、更に詳しくはスルーホールを介して基板に設けられた電極と、電極の設けられた面と異なる面に突起電極を形成した配線基板に関するものである。
【０００２】
【従来の技術】
今日、例えばＢＧＡ（ボール グリッド アレイ）やＣＳＰ（チップ サイズパッケージ）やＭＣＭ（マルチ チップ モジュール）等の半導体装置においては、各種の基板を用いて、半導体素子と外部電極の接続が図られている。その際、配線基板の一方の面に半導体素子を搭載し、他の一方の面に外部電極を設け、それぞれの間を配線パターン及びスルーホールを用いて接続する方法が採られている。一例として、図５および図６および図７に一般的にＢＧＡとして用いられているパッケージの構造を示した。
【０００３】
図５はＢＧＡとして用いられる半導体装置の概略を示した断面図であり、図６および図７は、図５に示した半導体装置の要部を示す断面図である。図中、１０１は基板、１０２は基板１０１の一方の面ににフェイスダウンまたはワイヤーボンディング技術で実装された半導体素子、１０３は基板上に形成され、半導体素子１０２と接続された配線パターン、１０４は配線パターン１０３の一部を用いて形成された電極、１０５は基板１０１の半導体素子１０２と異なる他方の面に形成された突起電極、１０６は電極１０４と突起電極１０５を接続するために基板１０１に設けられたスルーホール、１０７は電解メッキによりスルーホール１０６中に形成された金属メッキ層である。突起電極１０５として通常多く用いられるのは、Ｓｎ／Ｐｂ半田をボール状に形成する方法である。図６に示すように半田を電極１０４にスルーホール１０６を通して半田付けし、突起電極１０５を形成する。半田による突起電極の形成方法には半田クリームと呼ばれる半田の微粒子をフラックス中に分散させペースト状にしたものをスルーホール上に塗布した後、加熱し半田を溶融させることにより半田付けを行う。
【０００４】
あるいは、図７に示したように電極１０４のスルーホール１０６側に電解メッキ法により金属メッキ層１０７を形成した後Ｓｎ／Ｐｂ半田を金属メッキ層１０７に半田付けし突起電極１０５を形成する場合もある。
【０００５】
ＣＳＰやＭＣＭにおいても前述と同様な技術を用いて半導体装置を製造している。
【０００６】
【発明が解決しようとする課題】
前述の従来技術である半導体装置に用いる配線基板においては、例えば図６において、半田をスルーホール１０６を通して電極１０４に半田付けするために気泡１０８が入りやすく、突起電極１０５と電極１０４の接合強度の低下や電気的な接続不良を起こすことがあった。また、図７による電解メッキによる配線基板においては、電解メッキをするための大がかりな湿式の設備が必要であり、簡便に基板を製造することが出来なかった。
【０００７】
【課題を解決するための手段】
本発明は上記の課題を解決するために設けられたもので、請求項１に記載の配線基板の製造方法では、基板の一方の面に接着剤を塗布する工程と、前記基板にスルーホールを形成する工程と、前記基板の一方の面側に前記接着剤を介して銅箔を形成する工程と、前記銅箔をエッチングすることによって所定の配線パターンと前記スルーホール上に前記配線パターンと接続しかつ孔を有する電極とを形成する工程と、前記基板の他方の面側から前記スルーホールへ金属を充填する工程と、少なくとも前記金属を加熱し前記基板の他方の面側に突起電極を形成する工程と、を有することを特徴とする。このような製造方法の配線基板を用いれば、まず、湿式の大がかりな設備を必要とせず簡便に配線基板を製造できる。また、半田付け時に前記電極上に設けられた一つまたは複数個の孔により空気が抜けるため、気泡の発生もなく、良好な接続を得る事が出来る。
【０００８】
また本発明の他の配線基板の製造方法としては、基板の一方の面に接着剤を塗布する工程と、前記基板にスルーホールを形成する工程と、前記基板の一方の面側に前記接着剤を介して銅箔を形成する工程と、前記銅箔をエッチングすることによって所定の配線パターンと前記スルーホール上に前記配線パターンと接続しかつ孔を有する電極とを形成する工程と、前記基板の他方の面側から前記スルーホールへ金属粒子を含む樹脂を充填する工程と、少なくとも前記金属粒子を含む樹脂を加熱し前記基板の他方の面側に突起電極を形成する工程と、を有することを特徴とする。このような製造方法の配線基板においては、前述の特徴に加え、半田による接続方法に比べ比較的低温で突起電極を形成することが出来るため、配線基板や半導体装置に与える熱によるダメージを少なくすることが出来る。
【０００９】
【発明の実施の形態】
図１は、本発明による配線基板の一実施例を概念的に示す断面図であり。図２（ａ）は、図１の配線基板の要部を拡大して示す断面図であり図２（ｂ）は図２（ａ）を図中斜め上方から見た斜視図である。図２（ｃ）は、図２（ａ）の製造工程を説明する断面図である。
【００１０】
図中、１１は半導体素子、１は基板、２は基板１に開けられたスルーホール、３はスルーホールの一方の開口部上に設けられた電極、３ａは電極３に設けられた孔、４は突起電極、５は配線パターン、６は接着剤を現している。
【００１１】
本実施例を図１及び図２（ａ）、図２（ｂ）および図２（ｃ）を用いて説明する。まず、基板１として厚み１２５μｍのポリイミド樹脂を用いた。基板１には接着剤６を厚み約１０〜２０μｍ塗布する。基板１に所定の形状のプレス抜きを行いスルーホール２を形成する。スルーホール２としてφ１５０μｍの丸穴を開けている。次に厚み３５μｍの銅箔を接着剤６に加熱押圧して接着し、フォトエッチング法を用いて所定のパターン５を形成する。この際、スルーホール２上に電極３と電極３に細い孔３ａを形成する。この後、図２（ｃ）に示すように、電極３と反対の面にスルーホール２の一部または全てを充填するように半田粒子８をフラックス中に含ませた半田クリーム７をスクリーン印刷により印刷する。この際、電極３には、細孔３ａが設けてあることにより、スルーホール２を塞ぐように半田クリーム７を印刷しても、スルーホール２中の空気は、細孔３ａを通して排気されるため、スルーホール中に半田クリーム７の未充填の発生を無くすことが出来る。その後、約１８５〜２３０℃に加熱し、半田を溶融させる。溶融した半田は自身の表面張力により球状となり、図２（ａ）の構造を得ることが出来る。この様に加熱した場合には、半田クリーム中のフラックスが熱により一部ガス化するが、このガスも細孔３ａを通して排出されるため、スルーホール２中に空洞は発生しない。
【００１２】
本実施例では、Ｔ−ＢＧＡ（テープ ボール グリッド アレイ）と呼ばれるＴＣＰ（テープ キャリア パッケージ）上に半田による突起電極を形成した半導体装置に適用する配線基板としての一例としてあげた。その他に、通常広く用いられる材料としてガラスエポキシ樹脂による基板やセラミックスによる基板においても上記実施例と同様な効果が得られることは容易に推察することが出来る。
【００１３】
一方請求項２に記載したように、上記半田クリーム７の替わりに金属粒子を含有する樹脂を塗布し、約１５０℃で加熱硬化させることにより突起電極４を形成しても良い。金属粒子としてＡｇ／Ｐｄ合金の微粉末を用いた。Ａｇ／Ｐｄの微粉末を含んだ樹脂を印刷する際も前述の実施例による半田クリーム７の印刷時と同様に気泡が細孔を通って排出されるため未充填による気泡の発生を同様に防ぐことが出来る。また、本実施例によれば半田の溶融温度である１８０℃以上に加熱しなくても樹脂が硬化するため、配線基板に与える熱によるダメージを少なくすることが出来る。
【００１４】
電極３の形状として、請求項３に記載したように図３および図４に斜視図で示したような形状を選択することも可能である。この場合電極３とスルーホール２との隙間２ａが、図２（ｂ）の細孔３ａと同じ機能を果たし、スルーホール２に半田クリームや充填される金属粒子を含有する樹脂を充填した際の空気抜きの機能を果たし、突起電極と電極との接続を良好にすることが出来る。
【００１５】
【発明の効果】
以上の様に本発明によれば、樹脂封止した半導体装置において、電極３に細孔３ａまたは、電極３とスルーホール２との間隙２ａを設けることにより、スルーホール２への未充填や気泡の発生を無くすことができる。このことにより、突起電極５と電極３との電気的接合を良好に保ち、高い品質の製品を得ることが出来る。
【００１６】
さらに、本発明によれば、突起電極５として金属粒子を含有した樹脂を用いることにより、熱ストレスのかからない配線基板を得ることが出来る。
【図面の簡単な説明】
【図１】本発明による配線基板の一実施例を概念的に示す断面図である。
【図２】（ａ）および（ｃ）は本発明による配線基板の一実施例の要部を概念的に示す断面図であり、（ｂ）は（ａ）の電極３側上方より見た斜視図である。
【図３】本発明による配線基板の要部を概念的に示す斜視図である。
【図４】本発明による配線基板の要部を概念的に示す斜視図である。
【図５】従来例による半導体装置を概念的に示す断面図である。
【図６】従来例による配線基板の要部を概念的に示す断面図である。
【図７】従来例による配線基板の要部を概念的に示す断面図である。
【符号の説明】
１ 基板
２ スルーホール
２ａ 間隙
３ 電極
３ａ 孔
４ 突起電極
５ 配線パターン
６ 接着剤
７ 半田クリーム
８ 半田粒子
１１ 半導体素子
１０１ 基板
１０２ 半導体素子
１０３ 配線パターン
１０４ 電極
１０５ 突起電極
１０６ スルーホール
１０７ 金属メッキ層
１０８ 気泡[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a substrate having a through-hole, and more particularly, to a wiring substrate having an electrode provided on the substrate via the through-hole and a protruding electrode formed on a surface different from the surface on which the electrode is provided. It is.
[0002]
[Prior art]
Today, in semiconductor devices such as BGA (ball grid array), CSP (chip size package), and MCM (multi-chip module), various substrates are used to connect semiconductor elements and external electrodes. At this time, a method is adopted in which a semiconductor element is mounted on one surface of a wiring board, external electrodes are provided on the other surface, and a connection is made between them using a wiring pattern and a through hole. As an example, FIGS. 5, 6 and 7 show the structure of a package generally used as a BGA.
[0003]
FIG. 5 is a cross-sectional view schematically showing a semiconductor device used as a BGA, and FIGS. 6 and 7 are cross-sectional views showing main parts of the semiconductor device shown in FIG. In the figure, 101 is a substrate, 102 is a semiconductor element mounted on one surface of the substrate 101 by face-down or wire bonding technology, 103 is a wiring pattern formed on the substrate and connected to the semiconductor element 102, 104 is An electrode formed using a part of the wiring pattern 103, 105 is a protruding electrode formed on the other surface of the substrate 101 different from the semiconductor element 102, and 106 is on the substrate 101 for connecting the electrode 104 and the protruding electrode 105. The provided through holes 107 are metal plating layers formed in the through holes 106 by electrolytic plating. A commonly used method for forming the bump electrode 105 is a method of forming Sn / Pb solder into a ball shape. As shown in FIG. 6, solder is soldered to the electrodes 104 through the through holes 106 to form the protruding electrodes 105. In the method of forming the protruding electrodes using solder, solder particles are formed by dispersing fine particles of solder called solder cream into a flux and applying the paste to the through holes, and then heating and melting the solder.
[0004]
Alternatively, as shown in FIG. 7, a protruding electrode 105 may be formed by forming a metal plating layer 107 on the through hole 106 side of the electrode 104 by electrolytic plating and then soldering Sn / Pb solder to the metal plating layer 107. is there.
[0005]
Semiconductor devices are also manufactured in CSP and MCM using the same technology as described above.
[0006]
[Problems to be solved by the invention]
In the wiring board used in the above-described conventional semiconductor device, for example, in FIG. 6, bubbles 108 are likely to enter because solder is soldered to the electrode 104 through the through hole 106, and the bonding strength between the protruding electrode 105 and the electrode 104 is reduced. In some cases, a drop or electrical connection failure occurred. In addition, the wiring board formed by electrolytic plating shown in FIG. 7 requires a large-scale wet-type facility for performing electrolytic plating, and the board cannot be easily manufactured.
[0007]
[Means for Solving the Problems]
The present invention is provided to solve the above-mentioned problem, and in the method of manufacturing a wiring board according to claim 1, a step of applying an adhesive to one surface of the board, and forming a through hole in the board. Forming, forming a copper foil on the one surface side of the substrate via the adhesive, and connecting the wiring pattern on the predetermined wiring pattern and the through hole by etching the copper foil. Forming an electrode having a hole and a hole, filling the through hole with a metal from the other surface of the substrate, and forming a protruding electrode on the other surface of the substrate by heating at least the metal. And a step of performing If a wiring board of such a manufacturing method is used, first, a wiring board can be easily manufactured without requiring large-scale wet-type equipment. Further, since air escapes through one or a plurality of holes provided on the electrode during soldering, good connection can be obtained without generating bubbles.
[0008]
Further, as another method for manufacturing a wiring board of the present invention, a step of applying an adhesive to one surface of the substrate, a step of forming a through hole in the substrate, and a step of forming the adhesive on one surface side of the substrate A step of forming a copper foil through, a step of forming a predetermined wiring pattern and an electrode having a hole connected to the wiring pattern on the through hole by etching the copper foil, A step of filling the through hole with a resin containing metal particles from the other surface side, and a step of heating at least the resin containing the metal particles to form a bump electrode on the other surface side of the substrate. Features. In the wiring board of such a manufacturing method, in addition to the above-described features, since the protruding electrodes can be formed at a relatively low temperature as compared with the connection method using solder, damage to the wiring board and the semiconductor device due to heat is reduced. I can do it.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a sectional view conceptually showing one embodiment of a wiring board according to the present invention. 2A is a cross-sectional view showing an enlarged main part of the wiring board of FIG. 1, and FIG. 2B is a perspective view of FIG. 2A viewed obliquely from above in the figure. FIG. 2C is a cross-sectional view illustrating the manufacturing process of FIG.
[0010]
In the figure, 11 is a semiconductor device, 1 is a substrate, 2 is a through hole formed in the substrate 1, 3 is an electrode provided on one opening of the through hole, 3a is a hole provided in the electrode 3, 4 Denotes a projecting electrode, 5 denotes a wiring pattern, and 6 denotes an adhesive.
[0011]
This embodiment will be described with reference to FIGS. 1 and 2 (a), 2 (b) and 2 (c). First, a polyimide resin having a thickness of 125 μm was used as the substrate 1. An adhesive 6 is applied to the substrate 1 with a thickness of about 10 to 20 μm. A through hole 2 is formed in the substrate 1 by pressing in a predetermined shape. A circular hole of φ150 μm is formed as the through hole 2. Next, a copper foil having a thickness of 35 μm is bonded to the adhesive 6 by heating and pressing, and a predetermined pattern 5 is formed by using a photoetching method. At this time, the electrode 3 and the thin hole 3 a are formed in the electrode 3 on the through hole 2. Thereafter, as shown in FIG. 2C, a solder cream 7 in which solder particles 8 are contained in a flux so as to fill a part or all of the through hole 2 on the surface opposite to the electrode 3 is screen-printed. Print. At this time, since the electrode 3 is provided with the pores 3a, even if the solder cream 7 is printed so as to cover the through holes 2, the air in the through holes 2 is exhausted through the pores 3a. In addition, it is possible to prevent the solder cream 7 from being unfilled in the through hole. Thereafter, the solder is heated to about 185 to 230 ° C. to melt the solder. The molten solder becomes spherical due to its own surface tension, and the structure shown in FIG. 2A can be obtained. When heated in this way, the flux in the solder cream is partially gasified by the heat, but this gas is also discharged through the pores 3a, so that no cavity is generated in the through hole 2.
[0012]
In the present embodiment, an example of a wiring substrate applied to a semiconductor device in which projecting electrodes made of solder are formed on a TCP (tape carrier grid array) called a T-BGA (tape ball grid array) is described. In addition, it can be easily inferred that the same effect as that of the above-described embodiment can be obtained even when a substrate made of glass epoxy resin or a substrate made of ceramics is used as a widely used material.
[0013]
On the other hand, the bump electrode 4 may be formed by applying a resin containing metal particles instead of the solder cream 7 and heating and curing the resin at about 150 ° C. Ag / Pd alloy fine powder was used as the metal particles. When printing the resin containing the fine powder of Ag / Pd, the bubbles are discharged through the pores similarly to the case of printing the solder cream 7 according to the above-described embodiment, so that the generation of the bubbles due to the unfilling is similarly prevented. I can do it. Further, according to the present embodiment, the resin is cured without heating to a temperature of 180 ° C. or more, which is the melting temperature of solder, so that damage to the wiring board due to heat can be reduced.
[0014]
As the shape of the electrode 3, it is also possible to select the shape as shown in the perspective views in FIGS. In this case, the gap 2a between the electrode 3 and the through-hole 2 performs the same function as the pore 3a in FIG. 2B, and the through-hole 2 is filled with a solder cream or a resin containing metal particles to be filled. It functions as an air vent and can improve the connection between the protruding electrodes and the electrodes.
[0015]
【The invention's effect】
As described above, according to the present invention, in the resin-sealed semiconductor device, the electrodes 3 are provided with the pores 3a or the gaps 2a between the electrodes 3 and the through holes 2 so that the through holes 2 are not filled or bubbles are not formed. Can be eliminated. As a result, the electrical connection between the protruding electrode 5 and the electrode 3 is kept good, and a high quality product can be obtained.
[0016]
Further, according to the present invention, a wiring board free from thermal stress can be obtained by using a resin containing metal particles as the protruding electrodes 5.
[Brief description of the drawings]
FIG. 1 is a sectional view conceptually showing one embodiment of a wiring board according to the present invention.
FIGS. 2A and 2C are cross-sectional views conceptually showing a main part of one embodiment of a wiring board according to the present invention, and FIG. 2B is a perspective view of FIG. FIG.
FIG. 3 is a perspective view conceptually showing a main part of a wiring board according to the present invention.
FIG. 4 is a perspective view conceptually showing a main part of a wiring board according to the present invention.
FIG. 5 is a cross-sectional view conceptually showing a conventional semiconductor device.
FIG. 6 is a sectional view conceptually showing a main part of a wiring board according to a conventional example.
FIG. 7 is a sectional view conceptually showing a main part of a conventional wiring board.
[Explanation of symbols]
Reference Signs List 1 substrate 2 through hole 2a gap 3 electrode 3a hole 4 projecting electrode 5 wiring pattern 6 adhesive 7 solder cream 8 solder particle 11 semiconductor element 101 substrate 102 semiconductor element 103 wiring pattern 104 electrode 105 projecting electrode 106 through hole 107 metal plating layer 108 Bubbles

Claims (3)

基板の一方の面に接着剤を塗布する工程と、
前記基板にスルーホールを形成する工程と、
前記基板の一方の面側に前記接着剤を介して銅箔を接着する工程と、
前記銅箔をエッチングすることによって所定の配線パターンと前記スルーホール上に前記配線パターンと接続しかつ孔を有する電極とを形成する工程と、
前記基板の他方の面側から前記スルーホールへ金属を充填する工程と、
少なくとも前記金属を加熱し前記基板の他方の面側に突起電極を形成する工程と、
を有することを特徴とする配線基板の製造方法。Applying an adhesive to one side of the substrate,
Forming a through hole in the substrate;
A step of bonding a copper foil to the one surface side of the substrate via the adhesive,
Forming a predetermined wiring pattern by etching the copper foil and an electrode having a hole connected to the wiring pattern on the through hole,
Filling a metal into the through hole from the other surface side of the substrate,
A step of heating at least the metal and forming a protruding electrode on the other surface side of the substrate;
A method for manufacturing a wiring board, comprising: 基板の一方の面に接着剤を塗布する工程と、
前記基板にスルーホールを形成する工程と、
前記基板の一方の面側に前記接着剤を介して銅箔を接着する工程と、
前記銅箔をエッチングすることによって所定の配線パターンと前記スルーホール上に前記配線パターンと接続しかつ孔を有する電極とを形成する工程と、
前記基板の他方の面側から前記スルーホールへ金属粒子を含む樹脂を充填する工程と、
少なくとも前記金属粒子を含む樹脂を加熱し前記基板の他方の面側に突起電極を形成する工程と、
を有することを特徴とする配線基板の製造方法。Applying an adhesive to one side of the substrate,
Forming a through hole in the substrate;
A step of bonding a copper foil to the one surface side of the substrate via the adhesive,
Forming a predetermined wiring pattern by etching the copper foil and an electrode having a hole connected to the wiring pattern on the through hole,
A step of filling the through hole with a resin containing metal particles from the other surface side of the substrate,
A step of heating at least the resin containing the metal particles and forming a protruding electrode on the other surface side of the substrate,
A method for manufacturing a wiring board, comprising: 前記電極の孔は前記電極と前記スルーホールの開口部との間の間隙によって形成されることを特徴とする請求項１または請求項２記載の配線基板の製造方法。The method according to claim 1, wherein the hole of the electrode is formed by a gap between the electrode and an opening of the through hole.
JP07026497A 1997-03-24 1997-03-24 Manufacturing method of wiring board Expired - Fee Related JP3582286B2 (en)

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DE19943031C5 (en) * 1998-10-27 2013-05-02 Heidelberger Druckmaschinen Ag Transmission for driving a printing press
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JP2006210770A (en) * 2005-01-31 2006-08-10 Toppan Printing Co Ltd Semiconductor device mounting substrate, and bga package for semiconductor element

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