JP3525147B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP3525147B2 JP3525147B2 JP12919897A JP12919897A JP3525147B2 JP 3525147 B2 JP3525147 B2 JP 3525147B2 JP 12919897 A JP12919897 A JP 12919897A JP 12919897 A JP12919897 A JP 12919897A JP 3525147 B2 JP3525147 B2 JP 3525147B2
- Authority
- JP
- Japan
- Prior art keywords
- contact
- contact terminal
- anode
- region
- terminal body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、絶縁ゲート型バ
イポーラトランジスタ（以下、ＩＧＢＴという）チップ
とダイオードチップとが同一パッケージに収納されてい
る加圧接触型で平型の半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pressure contact type flat semiconductor device in which an insulated gate bipolar transistor (hereinafter referred to as IGBT) chip and a diode chip are housed in the same package.
【０００２】[0002]
【従来の技術】電圧駆動型で扱いやすく、高速スイッチ
ング動作が可能なＩＧＢＴの発達とともに、これと組み
合わせるフリーホイーリングダイオードの特性改善も進
められている。図５はプレーナ型ダイオードの要部断面
図である。ｎ- 半導体基板１０にアノードｐ+ 領域２が
イオン注入とドライブ拡散により形成されている。アノ
ードｐ + 領域２上にアノード電極３が形成され、アノー
ドｐ+ 領域２と反対側にカソードｎ+ 領域４が形成さ
れ、カソードｎ+ 領域４上にカソード電極５が形成され
ている。カソード電極５は金属製基板８にはんだ７で固
着され、アノード電極３上には加圧、導電、放熱体を兼
ね備えた金属製のコンタクト端子体６が接触されてる。
尚、アノードｐ+ 領域２とカソードｎ+ 領域４とに挟ま
れた領域がｎ- 領域１となる。2. Description of the Related Art A voltage drive type, easy-to-handle, high-speed switch
Together with the development of IGBTs capable of
Improve the characteristics of the freewheeling diode
It is Figure 5 is a cross section of the main part of a planar diode.
It is a figure. n-Anode p on the semiconductor substrate 10+Area 2
It is formed by ion implantation and drive diffusion. Ano
Mode p +The anode electrode 3 is formed on the region 2 and
De p+Cathode n on the opposite side of region 2+Area 4 is formed
The cathode n+A cathode electrode 5 is formed on the region 4
ing. The cathode electrode 5 is fixed to the metal substrate 8 with solder 7.
It is attached to the anode electrode 3 and also serves as a pressure member, a conductor, and a radiator.
The metal-made contact terminal body 6 provided therein is in contact.
The anode p+Region 2 and cathode n+Sandwiched between area 4
Area is n-It becomes area 1.
【０００３】このダイオードがフリーホイールダイオー
ドとして、ＩＧＢＴと共に同一パッケージに複数個収納
され、逆導通型の平型ＩＧＢＴとなり、インバータ装置
などに適用される。このダイオードの動作はアノード電
極３に負電位、カソード電極５に正電位を印加した場合
は、ダイオードは逆阻止状態となり、また逆の電位を印
加した場合は、導通状態となる。A plurality of these diodes are accommodated in the same package as a free wheel diode together with an IGBT to form a reverse conduction type flat IGBT, which is applied to an inverter device or the like. The operation of the diode is such that when a negative potential is applied to the anode electrode 3 and a positive potential is applied to the cathode electrode 5, the diode is in a reverse blocking state, and when a reverse potential is applied, it is in a conducting state.
【０００４】インバータ装置に負荷短絡等の異常が発生
した場合は、ダイオードには数十ｍｓの短時間で定格電
流の１０倍程度の過電流が流れる可能性がある。しか
し、その場合でもダイオードが破壊しないことが要求さ
れる。ダイオードに限界値以上の過電流が流れると、損
失によりダイオードが発熱して、溶融破壊を発生させ
る。その結果整流性が失われる。When an abnormality such as a load short circuit occurs in the inverter device, an overcurrent of about 10 times the rated current may flow through the diode in a short time of several tens of ms. However, even in that case, it is required that the diode does not break. When an overcurrent exceeding the limit value flows in the diode, the diode heats up due to the loss, causing melting and destruction. As a result, the rectifying property is lost.
【０００５】[0005]
【発明が解決しようとする課題】しかし、前記の加圧接
触型の素子では、その限界値よりも小さい電流で逆阻止
耐圧が低下する現象がある。これは加圧の偏りにより局
部的に電流が集中し、コンタクト端子体と接触するアノ
ード電極３の表面に数十μｍの微小な溶融が起きて、こ
の溶融によりダイオードのｐｎ接合が局部的に破壊され
るためである。However, in the above-mentioned pressure contact type element, there is a phenomenon that the reverse blocking withstand voltage is lowered by a current smaller than the limit value. This is because the current is locally concentrated due to the biased pressurization, and a minute melting of several tens of μm occurs on the surface of the anode electrode 3 that contacts the contact terminal body, and this melting locally breaks the pn junction of the diode. Because it is done.
【０００６】この発明の目的は、前記の課題を解決し
て、高い過電流限界値（サージ電流耐量ともいう）を有
する半導体装置を提供することにある。An object of the present invention is to solve the above problems and provide a semiconductor device having a high overcurrent limit value (also referred to as surge current withstanding value).
【０００７】[0007]
【課題を解決するための手段】前記の目的を達成するた
めに、半導体チップの一方の第１主電極が導体に固着さ
れ、他方の第２主電極がコンタクト端子体と加圧接触さ
れる半導体装置において、第２主電極の厚さが１０μｍ
以上である構成とする。こうすることで、コンタクト端
子体と第２主電極との接触が偏加圧されても、厚い第２
主電極が座布団のように緩衝層として働き、偏加圧力を
吸収するため、溶融破壊を起こす過電流限界値を上げる
ことができる。To achieve the above object, a semiconductor chip in which one first main electrode of a semiconductor chip is fixed to a conductor and the other second main electrode is in pressure contact with a contact terminal body. In the device, the thickness of the second main electrode is 10 μm
The above configuration is adopted. By doing so, even if the contact between the contact terminal body and the second main electrode is biased, the thick second
Since the main electrode acts as a cushioning layer like a cushion and absorbs the biased pressure, it is possible to increase the overcurrent limit value that causes melt fracture.
【０００８】さらに、第２主電極の厚さが１０μｍ以上
で、第２主電極と接するコンタクト端子体の表面の粗さ
がＲa 値で０．３μｍ以上であるとよい。コンタクト端
子体の表面粗さが粗くなると、粗い突起部分で第２主電
極と確実に接触するようになり、第２主電極の局部溶融
が発生し難くなり、逆阻止耐圧の低下を確実に抑えるこ
とができる。 Further, the thickness of the second main electrode is 10 μm or more.
In, may roughness of the surface of the contact terminal bodies contacting the second main electrode is at least 0.3μm in Ra value. When the surface roughness of the contact terminal body becomes rough, the rough protrusions come into contact with the second main electrode reliably, and local melting of the second main electrode becomes difficult to occur, and the reverse blocking withstand voltage is reliably suppressed from decreasing. be able to.
【０００９】この半導体装置の動作時に、半導体チップ
とコンタクト端子体とが９８０Ｎ／ｃｍ2 以上で圧接さ
れると効果的である。コンタクト端子体と第２主電極と
の加圧力が大きくなると、接触抵抗が小さくなる。その
ため、加圧力は大きい程よいが、ある９８０Ｎ／ｃｍ2
以上で接触抵抗が飽和する。そのため、第２主電極とコ
ンタクト端子体との接触面において、９８０Ｎ／ｃｍ2
以上の加圧力で使用した場合、過電流限界値は飽和す
る。During operation of this semiconductor device, it is effective that the semiconductor chip and the contact terminal body are pressed against each other at a pressure of 980 N / cm 2 or more. When the pressure applied between the contact terminal body and the second main electrode increases, the contact resistance decreases. Therefore, the larger the pressing force, the better, but there is 980 N / cm 2
The contact resistance is saturated by the above. Therefore, at the contact surface between the second main electrode and the contact terminal body, 980 N / cm 2
When used with the above pressing force, the overcurrent limit value becomes saturated.
【００１０】[0010]
【発明の実施の形態】図１はこの発明の一実施例で、同
図（ａ）は要部断面図、同図（ｂ）はコンタクト端子体
のアノード電極と接触する面の模式的な拡大断面図あ
る。図１において、ｎ- 半導体基板１０にアノードｐ+
領域２が１×１０13ｃｍ-2のドーズ量のボロンイオンを
イオン注入し、１１５０℃で５時間のドライブ拡散して
形成されている。アノードｐ+ 領域２上に１０μｍ以上
（実用的には２０μｍ以下の範囲がよい）の厚みのアノ
ード電極３がＡｌ−Ｓｉのスパッタ蒸着膜（Ａｌ−Ｓｉ
膜のこと）で形成され、アノードｐ+ 領域２と反対側に
カソードｎ+ 領域４が形成され、カソードｎ+ 領域４上
にカソード電極５が形成され、半導体チップとなる。こ
の半導体チップのカソード電極５は金属製基板８にはん
だ７で固着され、アノード電極３上には加圧、導電、放
熱体を兼ね備えた金属製のコンタクト端子体６が接触さ
れてる。コンタクト端子体６のアノード電極３と接触す
る表面の粗さはＲa 値で０．３μｍ以上（実用的には１
μｍ以下の範囲がよい）とする。このダイオードが約３
００Ａ（約１００Ａ／ｃｍ2 ）のフリーホイールダイオ
ードとして、ＩＧＢＴと共に同一パッケージに複数個収
納され、逆導通型の平型ＩＧＢＴが完成する。この平型
ＩＧＢＴをインバータ装置などに組み込む場合は、加圧
力（コンタクト端子体と金属製基板とを圧接する力）を
９８０Ｎ／ｃｍ2 以上（実用的には１９６０Ｎ／ｃｍ2
以下の範囲がよい）とする。この加圧力は当然、コンタ
クト端子体６とアノード電極３との接触圧力となる。
尚、表面粗さのＲａ値は、ＪＩＳで規定されているのも
のを用いた。これは表面の断面曲線を用いて、その中心
線の平均粗さの値である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention, in which FIG. 1 (a) is a sectional view of an essential part, and FIG. FIG. In FIG. 1, an anode p + is formed on an n − semiconductor substrate 10.
Region 2 is formed by ion-implanting boron ions with a dose of 1 × 10 13 cm -2 and drive diffusion at 1150 ° C. for 5 hours. On the anode p + region 2, the anode electrode 3 having a thickness of 10 μm or more (practically 20 μm or less is preferable) is an Al-Si sputter-deposited film (Al-Si).
The cathode n + region 4 is formed on the side opposite to the anode p + region 2 and the cathode electrode 5 is formed on the cathode n + region 4 to form a semiconductor chip. The cathode electrode 5 of this semiconductor chip is fixed to a metal substrate 8 with a solder 7, and a metal contact terminal body 6 having a function of pressure, conductivity and heat dissipation is in contact with the anode electrode 3. The roughness of the surface of the contact terminal body 6 in contact with the anode electrode 3 has an Ra value of 0.3 μm or more (practically 1
A range of μm or less is preferable). This diode is about 3
As a free wheel diode of 00 A (about 100 A / cm 2 ), a plurality of IGBTs are housed in the same package together with the IGBT to complete a reverse conduction type flat IGBT. When this flat IGBT is incorporated in an inverter device or the like, a pressing force (force for pressing the contact terminal body and the metal substrate into pressure contact) is 980 N / cm 2 or more (practically 1960 N / cm 2
The following range is good). This pressing force naturally becomes the contact pressure between the contact terminal body 6 and the anode electrode 3.
The Ra value of the surface roughness used was specified by JIS. This is the value of the average roughness of the center line using the surface section curve.
【００１１】図２にアノード電極を形成するＡｌ−Ｓｉ
膜の厚みが６μｍと１０μｍの場合の過電流限界値の比
較を示す。過電流限界値（サージ電流耐量のこと）は、
素子温度１２５℃で、電流パルス幅２０ｍｓの正弦波の
ピーク値で測定した。ここで使用した素子のコンタクト
端子体の研磨の粗さはＲａ値で０．３μｍ、また加圧力
は１００ｋｇｆ／ｃｍ2 である。Ａｌ−Ｓｉ膜厚を６μ
ｍから１０μｍとすると、２８００Ａ溶融破壊素子（２
８００Ａで溶融破壊する素子）が５７．９％から１６．
９％に減少する。２８００Ａ以下耐圧劣化素子（２８０
０Ａ以下で微小なアノード電極の溶融により耐圧が低下
する素子）は３６．８％から３３．３％となり余り変化
がない。また２８００Ａ劣化なしの素子（溶融破壊せ
ず、耐圧低下もしない素子）が５．３％から５０％に増
大する。このように、Ａｌ−Ｓｉ膜厚を増大させると、
例え偏加圧があってもこのＡｌ−Ｓｉ膜が緩衝層として
働くため、コンタクト端子体との接触が良好となり、過
電流限界値を増大させることができる。尚、Ａｌ−Ｓｉ
膜厚が厚過ぎると微細パターンニングができなくなるた
め、２０μｍ以下がよい。また図中のコンタクト端子は
コンタクト端子体のことである。Al-Si forming the anode electrode in FIG.
A comparison of overcurrent limit values when the film thickness is 6 μm and 10 μm is shown. The overcurrent limit value (surge current withstand) is
It was measured at a device temperature of 125 ° C. and a peak value of a sine wave having a current pulse width of 20 ms. The roughness of polishing of the contact terminal body of the element used here was 0.3 μm in Ra value, and the pressing force was 100 kgf / cm 2 . Al-Si film thickness 6μ
m to 10 μm, the 2800 A melting breakdown element (2
Element that melts and fractures at 800 A) is 57.9% to 16.
Reduced to 9%. 2800 A or less Withstand voltage deterioration element (280
The element whose breakdown voltage decreases due to the minute melting of the anode electrode at 0 A or less) is 36.8% to 33.3%, and there is not much change. In addition, the number of elements without deterioration of 2800A (elements that do not melt and break, nor decrease in breakdown voltage) increases from 5.3% to 50%. Thus, if the Al-Si film thickness is increased,
Even if partial pressure is applied, the Al-Si film functions as a buffer layer, so that the contact with the contact terminal body is improved and the overcurrent limit value can be increased. In addition, Al-Si
If the film thickness is too thick, fine patterning cannot be performed, so 20 μm or less is preferable. The contact terminal in the figure is a contact terminal body.
【００１２】図３にコンタクト端子体の粗さによる過電
流限界値の比較を示す。細かく研磨したＲａ値で０．０
５μｍのコンタクト端子体では、全ての素子が２８００
Ａ以下耐圧劣化素子であったものが、粗めに研磨したＲ
ａで０．３μｍのコンタクト端子体では、２８００Ａ以
下耐圧劣化素子の割合は３３．３％と激減している。表
面粗さが粗いと突起部が大きくなり、アノード電極との
接触が確実におこなわれるために、過電流通電による耐
圧低下を大幅に抑制できる。ここではデータでは示して
いないがコンタクト端子体の表面の粗さが粗過ぎるとア
ノード電極を突起が突き破りシリコンチップを損傷する
のでＲａ値で１μｍ以下がよい。尚、素子のアノード電
極を形成するＡｌ−Ｓｉ膜の厚みは１０μｍで加圧力は
９８０Ｎ／ｃｍ2 である。FIG. 3 shows a comparison of overcurrent limit values depending on the roughness of the contact terminal body. Ra value finely polished is 0.0
With a contact terminal body of 5 μm, all elements are 2800
Roughly abraded R
In the contact terminal body of 0.3 μm in “a”, the ratio of the breakdown voltage deteriorating elements of 2800 A or less is significantly reduced to 33.3%. If the surface roughness is rough, the protrusions will be large and the anode electrode will be surely contacted, so that the breakdown voltage reduction due to overcurrent energization can be significantly suppressed. Although not shown in the data here, if the roughness of the surface of the contact terminal body is too rough, the protrusion penetrates the anode electrode and damages the silicon chip, so the Ra value is preferably 1 μm or less. The thickness of the Al—Si film forming the anode electrode of the device is 10 μm and the applied pressure is 980 N / cm 2 .
【００１３】図４に過電流限界値の加圧力依存性を示
す。ここで加圧力とは、コンタクト端子体とアノード電
極との接触部での単位面積あたりの加圧力をいう。ここ
でのデータは複数個の素子で試験した中で最小値を示し
た。加圧力を増加し、９８０ｋｇｆ／ｃｍ2 以上で過電
流限界値は飽和する。これは接触抵抗が飽和するためで
ある。このように、加圧接触型の半導体装置では９８０
Ｎ／ｃｍ2 以上で使用することが望ましい。但し、加圧
し過ぎるとシリコンチップが割れるなどの不都合がでる
ので１９６０Ｎ／ｃｍ2 以下で使用するのがよい。尚、
素子のアノード電極を形成するＡｌ−Ｓｉ膜の厚みは１
０μｍでコンタクト端子体の表面粗さはＲａ値で０．３
μｍである。尚、図中のコンタクト端子はコンタクト端
子体のことである。FIG. 4 shows the pressure dependence of the overcurrent limit value. Here, the pressing force refers to the pressing force per unit area at the contact portion between the contact terminal body and the anode electrode. The data here shows the minimum value among the tests on a plurality of devices. The overcurrent limit value becomes saturated at 980 kgf / cm 2 or more when the applied pressure is increased. This is because the contact resistance is saturated. As described above, the pressure contact type semiconductor device is 980
It is desirable to use N / cm 2 or more. However, if too much pressure is applied, the silicon chip may be cracked, so it is preferable to use at 1960 N / cm 2 or less. still,
The thickness of the Al-Si film forming the anode electrode of the device is 1
The surface roughness of the contact terminal body is 0 μm and the Ra value is 0.3.
μm. The contact terminals in the figure are contact terminal bodies.
【００１４】[0014]
【発明の効果】この発明のように、アノード電極を２０
μｍ以上、コンタクト端子体の表面粗さをＲａ値で０．
３以上、加圧力を９８０Ｎ／ｃｍ2 以上とすることで、
オン電圧や逆回復特性など諸特性を損じることなく過電
流限界値を大幅に向上することができる。As in the present invention, 20 anode electrodes are provided.
.mu.m or more, the surface roughness of the contact terminal body is Ra value of 0.
By setting the applied pressure to 3 or more and the applied pressure to 980 N / cm 2 or more,
It is possible to significantly improve the overcurrent limit value without impairing various characteristics such as on-voltage and reverse recovery characteristics.
【図１】この発明の一実施例で、（ａ）は要部断面図、
（ｂ）はコンタクト端子体のアノード電極と接触する面
の模式的な拡大断面図1 is an embodiment of the present invention, (a) is a cross-sectional view of a main part,
(B) is a schematic enlarged cross-sectional view of the surface of the contact terminal body that contacts the anode electrode.
【図２】アノード電極の厚みが６μｍと１０μｍの場合
の過電流限界値を比較した図FIG. 2 is a diagram comparing overcurrent limit values when the thickness of the anode electrode is 6 μm and 10 μm.
【図３】コンタクト端子体の粗さによる過電流限界値の
比較を示す図FIG. 3 is a diagram showing comparison of overcurrent limit values due to roughness of contact terminal bodies.
【図４】過電流限界値の加圧力依存性を示す図FIG. 4 is a diagram showing a pressing force dependency of an overcurrent limit value.
【図５】プレーナ型ダイオードの要部断面図FIG. 5 is a sectional view of a main part of a planar diode.
１ ｎ- 領域 ２ アノードｐ+ 領域 ３ アノード電極 ４ カソードｎ+ 領域 ５ カソード電極 ６ コンタクト端子体 ７ はんだ ８ 金属製基板 １０ ｎ- 半導体基板1 n - region 2 anode p + region 3 anode electrode 4 cathode n + region 5 cathode electrode 6 contact terminal body 7 solder 8 metal substrate 10 n - semiconductor substrate
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 29/78 H01L 21/52 H01L 29/417 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 29/78 H01L 21/52 H01L 29/417
Claims (3)
固着され、他方の第２主電極がコンタクト端子体と加圧
接触される半導体装置において、第２主電極の厚さが１
０μｍ以上であることを特徴とする半導体装置。1. In a semiconductor device in which one first main electrode of a semiconductor chip is fixed to a conductor and the other second main electrode is in pressure contact with a contact terminal body, the thickness of the second main electrode is 1.
A semiconductor device having a thickness of 0 μm or more.
面の粗さがＲa 値で０．３μｍ以上であることを特徴と
する請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein the surface roughness of the contact terminal body in contact with the second main electrode is 0.3 μm or more in Ra value.
ンタクト端子体とが９８０Ｎ／ｃｍ2 以上で圧接される
ことを特徴とする請求項１記載の半導体装置。3. The semiconductor device according to claim 1, wherein the semiconductor chip and the contact terminal body are pressed against each other at a pressure of 980 N / cm 2 or more during operation of the semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12919897A JP3525147B2 (en) | 1997-05-20 | 1997-05-20 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12919897A JP3525147B2 (en) | 1997-05-20 | 1997-05-20 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10321845A JPH10321845A (en) | 1998-12-04 |
| JP3525147B2 true JP3525147B2 (en) | 2004-05-10 |
Family
ID=15003574
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12919897A Expired - Lifetime JP3525147B2 (en) | 1997-05-20 | 1997-05-20 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3525147B2 (en) |
-
1997
- 1997-05-20 JP JP12919897A patent/JP3525147B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10321845A (en) | 1998-12-04 |
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