JP3523094B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP3523094B2
JP3523094B2 JP34189498A JP34189498A JP3523094B2 JP 3523094 B2 JP3523094 B2 JP 3523094B2 JP 34189498 A JP34189498 A JP 34189498A JP 34189498 A JP34189498 A JP 34189498A JP 3523094 B2 JP3523094 B2 JP 3523094B2
Authority
JP
Japan
Prior art keywords
substrate
heat sink
heat
electrode plates
conductive circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP34189498A
Other languages
Japanese (ja)
Other versions
JP2000174196A (en
Inventor
貴彦 濱田
仁志 佐々木
克彦 岩澤
武司 上田
能成 塚田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honda Motor Co Ltd
Original Assignee
Honda Motor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honda Motor Co Ltd filed Critical Honda Motor Co Ltd
Priority to JP34189498A priority Critical patent/JP3523094B2/en
Publication of JP2000174196A publication Critical patent/JP2000174196A/en
Application granted granted Critical
Publication of JP3523094B2 publication Critical patent/JP3523094B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、半導体チップが搭
載される基板がヒートシンク上に載せられる半導体装置
に関する。 【0002】 【従来の技術】窒化アルミニウム製の基板上に半導体チ
ップが搭載される構造は、たとえば特開平1−2208
53号公報等により既に知られているが、このような基
板をヒートシンク上に載せるにあたって従来では、ヒー
トシンク上に設けられる銅ベース上に、基板が半田接合
されている。 【0003】 【発明が解決しようとする課題】ところで、前記銅ベー
ス上への基板の接合にあたっては、基板の裏面にも銅ベ
ースとの接合のための銅板がメタライズ接合されてお
り、ヒートシンク上への基板の搭載が多段構造でなされ
ている。ところが、上記従来のような多段構造では各段
界面での熱抵抗が比較的大きくなり、放熱に時間がかか
ってしまう。特に半導体チップが電力制御用のものであ
る場合には半導体チップでの発熱が大きいので充分な放
熱性を確保する必要があるが、放熱性が不充分となる可
能性がある。しかも上記多段構造に起因して半導体装置
の組付作業工数が多くなってしまう。また基板の裏面の
銅板と、銅ベースとは比較的大きな面積にわたる半田接
合により接合されることになり、そのような大面積の半
田接合では品質を安定、向上させるのに熟練した技術が
必要となる。 【0004】本発明は、かかる事情に鑑みてなされたも
のであり、熟練した技術を不要として組付作業工数を低
減した上で、効果的な放熱を可能とした半導体装置を提
供することを目的とする。 【0005】 【課題を解決するための手段】上記目的を達成するため
に、本発明は、銅板による導電回路が表面に形成される
窒化アルミニウム製の基板と、前記導電回路に電気的に
接続されて前記基板上に固定される半導体チップと、前
記基板が搭載されるヒートシンクとを備える半導体装置
において、前記基板の裏面が伝熱グリースを介してヒー
トシンクに当接され、前記基板の表面の導電回路に接触
する電極板が前記ヒートシンクに固定され、前記電極板
およびヒートシンクに対して制限された範囲で前記基板
が相対摺動することを可能として、前記基板および前記
伝熱グリースが電極板およびヒートシンク間に挟持され
ことを特徴とする。 【0006】このような発明の構成によれば、基板の裏
面が伝熱グリースを介してヒートシンクに当接されるの
で、基板およびヒートシンク間に銅板、半田層および銅
ベースが介在していた従来のものと比べて、基板および
ヒートシンク間の熱抵抗が小さくなり、半導体チップが
電力制御用のものであったとしても十分な放熱性を得る
ことができる。しかも広い面積にわたる半田接合が不要
であるので、熟練した技術は不要であり、銅ベースのヒ
ートシンクへの取付け、ならびに銅ベースへの基板の接
合が不要となるので組付作業工数も低減されることにな
る。また基板の導電回路に電極板を接触させた状態で、
電極板およびヒートシンク間に挟まれた基板が制限され
た範囲で移動し得るので、電極板、基板およびヒートシ
ンクの熱膨張率の差に伴なう機械的ストレスや、振動に
よる機械的ストレスを吸収しつつ、導電回路への電極板
の電気的な接続を確実に維持することができる。さらに
電極板および導電回路の相互接触部は、電極板および基
板の相対摺動に伴うセルフクリーニング作用により清浄
化されることになり、電極板の導電回路への導通状態を
良好に維持しつつ良好な熱伝導を得ることができる。 【0007】 【0008】 【0009】 【発明の実施の形態】以下、本発明の実施の形態を、添
付図面に示した本発明の一実施例に基づいて説明する。 【0010】図1〜図3は本発明の一実施例を示すもの
であり、図1は半導体装置の縦断面図であって図3の1
−1線断面図、図2は半導体装置の分解斜視図、図3は
図1の3矢視平面図である。 【0011】先ず図1において、この半導体装置は、三
相のモータ用のパワーモジュールとして構成されるもの
であり、前記モータにおけるU,V,Wの各相に個別に
対応した窒化アルミニウム製の3つの基板5…と、各基
板5…上にたとえば6個ずつ固定される半導体チップ6
…と、各基板5…が共通に搭載されるアルミニウム合金
製のヒートシンク7とを備える。 【0012】図2および図3を併せて参照して、窒化ア
ルミニウムによって2〜5mmの厚みを有して長方形状
に形成される基板5の表面には、銅板のメタライズ接合
によりパターン化された導電回路8が形成されており、
該導電回路8の所定位置に各半導体チップ6…が高融点
の半田により接合される。しかも各半導体チップ6…お
よび導電回路8の電気的接続を果すべく、アルミワイヤ
等の導電線9…の両端が各半導体チップ6…および導電
回路8にボンディング接合される。 【0013】各基板5…の裏面は、伝熱グリース10…
を介してヒートシンク7の上面に当接される。ヒートシ
ンク7の上面には、各基板5…の幅よりもわずかに大き
な間隔をあけた4つの規制ピン11…が1列に並んで植
設されており、各基板5…は、各規制ピン11…相互間
で、伝熱グリース10…を介してヒートシンク7の上面
に当接するように配置される。 【0014】ヒートシンク7上には、開口部13を有し
て合成樹脂等の絶縁材料から成る枠体12が締結される
ものであり、前記開口部13は、一列に配列された4つ
の前記規制ピン11…を長手方向両端に配置するように
して長方形状に形成されており、各規制ピン11…の配
列方向と直交する方向の開口部13の長さは、各基板5
…の長手方向長さよりもわずかに長く形成される。すな
わち各基板5…は、各規制ピン11…と、開口部13と
で制限される範囲でヒートシンク7に対して摺動するこ
とを可能として枠体12内に配置される。 【0015】3つの基板5…のうち両側の基板5…の導
電回路8…において電源のプラス側に接続される部分
と、真ん中の基板5の導電回路8において電源のプラス
側に接続される部分とには、隣接する基板5,5間にわ
たる長方形状の電極板14,14が当接され、両側の基
板5…の導電回路8…において電源のプラス側に接続さ
れる部分に一端が当接される長方形状の電極板15,1
5の他端は両側の基板5,5から側方に突設される。ま
た3つの基板5…のうち両側の基板5…の導電回路8…
において電源のマイナス側に接続される部分と、真ん中
の基板5の導電回路8において電源のマイナス側に接続
される部分とには、隣接する基板5,5間にわたって前
記電極板14,14と平行に配置される長方形状の電極
板16,16が当接され、両側の基板5…の導電回路8
…において電源のマイナス側に接続される部分に一端が
当接されて前記電極板15,15と平行に配置される長
方形状の電極板17,17の他端は両側の基板5,5か
ら側方に突設される。さらに各基板5…の導電回路8…
の出力部分に一端を個別に当接せしめる3つの電極板1
8…の他端が、各基板5…の長手方向一端から外方に突
出される。しかも各基板5…からの電極板15…,17
…,18…の突出端部には、ピン状の端子を嵌合、接続
するための円筒状の接続部15a…,17a…,18a
…が設けられる。 【0016】上記各電極板14…,15…,16…,1
7…,18…は、絶縁紙等の絶縁材料で長方形状に形成
される絶縁シート19の裏面に接着されており、電極板
15…,17…,18…の他端は、該絶縁シート19か
ら外方に突出される。 【0017】一方、枠体12には、各規制ピン11…の
配列方向に沿う方向での開口部13の両端に連なる段部
20,20が、電極板15…,17…の一部を載せると
ともにそれらの電極板15…,17…の絶縁シート19
からの突出部を嵌合せしめる形状で形成されるととも
に、各規制ピン11…の配列方向に直交する方向での開
口部13の一側に連なる3つの段部21…が、電極板1
8…の絶縁シート19からの突出部を嵌合、載置せしめ
る形状で形成される。 【0018】絶縁シート19には、各基板5…の大部分
を臨ませる3つの窓22…が設けられており、各窓22
…を相互間に挟むようにして4つの金属製押さえ板23
…が絶縁シート19の表面に接着される。これらの押さ
え板23…には、各規制ピン11…を相互間に挟む位置
に一対ずつの挿通孔24,25…が設けられており、一
方の挿通孔24…に挿通されて絶縁シート19を貫通す
るボルト26…が、電極板15,17間および電極板1
4,16間でヒートシンク7に螺合され、また他方の挿
通孔25…に挿通されて絶縁シート19を貫通するボル
ト27…が、前記規制ピン11…を前記ボルト26…と
の間に挟む位置でヒートシンク7に螺合される。 【0019】また絶縁シート19の裏面には、図3にお
いて各ボルト27…の左側に配置される金属製のスペー
サ28…が接着されており、各スペーサ28…の厚み
は、各電極板14…,15…,16…,17…,18…
と同一に設定される。而して図3において最も右側のボ
ルト28を除く3つのボルト28…は、電極板18…お
よびスペーサ28…間に配置されることになり、図3に
おいて最も左側のスペーサ28は枠体12の段部20に
当接するが、他のスペーサ28…は、各基板5…の表面
の導電回路8…に、電気的な接続機能を果すことのない
ようにして当接される。 【0020】このようにして各基板5…の表面の導電回
路8…に接触する電極板14…,15…,16…,17
…,18…がヒートシンク7に固定されることになり、
各電極板14…,15…,16…,17…,18…およ
びヒートシンク7間に各基板5…が挟持され、各基板5
…は、各規制ピン11…および枠体12の開口部13に
よって制限される範囲で各電極板14…,15…,16
…,17…,18…およびヒートシンク7に対して相対
摺動することが可能となる。 【0021】次にこの実施例の作用について説明する
と、銅板による導電回路8…が表面に形成される窒化ア
ルミニウム製の基板5…の裏面が、伝熱グリース10…
を介してヒートシンク7に当接されるので、基板および
ヒートシンク間に銅板、半田層および銅ベースが介在し
ていた従来のものと比べると、基板5…およびヒートシ
ンク7間の熱抵抗が小さくなる。したがって基板5…上
に搭載される半導体チップ6…が、本実施例のように電
力制御用のものであったとしても、基板5…からヒート
シンク7への充分な放熱性を得ることができる。しかも
基板5…の裏面の銅板と、銅ベースとを比較的大きな面
積にわたる半田接合により接合するものに比べると、広
い面積にわたる半田接合が不要であるので、熟練した技
術は不要であり、組付作業工数も低減されることにな
る。 【0022】ところで、ヒートシンク上に設けられる銅
ベース上に窒化アルミニウム製の基板が半田接合されて
いた従来のものでは、基板の厚みが0.2〜0.3mm
程度であったのに対し、基板5…の厚みは2〜5mmに
設定されるものであり、このように基板5…を厚板化す
ることにより基板5…の熱容量を高めることができる。
これにより、ヒートマスの機能を果たしていた銅ベース
を廃止して、伝熱グリース10…を介して基板5…をヒ
ートシンク7上に取付けても、半導体チップ6…で発生
した熱を、銅ベースを用いた従来のものと同等に放散す
ることができるのである。 【0023】また基板5…の表面の導電回路8…に接触
する電極板14…,15…,16…,17…,18…が
ヒートシンク7に固定され、電極板14…,15…,1
6…,17…,18…およびヒートシンク7に対して制
限された範囲で基板5…が相対摺動することを可能とし
て、基板5…が電極板14…,15…,16…,17
…,18…およびヒートシンク7間に挟持されるので、
電極板14…,15…,16…,17…,18…、基板
5…およびヒートシンク7の熱膨張率の差に伴なう機械
的ストレスや、振動による機械的ストレスを吸収しつ
つ、導電回路8…への電極板14…,15…,16…,
17…,18…の電気的な接続を確実に維持することが
できる。 【0024】しかも電極板14…,15…,16…,1
7…,18…および導電回路8…の相互接触部は、電極
板14…,15…,16…,17…,18…および基板
5…の相対摺動に伴うセルフクリーニング作用により清
浄化されるので、電極板14…,15…,16…,17
…,18…の導電回路8…への導通状態を良好に維持し
つつ良好な熱伝導を得ることができる。 【0025】以上、本発明の実施例を詳述したが、本発
明は上記実施例に限定されるものではなく、特許請求の
範囲に記載された本発明を逸脱することなく種々の設計
変更を行なうことが可能である。 【0026】 【発明の効果】以上のように発明によれば、基板およ
びヒートシンク間の熱抵抗を小さくして充分な放熱性を
得ることができ、熟練した技術を不要として組付作業工
数を低減することができる。 【0027】また電極板、基板およびヒートシンクの熱
膨張率の差に伴なう機械的ストレスや、振動による機械
的ストレスを吸収して、導電回路への電極板の電気的な
接続を確実に維持することができ、さらに電極板および
導電回路の相互接触部は、電極板および基板の相対摺動
に伴うセルフクリーニング作用により清浄化されること
になり、電極板の導電回路への導通状態を良好に維持し
つつ良好な熱伝導を得ることができる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a substrate on which a semiconductor chip is mounted is mounted on a heat sink. 2. Description of the Related Art A structure in which a semiconductor chip is mounted on a substrate made of aluminum nitride is disclosed, for example, in Japanese Patent Laid-Open No. 1-2208.
As already known from JP-A-53-53, etc., in mounting such a substrate on a heat sink, conventionally, the substrate is soldered on a copper base provided on the heat sink. [0003] By the way, when bonding the substrate to the copper base, a copper plate for bonding to the copper base is also metallized on the back surface of the substrate, and the copper plate is mounted on the heat sink. Is mounted in a multi-stage structure. However, in the above-described conventional multi-stage structure, the thermal resistance at the interface of each stage becomes relatively large, and it takes time to radiate heat. In particular, when the semiconductor chip is for power control, it is necessary to ensure sufficient heat dissipation because the semiconductor chip generates a large amount of heat, but the heat dissipation may be insufficient. In addition, the number of steps for assembling the semiconductor device increases due to the multi-stage structure. In addition, the copper plate on the back side of the board and the copper base will be joined by soldering over a relatively large area, and such large area soldering requires skilled technology to stabilize and improve quality. Become. The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device capable of effectively dissipating heat while reducing the number of assembly work steps by eliminating the need for skilled techniques. And [0005] In order to achieve the above object, the present invention provides an aluminum nitride substrate on which a conductive circuit made of a copper plate is formed on a surface, and an electric circuit connected to the conductive circuit. A semiconductor chip fixed on the substrate by heat and a heat sink on which the substrate is mounted, wherein the back surface of the substrate is in contact with the heat sink via heat transfer grease, and the conductive circuit on the front surface of the substrate is provided. Contact
Electrode plate is fixed to the heat sink, and the electrode plate
And the substrate to a limited extent with respect to the heat sink
Can slide relative to each other, and the substrate and the
Heat transfer grease is sandwiched between electrode plate and heat sink
Characterized in that that. [0006] According to the inventions of the structure, since the back surface of the substrate is brought into contact with the heat sink via a heat transfer grease, copper between the substrates and the heat sink, a conventional solder layer, and the copper base was interposed Thermal resistance between the substrate and the heat sink is smaller than that of the semiconductor chip, and sufficient heat radiation can be obtained even if the semiconductor chip is for power control. In addition, since skillful technology is not required because soldering over a large area is not required, there is no need to attach a copper base to a heat sink or join a board to a copper base, which reduces assembly man-hours. become. Also, with the electrode plate in contact with the conductive circuit of the board,
The substrate sandwiched between the electrode plate and the heat sink is limited.
Electrode plate, substrate and heat shield
Mechanical stress and vibration caused by the difference in the coefficient of thermal expansion.
Electrode plate for conductive circuit while absorbing mechanical stress
Electrical connection can be reliably maintained. further
The contact between the electrode plate and the conductive circuit is
Cleans by self-cleaning action caused by relative sliding of plates
The conduction state of the electrode plate to the conductive circuit
Good heat conduction can be obtained while maintaining good. An embodiment of the present invention will be described below based on an embodiment of the present invention shown in the accompanying drawings. FIGS. 1 to 3 show one embodiment of the present invention. FIG. 1 is a longitudinal sectional view of a semiconductor device, and FIG.
2 is an exploded perspective view of the semiconductor device, and FIG. 3 is a plan view of FIG. First, in FIG. 1, this semiconductor device is constructed as a power module for a three-phase motor, and is made of aluminum nitride which corresponds to each of U, V and W phases in the motor. And five semiconductor chips 6 fixed on each of the substrates 5.
, And a heat sink 7 made of an aluminum alloy on which the substrates 5 are mounted in common. Referring to FIGS. 2 and 3, the surface of substrate 5 formed in a rectangular shape having a thickness of 2 to 5 mm by aluminum nitride is provided with a conductive pattern patterned by metallization bonding of a copper plate. A circuit 8 is formed,
Each semiconductor chip 6 is joined to a predetermined position of the conductive circuit 8 by solder having a high melting point. In addition, both ends of conductive wires 9 such as aluminum wires are bonded to the respective semiconductor chips 6 and the conductive circuits 8 in order to achieve electrical connection between the semiconductor chips 6 and the conductive circuits 8. The back surface of each substrate 5 is provided with a heat transfer grease 10.
And is brought into contact with the upper surface of the heat sink 7. On the upper surface of the heat sink 7, four regulating pins 11... Spaced slightly larger than the width of each board 5 are implanted in a line, and each board 5. .. Are arranged so as to abut each other on the upper surface of the heat sink 7 via the heat transfer grease 10. On the heat sink 7, a frame 12 made of an insulating material such as a synthetic resin is fastened with an opening 13, and the opening 13 is provided with the four regulating members arranged in a line. The pins 11 are formed in a rectangular shape so as to be arranged at both ends in the longitudinal direction, and the length of the opening 13 in the direction orthogonal to the arrangement direction of the control pins 11 is
Are formed slightly longer than the length in the longitudinal direction. That is, each of the substrates 5 is arranged in the frame 12 so as to be able to slide with respect to the heat sink 7 within a range limited by each of the restriction pins 11 and the opening 13. A portion connected to the positive side of the power supply in the conductive circuits 8 of the substrates 5 on both sides of the three substrates 5. A portion connected to the positive side of the power supply in the conductive circuit 8 of the middle substrate 5. , The rectangular electrode plates 14, 14 extending between the adjacent substrates 5, 5 are in contact with each other, and one end thereof is in contact with a portion of the conductive circuits 8 of both substrates 5, connected to the positive side of the power supply. Rectangular electrode plates 15 and 1
The other end of 5 protrudes laterally from both substrates 5,5. The conductive circuits 8 of the substrates 5 on both sides of the three substrates 5.
The portion connected to the negative side of the power supply and the portion connected to the negative side of the power supply in the conductive circuit 8 of the middle substrate 5 are parallel to the electrode plates 14 and 14 between the adjacent substrates 5 and 5. Are brought into contact with each other, and the conductive circuits 8 of the substrates 5 on both sides are contacted.
, One end of which is in contact with the portion connected to the negative side of the power source, and the other ends of the rectangular electrode plates 17, 17 arranged in parallel with the electrode plates 15, 15 are on the opposite sides from the substrates 5, 5. It is protruded toward. Further, the conductive circuits 8 of each substrate 5.
Electrode plates 1 whose one end is individually brought into contact with the output part of
8 protrude outward from one longitudinal end of each substrate 5. Moreover, the electrode plates 15 ..., 17 from each substrate 5 ...
, 18 ... cylindrical connecting portions 15a ..., 17a ..., 18a for fitting and connecting pin-shaped terminals.
... is provided. Each of the above electrode plates 14,..., 15,.
, 18 ... are adhered to the back surface of an insulating sheet 19 formed in a rectangular shape with an insulating material such as insulating paper, and the other ends of the electrode plates 15 ..., 17 ..., 18 ... Projected outward from the On the other hand, on the frame 12, step portions 20, 20 connected to both ends of the opening portion 13 in a direction along the arrangement direction of the respective restriction pins 11, put a part of the electrode plates 15,. And the insulating sheet 19 of the electrode plates 15.
The electrode plate 1 is formed in such a shape as to fit the protruding portion from the electrode plate 1 and is connected to one side of the opening 13 in a direction orthogonal to the arrangement direction of the respective regulating pins 11.
8 are formed in such a shape that the protruding portions from the insulating sheet 19 are fitted and placed. The insulating sheet 19 is provided with three windows 22 through which most of the substrates 5 are exposed.
Are sandwiched between the four metal holding plates 23.
Are adhered to the surface of the insulating sheet 19. Each of the holding plates 23 is provided with a pair of insertion holes 24, 25 at positions sandwiching the respective regulation pins 11 therebetween, and is inserted through one of the insertion holes 24 so that the insulating sheet 19 is inserted. The bolts 26 penetrating between the electrode plates 15 and 17 and the electrode plate 1
The bolts 27 which are screwed to the heat sink 7 between the holes 4 and 16 and which are inserted through the other insertion holes 25 and penetrate the insulating sheet 19 sandwich the regulating pins 11 with the bolts 26. Is screwed into the heat sink 7. On the back surface of the insulating sheet 19, metal spacers 28 arranged on the left side of the bolts 27 in FIG. 3 are adhered. , 15 ..., 16 ..., 17 ..., 18 ...
Is set the same as The three bolts 28 except for the rightmost bolt 28 in FIG. 3 are arranged between the electrode plate 18 and the spacers 28, and the leftmost spacer 28 in FIG. The other spacers 28 are in contact with the steps 20, but are in contact with the conductive circuits 8 on the surface of each substrate 5 so as not to perform an electrical connection function. In this manner, the electrode plates 14, 15, 16, 17 contacting the conductive circuits 8 on the surface of each substrate 5.
, 18 ... are fixed to the heat sink 7.
Each substrate 5 is sandwiched between the electrode plates 14, 15, 16, 17, 17, 18, and the heat sink 7.
, Are electrode plates 14,..., 15,..., 16 in a range limited by each regulating pin 11 and opening 13 of frame 12.
, 17 ..., 18 ... and the heat sink 7 can be slid relative to each other. Next, the operation of this embodiment will be described. The back surface of a substrate 5 made of aluminum nitride on which a conductive circuit 8 made of a copper plate is formed on the front surface is connected to a heat transfer grease 10.
, And the heat resistance between the substrate 5 and the heat sink 7 is smaller than that of the conventional one in which a copper plate, a solder layer and a copper base are interposed between the substrate and the heat sink. Therefore, even if the semiconductor chips 6 mounted on the substrates 5 are for power control as in this embodiment, sufficient heat radiation from the substrates 5 to the heat sink 7 can be obtained. Moreover, compared to a method in which the copper plate on the back surface of the substrate 5 and the copper base are joined by soldering over a relatively large area, soldering over a large area is unnecessary, so that a skilled technique is not required, and Work man-hours will also be reduced. By the way, in a conventional device in which a substrate made of aluminum nitride is soldered on a copper base provided on a heat sink, the thickness of the substrate is 0.2 to 0.3 mm.
However, the thickness of the substrates 5 is set to 2 to 5 mm, and the heat capacity of the substrates 5 can be increased by increasing the thickness of the substrates 5 in this manner.
As a result, even if the copper base serving as the heat mass is eliminated and the substrate 5 is mounted on the heat sink 7 via the heat transfer grease 10, the heat generated in the semiconductor chips 6 can be used by the copper base. It can be dissipated as well as the conventional one. The electrode plates 14, 15, 16, 17, 18, 18 in contact with the conductive circuits 8 on the surface of the substrate 5 are fixed to the heat sink 7, and the electrode plates 14, 15, 1,
6, 17, 18, and the heat sink 7, the substrate 5 can slide relative to each other within a limited range, and the substrate 5 can be slid to the electrode plates 14, 15, 16, 17,.
..., 18 ... and the heat sink 7,
The conductive circuit absorbs the mechanical stress caused by the difference in the coefficient of thermal expansion between the electrode plates 14, 15, 16, 17, 17, 18, the substrate 5, and the heat sink 7 and the mechanical stress due to vibration. 8 to the electrode plates 14 ..., 15 ..., 16 ...,
.., 18... Can be reliably maintained. Moreover, the electrode plates 14, 15, 16, 1
, 18 and the conductive circuit 8 are cleaned by a self-cleaning action accompanying the relative sliding of the electrode plates 14, 15, 16, 17, 17, 18 and the substrate 5. Therefore, the electrode plates 14, 15, 16, 17
, 18 ... can be obtained with good heat conduction while maintaining good conduction to the conductive circuit 8. Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above embodiments, and various design changes can be made without departing from the present invention described in the appended claims. It is possible to do. As described above, according to the present invention, sufficient heat radiation can be obtained by reducing the thermal resistance between the substrate and the heat sink, and the number of assembling work steps is reduced by eliminating the need for skilled techniques. Can be reduced. [0027] or other conductive plate, accompanied or mechanical stress to the difference in the thermal expansion coefficient of the substrate and the heat sink, by absorbing mechanical stresses due to vibrations, reliable electrical connection of the electrode plate to the conductive circuit The electrode plate and
Mutual contact of conductive circuit is relative sliding of electrode plate and substrate
To be cleaned by the self-cleaning action accompanying
And maintain good conduction of the electrode plate to the conductive circuit.
And good heat conduction can be obtained.

【図面の簡単な説明】 【図1】半導体装置の縦断面図であって図3の1−1線
断面図である。 【図2】半導体装置の分解斜視図である。 【図3】図1の3矢視平面図である。 【符号の説明】 5・・・基板 6・・・半導体チップ 7・・・ヒートシンク 8・・・導電回路 10・・・伝熱グリース 14,15,16,17,18・・・電極板
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a longitudinal sectional view of a semiconductor device, and is a sectional view taken along line 1-1 of FIG. FIG. 2 is an exploded perspective view of the semiconductor device. FIG. 3 is a plan view as viewed in the direction of arrow 3 in FIG. 1; [Description of Signs] 5 ... Substrate 6 ... Semiconductor chip 7 ... Heat sink 8 ... Conductive circuit 10 ... Heat transfer grease 14, 15, 16, 17, 18 ... Electrode plate

───────────────────────────────────────────────────── フロントページの続き (72)発明者 上田 武司 埼玉県狭山市新狭山1丁目10番地1 ホ ンダエンジニアリング株式会社内 (72)発明者 塚田 能成 埼玉県狭山市新狭山1丁目10番地1 ホ ンダエンジニアリング株式会社内 (56)参考文献 特開 平8−236667(JP,A) 特開 平11−274398(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 25/00 - 25/18 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takeshi Ueda 1-10-1 Shinsayama, Sayama City, Saitama Prefecture Honda Engineering Co., Ltd. (72) Inventor Yoshinari Tsukada 1-10-1 Shinsayama, Sayama City, Saitama Prefecture (56) References JP-A-8-236667 (JP, A) JP-A-11-274398 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 25 / 00-25/18

Claims (1)

(57)【特許請求の範囲】 【請求項1】 銅板による導電回路(8)が表面に形成
される窒化アルミニウム製の基板(5)と、前記導電回
路(8)に電気的に接続されて前記基板(5)上に固定
される半導体チップ(6)と、前記基板(5)が搭載さ
れるヒートシンク(7)とを備える半導体装置におい
て、前記基板(5)の裏面が伝熱グリース(10)を介
してヒートシンク(7)に当接され、前記基板(5)の
表面の導電回路(8)に接触する電極板(14,15,
16,17,18)が前記ヒートシンク(7)に固定さ
れ、前記電極板(14〜18)およびヒートシンク
(7)に対して制限された範囲で前記基板(5)が相対
摺動することを可能として、前記基板(5)および前記
伝熱グリース(10)が電極板(14〜18)およびヒ
ートシンク(7)間に挟持されることを特徴とする半導
体装置。
(57) Claims 1. A substrate (5) made of aluminum nitride on which a conductive circuit (8) made of a copper plate is formed, and electrically connected to the conductive circuit (8) In a semiconductor device provided with a semiconductor chip (6) fixed on the substrate (5) and a heat sink (7) on which the substrate (5) is mounted, the back surface of the substrate (5) has a heat transfer grease (10). ) Is in contact with the heat sink (7) through the substrate (5).
Electrode plates (14, 15,...) Contacting the conductive circuit (8) on the surface
16, 17, 18) are fixed to the heat sink (7).
The electrode plates (14-18) and a heat sink
(7) the substrate (5) is relatively
Allowing to slide, said substrate (5) and said
The heat transfer grease (10) is applied to the electrode plates (14 to 18) and the heat transfer grease.
A semiconductor device sandwiched between heat sinks (7) .
JP34189498A 1998-12-01 1998-12-01 Semiconductor device Expired - Fee Related JP3523094B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34189498A JP3523094B2 (en) 1998-12-01 1998-12-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34189498A JP3523094B2 (en) 1998-12-01 1998-12-01 Semiconductor device

Publications (2)

Publication Number Publication Date
JP2000174196A JP2000174196A (en) 2000-06-23
JP3523094B2 true JP3523094B2 (en) 2004-04-26

Family

ID=18349572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34189498A Expired - Fee Related JP3523094B2 (en) 1998-12-01 1998-12-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3523094B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147658A (en) * 2004-11-16 2006-06-08 Yaskawa Electric Corp Power module
JP5348121B2 (en) * 2010-12-21 2013-11-20 株式会社デンソー Electronic equipment
JP6652144B2 (en) * 2018-01-25 2020-02-19 日本電気株式会社 Electronic parts, manufacturing method of electronic parts, mechanical parts

Also Published As

Publication number Publication date
JP2000174196A (en) 2000-06-23

Similar Documents

Publication Publication Date Title
US5920458A (en) Enhanced cooling of a heat dissipating circuit element
JP2001156219A5 (en)
KR20060040727A (en) Heatsinking electronic devices
US6657866B2 (en) Electronics assembly with improved heatsink configuration
JP3603354B2 (en) Hybrid integrated circuit device
JP5069876B2 (en) Semiconductor module and heat sink
US7473990B2 (en) Semiconductor device featuring electrode terminals forming superior heat-radiation system
JP2003501811A (en) Intelligent power module with sandwich structure
JP4264392B2 (en) Power semiconductor module with bending-reinforced base plate
JPH0738013A (en) Composite base member and power semiconductor device
JPH06309532A (en) Ic card
JPH05259334A (en) Semiconductor device
JP2010073942A (en) Electronic circuit device
JP3523094B2 (en) Semiconductor device
WO2021241304A1 (en) Mounting structure for semiconductor module
JPH11266090A (en) Semiconductor device
JPH08274228A (en) Semiconductor mounting board, power semiconductor device and electronic circuit device
KR100397161B1 (en) Heat dissipation structure of electronic device
JP2000174197A (en) Semiconductor device
JP4573467B2 (en) Power semiconductor device
US6118660A (en) Circuit module with improved heat transfer
JP4124528B2 (en) Electronic control unit
JPH1065224A (en) Thermomodule
JPH0563053U (en) Hybrid integrated circuit board
JPH0638429Y2 (en) Semiconductor element mounting structure

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20031225

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20040128

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20040205

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080220

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090220

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100220

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100220

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110220

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110220

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120220

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130220

Year of fee payment: 9

LAPS Cancellation because of no payment of annual fees