JP3398447B2 - Power supply for sputtering equipment - Google Patents
Power supply for sputtering equipmentInfo
- Publication number
- JP3398447B2 JP3398447B2 JP32138593A JP32138593A JP3398447B2 JP 3398447 B2 JP3398447 B2 JP 3398447B2 JP 32138593 A JP32138593 A JP 32138593A JP 32138593 A JP32138593 A JP 32138593A JP 3398447 B2 JP3398447 B2 JP 3398447B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- pulse
- target
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Plasma Technology (AREA)
- Physical Vapour Deposition (AREA)
Description
【発明の詳細な説明】
【０００１】
【発明の属する分野の説明】本発明は電子部品等の製造
に使用するスパッタ装置に適用する電源特に逆パルス発
生回路に関するものである。
【０００２】
【従来技術】スパッタ装置には高速化、製品の歩留り向
上が望まれ、この方向でスパッタ技術が進展してきてい
る。一般にスパッタ装置に適用する電源はタ−ゲ−トに
負の高電圧を印加するためのＤＣパワ−電源が使用され
るが、この高電圧印加状態で長時間の連続運転を行う
と、真空室内（チャンバ）に設けられたタ−ゲット近傍
で電弧を発生し、正常な運転が出来なくなることがあ
る。電弧の発生はタ−ゲットの材質あるいは形状により
相違する。この電弧はタ−ゲットから異常なスパッタリ
ングを起こし、薄膜を形成する基板上に不正規な膜を作
り、製品の歩留低下が問題になる。この電弧の発生をな
くすことは、 技術的に非常に困難であり、従来種々
の電源回路が検討されているが決めて に欠けるのが
現状である。
【０００３】
【発明の目的】本発明はタ−ゲットの材質或いは形状に
無関係に電弧の発生、及び異常放電を防止せしめる電源
の提供を目的とする。
【０００４】
【課題を解決するための手段】本発明はスパッタを行う
ための真空室内のタ−ゲットに直流電圧、電力（パワ
−）を供給する電源の出力部に前記電源と逆極性のパル
スを重畳せしめ、該逆パルスの電圧及び周波数を任意に
調整することにより電弧或は異常放電を消弧するように
構成したものである。
【０００５】
【実施例】図１は本発明の一実施例回路図で図中ＤＣは
直流電源でタ−ゲット等の負荷ＲＬに負の直流高電圧を
印加する極性に接続されている。Ｌはインダクタ、Ｄ
1、Ｒ3はサ−ジ吸収用のダイオ−ド及び抵抗、次にＲＰ
Ｃは逆パルス発生回路でＰＴはパルストランス、ｎ1、
ｎ2はその１次巻線及び２次（出力）巻線で１次巻線ｎ1
側はスイッチング回路ｓｗと、該スイッチング回路ｓｗ
の発振周波数等を制御す発振回路ＯＳＣが接続されてい
る。又２次巻線ｎ2は直流電源ＤＣの出力部に該出力と
逆極性にパルスが重畳される如く接続されている。Ｃ1
は該直流電源ＤＣよりダイオ−ドＤ2を介して充電され
るコンデンサでスイッチング回路ｓｗの電源を形成す
る。Ｄ3、Ｒ2はパルストランスＰＴのフライバック電圧
を抑制するダイオ−ド及び抵抗である。
【０００６】この回路の基本動作は直流電源ＤＣを負荷
ＲＬに給電すると同時に必要に応じて連続的に或いは間
欠的に逆パルス電圧を該直流電源ＤＣに重畳して負荷Ｒ
Ｌに給電する。因みに図２は図１において直流電源ＤＣ
の電圧をＥ1、コンデンサＣ1の電圧をＥ2（Ｅ1≒Ｅ2）
パルストランスＰＴの出力電圧をＥ3、負荷電圧をＥ0と
した時の各部動作波形を示す。なお図２において、ｔ1
はスイッチング回路のオン（導通）時間（５〜３０μｓ
ｅｃ程度）Ｔは繰返し周期（１Ｈｚ〜２０ＫＨｚ程度）
△ｅは逆電圧レベルである。この回路では、Ｌはパル
ストランスＰＴのパルス電圧発生時電流ｉの増加率を防
止する。パルストランスＰＴのフライバック電圧（図
２ａ、ＥFR）はダイオードＤ4により出力電圧に重畳さ
せない目的で装備し、 ダイオ−ドＤ3、抵抗Ｒ2、ダ
イオ−ドＤ4の電圧耐量等により必要に応じて設 け
てもよい。パルストランスＰＴの１次巻線ｎ1側の電
圧はコンデンサＣ1 の電圧(ＤＣ電源電圧)により駆
動しているので駆動電源をあらたに設ける必 要はな
く、又パルストランスＰＴの１次ｎ1、２次ｎ2の巻数比
の設定により 容易に逆パルス電圧Ｅ3の調整が可能
である。電源電圧、負荷変動等によ り非パルス発
生時（スイッチング回路ｓｗのオフ時）コンデンサＣ1
の充電 々流が変動するがダイオ−ドＤ2によりパル
ストランスＰＴの直流励磁を防 止する。ＤＣ電源
の負荷電流は直列に挿入されたインダクタＬによりパル
ス発生時も大きな変化はなく連結して流れるため、
ＤＣ電源のトランジエン トによる影響は少ない。
【０００７】図３は本発明の実施例回路（図１）におい
て、抵抗負荷電圧−４５０Ｖ、４Ａ、逆電圧レベル△ｅ
≒８５Ｖ（約１９％）、パルスｔ１０μｓ、周波数１０
ＫＨzの運転条件で実施した時の負荷電圧Ｅ0及び負荷電
流Ｉ0の関係を示す波形図で異常現象は何ら生じないこ
とを確認した。
【０００８】図４は同実施例回路において、Ｒ負荷電圧
−８２０Ｖ、１２Ａ、逆電圧レベル△ｅ≒１００Ｖ、運
転条件で実施した時の動作波形図で、これによっても全
く異常現象は発生しなかった。
【０００９】以上の説明から明らかなように本発明によ
ればスパッタ装置用電源としてタ−ゲットの材質（金
属、絶縁物）に係わりなく異常放電を防止し得る装置を
提供できるので実用上の効果は大きい。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply applied to a sputtering apparatus used for manufacturing electronic parts and the like, particularly to an inverse pulse generating circuit. 2. Description of the Related Art Sputtering apparatuses are demanded to operate at higher speeds and to improve product yields. Sputtering techniques have been developed in this direction. Generally, a DC power supply for applying a negative high voltage to a target is used as a power supply applied to the sputtering apparatus. However, if continuous operation is performed for a long time in this high voltage application state, a vacuum chamber is used. An electric arc may be generated near a target provided in the (chamber) and normal operation may not be performed. The occurrence of an electric arc differs depending on the material or shape of the target. This electric arc causes abnormal sputtering from the target, forms an irregular film on the substrate on which the thin film is formed, and lowers the yield of products. Eliminating the occurrence of this arc is technically very difficult, and various power supply circuits have been studied in the past, but at present it is lacking to determine. [0003] It is an object of the present invention to provide a power supply capable of preventing arcing and abnormal discharge regardless of the material or shape of a target. According to the present invention, a pulse having a polarity opposite to that of the power supply is supplied to an output portion of a power supply for supplying a DC voltage and power (power) to a target in a vacuum chamber for performing sputtering. Are superimposed, and the voltage or frequency of the reverse pulse is arbitrarily adjusted to extinguish the arc or abnormal discharge. FIG. 1 is a circuit diagram of an embodiment of the present invention. In FIG. 1, DC is a DC power supply and is connected to a polarity for applying a high negative DC voltage to a load RL such as a target. L is the inductor, D
1, R3 is diode and resistor for surge absorption, then RP
C is a reverse pulse generating circuit, PT is a pulse transformer, n1,
n2 is a primary winding and a secondary (output) winding of the primary winding n1
Side is a switching circuit sw, and the switching circuit sw
An oscillation circuit OSC for controlling the oscillation frequency and the like is connected. The secondary winding n2 is connected to the output of the DC power supply DC such that a pulse is superimposed on the output with a polarity opposite to that of the output. C1
Is a capacitor charged from the DC power supply DC via the diode D2 to form a power supply for the switching circuit sw. D3 and R2 are a diode and a resistor for suppressing the flyback voltage of the pulse transformer PT. The basic operation of this circuit is to supply the DC power supply DC to the load RL, and at the same time, continuously or intermittently superimpose an inverse pulse voltage on the DC power supply DC as necessary.
Power is supplied to L. FIG. 2 shows a DC power source DC in FIG.
Is the voltage of E1, and the voltage of the capacitor C1 is E2 (E1 ≒ E2).
The operation waveforms of each part when the output voltage of the pulse transformer PT is E3 and the load voltage is E0 are shown. In FIG. 2, t1
Is the ON (conduction) time of the switching circuit (5 to 30 μs)
ec) T is the repetition period (about 1 Hz to 20 KHz)
Δe is the reverse voltage level. In this circuit, L prevents the rate of increase of the current i when a pulse voltage is generated by the pulse transformer PT. The flyback voltage (EFR) of the pulse transformer PT is provided for the purpose of not being superimposed on the output voltage by the diode D4, and is provided as necessary according to the voltage tolerance of the diode D3, the resistor R2, and the diode D4. You may. Since the voltage on the primary winding n1 side of the pulse transformer PT is driven by the voltage of the capacitor C1 (DC power supply voltage), it is not necessary to newly provide a driving power supply. The reverse pulse voltage E3 can be easily adjusted by setting the turns ratio of n2. When a non-pulse occurs due to power supply voltage, load fluctuation, etc. (when the switching circuit sw is off), the capacitor C1
However, the DC current of the pulse transformer PT is prevented by the diode D2. The load current of the DC power supply flows in a connected manner without significant change even when a pulse is generated by the inductor L inserted in series.
The effect of DC power supply transients is small. FIG. 3 shows a circuit according to the embodiment of the present invention (FIG. 1), which has a resistive load voltage of -450 V, 4 A, and a reverse voltage level Δe.
≒ 85V (about 19%), pulse t10μs, frequency 10
A waveform diagram showing the relationship between the load voltage E0 and the load current I0 when the operation was performed under the KHz operating condition confirmed that no abnormal phenomenon occurred. FIG. 4 is an operation waveform diagram of the circuit of the embodiment when the R load voltage is -820 V, 12 A, the reverse voltage level is △ e ≒ 100 V, and the operation conditions are such that no abnormal phenomenon occurs. Was. As is apparent from the above description, according to the present invention, it is possible to provide a device capable of preventing abnormal discharge as a power source for a sputtering device irrespective of the material (metal, insulator) of the target, so that a practical effect is obtained. Is big.
【図面の簡単な説明】 【図１】本発明の一実施例回路図 【図２】本発明の動作説明図 【図３】本発明実施例の出力特性図 【図４】本発明実施例の出力特性図 【符号の簡単な説明】 ＤＣ 直流電源 Ｃ インダクタ ＲL 負荷（タ−ゲ−ト） ＲPC 逆パルス発生回路 ＰＴ パルストランス ｓｗ スイッチング回路 ｏｓｃ 発振回路 Ｃ1 コンデンサ Ｄ1、Ｄ2、Ｄ3 ダイオ−ド[Brief description of the drawings] FIG. 1 is a circuit diagram of an embodiment of the present invention. FIG. 2 is a diagram illustrating the operation of the present invention. FIG. 3 is an output characteristic diagram of the embodiment of the present invention. FIG. 4 is an output characteristic diagram of the embodiment of the present invention. [Brief description of reference numerals] DC DC power supply C inductor RL load (target) RPC reverse pulse generation circuit PT pulse transformer sw switching circuit osc oscillation circuit C1 capacitor D1, D2, D3 diodes
Claims (1)
ットに直流電圧、電力（パワ−）を供給する電源の出力
部に、前記電源と逆極性のパルスを重畳せしめるよう
に、少なくとも発振回路、スイッチ素子、パルストラン
ス、ダイオード、コンデンサを含む逆パルス発生回路を
接続し、該逆パルスの電圧及び周波数を任意に調整する
ことにより電弧或いは異常放電を消弧するように構成し
たことを特徴とするスパッタ装置用電源。(57) [Claim 1] A pulse having a polarity opposite to that of the power supply is supplied to an output section of a power supply for supplying a DC voltage and power (power) to a target in a vacuum chamber for performing sputtering. At least an oscillation circuit, a switch element, and a pulse transformer so that
A power supply for a sputtering apparatus, characterized in that a reverse pulse generating circuit including a source , a diode, and a capacitor is connected, and an arc or abnormal discharge is extinguished by arbitrarily adjusting the voltage and frequency of the reverse pulse. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32138593A JP3398447B2 (en) | 1993-11-26 | 1993-11-26 | Power supply for sputtering equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32138593A JP3398447B2 (en) | 1993-11-26 | 1993-11-26 | Power supply for sputtering equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07150348A JPH07150348A (en) | 1995-06-13 |
| JP3398447B2 true JP3398447B2 (en) | 2003-04-21 |
Family
ID=18131970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32138593A Expired - Lifetime JP3398447B2 (en) | 1993-11-26 | 1993-11-26 | Power supply for sputtering equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3398447B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3735462B2 (en) * | 1998-03-30 | 2006-01-18 | 株式会社シンクロン | Method and apparatus for forming metal oxide optical thin film |
| JP3735461B2 (en) * | 1998-03-27 | 2006-01-18 | 株式会社シンクロン | Compound metal compound thin film forming method and thin film forming apparatus therefor |
| JP3738154B2 (en) * | 1999-06-30 | 2006-01-25 | 株式会社シンクロン | Thin film forming method of composite metal compound and thin film forming apparatus |
| SE0302045D0 (en) | 2003-07-10 | 2003-07-10 | Chemfilt R & D Ab | Work piece processing by pulsed electric discharges in solid-gas plasmas |
| JP5112921B2 (en) * | 2008-03-21 | 2013-01-09 | 新電元工業株式会社 | Power supply circuit for sputtering equipment |
| CN102148571A (en) * | 2011-04-19 | 2011-08-10 | 济南卓信智能科技有限公司 | High-frequency high-voltage DC switching power source based on current source mode |
-
1993
- 1993-11-26 JP JP32138593A patent/JP3398447B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07150348A (en) | 1995-06-13 |
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