JP3329699B2 - Multilayer wiring board and method of manufacturing the same - Google Patents
Multilayer wiring board and method of manufacturing the sameInfo
- Publication number
- JP3329699B2 JP3329699B2 JP20060597A JP20060597A JP3329699B2 JP 3329699 B2 JP3329699 B2 JP 3329699B2 JP 20060597 A JP20060597 A JP 20060597A JP 20060597 A JP20060597 A JP 20060597A JP 3329699 B2 JP3329699 B2 JP 3329699B2
- Authority
- JP
- Japan
- Prior art keywords
- metal film
- conductive metal
- wiring board
- protrusion
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は多層配線板およびそ
の製造方法に係り、さらに詳しくは微細なビア接続部お
よびスルホール接続を具備する多層配線板、およびこの
多層配線板を低コストで得ることができる製造方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board and a method for manufacturing the same, and more particularly to a multilayer wiring board having fine via connection portions and through-hole connections, and to obtain this multilayer wiring board at low cost. To possible manufacturing methods.
【０００２】[0002]
【従来の技術】配線回路の高密度化やコンパクト化、も
しくは高機能化などの点から、多層配線型の配線板が広
く実用に供されている。そして、この種の多層配線板
は、一般的に、絶縁体層の両面に銅箔を張り合わせてな
る積層板を素材として製造されている。すなわち、前記
銅箔張り積層板の所定箇所（所定位置）に、たとえばNC
ドリリングマシンを用いて、一つづつシリーズに貫通孔
を穿設し、この穿設孔の内壁面をメッキなどで導電性化
して、両面の銅箔間を電気的に接続する。その後、前記
両面の銅箔を、たとえばフォトエッチング処理し、配線
パターニングして両面型の配線板を得ている。2. Description of the Related Art A multilayer wiring type wiring board has been widely put into practical use from the viewpoint of higher density, compactness, and higher functionality of wiring circuits. In general, this type of multilayer wiring board is manufactured using a laminated board made by laminating copper foil on both sides of an insulator layer as a raw material. That is, for example, NC at a predetermined position (predetermined position) of the copper foil-clad laminate
Using a drilling machine, through holes are drilled one by one in series, the inner wall surfaces of the drill holes are made conductive by plating or the like, and the copper foils on both surfaces are electrically connected. Thereafter, the copper foil on both sides is subjected to, for example, photoetching treatment and wiring patterning to obtain a double-sided wiring board.
【０００３】また、多層型の回路基板の場合は、 (a)前
記両面型の回路基板間にガラス・樹脂系プリプレグ層を
介在させ、あるいは (b)両面型の回路基板面にガラス・
樹脂系プリプレグ層を介して銅箔を積層し、これを積層
一体化することによって製造される。なお、銅箔を積層
する製造方法の場合は、銅箔のパターニングを要する。
さらに、この多層型回路基板の製造工程においては、
配線パターン間のビア接続は、介在させるガラス・樹脂
系プリプレグ層の所定位置に導電体を埋め込むことによ
り、また、厚さ方向に貫通するスルホール接続は、多層
・一体化後にドリル加工で貫通孔を穿設し、穿設孔内壁
面をメッキ法で、あるいは孔内に導電性ペーストを充填
することなどによって行われる。In the case of a multilayer circuit board, (a) a glass-resin prepreg layer is interposed between the double-sided circuit boards, or (b) a glass-resin prepreg layer is placed on the double-sided circuit board surface.
It is manufactured by laminating a copper foil via a resin-based prepreg layer and laminating and integrating this. In the case of a manufacturing method in which a copper foil is laminated, patterning of the copper foil is required.
Further, in the manufacturing process of the multilayer circuit board,
Via connection between wiring patterns is performed by embedding a conductor at a predetermined position in the glass / resin prepreg layer to be interposed, and through-hole connection penetrating in the thickness direction is achieved by drilling through holes after multi-layer integration. Drilling is performed by plating the inner wall surface of the drilled hole, or filling the hole with a conductive paste.
【０００４】一方、多層配線板においては、配線パター
ン間の接続を簡易に行う方式が提案されている。すなわ
ち、層間絶縁体層の厚さ方向に導電性バンプを貫挿さ
せ、その両端部を対向する配線パターンの被接続面に対
接させることにより、ビア接続やスルホール接続を形成
する手段も知られている。On the other hand, in a multilayer wiring board, there has been proposed a method for easily connecting wiring patterns. That is, there is also known a means for forming a via connection or a through-hole connection by inserting a conductive bump in a thickness direction of an interlayer insulator layer and making both ends thereof contact with a connection surface of an opposite wiring pattern. ing.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、前記ド
リル加工で、一つづつシリーズに貫通孔を穿設する工程
を伴う製造方法は、配線パターン層間の接続工程が煩雑
で、生産性なども劣るという問題がある。すなわち、両
面銅箔間の電気的な接続を行うに当たり、NCドリリング
マシンで一つづつシリーズに貫通孔を穿設するため、貫
通孔の穿設に多くの時間を必要とし、結果的に生産性が
低いという問題がある。特に、高密度配線化もしくは配
線の微細化が要求された印刷配線板では、穿設孔の微小
径とともに穿設箇所も増大しており、前記貫通孔の穿設
手段は、経済的，技術的に由々しい問題となっている。However, the manufacturing method that involves the step of drilling through holes one by one in the above-mentioned drilling process requires a complicated connection step between wiring pattern layers, resulting in poor productivity and the like. There's a problem. In other words, when making electrical connections between double-sided copper foils, drilling holes through the NC drilling machine one by one requires a lot of time to drill through holes, resulting in a high productivity. Is low. In particular, in a printed wiring board that requires high-density wiring or fine wiring, the number of holes to be drilled is increasing along with the minute diameter of the hole, and the means for drilling the through hole is economical and technical. It is a serious problem.
【０００６】一方、層間絶縁体層の厚さ方向に導電性バ
ンプを貫挿させて、配線パターン間の接続を行う方式の
場合は、微細なビア接続を容易に形成できる利点を有す
る反面、多層配線板厚さ方向に貫通するスルホール接続
は、その信頼性が懸念される。すなわち、この方式は、
いわゆるビルドアップで多層配線化する形態を採るた
め、結果的に、ビア接続の積み重ねとなるので、位置合
わせ精度が要求される。On the other hand, the method of connecting between wiring patterns by penetrating conductive bumps in the thickness direction of the interlayer insulator layer has an advantage that fine via connection can be easily formed. The reliability of the through-hole connection penetrating in the thickness direction of the wiring board is concerned. That is, this method
Since a so-called multi-layer wiring is adopted by build-up, as a result, via connections are stacked, so that alignment accuracy is required.
【０００７】ここで、高精度の位置合わせが要求される
ことは、スルホール接続の形成操作を必然的に煩雑化
し、生産性などに支障が生じる。また、位置合わせし易
いように、スルホール接続を形成する導電性バンプを大
きくすることも考えられるが、ビア接続用の導電バンプ
形成、スルホール接続用の導電バンプ形成とマスクの使
い分けなどを要し、製造操作が煩雑となる。[0007] Here, the requirement for high-precision alignment necessitates complicated operations for forming through-hole connections and impairs productivity and the like. Also, to facilitate alignment, it is conceivable to increase the size of the conductive bumps that form through-hole connections.However, it is necessary to form conductive bumps for via connections, conductive bumps for through-hole connections, and to use different masks. The manufacturing operation becomes complicated.
【０００８】本発明は上記事情に対処してなされたもの
で、微細で信頼性の高いビア接続、信頼性の高いスルホ
ール接続を有する多層配線板、および簡易なプロセス
で、高密度の配線が可能な多層配線板を低コストで得る
ことができる多層配線板の製造方法の提供を目的とす
る。The present invention has been made in view of the above circumstances, and enables high-density wiring by a fine and highly reliable via connection, a multilayer wiring board having a highly reliable through-hole connection, and a simple process. It is an object of the present invention to provide a method for manufacturing a multilayer wiring board capable of obtaining a low-cost multilayer wiring board.
【０００９】[0009]
【発明が解決しようとする課題】請求項１の発明は、一
の当て板の上に、緩衝板、両面に被接続端子を有するコ
ア配線板、および絶縁体層を積層・配置する工程と、前
記絶縁体層面に、前記コア配線板の被接続端子に対向す
る領域の裏面へ難変形性の突起が配置された導電性金属
膜を位置決め配置する工程と、前記積層配置した導電性
金属膜の突起形設面に、導電性金属膜よりも硬質の他の
当て板を積層・配置する工程と、前記積層・配置した他
の当て板を押圧・一体化して、前記突起を導電性金属膜
側に圧入して曲成・変形させ、突起を内蔵形成した突起
状先端部の絶縁体層貫挿によって、対応するコア配線板
の被接続端子面に対接させて電気的に接続する工程と、
前記導電性金属膜張り積層板の所定位置に、その厚さ
方向に貫通する孔を穿設し、この貫通孔内壁面に導電性
のメッキ層を形成する工程と、前記導電性金属膜を配線
パターニングする工程とを有することを特徴とする。 [SUMMARY OF THE INVENTION] of claim 1 invention, one
On the backing plate, a buffer plate, and a connector with connected terminals on both sides.
A) Laminating and arranging wiring boards and insulator layers
On the surface of the insulator layer, facing the connected terminal of the core wiring board.
Conductive metal with hardly deformable protrusions arranged on the back of the area
A step of positioning and arranging the film;
On the protruding surface of the metal film, another harder than the conductive metal film
Laminating and arranging the caul plate,
Pressing and unifying the contact plate of the conductive metal film
Press-fit into the side to bend and deform, and the protrusion is formed internally
Corresponding core wiring board by inserting insulator layer
A step of contacting and electrically connecting to the connected terminal surface of
The thickness of the conductive metal film-clad laminate at a predetermined position,
A hole that penetrates in the direction
Forming a plating layer and wiring the conductive metal film
Patterning step.
【００１０】請求項２の発明は、一の当て板の上に、緩
衝板、両面に被接続端子を有するコア配線板、および絶
縁体層を積層・配置する工程と、前記絶縁体層面に、前
記コア配線板の被接続端子に対向する領域の裏面へ導電
性で、かつ難変形性の突起が配置された導電性金属膜を
位置決め配置する工程と、 前記積層配置した導電性金
属膜の突起形設面に、導電性金属膜よりも硬質の他の当
て板を積層・配置する工程と、前記積層・配置した他の
当て板を押圧・一体化して、前記突起を導電性金属膜側
に圧入して曲成・変形させ、突起を内蔵形成した突起状
先端部の絶縁体層貫挿によって、対応するコア配線板の
被接続端子面に対接させて電気的に接続する工程と、
前記導電性金属膜を配線パターニングする工程と、前記
配線パターニングした積層板の所定位置に、その厚さ方
向に貫通する孔を穿設し、この貫通孔内壁面に導電性の
メッキ層を形成する工程とを有することを特徴とする。 [0010] The invention according to claim 2 is that a loose plate is provided on one backing plate.
Board, core wiring board with connected terminals on both sides, and
Stacking and arranging an edge layer; and
Conductive to the back surface of the area of the core wiring board facing the connected terminal
Conductive metal film on which flexible and hardly deformable protrusions are arranged
Positioning and arranging, and the conductive gold laminated and arranged
The other surface, which is harder than the conductive metal film,
Stacking and arranging the plates, and the other of the stacked and arranged
Press and integrate the backing plate, and place the protrusion on the conductive metal film side.
Press-fit into the shape to bend and deform, and form protrusions with built-in protrusions
By inserting the insulator layer at the tip,
A step of making an electrical connection by contacting the connected terminal surface;
Patterning the conductive metal film by wiring,
The thickness of the wiring pattern
A hole that penetrates through the hole
Forming a plating layer.
【００１１】[0011]
【００１２】[0012]
【００１３】[0013]
【００１４】[0014]
【００１５】本発明において、コア配線板は、たとえば
絶縁性樹脂基板の少なくとも一主面に所要の配線パター
ンを配置した形態、あるいはアルミナや窒化アルミニウ
ムなどのセラミック基材面に厚膜法などで形成された配
線パターンを配置した形態が挙げられる。In the present invention, the core wiring board is formed, for example, by forming a required wiring pattern on at least one principal surface of an insulating resin substrate, or by forming a thick film method on a ceramic base material such as alumina or aluminum nitride. In which the arranged wiring patterns are arranged.
【００１６】ここで、絶縁性樹脂基板としては、紙・フ
ェノール樹脂基板、ガラス・エポキシ樹脂基板、ポリエ
ーテル・イミド樹脂基板、ガラス・フロロ樹脂基板、ガ
ラスマット・ポリエステル樹脂基板、液晶ポリマー系基
板、ポリイミド樹脂基板が挙げられる。より具体的に
は、たとえば銅張り紙・フェノール樹脂基板、銅張りガ
ラス・エポキシ樹脂基板、銅張りポリエーテル・イミド
樹脂基板、銅張りガラス・フロロ樹脂基板、銅張りガラ
スマット・ポリエステル樹脂基板、銅張り液晶ポリマー
系基板、銅張りポリイミド樹脂基板などを素材とし、銅
張り面を選択エッチング処理などで配線パターニングし
たものが挙げられる。Here, as the insulating resin substrate, a paper / phenol resin substrate, a glass / epoxy resin substrate, a polyether / imide resin substrate, a glass / fluoro resin substrate, a glass mat / polyester resin substrate, a liquid crystal polymer substrate, A polyimide resin substrate may be used. More specifically, for example, copper-coated paper / phenol resin substrate, copper-coated glass / epoxy resin substrate, copper-coated polyether / imide resin substrate, copper-coated glass / fluoro resin substrate, copper-coated glass mat / polyester resin substrate, copper-coated Examples include a substrate made of a liquid crystal polymer substrate, a copper-clad polyimide resin substrate, or the like, and a copper-clad surface patterned by selective etching or the like.
【００１７】本発明において、ビア接続を形成するた
め、突起状先端部が貫挿する絶縁体層（層間絶縁体）と
しては、たとえばエポキシ樹脂、ポリビニルブチラール
樹脂、フェノール樹脂、ニトリルラバー、ポリイミド樹
脂、フェノキシ樹脂、キシレン樹脂、アクリル樹脂、酢
酸ビニル樹脂、ビスマレイミドトリアジン樹脂、ポリア
ミド樹脂、ポリアミドイミド樹脂、ポリスルホン樹脂、
液晶ポリマー、ポリエーテルエーテルケトン樹脂、ポリ
エーテルイミド樹脂、ポリカーボネート樹脂、ホットメ
ルト接着剤などの１種もしくは２種以上の混合系、また
は、前記樹脂とガラスクロス、ガラスマット、合成繊維
や布などとを組み合わせたシート状のものが挙げられ
る。In the present invention, the insulating layer (interlayer insulator) through which the protruding tip portion penetrates to form a via connection includes, for example, epoxy resin, polyvinyl butyral resin, phenol resin, nitrile rubber, polyimide resin, Phenoxy resin, xylene resin, acrylic resin, vinyl acetate resin, bismaleimide triazine resin, polyamide resin, polyamide imide resin, polysulfone resin,
A liquid crystal polymer, a polyetheretherketone resin, a polyetherimide resin, a polycarbonate resin, a hot melt adhesive, or a mixture of two or more thereof, or a mixture of the resin and a glass cloth, a glass mat, a synthetic fiber, a cloth, or the like. And a sheet-like material obtained by combining the above.
【００１８】本発明において、最終的に、配線パターニ
ングされる導電性金属膜としては、銅箔、アルミ箔、ニ
ッケル箔、金箔、銀箔などが挙げられるか、経済性およ
び加工性の点などから銅箔が適する。In the present invention, the conductive metal film to be finally subjected to wiring patterning includes a copper foil, an aluminum foil, a nickel foil, a gold foil, a silver foil, or the like. Foil is suitable.
【００１９】また、前記導電性金属膜面に形設する突起
は、導電性金属膜側への圧入により、前記導電性金属膜
を曲成・変形させて、突起が充填した形のビア接続を形
成するものであるため、ビア接続を形成する所定の箇所
に配置形成される。ここで、突起は、押圧によってそれ
自体が変形しないこと（難変形性）が必要であり、乾燥
や硬化処理などで最終的には難変形である材質が選ばれ
る。また、難変形性突起は、たとえばスクリーン印刷で
導電性組成物（導電ペースト）、もしくは絶縁性ペース
トを印刷し、ほぼ一定高さ・形状の導電性組成物の突起
（導電性バンプ）、もしくは誘電性の突起を形成してか
ら乾燥・硬化させた突起、導電性組成物突起を半田層で
被覆した構成、あるいは選択的なメッキなどで形成され
ている。なお、導電性組成物は、たとえばAg粉末などの
導電性粉末およびエポキシ樹脂などのバインダー成分で
調製されたものであり、また、半田層は無電解メッキ法
や溶融塗布法などで形成される。The protrusion formed on the surface of the conductive metal film is bent and deformed by press-fitting on the conductive metal film side to form a via connection in a form filled with the protrusion. Since they are formed, they are arranged and formed at predetermined locations where via connections are to be formed. Here, it is necessary that the projections do not deform themselves due to pressure (hard deformation), and a material that is hardly deformed by drying or hardening treatment is selected. The hardly deformable projection is formed by printing a conductive composition (conductive paste) or an insulating paste by screen printing, for example, and forming a conductive composition bump (conductive bump) having a substantially constant height and shape, or a dielectric material. The protrusions are formed by forming protrusions that are formed and then dried and hardened, by covering the conductive composition protrusions with a solder layer, or by selective plating. The conductive composition is prepared with a conductive powder such as an Ag powder and a binder component such as an epoxy resin, and the solder layer is formed by an electroless plating method or a melt coating method.
【００２０】本発明において、前記突起を導電性金属膜
側に圧入し、導電性金属膜を局部的に曲成・変形するた
めの硬質な当て板としては、たとえばステンレス鋼板、
アルミナなどのセラミック板などを使用できる。そし
て、この当て板の大きさや厚さなどは、多層配線板の大
きさや厚さ、仕様・設計を考慮して決められるが、一般
的に厚さは、 2〜 5mm程度でよい。なお、プレス加工に
より一体化するとき、突起を圧入する導電性金属膜側に
は、前記当て板を配置するが、突起の圧入を要しない導
電性金属膜側には、たとえばシリコーンゴム板などの弾
性体を介して硬質な当て板を配置することが好ましい。In the present invention, as the hard backing plate for press-fitting the protrusion into the conductive metal film side and locally bending and deforming the conductive metal film, for example, a stainless steel plate,
A ceramic plate such as alumina can be used. The size and thickness of the backing plate are determined in consideration of the size and thickness of the multilayer wiring board, specifications and design, but generally the thickness may be about 2 to 5 mm. When integrated by press working, the contact plate is arranged on the side of the conductive metal film into which the protrusion is pressed, but on the side of the conductive metal film not requiring the press-fit of the protrusion, for example, a silicone rubber plate or the like is used. It is preferable to dispose a hard backing plate via an elastic body.
【００２１】請求項１〜４の発明では、微細なビア接続
部を有するだけでなく、そのビア接続は充填・緻密化
し、信頼性の高い電気的な接続を形成しており、前記緻
密性などに伴って、良好な耐湿性や機械的な強度などを
呈する。また、スルホール接続は、一括的に形成されて
いるため、高い接続の信頼性が容易に確保される。According to the first to fourth aspects of the present invention, in addition to having a fine via connection portion, the via connection is filled and densified to form a highly reliable electrical connection. As a result, good moisture resistance and mechanical strength are exhibited. Moreover, since the through-hole connection is formed collectively, high connection reliability is easily ensured.
【００２２】請求項５〜６の発明では、上記高性能の多
層配線板が歩留まりよく、かつ量産的に提供される。According to the fifth and sixth aspects of the present invention, the high-performance multilayer wiring board is provided with high yield and mass production.
【００２３】[0023]
【発明の実施の形態】以下図１および図２ (a)， (b)を
参照して実施例を説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment will be described below with reference to FIGS. 1 and 2 (a) and 2 (b).
【００２４】図１は本発明の実施例に係る多層配線板の
要部構成を拡大して示す断面図である。すなわち、配線
パターン1a，1b，1c，1d層間がビア接続2aおよびスルホ
ール接続2bされた多層配線板３であって、前記ビア接続
2aが配線パターン1a，1bを成す導体の曲成・突起化およ
び曲成・突起内側を充填する導電体2cで形成され、ま
た、スルホール接続2bが貫通孔内壁面にメッキ形成され
た導体層で形成されている。FIG. 1 is an enlarged cross-sectional view showing the configuration of a main part of a multilayer wiring board according to an embodiment of the present invention. That is, the multilayer wiring board 3 has a via connection 2a and a through-hole connection 2b between the wiring patterns 1a, 1b, 1c and 1d.
2a is formed of a conductor 2c that fills the bent / projected portions of the conductors forming the wiring patterns 1a and 1b and fills the inside of the bent / projected portions, and a through-hole connection 2b is formed of a conductive layer plated on the inner wall surface of the through hole. Is formed.
【００２５】ここで、多層配線板３の各配線パターン1
a，1b，1c，1dは、厚さ18μm の電解銅箔のフォトエッ
チングで形成されたものである。また、ビア接続2aは、
前記電解銅箔に形成配置された導電性バンプ（突起）2
c、たとえば導電性組成物の塗布硬化体を、電解銅箔に
圧入して局部的に曲成・突起化させるとともに、曲成・
突起先端部を対向する配線パターン1b，1cに対接・接合
させ、電気的に接続された構成と成っている。一方、ス
ルホール接続2bは、多層配線板３を貫通する孔を穿設
し、この穿設孔の内壁面（要すれば外層配線パターン1
a，1dを含めて）に、化学メッキおよび電気メッキを施
して導電層を形成した構成を採っている。Here, each wiring pattern 1 of the multilayer wiring board 3
a, 1b, 1c, 1d are formed by photo-etching of 18μm thick electrolytic copper foil. Also, via connection 2a is
Conductive bumps (projections) 2 formed and arranged on the electrolytic copper foil
c, for example, press-fit the coated and cured body of the conductive composition into the electrolytic copper foil to locally bend / project,
The protruding tips are brought into contact with and joined to the opposing wiring patterns 1b, 1c, and are electrically connected. On the other hand, in the through hole connection 2b, a hole penetrating the multilayer wiring board 3 is formed, and the inner wall surface of the hole (if necessary, the outer layer wiring pattern 1) is formed.
a, 1d), a conductive layer is formed by chemical plating and electroplating.
【００２６】なお、上記多層配線板３の構成において、
ビア接続2aは、配線パターンを成す導体（配線パターン
導体）の曲成・突起と、この曲成・突起を形成するため
に圧入された導電性バンプ2cとで形成されている。つま
り、ビア接続2aは、ビア接続の主要部が銅箔の曲成・突
起で形成され、さらに、この曲成・突起内を導電性バン
プ2cが充填した構成と成っており、空間部が残存してお
らず、このビア接続2a面に、直接、他の配線パターンの
配置や部品の載置などが可能な状態を成している。In the structure of the multilayer wiring board 3,
The via connection 2a is formed by bending and projecting a conductor (wiring pattern conductor) forming a wiring pattern and a conductive bump 2c press-fitted to form the bending and projection. In other words, the via connection 2a has a configuration in which the main part of the via connection is formed by bending / projection of copper foil, and the inside of the bending / projection is filled with the conductive bump 2c, so that the space remains. In this state, other wiring patterns and components can be directly placed on the via connection 2a.
【００２７】次に、上記構成の多層配線板の製造方法例
を説明する。Next, an example of a method for manufacturing a multilayer wiring board having the above-described structure will be described.
【００２８】図２ (a)， (b)は、本実施例の実施態様を
模式的に示したものである。先ず、銅箔張り積層板を用
意し、この銅箔張り積層板の銅面にエッチングレジスト
（商品名，UVエッチングレジストAS-400 太陽インキKK
製）をパターン状にスクリーン印刷法によって印刷し、
露光・現像してエッチングレジスト層を設ける。その
後、塩化第２銅浴を用いて、露出している銅をエッチン
グ除去してから、前記エッチングレジスト層を除去し、
両面に所要の配線パターン4a，4bを有する配線板（コア
基板）４を作成した。FIGS. 2A and 2B schematically show an embodiment of the present embodiment. First, a copper foil-clad laminate is prepared, and an etching resist (trade name, UV etching resist AS-400 Taiyo Ink KK) is applied to the copper surface of the copper foil-clad laminate.
Made in a pattern by screen printing method,
Exposure and development provide an etching resist layer. Thereafter, using a cupric chloride bath, the exposed copper is removed by etching, and then the etching resist layer is removed.
A wiring board (core substrate) 4 having required wiring patterns 4a and 4b on both sides was prepared.
【００２９】一方、厚さ35μm の電解銅箔５の一主面
に、予め用意しておいた、厚さ 2mmのステンレス板製の
スクリーン印刷版を位置決め配置し、銀粉およびフェノ
ール樹脂から成るペーストを印刷し、乾燥・硬化させて
底面 0.3mm径，高さ 200μm ±20μm の円錐型バンブ６
を設ける。On the other hand, a screen printing plate made of a stainless steel plate having a thickness of 2 mm prepared in advance is positioned and arranged on one main surface of the electrolytic copper foil 5 having a thickness of 35 μm, and a paste made of silver powder and phenol resin is applied. Printed, dried and cured, conical bumper 6 with 0.3mm diameter bottom and 200μm ± 20μm height
Is provided.
【００３０】この他、エポキシ樹脂−ブチラール樹脂系
の厚さ50μm 程度の絶縁体層７、厚さ 2mm程度のステン
レス鋼板（当て板）8a，8b、厚さ 2mm程度のシリコーン
ゴム板（緩衝板）９をそれぞれ用意する。In addition, an epoxy resin-butyral resin-based insulating layer 7 having a thickness of about 50 μm, stainless steel plates (applying plates) 8a and 8b having a thickness of about 2 mm, and a silicone rubber plate (buffer plate) having a thickness of about 2 mm 9 are prepared.
【００３１】次いで、前記コア基板４、円錐型バンブ６
を設けた銅箔５、絶縁体層７，当て板8a，8bおよび緩衝
板９を図２ (a)に断面的に示すように、位置決め、積層
・配置する。その後、前記積層体をプレス装置にセット
し、加熱温度 160℃，圧力は4kPaの樹脂圧を 1時間作用
させる。このプレス加工において、当て板8aによる円錐
型バンブ６の押圧により、銅箔５が局部的に変形・突起
化し、かつその突起状先端部が絶縁体層７を貫挿して、
対向するコア基板４の配線パターン4a面に対接・接合す
る。Next, the core substrate 4, the conical bump 6
The copper foil 5, the insulating layer 7, the backing plates 8a and 8b, and the buffer plate 9 provided with are positioned, laminated, and arranged as shown in cross section in FIG. Thereafter, the laminate is set in a pressing device, and a resin pressure of 160 ° C. and a pressure of 4 kPa is applied for 1 hour. In this press working, the copper foil 5 is locally deformed and protruded by the pressing of the conical bump 6 by the backing plate 8a, and the protruding tip portion penetrates the insulator layer 7,
It is in contact with and joined to the wiring pattern 4a surface of the opposing core substrate 4.
【００３２】図２ (b)は、この接合一体化したときの状
態を断面的に示したもので、前記銅箔５が局部的な変形
・突起が、コア基板４の対応する配線パターン4aに電気
的に接続した銅箔張り積層板と成っている。なお、前記
プレス加工工程において、コア基板４の配線パターン4b
面は、当て板8bとの間に緩衝板９が介在するので、押圧
する当て板8bで損傷など生じることもない。FIG. 2 (b) is a cross-sectional view showing a state where the bonding and integration are performed. The copper foil 5 has a local deformation / protrusion on the corresponding wiring pattern 4a of the core substrate 4. It consists of an electrically connected copper foil clad laminate. In the pressing process, the wiring pattern 4b of the core substrate 4
Since the buffer plate 9 is interposed between the surface and the backing plate 8b, no damage is caused on the pressing back plate 8b.
【００３３】上記プレス成型した銅箔張り積層板が冷却
後、緩衝板９および当て板8a，8bを取り外し、銅張り積
層板の銅箔５について、上記コア基板４の製造時と同様
に、選択エッチング処理を施して配線パターニングす
る。この配線パターニングして得た多層配線板を、前記
図２ (a)におけるコア基板４として、再び、図２ (a)に
断面的に示すように、円錐型バンブ６を設けた銅箔５、
絶縁体層７，当て板8a，8bおよび緩衝板９を位置決め、
積層・配置する。その後、前記積層体をプレス装置にセ
ットしてプレス加工することにより、銅箔張り積層板を
製造し、銅箔を配線パターニングする。After the press-formed copper foil-clad laminate is cooled, the buffer plate 9 and the backing plates 8a and 8b are removed, and the copper foil 5 of the copper-clad laminate is selected in the same manner as when the core substrate 4 is manufactured. The wiring is patterned by performing an etching process. The multilayer wiring board obtained by this wiring patterning was used as the core substrate 4 in FIG. 2A again, as shown in cross section in FIG. 2A, a copper foil 5 provided with a conical bump 6,
Positioning the insulating layer 7, the backing plates 8a and 8b and the buffer plate 9,
Laminate and arrange. Thereafter, the laminate is set in a press device and pressed to produce a copper foil-clad laminate, and the copper foil is subjected to wiring patterning.
【００３４】上記配線パターニングした配線基板の所定
位置に、たとえばドリル加工などによって径 0.4mm程度
の貫通孔を穿設する。その後、前記穿設孔内壁面および
外層配線パターン（ビア接続部を含む）面に化学メッキ
層、電気メッキ層を順次積層的に形成してスルホール接
続部を形成することにより、前記図１に示したような構
成の多層配線板が得られる。A through hole having a diameter of about 0.4 mm is formed in a predetermined position of the wiring-patterned wiring board by, for example, drilling. Thereafter, a chemical plating layer and an electroplating layer are sequentially formed on the inner wall surface of the drilled hole and the surface of the outer layer wiring pattern (including the via connection portion) to form a through hole connection portion, thereby forming a through hole connection portion as shown in FIG. A multilayer wiring board having such a configuration is obtained.
【００３５】前記構成のビア接続2aおよびスルホール接
続2bを有する多層配線板３を厚さ方向に切断し、配線パ
ターン1a，1b，1c，1d間の接続状態を観察したところ良
好な接続状態が確保されており、また、その接続2a，2b
の抵抗は平均 2 mΩであった。 さらに、前記配線パタ
ーン1a，1b，1c間の接続2aの信頼性を評価するため、ホ
ットオイルテストで（ 260℃のオイル中に10秒浸漬，20
℃のオイル中に20秒浸漬のサイクルを 1サイクルとし
て）、 100回行っても不良発生は認められず、従来の銅
メッキスルホール法による場合に比較して、導電（配
線）パターン間の接続信頼性は同等以上であった。The multilayer wiring board 3 having the via connection 2a and the through-hole connection 2b having the above-described configuration is cut in the thickness direction, and the connection state between the wiring patterns 1a, 1b, 1c, 1d is observed. Connection 2a, 2b
Had an average resistance of 2 mΩ. Further, in order to evaluate the reliability of the connection 2a between the wiring patterns 1a, 1b, and 1c, a hot oil test (immersion in 260 ° C. oil for 10 seconds,
No failure occurred even after 100 cycles of immersion in oil at 20 ° C for 1 second), and the reliability of connection between conductive (wiring) patterns was lower than that of the conventional copper plating through-hole method. Sex was equal or better.
【００３６】なお、前記多層配線板の製造においては、
外層の配線パターニングを行った後、スルホール接続部
2bを形成したが、貫通孔の穿設、スルホール導体層の形
成を行ってから、外層の配線パターニングを行っても、
同様に特性ないし信頼性の良好な多層配線板を得ること
ができる。In the production of the multilayer wiring board,
After patterning the wiring of the outer layer,
Although 2b was formed, after forming a through hole and forming a through-hole conductor layer, even if the outer layer wiring patterning is performed,
Similarly, a multilayer wiring board having excellent characteristics and reliability can be obtained.
【００３７】また、上記では、配線パターン1a，1bを成
す導体の曲成・突起化および曲成・突起内側を導電体2c
で充填した構成を示したが、導電体2cを誘電体に変えて
も、空間部の残存していないため、ビア接続2a面に他の
配線パターンの配置など行うことができる。In the above description, the conductors forming the wiring patterns 1a and 1b are bent and formed, and the inside of the bent and protrusions is formed by the conductor 2c.
However, even if the conductor 2c is changed to a dielectric, no space remains, so that another wiring pattern can be arranged on the surface of the via connection 2a.
【００３８】本発明は上記実施例に限定されるものでな
く、本発明の趣旨を逸脱しない範囲で、いろいろの変形
を採ることができる。たとえば突起を形成する導電性組
成物として、銅粉入りペースト（商品名，DDペースト
タツタ電線KK製）などを、また、介挿する絶縁体層とし
て、ポリイミド樹脂系ボンディングフィルムやガラス・
エポキシプリプレグ（商品名，ガラエポプリフレグHN
東芝ケミカルKK製）などを使用することができる。The present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, as a conductive composition for forming projections, a paste containing copper powder (trade name, DD paste)
And a polyimide resin based bonding film or glass
Epoxy prepreg (trade name, Gala-Epo Prefreg HN
Toshiba Chemical KK) can be used.
【００３９】[0039]
【発明の効果】請求項１〜４の発明によれば、充填・緻
密化された微細、かつ信頼性の高いビア接続を有するだ
けでなく、良好な耐湿性や機械的な強度などを呈すると
ともに、一括的に形成されたスルホール接続を備えてい
るので、低コストで高品質多層配線板が容易に提供され
る。According to the first to fourth aspects of the present invention, not only are the filled and densified fine and reliable via connections provided, but also good moisture resistance and mechanical strength are exhibited. Since the through hole connection formed integrally is provided, a high quality multilayer wiring board can be easily provided at low cost.
【００４０】請求項５〜６の発明によれば、上記低コス
トで高品質な多層配線板を、歩留まりよく、かつ量産的
に提供できる。According to the fifth and sixth aspects of the present invention, the low-cost and high-quality multilayer wiring board can be provided with high yield and mass production.
【図１】実施例に係る多層配線板の要部構成を示す拡大
断面図。FIG. 1 is an enlarged sectional view showing a configuration of a main part of a multilayer wiring board according to an embodiment.
【図２】実施例に係る多層配線板の製造例を模式的に示
すもので、 (a)はコア基板、絶縁体層、突起付き導電性
金属膜、当て板などの積層・配置状態を示す断面図、
(b)は積層体を加圧して一体化した状態を示す断面図。FIGS. 2A and 2B schematically show a production example of a multilayer wiring board according to an embodiment, and FIG. 2A shows a laminated / arranged state of a core substrate, an insulator layer, a conductive metal film with protrusions, a backing plate, and the like. Sectional view,
(b) is a cross-sectional view showing a state where the laminate is integrated by pressing.
1a，1b，1c，1d……配線パターン層 2a……ビア接続 2b……スルホール接続 2c……導電体 ３……多層配線板 ４……コア基板配線パターン 4a，4b……コア基板の配線パターン ５……銅箔（導電性金属膜） ６……導電性バンプ（突起） ７……絶縁体層 8a，8b……ステンレス鋼板（当て板） ９……シリコーンゴム板（緩衝板） 1a, 1b, 1c, 1d: Wiring pattern layer 2a: Via connection 2b: Through hole connection 2c: Conductor 3: Multilayer wiring board 4: Core board wiring pattern 4a, 4b: Core board wiring pattern 5 Copper foil (conductive metal film) 6 Conductive bump (projection) 7 Insulator layer 8a, 8b Stainless steel plate (backing plate) 9 Silicone rubber plate (buffer plate)
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 3/46 H05K 3/40 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 3/46 H05K 3/40
Claims (2)
接続端子を有するコア配線板、および絶縁体層を積層・
配置する工程と、前記絶縁体層面に、前記コア配線板の
被接続端子に対向する領域の裏面へ難変形性の突起が配
置された導電性金属膜を位置決め配置する工程と、前記
積層配置した導電性金属膜の突起形設面に、導電性金属
膜よりも硬質の他の当て板を積層・配置する工程と、前
記積層・配置した他の当て板を押圧・一体化して、前記
突起を導電性金属膜側に圧入して曲成・変形させ、突起
を内蔵形成した突起状先端部の絶縁体層貫挿によって、
対応するコア配線板の被接続端子面に対接させて電気的
に接続する工程と、 前記導電性金属膜張り積層板の所
定位置に、その厚さ方向に貫通する孔を穿設し、この貫
通孔内壁面に導電性のメッキ層を形成する工程と、前記
導電性金属膜を配線パターニングする工程とを有するこ
とを特徴とする多層配線板の製造方法。1. A buffer plate on one backing plate, and a cover plate on both sides.
Laminated core wiring board with connection terminals and insulator layer
Disposing, positioning and disposing, on the insulator layer surface, a conductive metal film having a non-deformable protrusion disposed on a back surface of a region facing the connected terminal of the core wiring board; A step of laminating and arranging another abutment plate harder than the conductive metal film on the projection-formed surface of the conductive metal film, and pressing and integrating the other laminated and arranged abutment plate to form the projection By press-fitting into the conductive metal film side to bend and deform, and penetrating the insulator layer at the protruding tip with built-in protrusion,
A step of contacting and electrically connecting to the connected terminal surface of the corresponding core wiring board; and forming a hole penetrating in a thickness direction at a predetermined position of the conductive metal film-clad laminate, A method for manufacturing a multilayer wiring board, comprising: a step of forming a conductive plating layer on an inner wall surface of a through-hole; and a step of wiring-patterning the conductive metal film.
接続端子を有するコア配線板、および絶縁体層を積層・
配置する工程と、前記絶縁体層面に、前記コア配線板の
被接続端子に対向する領域の裏面へ導電性で、かつ難変
形性の突起が配置された導電性金属膜を位置決め配置す
る工程と、 前記積層配置した導電性金属膜の突起形設
面に、導電性金属膜よりも硬質の他の当て板を積層・配
置する工程と、前記積層・配置した他の当て板を押圧・
一体化して、前記突起を導電性金属膜側に圧入して曲成
・変形させ、突起を内蔵形成した突起状先端部の絶縁体
層貫挿によって、対応するコア配線板の被接続端子面に
対接させて電気的に接続する工程と、 前記導電性金属
膜を配線パターニングする工程と、前記配線パターニン
グした積層板の所定位置に、その厚さ方向に貫通する孔
を穿設し、この貫通孔内壁面に導電性のメッキ層を形成
する工程とを有することを特徴とする多層配線板の製造
方法。2. A buffer plate on one backing plate and a cover on both sides.
Laminated core wiring board with connection terminals and insulator layer
Arranging, and positioning and arranging, on the insulator layer surface, a conductive metal film on which a conductive and hardly deformable projection is arranged on the back surface of a region facing the connected terminal of the core wiring board. A step of laminating and arranging another abutment plate harder than the conductive metal film on the protrusion-formed surface of the laminated and arranged conductive metal film, and pressing and pressing the other laminated and arranged abutment plate.
Integrally, the protrusion is press-fitted into the conductive metal film side to bend and deform, and the insulator layer is inserted through the protrusion-shaped tip portion having the protrusion formed therein, so that the protrusion is formed on the connected terminal surface of the corresponding core wiring board. Contacting and electrically connecting; wiring the conductive metal film; and forming a hole in a predetermined position of the wiring-patterned laminate in a thickness direction thereof. Forming a conductive plating layer on the inner wall surface of the hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20060597A JP3329699B2 (en) | 1997-07-25 | 1997-07-25 | Multilayer wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20060597A JP3329699B2 (en) | 1997-07-25 | 1997-07-25 | Multilayer wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1146065A JPH1146065A (en) | 1999-02-16 |
| JP3329699B2 true JP3329699B2 (en) | 2002-09-30 |
Family
ID=16427155
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20060597A Expired - Fee Related JP3329699B2 (en) | 1997-07-25 | 1997-07-25 | Multilayer wiring board and method of manufacturing the same |
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| Country | Link |
|---|---|
| JP (1) | JP3329699B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4735017B2 (en) * | 2005-04-19 | 2011-07-27 | 株式会社村田製作所 | Manufacturing method of multilayer ceramic substrate |
| JP4735018B2 (en) * | 2005-04-19 | 2011-07-27 | 株式会社村田製作所 | Multilayer ceramic substrate and manufacturing method thereof |
| JP4735016B2 (en) * | 2005-04-19 | 2011-07-27 | 株式会社村田製作所 | Multilayer ceramic substrate and manufacturing method thereof |
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1997
- 1997-07-25 JP JP20060597A patent/JP3329699B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1146065A (en) | 1999-02-16 |
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