JP3226745B2 - Semiconductor cold electron-emitting device and device using the same - Google Patents
Semiconductor cold electron-emitting device and device using the sameInfo
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- JP3226745B2 JP3226745B2 JP5009395A JP5009395A JP3226745B2 JP 3226745 B2 JP3226745 B2 JP 3226745B2 JP 5009395 A JP5009395 A JP 5009395A JP 5009395 A JP5009395 A JP 5009395A JP 3226745 B2 JP3226745 B2 JP 3226745B2
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- semiconductor
- electron
- emitting
- layer
- cold electron
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Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体による電子放出
素子に関するものである。さらに詳しくは、本発明は、
加熱を必要としない冷電子放出源として有用なだけでな
く、発光・電子放出機能集積素子としても有用な新規な
半導体素子に関するものである。具体的な利用分野は、
発光形フラットパネルディスプレイ素子（装置）、真空
マイクロエレクトロニクス素子（装置）、極高真空計測
用電子源等である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor electron-emitting device. More specifically, the present invention provides
The present invention relates to a novel semiconductor device that is useful not only as a cold electron emission source that does not require heating but also as a light emitting / electron emitting function integrated device. Specific fields of use are:
Light-emitting flat panel display devices (devices), vacuum microelectronic devices (devices), electron sources for ultra-high vacuum measurement, and the like.
【０００２】[0002]
【従来の技術】加熱を必要としない冷電子放出源につい
ては、従来から平面形発光ディスプレイ素子や真空マイ
クロエレクトロニクス素子などの電子放出源として、そ
の開発が望まれており、実際に種々の素子が提案・試作
されてきた。2. Description of the Related Art Development of a cold electron emission source which does not require heating has conventionally been desired as an electron emission source such as a flat light emitting display device or a vacuum microelectronic device. It has been proposed and prototyped.
【０００３】その代表的なものとして、金属又は半導体
の電界放出チップアレイ及びシリコンのｐｎ接合又はＭ
ＯＳ（Ｍｅｔａｌ−Ｏｘｉｄｅ−Ｓｅｍｉｃｏｎｄｕｃ
ｔｏｒ）の構造素子の２つが挙げられる。As typical examples, a metal or semiconductor field emission chip array and a silicon pn junction or M
OS (Metal-Oxide-Semiconductor)
tor).
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、前者の
電界放出チップアレイは、製作工程が複雑である。
電子放出特性が真空度に敏感である。安定な動作には
超高真空が必要である。動作電界が高いといった問題
がある。However, the former field emission chip array has a complicated manufacturing process.
The electron emission characteristics are sensitive to the degree of vacuum. Ultrahigh vacuum is required for stable operation. There is a problem that the operating electric field is high.
【０００５】また、後者のｐｎ接合およびＭＯＳの構造
素子は、集積回路作製に準じた多くの製作工程と装置
が必要である。素子構造のパラメータ（接合深さ、酸
化膜の厚さ等）の厳密制御の必要性がある等のため、コ
スト低減の点や応用範囲の面で大きな制約と限界があっ
た。[0005] The latter pn junction and MOS structural elements require many manufacturing steps and devices in conformity with integrated circuit fabrication. Because of the necessity of strict control of the parameters of the device structure (such as the junction depth and the thickness of the oxide film), there have been great restrictions and limitations in terms of cost reduction and application range.
【０００６】これらの問題を克服することは、冷電子放
出素子を本格的に進展させる上で不可欠である。また、
単なる電子放出機能だけではなく、付加的な機能をも兼
ね備えた冷電子放出素子を志向することも重要な技術課
題であると思われる。[0006] Overcoming these problems is indispensable for developing cold electron-emitting devices in earnest. Also,
It is also considered to be an important technical issue to aim for a cold electron-emitting device having not only an electron emission function but also an additional function.
【０００７】このような観点から、研究開発の現状を見
た場合、これまでのところ上記課題に応える提案は、ほ
とんどなされていないのが現状である。[0007] From the above point of view, looking at the current state of research and development, almost no proposals have been made so far to address the above problems.
【０００８】本発明は、以上の事情に鑑みてなされたも
のであり、冷電子放出素子の新しい展開を可能にすると
ともに、半導体応用分野の拡大を図り得る半導体冷電子
放出素子及びこれを用いた装置を提供することを目的と
している。The present invention has been made in view of the above circumstances, and enables a new development of a cold electron emitting device and a semiconductor cold electron emitting device capable of expanding the field of application of a semiconductor. It is intended to provide a device.
【０００９】[0009]
【課題を解決するための手段】本発明は、上記目的を達
成するために、 （１）半導体冷電子放出素子において、半導体基板と、
この半導体基板の表面を陽極酸化処理により多孔質化し
た、厚膜の単一層からなる多孔質半導体層と、この多孔
質半導体層上に形成される金属薄膜電極と、前記半導体
基板の裏面に形成されるオーミック電極と、前記金属薄
膜電極に対向して配置され、真空雰囲気でこの金属薄膜
電極からの放出電子を捕獲するコレクタ電極とを具備す
るようにしたものである。According to the present invention, there is provided a semiconductor cold electron emission device comprising: a semiconductor substrate;
The surface of the semiconductor substrate is made porous by anodizing treatment, a porous semiconductor layer composed of a single layer of a thick film , a metal thin film electrode formed on the porous semiconductor layer, and formed on the back surface of the semiconductor substrate. And a collector electrode arranged to face the metal thin-film electrode and capture electrons emitted from the metal thin-film electrode in a vacuum atmosphere.
【００１０】（２）上記（１）記載の半導体冷電子放出
素子は、面状又は点状の冷電子放出ダイオードである。( 2 ) The semiconductor cold electron-emitting device according to the above (1) is a planar or point-shaped cold electron-emitting diode.
【００１１】（３）上記（２）記載の半導体冷電子放出
素子を、半導体基板面上に多数配列し、それらを電子放
出源として利用する発光形フラットパネルディスプレイ
（素子）装置を得るようにしたものである。( 3 ) A large number of the semiconductor cold electron-emitting devices described in the above ( 2 ) are arranged on the surface of a semiconductor substrate, and a light-emitting flat panel display (device) device using them as an electron-emitting source is obtained. Things.
【００１２】[0012]
【作用】本発明は、半導体の陽極酸化処理によって形成
される多孔質半導体（例えば多孔質シリコン）が、量子
サイズ効果の発現により特異な電気的・光学的性質を示
すことに着目してなされたものである。The present invention has been made by paying attention to the fact that a porous semiconductor (for example, porous silicon) formed by anodizing a semiconductor exhibits specific electrical and optical properties due to the development of a quantum size effect. Things.
【００１３】本発明の半導体冷電子放出素子は、基本的
には多孔質半導体を高抵抗層として用いた一種のＭＩＳ
（Ｍｅｔａｌ−Ｉｎｓｕｌａｔｏｒ−Ｓｅｍｉｃｏｎｄ
ｕｃｔｏｒ）ダイオード構造の素子であり、金属薄膜／
多孔質半導体／半導体基板をその構成要素にしている。The semiconductor cold electron emission device of the present invention is basically a kind of MIS using a porous semiconductor as a high resistance layer.
(Metal-Insulator-Semicond
uctor) element having a diode structure and a metal thin film /
The component is a porous semiconductor / semiconductor substrate.
【００１４】そこで、半導体基板から注入された電子を
多孔質半導体中の電界で加速し、金属薄膜中をトンネル
効果によって通過させ真空中に放出させるようにしてい
る。Therefore, electrons injected from the semiconductor substrate are accelerated by an electric field in the porous semiconductor, pass through the metal thin film by a tunnel effect, and are emitted into a vacuum.
【００１５】本発明により、複雑な工程は不要であ
る。素子構成が単純である。大面積化・多画素化が
容易である。超高真空を必要としない。発光ダイオ
ードとしても機能する等の特徴を持つ冷電子放出素子を
実現することができる。According to the present invention, no complicated steps are required. The element configuration is simple. It is easy to increase the area and increase the number of pixels. Does not require ultra-high vacuum. A cold electron-emitting device having features such as functioning as a light-emitting diode can be realized.
【００１６】[0016]
【実施例】以下、本発明の実施例を図面を参照しながら
説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００１７】図１は本発明の実施例を示す半導体冷電子
放出素子の構成を示す図である。FIG. 1 is a diagram showing a configuration of a semiconductor cold electron emission device according to an embodiment of the present invention.
【００１８】この図に示すように、裏面にオーミック電
極をとった面方位（１１１）のｎ形シリコン基板（ｎ形
シリコンウエハ）（比抵抗が０．００１８Ωｃｍ）１表
面に、５０ｗｔ％ＨＦ水溶液とエタノールとの混合液
（混合比は１：１）中で定電流陽極酸化処理（電流密度
は１００ｍＡ／ｃｍ2 、時間は５ｍｉｎ）を施し、多孔
質シリコン層（以下、ＰＳ層という）２を形成する。陽
極酸化中には５００Ｗのタングステンランプにより試料
面を光照射する。ＰＳ層２の厚さは約４０μｍである。
作製したＰＳ層２の表面にＡｕ薄膜を真空蒸着し（厚さ
１５ｎｍ、直径６ｍｍの円形）、これを表面側の正電位
ＶPSにあるＡｕ薄膜電極３として裏面の接地電位にある
オーミック電極４との間でダイオードを形成する。As shown in FIG. 1, an n-type silicon substrate (n-type silicon wafer) (specific resistance: 0.0018 Ωcm) having a plane orientation of (111) with an ohmic electrode on the back surface is coated with a 50 wt% HF aqueous solution. A constant current anodic oxidation treatment (current density: 100 mA / cm 2 , time: 5 min) is performed in a mixed solution with ethanol (mixing ratio: 1: 1) to form a porous silicon layer (hereinafter, referred to as PS layer) 2. I do. During the anodization, the sample surface is irradiated with light by a 500 W tungsten lamp. The thickness of the PS layer 2 is about 40 μm.
An Au thin film is vacuum-deposited (circle having a thickness of 15 nm and a diameter of 6 mm) on the surface of the produced PS layer 2, and is used as an Au thin film electrode 3 having a positive potential V PS on the front surface side and an ohmic electrode 4 having a ground potential on the back surface. And a diode is formed between them.
【００１９】ここで、真空チャンバー１０を用いて、１
０-7Ｔｏｒｒの雰囲気におかれる。Here, using the vacuum chamber 10, 1
Place in an atmosphere of 0 -7 Torr.
【００２０】そこで、このダイオードのＡｕ薄膜電極３
に正電圧ＶPSを印加し、ｎ形シリコン基板１からＰＳ層
２に電子を注入する。その際の電流はＩPSである。その
場合、ＰＳ層２は高抵抗であるので、印加電界の大部分
はＰＳ層２にかかっているが、ＰＳ層２の表面には酸化
層が存在するため、図２のエネルギーバンド図に示すよ
うに、電界強度はＰＳ層２表面ほど強い。Therefore, the Au thin film electrode 3 of this diode
Is applied with a positive voltage V PS to inject electrons from the n-type silicon substrate 1 into the PS layer 2. The current at that time is I PS . In this case, since the PS layer 2 has a high resistance, most of the applied electric field is applied to the PS layer 2, but since an oxide layer exists on the surface of the PS layer 2, the energy band shown in FIG. As described above, the electric field strength is higher on the PS layer 2 surface.
【００２１】更に、ｎ形シリコン基板１から注入された
電子は、Ａｕ薄膜電極３側に向けてＰＳ層２を走行し、
Ａｕ薄膜電極３側に向かう。ＰＳ層２表面付近に達した
電子は、そこでの強電界により一部はＡｕ薄膜電極３を
トンネルし、真空チャンバー１０の１０-7Ｔｏｒｒの雰
囲気の真空中に放出される。放出された電子はＡｕ薄膜
電極３に対し数Ｖの正電圧Ｖｃを印加してあるコレクタ
電極５に集められる。その際の電流はＩEMである。Further, electrons injected from the n-type silicon substrate 1 travel through the PS layer 2 toward the Au thin-film electrode 3 side.
It goes to the Au thin film electrode 3 side. Some of the electrons that have reached the vicinity of the surface of the PS layer 2 tunnel through the Au thin-film electrode 3 due to the strong electric field there, and are emitted into the vacuum chamber 10 in a vacuum of 10 −7 Torr. The emitted electrons are collected by the collector electrode 5 to which a positive voltage Vc of several volts is applied to the Au thin film electrode 3. The current at that time is IEM .
【００２２】図３に放出電子流のＶPS依存性を示す。図
３において、１０-7Ｔｏｒｒの雰囲気で、横軸はＶ
PS（Ｖ）、縦軸は放出電子流（ｎＡ／ｃｍ2 ）を示す。FIG. 3 shows the V PS dependence of the emitted electron current. In FIG. 3, in an atmosphere of 10 −7 Torr, the horizontal axis represents V
PS (V), the vertical axis indicates the emitted electron current (nA / cm 2 ).
【００２３】電子放出はＶPSが正の領域のみで観測さ
れ、電圧の上昇とともに放出電子流は急激に増大する。
この放出電子流−電圧曲線の理論的な解析結果により、
電子放出がトンネル効果によるものであることが裏付け
られた。Electron emission is observed only in the region where V PS is positive, and the emitted electron current sharply increases as the voltage increases.
According to the theoretical analysis result of this emitted electron current-voltage curve,
It was confirmed that the electron emission was due to the tunnel effect.
【００２４】図１のコレクタ電極５に蛍光体を塗布し、
Ａｕ薄膜電極３とコレクタ電極５の間に約４ｋＶの電圧
を印加した状態でダイオードから電子放出をさせたとこ
ろ、Ａｕ薄膜電極３に対応する円形の均一な蛍光パター
ンが観測された。A phosphor is applied to the collector electrode 5 of FIG.
When electrons were emitted from the diode while a voltage of about 4 kV was applied between the Au thin film electrode 3 and the collector electrode 5, a circular uniform fluorescent pattern corresponding to the Au thin film electrode 3 was observed.
【００２５】このことは、ＰＳ層２からの電子放出が均
一であることを示すとともに、平面ディスプレイ素子の
電子源としての応用可能性を実証するものである。This shows that the electron emission from the PS layer 2 is uniform and also demonstrates the applicability of the flat display element as an electron source.
【００２６】本発明の平面ディスプレイへの応用例を図
４に示す。FIG. 4 shows an application example of the present invention to a flat display.
【００２７】この図において、１１はオーミック電極、
１２はシリコン基板、１３は多孔質シリコン層、１４は
薄膜電極、１５は信号供給源回路、１６は蛍光体、１７
は電子ビーム加速電圧を供給する電源、１８はガラス板
である。In this figure, 11 is an ohmic electrode,
12 is a silicon substrate, 13 is a porous silicon layer, 14 is a thin film electrode, 15 is a signal supply circuit, 16 is a phosphor, 17
Is a power supply for supplying an electron beam acceleration voltage, and 18 is a glass plate.
【００２８】この図に示すように、信号供給源回路１
５，１５から画像に応じた電気信号がＸ方向、Ｙ方向か
ら薄膜電極１４を通じて供給される。各交点（画素）で
は、供給された電圧に対応して、図１及び図２の原理に
基づいて電子が放出される。放出された電子は加速され
て蛍光体１６を発光させ、観測者はそのパターンを画像
として見ることができる。As shown in this figure, the signal supply circuit 1
Electric signals corresponding to the images are supplied from the X-ray direction and the Y-direction through the thin-film electrode from the thin-film electrodes. At each intersection (pixel), electrons are emitted based on the principle of FIGS. 1 and 2 corresponding to the supplied voltage. The emitted electrons are accelerated to cause the phosphor 16 to emit light, and the observer can see the pattern as an image.
【００２９】このディスプレイ素子はシリコン基板とガ
ラス基板を基本要素とするもので、薄形、かつ大面積に
構成できることを特徴としている。This display element has a silicon substrate and a glass substrate as basic elements, and is characterized in that it can be made thin and has a large area.
【００３０】また、多画素化も容易であり、高解像度も
期待できる。Further, it is easy to increase the number of pixels, and high resolution can be expected.
【００３１】なお、本発明の冷電子源による平面ディス
プレイの構成は、図４に限定されるものではなく、種々
の変形が可能である。例えば、シリコン基板側から一様
に放出させた電子流を画像に応じて強度変調するメッシ
ュ状グリッド電極をシリコン基板とガラス基板との中間
に配置する方法、図４の各画素にスイッチング用の能動
素子（トランジスタまたはダイオード）を配置する方法
などが考えられる。The configuration of the flat display using the cold electron source of the present invention is not limited to that shown in FIG. 4, and various modifications are possible. For example, a method in which a mesh grid electrode for intensity-modulating the electron flow uniformly emitted from the silicon substrate side in accordance with an image is arranged between the silicon substrate and the glass substrate, and each pixel in FIG. A method of arranging elements (transistors or diodes) can be considered.
【００３２】また、本願の発明者によって、既に特開平
４−３５６９７７号公報によって提案されているよう
に、本発明のダイオードは、電子放出と同時に可視光を
放出する発光ダイオードとしても動作させることができ
る。As already proposed by the inventor of the present application in Japanese Patent Application Laid-Open No. 4-356977, the diode of the present invention can be operated as a light emitting diode that emits visible light simultaneously with electron emission. it can.
【００３３】更に、上記実施例ではシリコンを基板とし
たものであるが、本発明はシリコンに限られたものでは
なく、陽極酸化を適用できる半導体は全て利用すること
ができる。Further, in the above embodiment, silicon is used as a substrate, but the present invention is not limited to silicon, and any semiconductor to which anodic oxidation can be applied can be used.
【００３４】すなわち、ゲルマニウム（Ｇｅ）、炭化シ
リコン（ＳｉＣ）、ヒ化ガリウム（ＧａＡｓ）、リン化
インジウム（ＩｎＰ）、セレン化カドミウム（ＣｄＳ
ｅ）など、IV族、III −Ｖ族、II−VI族などの単体及び
化合物半導体の多くが、これに該当する。That is, germanium (Ge), silicon carbide (SiC), gallium arsenide (GaAs), indium phosphide (InP), cadmium selenide (CdS)
e) and the like, and many elemental and compound semiconductors of the IV group, the III-V group, the II-VI group and the like fall under this category.
【００３５】以上述べたように、本発明は独自の半導体
構成要素によって新規の半導体冷電子放出素子及びそれ
を用いた装置を開発したもので、その応用範囲及び適用
範囲は極めて広い。As described above, the present invention has developed a novel semiconductor cold electron-emitting device and an apparatus using the same using unique semiconductor components, and its application range and application range are extremely wide.
【００３６】なお、本発明は上記実施例に限定されるも
のではなく、本発明の趣旨に基づいて種々の変形が可能
であり、これらを本発明の範囲から排除するものではな
い。It should be noted that the present invention is not limited to the above-described embodiment, and various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.
【００３７】[0037]
【発明の効果】以上、詳細に説明したように、本発明に
よれば、以下のような効果を奏することができる。As described above, according to the present invention, the following effects can be obtained.
【００３８】（Ａ）請求項１記載の発明によれば、複雑
な工程は不要であり、素子構成が単純な、半導体冷電子
放出素子を得ることができる。(A) According to the first aspect of the present invention, it is possible to obtain a semiconductor cold electron emission device having a simple device configuration without complicated steps.
【００３９】また、大面積化・多画素化が容易であり、
超高真空を必要としない。Further, it is easy to increase the area and increase the number of pixels.
Does not require ultra-high vacuum.
【００４０】より具体的には、多孔質シリコン層を電
子が走行する際の散乱損失が小さいことから、ホットエ
レクトロンがより効率的に生成される。More specifically, since the scattering loss when electrons travel through the porous silicon layer is small, hot electrons are generated more efficiently.
【００４１】その結果、電子放出効率が高く、放出さ
れる電子のエネルギーも高い。As a result, the electron emission efficiency is high and the energy of the emitted electrons is high.
【００４２】多孔質シリコン層を厚くできるため、素
子の形成および大面積化が容易であり、素子の動作信頼
性も高い。Since the thickness of the porous silicon layer can be increased, it is easy to form the device and increase the area, and the operation reliability of the device is high.
【００４３】（Ｂ）請求項２記載の発明によれば、上記
（Ａ）の効果を有する面状又は点状の冷電子放出ダイオ
ードを得ることができる。(B) According to the second aspect of the present invention, it is possible to obtain a planar or point-shaped cold electron emitting diode having the effect (A).
【００４４】（Ｃ）請求項３記載の発明によれば、上記
（Ｂ）の半導体冷電子放出素子を、半導体基板面上に多
数配列し、それらを電子放出源として利用する発光形フ
ラットパネルディスプレイ装置を得ることができる。(C) According to the third aspect of the present invention, a large number of the cold semiconductor electron-emitting devices of the above (B) are arranged on the surface of a semiconductor substrate, and these are used as an electron emission source. A device can be obtained.
【図１】本発明の実施例を示す半導体冷電子放出素子の
構成を示す図である。FIG. 1 is a diagram showing a configuration of a semiconductor cold electron emission device according to an embodiment of the present invention.
【図２】本発明の実施例を示す半導体冷電子放出素子の
エネルギーバンド図である。FIG. 2 is an energy band diagram of the semiconductor cold electron emission device according to the embodiment of the present invention.
【図３】本発明の実施例を示す半導体冷電子放出素子の
放出電子流のＶPS依存性を示す図である。FIG. 3 is a diagram showing the VPS dependence of the emitted electron current of the semiconductor cold electron emitting device according to the embodiment of the present invention.
【図４】本発明の実施例を示す平面ディスプレイ素子の
構成を示す図である。FIG. 4 is a diagram showing a configuration of a flat display element showing an embodiment of the present invention.
１ ｎ形シリコン基板（ｎ形シリコンウエハ） ２，１３ 多孔質シリコン層（ＰＳ層） ３ Ａｕ薄膜電極 ４，１１ オーミック電極 ５ コレクタ電極 １０ 真空チャンバー １２ シリコン基板 １４ 薄膜電極 １５ 信号供給源回路 １６ 蛍光体 １７ 電子ビーム加速電圧を供給する電源 １８ ガラス板 Reference Signs List 1 n-type silicon substrate (n-type silicon wafer) 2, 13 porous silicon layer (PS layer) 3 Au thin-film electrode 4, 11 ohmic electrode 5 collector electrode 10 vacuum chamber 12 silicon substrate 14 thin-film electrode 15 signal supply circuit 16 fluorescence Body 17 Power supply for supplying electron beam acceleration voltage 18 Glass plate
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平５−342995（ＪＰ，Ａ) 特開 平６−177020（ＪＰ，Ａ) 特開 平４−356977（ＪＰ，Ａ) 特開 平６−13653（ＪＰ，Ａ) 特開 平６−268260（ＪＰ，Ａ) Ｊｏｕｒｎａｌ ｏｆ Ｖａｃｕｕｍ Ｓｃｉｅｎｃｅ ＆ Ｔｅｃｈｎｏｌ ｏｇｙ Ｂ Ｖｏｌ．12，Ｎｏ．２, ｐ．662 Ａｐｐｌｉｅｄ Ｐｈｙｓｉｃｓ Ｌ ｅｔｔｅｒｓ Ｖｏｌ66，Ｎｏ．４, ｐ．422 (58)調査した分野(Int.Cl.7，ＤＢ名) H01J 31/12 H01L 33/00 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-5-342995 (JP, A) JP-A-6-177020 (JP, A) JP-A-4-356977 (JP, A) JP-A-6-356977 13653 (JP, A) JP-A-6-268260 (JP, A) Journal of Vacuum Science & Technolology B Vol. 12, No. 2, p. 662 Applied Physics Letters Vol 66, No. 4, p. 422 (58) Fields surveyed (Int. Cl. 7 , DB name) H01J 31/12 H01L 33/00
Claims (3)
化した、厚膜の単一層からなる多孔質半導体層と、 （ｃ）該多孔質半導体層上に形成される金属薄膜電極
と、 （ｄ）前記半導体基板の裏面に形成されるオーミック電
極と、 （ｅ）前記金属薄膜電極に対向して配置され、真空雰囲
気で該金属薄膜電極からの放出電子を捕獲するコレクタ
電極とを具備することを特徴とする半導体冷電子放出素
子。(A) a semiconductor substrate; (b) a thick single-layer porous semiconductor layer obtained by making the surface of the semiconductor substrate porous by anodizing treatment; and (c) the porous semiconductor layer. A metal thin film electrode formed on the layer; (d) an ohmic electrode formed on the back surface of the semiconductor substrate; and (e) a metal thin film electrode disposed opposite to the metal thin film electrode, and And a collector electrode for capturing the emitted electrons.
は、面状又は点状の冷電子放出ダイオードである半導体
冷電子放出素子。2. The semiconductor cold electron-emitting device according to claim 1, wherein the semiconductor cold electron-emitting device is a planar or point-shaped cold electron-emitting diode.
を、半導体基板面上に多数配列し、それらを電子放出源
として利用する発光形フラットパネルディスプレイ装
置。3. A light-emitting flat panel display device in which a large number of the semiconductor cold electron-emitting devices according to claim 2 are arranged on a semiconductor substrate surface, and these are used as electron-emitting sources.
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| JP5009395A JP3226745B2 (en) | 1995-03-09 | 1995-03-09 | Semiconductor cold electron-emitting device and device using the same |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5009395A JP3226745B2 (en) | 1995-03-09 | 1995-03-09 | Semiconductor cold electron-emitting device and device using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08250766A JPH08250766A (en) | 1996-09-27 |
| JP3226745B2 true JP3226745B2 (en) | 2001-11-05 |
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| JP5009395A Expired - Fee Related JP3226745B2 (en) | 1995-03-09 | 1995-03-09 | Semiconductor cold electron-emitting device and device using the same |
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