JP3120000B2 - Method of forming electrode on projecting portion of substrate - Google Patents
Method of forming electrode on projecting portion of substrateInfo
- Publication number
- JP3120000B2 JP3120000B2 JP17714994A JP17714994A JP3120000B2 JP 3120000 B2 JP3120000 B2 JP 3120000B2 JP 17714994 A JP17714994 A JP 17714994A JP 17714994 A JP17714994 A JP 17714994A JP 3120000 B2 JP3120000 B2 JP 3120000B2
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- JP
- Japan
- Prior art keywords
- substrate
- photoresist
- end surface
- projecting portion
- ohmic electrode
- Prior art date
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- Expired - Lifetime
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Optical Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
Description
【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION
【０００１】[0001]
【産業上の利用分野】この発明は、半導体デバイスにお
ける段差構造基板、特に突状部付き基板の突状部上に電
極を形成する方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an electrode on a projecting portion of a substrate having a stepped structure in a semiconductor device, particularly a substrate having a projecting portion.
【０００２】[0002]
【従来の技術】従来、半導体デバイスの突状部付き基板
の突状部の電極の形成方法としては、たとえば、文献：
「アプライド．フィジックス．レター（Ａｐｐｌ．Ｐｈ
ｙｓ．Ｌｅｔｔ．）．1991,Vol.58,No.21,p.2326-2328
」に開示されているような方法が知られている。2. Description of the Related Art Conventionally, as a method of forming an electrode of a protruding portion of a substrate having a protruding portion of a semiconductor device, for example, the following documents are known:
"Applied Physics Letter (Appl. Ph.
ys. Lett. ). 1991, Vol. 58, No. 21, p. 2326-2328
Are known.
【０００３】この従来の形成方法によれば、基板（半導
体ウエハ）上に、形成したい電極のパターンに合わせて
ホトレジストを塗布した後、基板の上側の全面に、オー
ミック電極を蒸着により設け、然る後、リフトオフ法を
用いてホトレジストおよびその上部のオーミック電極を
除去している。リフトオフ法を用いるために、オーミッ
ク電極の側面は凹凸状になる。その後、残ったオーミッ
ク電極をエッチングマスクとして基板をドライエッチン
グすることにより突状部付き基板を形成する。突状部の
側壁はオーミック電極側面（または端面ともいう。）を
転写するので、同様に凹凸状の面すなわち粗面になる。According to this conventional forming method, after a photoresist is applied on a substrate (semiconductor wafer) in accordance with the pattern of an electrode to be formed, an ohmic electrode is provided on the entire upper surface of the substrate by vapor deposition. Thereafter, the photoresist and the ohmic electrode on the photoresist are removed by a lift-off method. Since the lift-off method is used, the side surface of the ohmic electrode becomes uneven. After that, the substrate with protrusions is formed by dry-etching the substrate using the remaining ohmic electrode as an etching mask. Since the side wall of the protruding portion transfers the side surface (or also referred to as an end surface) of the ohmic electrode, the side surface becomes similarly uneven, that is, a rough surface.
【０００４】つまり、従来は、まず最初に突状部の電極
にあたるオーミック電極を設け、それに合わせて突状部
付き基板すなわち段差構造基板を形成する方法であっ
た。That is, conventionally, there has been a method in which an ohmic electrode corresponding to the electrode of the projection is first provided, and a substrate with a projection, that is, a step structure substrate is formed in accordance therewith.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、従来
の、半導体デバイスにおける突状部付き基板すなわち段
差構造基板の突状部の電極の形成方法には、以下のよう
な問題点があった。However, the conventional method for forming a protruding portion of a substrate having a protruding portion in a semiconductor device, that is, a protruding portion of a stepped substrate has the following problems.
【０００６】まず、突状部付き基板の突状部の電極にあ
たるオーミック電極を、リフトオフ法により設けている
が、その方法では電極の端面（側面）が凹凸状になって
しまう。そのオーミック電極をドライエッチングマスク
として、基板（半導体ウエハ）を段差構造に形成する
と、ドライエッチング側壁つまり段差構造の側壁に凹凸
形状がそのまま転写され、この側壁が滑らかな鏡面とな
らない。段差構造の側壁が凹凸状であると、この基板を
光導波路デバイス（半導体レーザ等）に応用することが
できず、したがって、この基板の利用範囲が狭いという
欠点がある。First, an ohmic electrode corresponding to the electrode of the projecting portion of the substrate with a projecting portion is provided by a lift-off method. However, in this method, the end face (side surface) of the electrode becomes uneven. When the substrate (semiconductor wafer) is formed in a stepped structure using the ohmic electrode as a dry etching mask, the uneven shape is transferred as it is to the dry etching side wall, that is, the side wall of the stepped structure, and the side wall does not have a smooth mirror surface. If the side wall of the step structure is uneven, this substrate cannot be applied to an optical waveguide device (semiconductor laser or the like), and therefore, there is a disadvantage that the use range of this substrate is narrow.
【０００７】しかし、微細なパターンを形成するとき、
あるいは通常の化学エッチングが困難な金属のパターン
を形成するとき等、リフトオフ法は欠かせない技術とな
っている。However, when forming a fine pattern,
Alternatively, the lift-off method is an indispensable technique for forming a metal pattern which is difficult to perform normal chemical etching.
【０００８】そこで、従来より、段差構造基板の突状部
の電極を一般的に普及しているリフトオフ法を用いて設
けても、段差構造の側壁が凹凸状とならないような形成
方法の出現が望まれていた。In view of the above, there has emerged a formation method in which the side walls of the step structure do not have an uneven shape even if the electrodes of the projecting portions of the step structure substrate are provided by using the lift-off method which is generally widely used. Was desired.
【０００９】[0009]
【課題を解決するための手段】このため、この発明の、
半導体デバイスにおける基板の突状部の電極の形成方法
によれば、以下のような工程上の特徴を有する。According to the present invention, there is provided:
According to the method of forming an electrode at a protruding portion of a substrate in a semiconductor device, the following process features are provided.
【００１０】（ａ）基板表面上に突状部形成のための酸
化膜パターンを設ける。(A) An oxide film pattern for forming a projection is provided on the substrate surface.
【００１１】（ｂ）この酸化膜パターンをエッチングマ
スクとして用いて、基板の一部分を基板表面側からドラ
イエッチングして、突状部付き基板を形成する。(B) Using this oxide film pattern as an etching mask, a part of the substrate is dry-etched from the substrate surface side to form a substrate with protrusions.
【００１２】（ｃ）突状部付き基板上の全面にホトレジ
ストを塗布する。(C) A photoresist is applied to the entire surface of the substrate having the protrusions.
【００１３】（ｄ）紫外光照射と現像処理により、ホト
レジストのうち突状部の上端面の上側にある部分を、ホ
トレジストの表面から突状部の上端面にいたるまで除去
し、突状部の上端面を露出させる。(D) A portion of the photoresist above the upper end surface of the protrusion is removed from the surface of the photoresist to the upper end surface of the protrusion by irradiation with ultraviolet light and a developing process. Expose the top surface.
【００１４】（ｅ）ホトレジストのうち、紫外光の未露
光部分を残したまま、真空蒸着により突状部付き基板の
上側全面にオーミック電極層を設ける。(E) An ohmic electrode layer is provided on the entire upper surface of the substrate with protrusions by vacuum deposition while leaving the unexposed portion of the photoresist unexposed to ultraviolet light.
【００１５】（ｆ）工程（ｅ）の未露光部分およびこの
未露光部分上のオーミック電極層をリフトオフ法により
除去し、突状部の上端面上のみに電極層の部分をオーミ
ック電極として残存形成する。(F) The unexposed portion in step (e) and the ohmic electrode layer on the unexposed portion are removed by a lift-off method, and the electrode layer portion is left only as an ohmic electrode only on the upper end surface of the projection. I do.
【００１６】また、この発明の好適実施例によれば、工
程（ｃ）のときに、突状部付き基板を埋め込むように突
状部よりも厚く、かつ上部が平坦になるようにホトレジ
ストを塗布するのが良い。According to a preferred embodiment of the present invention, at the time of the step (c), a photoresist is applied so as to embed the substrate with the protrusion and to be thicker than the protrusion and to make the upper part flat. Good to do.
【００１７】この発明の好適実施例によれば、好ましく
は、工程（ｄ）のときに、突状部の上端面よりも広く
て、この上端面を覆う広さの領域の透光部を有するガラ
スマスクを用いるのが良い。According to a preferred embodiment of the present invention, preferably, in the step (d), the projection has a light-transmitting portion which is wider than the upper end surface of the projecting portion and has an area large enough to cover the upper end surface. It is preferable to use a glass mask.
【００１８】[0018]
【作用】上述したこの発明の、半導体デバイスにおける
段差構造基板の突状部の電極形成方法によれば、まず、
基板（半導体ウエハ）上に酸化膜パターンを設ける。こ
のことにより、この酸化膜パターンをエッチングマスク
とすることができる。また、この酸化膜パターンをエッ
チングマスクとして用いて基板の一部分を表面側からド
ライエッチングし、突状部を有する段差構造基板を形成
する。このドライエッチングにより突状部を形成してい
るので、段差構造基板の突状部の側壁を滑らかな鏡面に
することができる。According to the above-described method for forming an electrode on a projecting portion of a step structure substrate in a semiconductor device according to the present invention, first,
An oxide film pattern is provided on a substrate (semiconductor wafer). Thus, this oxide film pattern can be used as an etching mask. Further, a part of the substrate is dry-etched from the front side using the oxide film pattern as an etching mask to form a stepped substrate having a projecting portion. Since the protruding portion is formed by the dry etching, the side wall of the protruding portion of the step structure substrate can have a smooth mirror surface.
【００１９】次に、段差構造基板上の全面にホトレジス
トを塗布する。このとき、この段差構造基板を埋め込む
ように、突状部の高さよりも厚くホトレジストを塗布す
るのが良い。また、このホトレジストに、上方から紫外
光を照射した後現像処理をすることにより、ホトレジス
トのうち段差構造基板の突状部の上端面上の部分のみを
選択的に感光させることができる。このことにより、段
差構造基板の突状部の電極にあたる、オーミック電極を
形成するための開口パターンを得ることができる。さら
にこのとき、段差構造基板突状部の上端面よりもわずか
に広くてこの上端面を覆う広さの領域からなる透光部を
有するガラスマスクを用いると、マスク合わせが容易に
なる。Next, a photoresist is applied to the entire surface of the step structure substrate. At this time, it is preferable to apply a photoresist thicker than the height of the protruding portion so as to bury the step structure substrate. Further, by irradiating the photoresist with ultraviolet light from above and then performing development processing, it is possible to selectively expose only the portion of the photoresist on the upper end surface of the projecting portion of the step structure substrate. This makes it possible to obtain an opening pattern for forming an ohmic electrode, which corresponds to the electrode of the projecting portion of the step structure substrate. Further, at this time, if a glass mask having a light-transmitting portion that is slightly wider than the upper end surface of the step-shaped substrate projecting portion and covers the upper end surface is used, mask alignment becomes easier.
【００２０】また、このホトレジストのうち、紫外光の
未露光部分のレジスト（未露光ホトレジスト）を残した
まま、真空蒸着により段差構造基板の上側全面にオーミ
ック電極層を設ける。その後、この未露光ホトレジスト
およびその上のオーミック電極層の部分を溶剤により除
去（リフトオフ）することで突状部のみにオーミック電
極を設けることができる。In addition, an ohmic electrode layer is provided on the entire upper surface of the step structure substrate by vacuum evaporation while leaving the photoresist of the unexposed portion of the ultraviolet light (unexposed photoresist) in the photoresist. Thereafter, by removing (lifting off) the unexposed photoresist and the portion of the ohmic electrode layer thereon with a solvent, the ohmic electrode can be provided only on the projecting portions.
【００２１】[0021]
【実施例】以下、図面を参照して、この発明の実施例に
つき説明する。なお、各図は、発明が理解できる程度に
形状、大きさおよび配置関係を概略的に示してあるにす
ぎない。また、以下の説明において、特定の材料および
条件等を用いるが、これらは好適例の一つにすぎず、し
たがって、この発明では何らこれに限定されるものでは
ない。また、断面を表すハッチング等は一部分を除き省
略する。Embodiments of the present invention will be described below with reference to the drawings. In addition, each figure merely shows the shape, the size, and the positional relationship schematically so that the invention can be understood. In the following description, specific materials and conditions are used, but these are only one of preferred examples, and therefore, the present invention is not limited thereto. Also, hatching or the like representing a cross section is omitted except for a part.
【００２２】＜第一実施例＞図１の（Ａ）〜（Ｄ）と図
２の（Ａ）〜（Ｄ）は、この発明の、半導体デバイスの
段差構造突状部電極形成の第一実施例の説明図である。<First Embodiment> FIGS. 1A to 1D and FIGS. 2A to 2D show a first embodiment of a stepped structure electrode formation of a semiconductor device according to the present invention. It is explanatory drawing of an example.
【００２３】まず、基板（半導体ウエハ）１０上に酸化
膜パターン１２を設ける。このため、この実施例では、
ＣＶＤ（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉ
ｔｉｏｎ）法を用いて酸化膜（ＳｉＯ2 膜）を３００ｎ
ｍ程度の層厚で基板１０上全面に設ける（図示せず）。
その後、ホトリソグラフィ工程により上述のＳｉＯ2膜
を、突状部を形成すべき領域にパターン形成する（図１
の（Ａ））。First, an oxide film pattern 12 is provided on a substrate (semiconductor wafer) 10. Therefore, in this embodiment,
CVD (Chemical Vapor Deposi)
oxide film (SiO 2 film) by 300 n
A layer thickness of about m is provided on the entire surface of the substrate 10 (not shown).
After that, the above-mentioned SiO 2 film is patterned by photolithography in a region where a protrusion is to be formed (FIG. 1).
(A)).
【００２４】次に、形成した酸化膜パターン１２をエッ
チングマスクとして用いて基板１０を塩素系のガスある
いはメタン系のガスでドライエッチングする。このエッ
チングは基板１０の表面から、基板の厚み方向に沿って
基板の一部分に対して行う。このエッチングにより、基
板残部には酸化膜パターン１２の平面形状が転写された
断面形状を有する突状部２０が形成され、したがって突
状部付き基板すなわち段差構造基板１０ａが形成される
（図１の（Ｂ））。その後、フッ素系のエッチング液に
より酸化膜パターン１２を除去し、段差構造基板１０ａ
を残存させる（図１の（Ｃ））。この突状部の形成はエ
ッチング技術を用いて行っているので、突状部２０の側
壁２０ａは滑らかな鏡面となっている。次に、上述の、
段差構造基板１０ａ上の全面にホトレジスト１４を塗布
する（図１の（Ｄ））。このとき、ホトレジスト１４は
段差構造基板１０ａを埋め込むように突状部２０の高さ
よりも厚く、しかもその上面は平坦になるように塗布す
る。Next, the substrate 10 is dry-etched with a chlorine-based gas or a methane-based gas using the formed oxide film pattern 12 as an etching mask. This etching is performed on a part of the substrate from the surface of the substrate 10 along the thickness direction of the substrate. By this etching, a projecting portion 20 having a cross-sectional shape obtained by transferring the planar shape of the oxide film pattern 12 is formed in the remaining substrate, and thus a substrate with a projecting portion, that is, a step structure substrate 10a is formed. (B)). Thereafter, the oxide film pattern 12 is removed with a fluorine-based etchant, and the step structure substrate 10a is removed.
(FIG. 1 (C)). Since the projection is formed by using the etching technique, the side wall 20a of the projection 20 has a smooth mirror surface. Next, as described above,
A photoresist 14 is applied on the entire surface of the step structure substrate 10a (FIG. 1D). At this time, the photoresist 14 is applied so as to be embedded in the step structure substrate 10a so as to be thicker than the height of the projecting portion 20 and the upper surface thereof is flat.
【００２５】次に、ホトレジスト１４に紫外光３０を照
射することにより、ホトレジスト１４のうち段差構造の
突状部２０の上端面の上側にあるホトレジスト部分を、
ホトレジストの表面から突状部の上端面にいたるまで除
去する。このため、この実施例では、まず、ホトレジス
ト１４に、その上方から全面にわたり実質的に均等に紫
外光３０を照射する（図２の（Ａ））。その後、現像液
でホトレジストを現像すると、ホトレジストの表面から
突状部２０の上端面２０ｂにいたるまでの厚さでホトレ
ジスト部分が除去される（図２の（Ｂ））。ここで、露
光しないで残ったホトレジストの未露光部分を１４ａで
示すが、この未露光ホトレジスト１４ａの上面は突状部
２０の上端面２０ｂの高さとほぼ同一であって、そろっ
ている。なお、このとき上端面２０ｂ上にホトレジスト
が多少残留する場合もあるが、そのときには、好ましく
は、酸素ガスによるプラズマエッチングにより、実質的
に影響を受けない程度に完全に、残留ホトレジストを除
去することができる。Next, by irradiating the photoresist 14 with ultraviolet light 30, a portion of the photoresist 14 above the upper end surface of the projecting portion 20 having the step structure is removed.
The photoresist is removed from the surface of the photoresist to the upper end surface of the protrusion. For this reason, in this embodiment, first, the photoresist 14 is irradiated with ultraviolet light 30 substantially uniformly over the entire surface from above (FIG. 2A). Thereafter, when the photoresist is developed with a developing solution, the photoresist is removed in a thickness from the surface of the photoresist to the upper end surface 20b of the protrusion 20 (FIG. 2B). Here, the unexposed portion of the photoresist which has not been exposed is indicated by 14a. The upper surface of the unexposed photoresist 14a is almost the same as the height of the upper end surface 20b of the projecting portion 20, and is uniform. At this time, some photoresist may remain on the upper end surface 20b. In this case, it is preferable to completely remove the remaining photoresist by plasma etching with oxygen gas to such an extent that the photoresist is not substantially affected. Can be.
【００２６】次に、露光しないで残っている、未露光ホ
トレジスト１４ａおよび上端面２０ｂ上全面にわたり、
真空蒸着によりオーミック電極層１６を設ける（図２の
（Ｃ））。Next, over the entire surface of the unexposed photoresist 14a and the upper end surface 20b remaining without being exposed,
An ohmic electrode layer 16 is provided by vacuum deposition (FIG. 2C).
【００２７】次に、未露光ホトレジスト１４ａをアセト
ン、あるいはジメチルホルムアミド等の有機溶剤中に入
れて除去することによって、その上部のオーミック電極
層１６を、いわゆるリフトオフ法により除去し、突状部
２０の上端面２０ｂ上のみにオーミック電極１６ａを残
存形成する（図２の（Ｄ））。このように、この実施例
では、オーミック電極１６ａをリフトオフ法によって形
成している。Next, by removing the unexposed photoresist 14a in an organic solvent such as acetone or dimethylformamide, the ohmic electrode layer 16 on the unexposed photoresist 14a is removed by a so-called lift-off method. The ohmic electrode 16a is left and formed only on the upper end surface 20b (FIG. 2D). Thus, in this embodiment, the ohmic electrode 16a is formed by the lift-off method.
【００２８】＜第二実施例＞図１の（Ａ）〜（Ｄ）と図
３の（Ａ）〜（Ｄ）は、この発明の第二実施例の説明図
である。なお、基板１０を段差構造基板１０ａに形成し
た後、ホトレジスト１４を塗布する工程（図１の（Ａ）
〜（Ｄ）の工程）は第一実施例と同一の工程であるた
め、説明を省略する。<Second Embodiment> FIGS. 1A to 1D and 3A to 3D are explanatory views of a second embodiment of the present invention. After forming the substrate 10 on the step structure substrate 10a, a step of applying a photoresist 14 (FIG. 1A)
Steps (D) to (D) are the same steps as those in the first embodiment, and thus description thereof is omitted.
【００２９】図１の（Ｄ）の工程の後、ホトレジスト１
４に紫外光３０を照射することにより、ホトレジスト１
４のうち段差構造の突状部２０の上端面２０ｂの上側の
ホトレジスト部分を感光させる。このため、この実施例
では、まず、ガラスマスク３２を用意する。ガラスマス
ク３２の透光部３２ａは、紫外光３０を通す透光性の部
分で、この透光部３２ａ領域は、突状部２０の上端面２
０ｂの領域よりもやや広くて、この上端面２０ｂを覆う
ことができる程度の大きさとする。例えば、図３の
（Ａ）に示される断面で見ると、その透光部３２ａの幅
は突状部２０の幅よりもやや広いものとする。なお、こ
の実施例では、透光部３２ａ以外のマスク部分３２ｂを
非透光性とする。そして、このガラスマスク３２と、ホ
トレジスト１４を塗布した段差構造基板１０ａとのマス
ク合わせを行う。その後、紫外光３０を照射し、ガラス
マスク３２の透光部３２ａを通して、ホトレジスト１４
を感光させる（図３の（Ａ））。After the step of FIG. 1D, the photoresist 1
4 is irradiated with ultraviolet light 30 so that the photoresist 1
4, a photoresist portion above the upper end surface 20b of the projecting portion 20 having the step structure is exposed. Therefore, in this embodiment, first, the glass mask 32 is prepared. The light transmitting portion 32 a of the glass mask 32 is a light transmitting portion through which the ultraviolet light 30 passes, and the light transmitting portion 32 a
The upper end surface 20b is slightly larger than the region of 0b and is large enough to cover the upper end surface 20b. For example, in the cross section shown in FIG. 3A, the width of the light transmitting portion 32a is slightly larger than the width of the projecting portion 20. In this embodiment, the mask portion 32b other than the light transmitting portion 32a is made non-light transmitting. Then, mask alignment between the glass mask 32 and the step structure substrate 10a coated with the photoresist 14 is performed. Thereafter, the photoresist 14 is irradiated with ultraviolet light 30 and passes through the light transmitting portion 32 a of the glass mask 32.
(FIG. 3A).
【００３０】透光部３２ａからホトレジスト１４内に入
った光は、ホトレジスト１４を感光しながら鉛直下向き
に入っていき、突状部２０の上端面２０ｂ上に到達する
と反射をして再びその上部のホトレジスト内に戻るの
で、突状部２０周辺に比べて早く感光する。このとき、
周知のとおり露光時間を調節すれば、突状部２０の上端
面２０ｂ上のホトレジスト部分のみを感光させ、この感
光されたホトレジスト部分を現像した後除去して開口パ
ターン１８を形成することができる（図３の（Ｂ））。
このとき、突状部２０の上端面２０ｂ上以外のホトレジ
スト部分は、図３の（Ｂ）に示すように、未露光ホトレ
ジスト１４ｂとして残存する。The light that has entered the photoresist 14 from the light transmitting portion 32a enters the photoresist 14 vertically downward while sensitizing the photoresist 14, and when it reaches the upper end surface 20b of the protruding portion 20, it is reflected and again reflected on the upper portion thereof. Since it returns to the inside of the photoresist, the photosensitive material is exposed earlier than in the vicinity of the protrusion 20. At this time,
As is well known, if the exposure time is adjusted, only the photoresist portion on the upper end surface 20b of the protrusion 20 is exposed, and the exposed photoresist portion is developed and removed to form the opening pattern 18 ( ((B) of FIG. 3).
At this time, the photoresist portion other than on the upper end surface 20b of the protrusion 20 remains as the unexposed photoresist 14b as shown in FIG.
【００３１】次に、未露光ホトレジスト１４ｂを残した
まま、真空蒸着により段差構造基板１０ａの上側全面に
オーミック電極層１６を設ける（図３の（Ｃ））。Next, an ohmic electrode layer 16 is provided on the entire upper surface of the step structure substrate 10a by vacuum evaporation while leaving the unexposed photoresist 14b (FIG. 3C).
【００３２】その後、段差構造基板１０ａをアセトンあ
るいはメチルホルムアミド等の有機溶剤中に入れて、未
露光ホトレジスト１４ｂおよびその上部のオーミック電
極層部分を除去する。このようにリフトオフ法を用いて
オーミック電極１６ａを形成することができる（図３の
（Ｄ））。Thereafter, the step-structured substrate 10a is placed in an organic solvent such as acetone or methylformamide to remove the unexposed photoresist 14b and the ohmic electrode layer thereon. Thus, the ohmic electrode 16a can be formed by using the lift-off method (FIG. 3D).
【００３３】[0033]
【発明の効果】上述した説明からも明らかなように、こ
の発明の、半導体デバイスの段差構造突状部の電極形成
方法によれば、基板上に酸化膜パターンを設け、この酸
化膜パターンをエッチングマスクとして用いて基板をド
ライエッチングし、段差構造基板の突状部を形成する。
このことにより、段差構造の側壁を滑らかな鏡面にする
ことができる。As is clear from the above description, according to the method for forming an electrode of a stepped portion of a semiconductor device according to the present invention, an oxide film pattern is provided on a substrate, and the oxide film pattern is etched. The substrate is dry-etched using as a mask to form a projecting portion of the step structure substrate.
Thereby, the side wall of the step structure can be made a smooth mirror surface.
【００３４】次に、段差構造基板を埋め込むように突状
部の高さよりも厚く、しかも上面が平坦になるようにホ
トレジストを塗布した後、このホトレジストに、上部か
ら紫外光を照射し、然る後、ホトレジストの現像を行
い、ホトレジストのうち少なくとも段差構造の突状部の
上端面上のホトレジスト部分を除去し、突状部の周辺の
ホトレジスト部分を残す。このことにより、リフトオフ
法を用いて段差構造突状部の上端面上に突状部側壁の鏡
面を損なうことなく、オーミック電極を形成することが
できる。Next, a photoresist is applied so as to bury the step structure substrate so as to be thicker than the height of the protruding portion and to make the upper surface flat, and then the photoresist is irradiated with ultraviolet light from above, and Thereafter, the photoresist is developed to remove at least a portion of the photoresist on the upper end surface of the protrusion having the step structure, thereby leaving a portion of the photoresist around the protrusion. This makes it possible to form an ohmic electrode on the upper end surface of the step structure protrusion by using the lift-off method without damaging the mirror surface of the protrusion side wall.
【００３５】また、突状部をエッチング形成した後、こ
の突状部上に電極を形成するこの発明の方法では、段差
構造の突状部の上端面が平坦でなくても、たとえば凸凹
状であってもオーミック電極を設けることができる。Further, according to the method of the present invention in which an electrode is formed on the protruding portion after the protruding portion is formed by etching, even if the upper end surface of the protruding portion of the step structure is not flat, for example, it may be formed in an uneven shape. However, an ohmic electrode can be provided.
【００３６】さらにホトレジストを感光させる時に用い
るガラスマスクにおいて、特にその透光部の領域の大き
さを、段差構造基板の突状部の上端面よりも広くとって
おけば、マスク合わせが容易となり、このため、例えば
突状部幅が数μｍ以下の段差構造基板の場合でも、突状
部上にリフトオフ法によりオーミック電極を設けること
ができる。Further, in the glass mask used for exposing the photoresist, if the size of the region of the light-transmitting portion is made larger than the upper end surface of the projecting portion of the step structure substrate, the mask can be easily aligned. For this reason, for example, even in the case of a step structure substrate having a protrusion having a width of several μm or less, an ohmic electrode can be provided on the protrusion by a lift-off method.
【００３７】つまり、従来のように、オーミック電極を
エッチングマスクとして段差構造基板を形成するのでは
なく、予め酸化膜パターンを設けてそれをエッチングマ
スクとして段差構造基板の突状部を形成し、その後にこ
の突状部上にオーミック電極を形成する。このため、リ
フトオフ法を用いてオーミック電極を設けても、段差構
造突状部の側壁は滑らかな鏡面を有したものとすること
ができる。よって、光導波路デバイスに応用するなど、
利用分野を広げることが可能である。That is, instead of forming a step structure substrate using an ohmic electrode as an etching mask as in the prior art, an oxide film pattern is provided in advance, and a projection of the step structure substrate is formed using the oxide film pattern as an etching mask. An ohmic electrode is formed on the protrusion. For this reason, even if the ohmic electrode is provided by using the lift-off method, the side wall of the step structure projecting portion can have a smooth mirror surface. Therefore, such as application to optical waveguide devices,
It is possible to expand the field of application.
【図１】この発明の、第一および第二実施例に共通する
工程の概略説明図である。FIG. 1 is a schematic explanatory view of steps common to the first and second embodiments of the present invention.
【図２】図１に続く、この発明の第一実施例に供する工
程の説明図である。FIG. 2 is an explanatory view of a step provided in the first embodiment of the present invention, following FIG. 1;
【図３】図１に続く、この発明の第二実施例に供する工
程の説明図である。FIG. 3 is an explanatory view of a step provided in the second embodiment of the present invention, following FIG. 1;
１０：基板（半導体ウエハ） １０ａ：突状部付き基板（段差構造基板） １２：酸化膜（ＳｉＯ2 膜）パターン １４：ホトレジスト １４ａ、１４ｂ：未露光ホトレジスト １６：オーミック電極層 １６ａ：オーミック電極 １８：開口パターン ２０：突状部 ２０ａ：突状部側壁 ２０ｂ：突状部上端面 ３０：紫外光 ３２：ガラスマスク ３２ａ：透光部 ３２ｂ：非透光性マスク部分Reference Signs List 10: Substrate (semiconductor wafer) 10a: Substrate with projection (stepped substrate) 12: Oxide film (SiO 2 film) pattern 14: Photoresist 14a, 14b: Unexposed photoresist 16: Ohmic electrode layer 16a: Ohmic electrode 18: Opening pattern 20: Projecting portion 20a: Projecting portion side wall 20b: Projecting portion upper end surface 30: Ultraviolet light 32: Glass mask 32a: Light transmitting portion 32b: Non-light transmitting mask portion
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平４−278531（ＪＰ，Ａ) 特開 昭60−8820（ＪＰ，Ａ) 特開 昭54−46468（ＪＰ，Ａ) 特開 昭64−57734（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/28 - 21/288 H01L 21/3205 - 21/3213 H01L 21/768 H01L 6/12 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-278531 (JP, A) JP-A-60-8820 (JP, A) JP-A-54-46468 (JP, A) JP-A 64-64 57734 (JP, A) (58) Field surveyed (Int. Cl. 7 , DB name) H01L 21/28-21/288 H01L 21/3205-21/3213 H01L 21/768 H01L 6/12
Claims (3)
酸化膜パターンを設ける工程と、 （ｂ）前記酸化膜パターンをエッチングマスクとして用
いて前記基板の一部分を基板表面側からドライエッチン
グして突状部付き基板を形成する工程と、 （ｃ）前記突状部付き基板上の全面にホトレジストを塗
布する工程と、 （ｄ）紫外光照射と現像処理により、前記ホトレジスト
のうち前記突状部の上端面の上側にある部分を、前記ホ
トレジストの表面から前記突状部の上端面にいたるまで
除去し、前記突状部の上端面を露出させる工程と、 （ｅ）前記ホトレジストのうち、前記紫外光の未露光部
分を残したまま、真空蒸着により前記突状部付き基板の
上側全面にオーミック電極層を設ける工程と、 （ｆ）前記未露光部分および該未露光部分上の前記オー
ミック電極層をリフトオフ法により除去し、前記突状部
の上端面上のみに電極層の部分をオーミック電極として
残存形成する工程とを含むことを特徴とする基板の突状
部の電極の形成方法。(A) providing an oxide film pattern for forming protrusions on a substrate surface; and (b) drying a part of the substrate from the substrate surface side using the oxide film pattern as an etching mask. Forming a substrate with protrusions by etching; (c) applying a photoresist on the entire surface of the substrate with protrusions; and (d) irradiating with ultraviolet light and developing to form the photoresist. Removing a portion above the upper end surface of the projecting portion from the surface of the photoresist to the upper end surface of the projecting portion to expose the upper end surface of the projecting portion; A step of providing an ohmic electrode layer on the entire upper surface of the substrate with projections by vacuum deposition while leaving the unexposed portion of the ultraviolet light, and (f) forming an ohmic electrode layer on the unexposed portion and the unexposed portion. Removing the ohmic electrode layer by a lift-off method, and forming a part of the electrode layer as an ohmic electrode only on the upper end surface of the projecting portion. .
に、前記突状部付き基板を埋め込むように前記突状部よ
りも厚く、かつ上部が平坦になるように前記ホトレジス
トを塗布することを特徴とする基板の突状部の電極の形
成方法。2. The method according to claim 1, wherein in the step (c), the photoresist is applied so as to bury the substrate with the protrusion and to be thicker than the protrusion and to be flat at the top. A method for forming an electrode at a protruding portion of a substrate.
に、前記突状部の上端面よりも広くて当該上端面を覆う
広さの領域の透光部を有するガラスマスクを用いること
を特徴とする基板の突状部の電極の形成方法。3. The method according to claim 1, wherein in the step (d), a glass mask having a light-transmitting portion having a region wider than an upper end surface of the projecting portion and covering the upper end surface is used. A method for forming an electrode on a protruding portion of a substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17714994A JP3120000B2 (en) | 1994-07-28 | 1994-07-28 | Method of forming electrode on projecting portion of substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17714994A JP3120000B2 (en) | 1994-07-28 | 1994-07-28 | Method of forming electrode on projecting portion of substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0845932A JPH0845932A (en) | 1996-02-16 |
| JP3120000B2 true JP3120000B2 (en) | 2000-12-25 |
Family
ID=16026056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17714994A Expired - Lifetime JP3120000B2 (en) | 1994-07-28 | 1994-07-28 | Method of forming electrode on projecting portion of substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3120000B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5853960A (en) * | 1998-03-18 | 1998-12-29 | Trw Inc. | Method for producing a micro optical semiconductor lens |
| SG118148A1 (en) * | 2001-08-03 | 2006-01-27 | Asml Us Inc | Oxide structure useable for optical waveguide and method of forming the oxide structure |
| CN108089351A (en) * | 2017-12-13 | 2018-05-29 | 武汉电信器件有限公司 | One kind is for fiber waveguide heating electrode and preparation method thereof |
-
1994
- 1994-07-28 JP JP17714994A patent/JP3120000B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0845932A (en) | 1996-02-16 |
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