JP3036263B2 - AGC circuit - Google Patents
AGC circuitInfo
- Publication number
- JP3036263B2 JP3036263B2 JP29755692A JP29755692A JP3036263B2 JP 3036263 B2 JP3036263 B2 JP 3036263B2 JP 29755692 A JP29755692 A JP 29755692A JP 29755692 A JP29755692 A JP 29755692A JP 3036263 B2 JP3036263 B2 JP 3036263B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- converter
- signal
- output
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Control Of Amplification And Gain Control (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明はＡＧＣ回路に関し、特に
ディジタル変調されたＲＦ信号の増幅回路に使用される
ＡＧＣ回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AGC circuit, and more particularly to an AGC circuit used for an amplifier circuit for a digitally modulated RF signal.
【０００２】[0002]
【従来の技術】従来のＡＧＣ回路は図２に示すように、
入力信号を所定のフォーマットに変換して変調信号を生
成する信号処理回路１と、変調信号を直交ベースバンド
信号Ｉ，Ｑに変換する波形整形回路２と、直交ベースバ
ンド信号Ｉ，ＱをＤ／Ａ変換するＤ／Ａ変換機３と、そ
の出力を直交変調する直交変調回路４と、その出力を増
幅するＲＦ増幅回路５と、ＲＦ増幅回路５の入力を検波
する第１の検波回路９と、検波回路９の検波電圧を増幅
する増幅器１０と、増幅器１０の出力を特定のタイミン
グでサンプルホールドする第１のサンプルホールド回路
１１と、ＲＦ増幅回路５の出力を検波する第２の検波回
路６と、検波回路６の検波電圧を特定のタイミングでサ
ンプルホールドする第２のサンプルホールド回路１３
と、サンプルホールド回路１１の出力電圧とサンプルホ
ールド回路１３の出力電圧を比較してＲＦ増幅回路５に
ＡＧＣ電圧を与える比較器１２で構成されている。この
従来のＡＧＣ回路は、特定のタイミングにおいて、サン
プリングされるＲＦ増幅回路５の入力信号検波電圧の増
幅器１０による増幅電圧と、ＲＦ増幅回路５の出力信号
検波電圧とを等しくするように動作させていた。2. Description of the Related Art A conventional AGC circuit, as shown in FIG.
A signal processing circuit 1 for converting an input signal into a predetermined format to generate a modulated signal; a waveform shaping circuit 2 for converting the modulated signal into orthogonal baseband signals I and Q; A D / A converter 3 for A-conversion, a quadrature modulation circuit 4 for quadrature-modulating the output, an RF amplification circuit 5 for amplifying the output, and a first detection circuit 9 for detecting the input of the RF amplification circuit 5 An amplifier 10 for amplifying the detection voltage of the detection circuit 9, a first sample and hold circuit 11 for sampling and holding the output of the amplifier 10 at a specific timing, and a second detection circuit 6 for detecting the output of the RF amplification circuit 5. And a second sample-and-hold circuit 13 that samples and holds the detection voltage of the detection circuit 6 at a specific timing.
And a comparator 12 that compares the output voltage of the sample and hold circuit 11 with the output voltage of the sample and hold circuit 13 and applies an AGC voltage to the RF amplifier circuit 5. This conventional AGC circuit operates so that the amplified voltage of the sampled input signal detection voltage of the RF amplification circuit 5 by the amplifier 10 and the output signal detection voltage of the RF amplification circuit 5 are made equal at a specific timing. Was.
【０００３】[0003]
【発明が解決しようとする課題】この従来のＡＧＣ回路
では、ＲＦ増幅回路５の制御を正しく行うためには、シ
ンボルタイミングでの振幅変動範囲において、第１の検
波回路９および増幅器１０の総合検波特性と、第２の検
波回路６の検波特性が等しくならなければならないが、
実際には第１の検波回路９と第２の検波回路６の検波特
性が異なるので、増幅器１０の利得制御のために複雑な
回路が必要になる。さらに、温度等環境の変化によって
増幅器１０、第１の検波回路９および増幅器１０の総合
検波特性と第２の検波回路６の検波特性が異ってしま
い、ＡＧＣが正しくかからないという欠点があった。In the conventional AGC circuit, in order to properly control the RF amplifier circuit 5, the first detector 9 and the amplifier 10 must be integrated in the amplitude variation range at the symbol timing. Although the characteristics and the detection characteristics of the second detection circuit 6 must be equal,
Actually, since the detection characteristics of the first detection circuit 9 and the second detection circuit 6 are different, a complicated circuit is required for controlling the gain of the amplifier 10. Furthermore, there is a drawback that the AGC cannot be correctly performed because the total detection characteristics of the amplifier 10, the first detection circuit 9, and the amplifier 10 and the detection characteristics of the second detection circuit 6 are different due to changes in environment such as temperature.
【０００４】本発明の目的は、特定のシンボルタイミン
グにおける振幅が一定値にならない信号の増幅回路の制
御を簡単な回路構成で行えるＡＧＣ回路を提供すること
にある。An object of the present invention is to provide an AGC circuit capable of controlling an amplifier circuit for a signal whose amplitude at a specific symbol timing does not become a constant value with a simple circuit configuration.
【０００５】[0005]
【課題を解決するための手段】本発明のＡＧＣ回路は入
力信号を信号処理回路により所定のフォーマットに変換
して変調信号を生成する信号処理回路と、前記変調信号
から波形整形回路により直交ベースバンド信号Ｉ，Ｑの
振幅値を出力する波形整形回路と、前記ベースバンド信
号Ｉ，ＱをＤ／Ａ変換する第１のＤ／Ａ変換器と、前記
第１のＤ／Ａ変換器の出力を直交変調する直交変調回路
と、前記直交変調回路の出力を増幅するＲＦ増幅回路
と、前記ＲＦ増幅回路の出力信号レベルを検波する検波
回路と、前記検波回路の出力電圧を特定のタイミング信
号でＡ／Ｄ変換するＡ／Ｄ変換器と、前記信号処理回路
が直交ベースバンド信号Ｉ，Ｑの振幅値及び前記Ａ／Ｄ
変換器の出力を入力し、演算処理によって得られたＡＧ
Ｃ信号を第２のＤ／Ａ変換器を経由して前記ＲＦ増幅回
路に帰還することを特徴とする。An AGC circuit according to the present invention comprises a signal processing circuit for converting an input signal into a predetermined format by a signal processing circuit to generate a modulation signal, and a quadrature baseband by a waveform shaping circuit from the modulation signal. A waveform shaping circuit for outputting amplitude values of the signals I and Q, a first D / A converter for D / A converting the baseband signals I and Q, and an output of the first D / A converter A quadrature modulation circuit for quadrature modulation; an RF amplification circuit for amplifying the output of the quadrature modulation circuit; a detection circuit for detecting the output signal level of the RF amplification circuit; An A / D converter for performing A / D conversion, and the signal processing circuit comprising:
The output of the converter is input, and the AG
The C signal is fed back to the RF amplifier circuit via a second D / A converter.
【０００６】[0006]
【実施例】次に本発明について図面を参照して説明す
る。図１は本発明の一実施例を示すブロック図である。
図１の実施例は、信号処理回路１、波形整形回路２、第
１のＤ／Ａ変換器３、直交変調回路４、ＲＦ増幅回路
５、検波回路６、第２のＤ／Ａ変換器７、Ａ／Ｄ変換器
８で構成されている。ここでＤ／Ａ変換器３、直交変調
回路４、ＲＦ増幅回路５、検波回路６は従来例の構成と
同様である。波形整形回路２は特定のタイミングにおけ
る直交ベースバンド信号Ｉ，Ｑの振幅値ｉ，ｑを信号処
理回路１に供給する。信号処理回路１は演算機能を有
し、ｉ，ｑから出力レベルを算出することができる。ま
た、検波回路６によって検波された検波電圧は波形整形
回路２からのタイミング信号１２により特定のタイミン
グごとにＡ／Ｄ変換器８によってＡ／Ｄ変換され、信号
処理回路１に出力される。信号処理回路１はメモリ機能
を有し、検波回路６の検波特性を記憶しており、Ａ／Ｄ
変換器８の出力から検波レベルを判別する。信号処理回
路１はＡ／Ｄ変換器８の出力から判定される検波レベル
を、ｉ，ｑから算出した出力レベルに近づけるような制
御を行うためのＡＧＣ信号１１を計算によって生成して
出力する。ＡＧＣ信号１１は第２のＤ／Ａ変換器７でタ
イミング信号１２による特定のタイミングでＤ／Ａ変換
され、ＲＦ増幅回路５の利得を制御するＡＧＣ電圧１２
を生成してＲＦ増幅回路５の出力を一定になるように制
御する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention.
1 is a signal processing circuit 1, a waveform shaping circuit 2, a first D / A converter 3, a quadrature modulation circuit 4, an RF amplification circuit 5, a detection circuit 6, and a second D / A converter 7. , A / D converter 8. Here, the D / A converter 3, the quadrature modulation circuit 4, the RF amplification circuit 5, and the detection circuit 6 are the same as those of the conventional example. The waveform shaping circuit 2 supplies the amplitude values i, q of the orthogonal baseband signals I, Q at a specific timing to the signal processing circuit 1. The signal processing circuit 1 has an arithmetic function and can calculate an output level from i and q. The detection voltage detected by the detection circuit 6 is A / D converted by the A / D converter 8 at each specific timing by the timing signal 12 from the waveform shaping circuit 2 and output to the signal processing circuit 1. The signal processing circuit 1 has a memory function, stores the detection characteristics of the detection circuit 6, and performs A / D
The detection level is determined from the output of the converter 8. The signal processing circuit 1 generates and outputs an AGC signal 11 for performing control so that the detection level determined from the output of the A / D converter 8 approaches the output level calculated from i and q. The AGC signal 11 is D / A converted by the second D / A converter 7 at a specific timing according to the timing signal 12, and the AGC signal 12 controls the gain of the RF amplifier circuit 5.
Is generated and the output of the RF amplifier circuit 5 is controlled to be constant.
【０００７】[0007]
【発明の効果】以上説明したように本発明のＡＧＣ回路
は、信号処理回路が波形整形回路からＩ，Ｑの振幅とＡ
／Ｄ変換器８からのディジタル信号を入力して計算によ
ってＡＧＣ信号を生成しているので、従来例のようにふ
たつの異なる検波回路の出力を調整するための複雑な制
御回路を必要とせず、しかも素子数削減により小型化が
可能であるという効果を有する。As described above, according to the AGC circuit of the present invention, the signal processing circuit uses the waveform shaping circuit to control the I and Q amplitudes and A
Since the digital signal from the / D converter 8 is input and the AGC signal is generated by calculation, there is no need for a complicated control circuit for adjusting the outputs of two different detection circuits unlike the conventional example. Moreover, there is an effect that downsizing is possible by reducing the number of elements.
【図１】本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
【図２】従来のＡＧＣ回路のブロック図である。FIG. 2 is a block diagram of a conventional AGC circuit.
１ 信号処理回路 ２ 波形整形回路 ３，７ Ｄ／Ａ変換器 ４ 直交変調回路 ５ ＲＦ増幅回路 ６，９ 検波回路 ８ Ａ／Ｄ変換器 １０ 増幅器 １１，１３ サンプルホールド回路 １２ 比較器 DESCRIPTION OF SYMBOLS 1 Signal processing circuit 2 Waveform shaping circuit 3, 7 D / A converter 4 Quadrature modulation circuit 5 RF amplification circuit 6, 9 Detection circuit 8 A / D converter 10 Amplifier 11, 13 Sample hold circuit 12 Comparator
Claims (2)
ォーマットに変換して変調信号を生成する信号処理回路
と、前記変調信号から波形整形回路により直交ベースバ
ンド信号Ｉ，Ｑの振幅値を出力する波形整形回路と、前
記ベースバンド信号Ｉ，ＱをＤ／Ａ変換する第１のＤ／
Ａ変換器と、前記第１のＤ／Ａ変換器の出力を直交変調
する直交変調回路と、前記直交変調回路の出力を増幅す
るＲＦ増幅回路と、前記ＲＦ増幅回路の出力信号レベル
を検波する検波回路と、前記検波回路の出力電圧を特定
のタイミング信号でＡ／Ｄ変換するＡ／Ｄ変換器と、前
記信号処理回路が直交ベースバンド信号Ｉ，Ｑの振幅値
及び前記Ａ／Ｄ変換器の出力を入力し、演算処理によっ
て得られたＡＧＣ信号を第２のＤ／Ａ変換器を経由して
前記ＲＦ増幅回路に帰還することを特徴とするＡＧＣ回
路。1. A signal processing circuit for converting an input signal into a predetermined format by a signal processing circuit to generate a modulation signal, and outputting amplitude values of the quadrature baseband signals I and Q from the modulation signal by a waveform shaping circuit. A waveform shaping circuit, and a first D / A converter for D / A converting the baseband signals I and Q.
An A converter, an orthogonal modulation circuit for orthogonally modulating the output of the first D / A converter, an RF amplification circuit for amplifying the output of the orthogonal modulation circuit, and detecting an output signal level of the RF amplification circuit A detection circuit, an A / D converter for A / D converting the output voltage of the detection circuit with a specific timing signal, and the signal processing circuit comprising an amplitude value of quadrature baseband signals I and Q and the A / D converter. An AGC circuit which receives an output of the AGC circuit and feeds back an AGC signal obtained by arithmetic processing to the RF amplifier circuit via a second D / A converter.
特性を記憶する機能を備えていることを特徴とする請求
項１記載のＡＧＣ回路。2. The AGC circuit according to claim 1, wherein said signal processing circuit has a function of storing detection characteristics of said detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29755692A JP3036263B2 (en) | 1992-11-09 | 1992-11-09 | AGC circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29755692A JP3036263B2 (en) | 1992-11-09 | 1992-11-09 | AGC circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06152285A JPH06152285A (en) | 1994-05-31 |
| JP3036263B2 true JP3036263B2 (en) | 2000-04-24 |
Family
ID=17848082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29755692A Expired - Fee Related JP3036263B2 (en) | 1992-11-09 | 1992-11-09 | AGC circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3036263B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10132587A1 (en) | 2001-07-05 | 2002-11-14 | Infineon Technologies Ag | Transmission device with power control e.g. for RF systems, has output of DAC coupled to modulator for modulating carrier signal with useful signal to be sent |
| EP1928093B1 (en) * | 2002-08-26 | 2015-10-21 | Mitsubishi Denki K.K. | Waveform generation method, waveform generation program, waveform generation circuit and radar apparatus |
-
1992
- 1992-11-09 JP JP29755692A patent/JP3036263B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06152285A (en) | 1994-05-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20000125 |
|
| LAPS | Cancellation because of no payment of annual fees |