JP2953193B2 - Substrate plating method - Google Patents

Substrate plating method

Info

Publication number
JP2953193B2
JP2953193B2 JP4127699A JP12769992A JP2953193B2 JP 2953193 B2 JP2953193 B2 JP 2953193B2 JP 4127699 A JP4127699 A JP 4127699A JP 12769992 A JP12769992 A JP 12769992A JP 2953193 B2 JP2953193 B2 JP 2953193B2
Authority
JP
Japan
Prior art keywords
plating
substrate
cathode
contact resistance
tip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP4127699A
Other languages
Japanese (ja)
Other versions
JPH05320977A (en
Inventor
克己 堀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Priority to JP4127699A priority Critical patent/JP2953193B2/en
Publication of JPH05320977A publication Critical patent/JPH05320977A/en
Application granted granted Critical
Publication of JP2953193B2 publication Critical patent/JP2953193B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は基板のメッキ方法に関す
る。半導体装置の製造工程等において半導体基板の片面
にメッキする場合にメッキ処理の間隔ごとに発生する基
板とカソード間の接触抵抗の増大化が問題となってい
る。本発明はこの解決方法として利用できる。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for plating a substrate. When plating on one surface of a semiconductor substrate in a manufacturing process of a semiconductor device or the like, an increase in contact resistance between a substrate and a cathode, which occurs at every plating process interval, has become a problem. The present invention can be used as this solution.

【0002】[0002]

【従来の技術】基板とカソード間の接触抵抗の増大化を
防止するための従来技術を図2を用いて説明する。
2. Description of the Related Art A conventional technique for preventing an increase in contact resistance between a substrate and a cathode will be described with reference to FIG.

【0003】図2は基板の片面メッキ装置の模式説明図
である。図において,21はメッキ槽,22は複数のカソー
ドピンを有するカソード,23はアノード,24は被メッキ
処理基板,25は基板上に形成された通電用のパッドであ
る。
FIG. 2 is a schematic explanatory view of a single-side plating apparatus for a substrate. In the figure, reference numeral 21 denotes a plating tank, 22 denotes a cathode having a plurality of cathode pins, 23 denotes an anode, 24 denotes a substrate to be plated, and 25 denotes an energizing pad formed on the substrate.

【0004】被メッキ処理基板24はパッド25がカソード
22の先端に接するようにしてその上に載せられ,メッキ
液をメッキ槽21の下側より導入し,メッキ槽21の上縁よ
り溢流させ,カソード22とアノード23との間に通電する
ことによりメッキが行われる。
The substrate 25 to be plated has a pad 25 as a cathode.
The plating liquid is introduced from below the plating tank 21 so as to be in contact with the tip of the plating tank 22, overflows from the upper edge of the plating tank 21, and is supplied with electricity between the cathode 22 and the anode 23. The plating is performed.

【0005】このとき,カソードは基板のパッドに正確
に接続していることが必要であり,それを調べるため
に, 通電チェック処理として, 基板をセットした状態で
各カソードピン間の接触抵抗値を測定している。正常時
にはこの抵抗値は数Ωから数10Ωとなる。
At this time, it is necessary that the cathode is accurately connected to the pads of the substrate. To check this, the contact resistance between each cathode pin is set in a state where the substrate is set as a power-on check process. Measuring. Under normal conditions, this resistance value is several Ω to several tens Ω.

【0006】ところが,メッキ処理中にカソードに付着
したメッキ液が,次のメッキ処理までに乾き,この時カ
ソードの先端に不純物が析出し,基板が正常にセットさ
れているにもかかわらず,上記接触抵抗値が数10Ωから
無限大になることがあり,装置は基板が正常にセットさ
れていないものと判断し,アラームを出して処理が停止
されてしまう。
However, the plating solution adhering to the cathode during the plating process dries before the next plating process. At this time, impurities are deposited at the tip of the cathode, and the above-mentioned substrate is set properly despite the fact that the substrate is set properly. The contact resistance value may become infinite from several tens of ohms, and the apparatus determines that the board is not set properly, issues an alarm, and stops the processing.

【0007】このための,解決手段として次の方法をと
ってきた。 基板上部より荷重が加え,カソードとパッドとを接
触させようとしていた。 上記の方法で回避できない場合は,人手によりカ
ソードを洗浄していた。
The following method has been adopted as a solution to this problem. A load was applied from above the substrate, and the cathode and the pad were trying to come into contact. If it could not be avoided by the above method, the cathode was manually cleaned.

【0008】[0008]

【発明が解決しようとする課題】従来方法に依る場合,
次のような問題点がある。 基板上部よりの荷重は,基板の反りや破損を生ずる
おそれがあり,あまり大きくできない。また,荷重によ
りカソードに付着した不純物等が押し潰されるだけでカ
ソードとパッドが接続する可能性は少ない。 人手による洗浄は発塵のおそれがある。
According to the conventional method,
There are the following problems. The load from the upper part of the substrate may not warp or warp or break the substrate. In addition, there is little possibility that the cathode and the pad are connected only by crushing impurities or the like attached to the cathode by the load. Manual cleaning may generate dust.

【0009】本発明は基板の片面メッキにおいて,メッ
キ処理の間隔ごとに発生する基板とカソード間の接触抵
抗の増大化を抑制し,装置の停止と補修による発塵を防
止することを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to suppress an increase in contact resistance between a substrate and a cathode which occurs at intervals of a plating process in single-sided plating of a substrate, and to prevent dust generation due to stop and repair of the apparatus. .

【0010】[0010]

【課題を解決するための手段】上記課題の解決は,メッ
キ槽21内にその先端が該メッキ槽の上縁とほぼ同じ高さ
に複数設けられたカソード22とアノード23とを有する装
置を用い,被メッキ処理基板24を該カソードの先端に接
するようにしてその上に載せ,メッキ液を該メッキ槽の
下側より導入し該メッキ槽の上縁より溢流させ,該カソ
ードと該アノードとの間に通電することにより該被メッ
キ処理基板の片面にメッキする方法であって,該カソー
ドと該被メッキ処理基板の接触抵抗を確認する通電チェ
ック前に, 該メッキ液を噴流させて該カソードの先端を
該メッキ液で濡らした後に該通電チェックを行い, 引き
続いてメッキ処理を行う基板のメッキ方法により達成さ
れる。
Means for Solving the Problems To solve the above-mentioned problems, a device having a plurality of cathodes 22 and anodes 23 provided in a plating tank 21 at the tip thereof at substantially the same height as the upper edge of the plating tank is used. The substrate 24 to be plated is placed on the cathode so as to be in contact with the tip of the cathode, and a plating solution is introduced from below the plating tank and overflows from the upper edge of the plating tank. A plating process on one side of the substrate to be plated by applying an electric current during the plating, wherein the plating solution is jetted before the plating to check the contact resistance between the cathode and the substrate to be plated. This is achieved by a plating method for a substrate in which the energization check is performed after the tip of the substrate is wetted with the plating solution, and the plating process is subsequently performed.

【0011】[0011]

【作用】本発明は通電チェック前に,メッキ液を噴流さ
せてカソードの先端を湿った状態にして,乾燥による接
触不良をなくするようにしたものである。
According to the present invention, a plating solution is jetted before the current is checked to make the tip of the cathode wet, so that poor contact due to drying is eliminated.

【0012】[0012]

【実施例】図1(A),(B) は本発明の実施例を従来例と対
比して示す処理のフローチャートである。図1(A) は実
施例,図1(B) は従来例を示す。図1(A) において,レ
シピー選択処理1で,噴流の設定時間を含むメッキ条件
を設定し,枚数確認処理2で処理枚数を確認し,ロード
処理3で基板を装置にロードし,噴流処理4でメッキ槽
下側よりメッキ液を噴流し,噴流設定時間か?5で判定
し,結果がYES ならば次の通電チェック処理6に進む。
NOならば噴流処理4を続ける。
1 (A) and 1 (B) are flow charts of a process showing an embodiment of the present invention in comparison with a conventional example. FIG. 1A shows an embodiment, and FIG. 1B shows a conventional example. In FIG. 1 (A), in a recipe selection process 1, plating conditions including a set time of a jet are set, a number of processed substrates is checked in a number check process 2, a substrate is loaded in the apparatus in a load process 3, and a jet process 4 is performed. Jets the plating solution from the bottom of the plating tank, and is the jet setting time? If the result is YES, the process proceeds to the next energization check process 6.
If NO, jet processing 4 is continued.

【0013】通電チェック処理6ではカソードとパッド
間の接続をチェックし,OKならばメッキ処理7でレシピ
ー選択処理1で設定したメッキ条件にしたがってメッキ
を行い,アンロード処理8で基板をアンロードして処理
を完結する。
In the energization check processing 6, the connection between the cathode and the pad is checked. If OK, plating is performed in plating processing 7 according to the plating conditions set in the recipe selection processing 1, and the substrate is unloaded in unload processing 8. To complete the process.

【0014】図1(B) において,レシピー選択処理11で
メッキ条件を設定し,その後の流れは実施例の噴流処理
4および噴流設定時間か?5がないだけで実施例と同様
である。
In FIG. 1 (B), the plating conditions are set in a recipe selection process 11, and the subsequent flow is the jet process 4 and the jet setting time in the embodiment. It is the same as the embodiment except that there is no 5.

【0015】このとき, 通電チェック処理6において前
記のように基板とカソード間の接触抵抗の増大化が発生
することが多い。実施例の効果をみるために図2の装置
を用いて以下の実験を行った。
At this time, the contact resistance between the substrate and the cathode often increases in the energization check processing 6 as described above. The following experiment was performed using the apparatus of FIG. 2 in order to see the effect of the embodiment.

【0016】実験1 一度メッキ処理を行った後,1時間放置し通電チェ
ックを行ったところ,接触抵抗値が正常でないものが約
半数あった。 接触抵抗値が正常でないカソードに純水をかけて再
度接触抵抗を測ったところ,全数正常になった。 その後,1時間放置すると,ほぼ全数の接触抵抗値
が異常になった。
Experiment 1 After performing plating once, the plate was left for 1 hour to check the energization. As a result, about half of the contacts had abnormal contact resistance values. Pure water was applied to the cathode where the contact resistance was not normal, and the contact resistance was measured again. Then, when left for one hour, almost all the contact resistance values became abnormal.

【0017】上記の結果より,析出した不純物が純水
により洗い流されるということではなく,の結果は純
水に溶けて導電性を持つようになったものと推測され
る。 実験2 上記実験1のの状態で,接触抵抗値異常のメッキ槽
(カップ)に各々に対してメッキ液を噴流し,時間経過
に対する接触抵抗値の変化を測定した。
From the above results, it is inferred that the precipitated impurities were not washed out by pure water, but the result was that the impurities dissolved in pure water and became conductive. Experiment 2 In the state of Experiment 1 described above, a plating solution was jetted onto each of the plating tanks (cups) having abnormal contact resistance values, and the change in the contact resistance value over time was measured.

【0018】表1は,メッキ液が基板に付いた時からの
時間経過に対する接触抵抗値の変化を示す。
Table 1 shows the change in the contact resistance value with the passage of time from the time when the plating solution adhered to the substrate.

【表1】 表1より,カソード先端に付着し乾燥した不純物による
接触不良は,通電チェック前にメッキ液を噴流すること
で正常になることが分かる。
[Table 1] From Table 1, it can be seen that the contact failure due to the impurities adhering to the cathode tip and dried becomes normal when the plating solution is jetted before the energization check.

【0019】[0019]

【発明の効果】本発明によれば,基板の片面メッキにお
いて,メッキ処理の間隔ごとに発生する基板とカソード
間の接触抵抗の増大化を防止することができた。この結
果,装置の停止と補修による発塵を防止することができ
た。
According to the present invention, it is possible to prevent an increase in contact resistance between the substrate and the cathode, which is generated at every plating interval, in one-side plating of the substrate. As a result, it was possible to prevent dust generation due to equipment shutdown and repair.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の実施例を従来例と対比して示す処理
のフローチャート
FIG. 1 is a flowchart of processing showing an embodiment of the present invention in comparison with a conventional example.

【図2】 基板の片面メッキ装置の模式説明図FIG. 2 is a schematic explanatory view of a single-side plating apparatus for a substrate.

【符号の説明】[Explanation of symbols]

21 メッキ槽 22 カソード 23 アノード 24 被メッキ処理基板 25 基板上に形成された通電用のパッド 21 Plating bath 22 Cathode 23 Anode 24 Substrate to be plated 25 Conducting pad formed on substrate

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−96292(JP,A) 特開 平2−15622(JP,A) 特開 昭62−190722(JP,A) 特開 平5−267305(JP,A) (58)調査した分野(Int.Cl.6,DB名) C25D 5/08 C25D 7/12 C25D 17/00 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-96292 (JP, A) JP-A-2-15622 (JP, A) JP-A-62-190722 (JP, A) JP-A 5- 267305 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) C25D 5/08 C25D 7/12 C25D 17/00

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 メッキ槽(21)内にその先端が該メッキ槽
の上縁とほぼ同じ高さに複数設けられたカソード(22)と
アノード(23)とを有する装置を用い,被メッキ処理基板
(24)を該カソードの先端に接するようにしてその上に載
せ,メッキ液を該メッキ槽の下側より導入し該メッキ槽
の上縁より溢流させ,該カソードと該アノードとの間に
通電することにより該被メッキ処理基板の片面にメッキ
する方法であって,該カソードと該被メッキ処理基板の
接触抵抗を確認する通電チェック前に, 該メッキ液を噴
流させて該カソードの先端を該メッキ液で濡らした後に
該通電チェックを行い, 引き続いてメッキ処理を行うこ
とを特徴とする基板のメッキ方法。
1. An apparatus having a plurality of cathodes (22) and anodes (23) provided in a plating tank (21), each having a plurality of tips at substantially the same height as the upper edge of the plating tank. substrate
(24) is placed on the cathode so as to be in contact with the tip of the cathode, a plating solution is introduced from the lower side of the plating tank, overflows from the upper edge of the plating tank, and is placed between the cathode and the anode. A plating method on one side of the substrate to be plated by applying a current, wherein the plating solution is jetted to cause the tip of the cathode to be jetted before an energization check for checking the contact resistance between the cathode and the substrate to be plated. A method for plating a substrate, comprising: performing the energization check after wetting with the plating solution; and subsequently performing a plating process.
JP4127699A 1992-05-20 1992-05-20 Substrate plating method Expired - Lifetime JP2953193B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4127699A JP2953193B2 (en) 1992-05-20 1992-05-20 Substrate plating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4127699A JP2953193B2 (en) 1992-05-20 1992-05-20 Substrate plating method

Publications (2)

Publication Number Publication Date
JPH05320977A JPH05320977A (en) 1993-12-07
JP2953193B2 true JP2953193B2 (en) 1999-09-27

Family

ID=14966521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4127699A Expired - Lifetime JP2953193B2 (en) 1992-05-20 1992-05-20 Substrate plating method

Country Status (1)

Country Link
JP (1) JP2953193B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5980706A (en) * 1996-07-15 1999-11-09 Semitool, Inc. Electrode semiconductor workpiece holder
US7087143B1 (en) * 1996-07-15 2006-08-08 Semitool, Inc. Plating system for semiconductor materials
EP1647614A3 (en) * 1997-07-15 2006-06-07 Semitool, Inc. Plating system for semiconductor materials
WO1999031304A1 (en) * 1997-12-16 1999-06-24 Ebara Corporation Plating device and method of confirming current feed
EP1018568A4 (en) * 1998-07-10 2006-05-31 Ebara Corp Plating device
US6716329B2 (en) * 2000-05-02 2004-04-06 Tokyo Electron Limited Processing apparatus and processing system

Also Published As

Publication number Publication date
JPH05320977A (en) 1993-12-07

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