JP2903735B2 - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JP2903735B2
JP2903735B2 JP3966491A JP3966491A JP2903735B2 JP 2903735 B2 JP2903735 B2 JP 2903735B2 JP 3966491 A JP3966491 A JP 3966491A JP 3966491 A JP3966491 A JP 3966491A JP 2903735 B2 JP2903735 B2 JP 2903735B2
Authority
JP
Japan
Prior art keywords
film
sio
insulating film
semiconductor device
capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3966491A
Other languages
Japanese (ja)
Other versions
JPH04277674A (en
Inventor
俊幸 ▲廣▼田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP3966491A priority Critical patent/JP2903735B2/en
Publication of JPH04277674A publication Critical patent/JPH04277674A/en
Application granted granted Critical
Publication of JP2903735B2 publication Critical patent/JP2903735B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体装置に関し、特に
容量部を有する半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a capacitor.

【0002】[0002]

【従来の技術】従来の容量部を有する半導体装置を図6
を用いて説明する。図6において、シリコン基板1上に
はフィールド酸化膜2が形成されており、このフィール
ド酸化膜2上には下部電極4と絶縁膜10及び上部電極
6で構成される容量部が形成されている。下部電極4と
しては多結晶シリコンの電極をリソグラフィー技術を用
いて形成し、容量絶縁膜10としてSi3 4 膜4をそ
の上に堆積していた。
2. Description of the Related Art A conventional semiconductor device having a capacitance section is shown in FIG.
This will be described with reference to FIG. In FIG. 6, a field oxide film 2 is formed on a silicon substrate 1, and a capacitance portion including a lower electrode 4, an insulating film 10 and an upper electrode 6 is formed on the field oxide film 2. . A polycrystalline silicon electrode was formed as the lower electrode 4 using lithography technology, and a Si 3 N 4 film 4 was deposited thereon as the capacitor insulating film 10.

【0003】このSi3 4 膜4は一般に、SiH4
はSiH2 Cl2 とNH3 から成るガス系から成長温度
750〜850℃,成長圧力0.1〜1.0Torr程
度の一定の条件で、気相反応により下部電極3上に堆積
されていた。Si3 4 膜はSiO2 膜と比較して誘電
率が高く、SiO2膜と同じ膜厚でより単位面積当りの
容量値が大きい容量部を得ることが出来る半面、SiO
2 膜よりも電気的絶縁性が低いという欠点がある。そこ
で不十分な電気的絶縁性を補うために熱酸化を行い、S
3 4 膜4の表面を厚さ1〜2nmのSiO2 膜5に
して電気的な絶縁性を高めていた。その後、再び多結晶
シリコン膜を成長し、リソグラフィー技術を用いて上部
電極6を形成していた。
The Si 3 N 4 film 4 is generally formed from a gas system consisting of SiH 4 or SiH 2 Cl 2 and NH 3 under a constant condition of a growth temperature of 750 to 850 ° C. and a growth pressure of 0.1 to 1.0 Torr. Was deposited on the lower electrode 3 by a gas phase reaction. The Si 3 N 4 film has a high dielectric constant as compared to the SiO 2 film, half of it is able to obtain a capacitor portion is larger and more capacitance per unit area the same thickness as the SiO 2 film, SiO
There is a disadvantage that the electrical insulation is lower than that of the two films. Therefore, thermal oxidation is performed to compensate for insufficient electrical insulation, and S
It had increased electrical insulation in the i 3 N 4 SiO 2 film 5 surface thickness 1~2nm film 4. Thereafter, a polycrystalline silicon film was grown again, and the upper electrode 6 was formed using lithography technology.

【0004】[0004]

【発明が解決しようとする課題】半導体装置の微細化に
伴い、容量部の占有面積は次第に縮小それてきており、
回路上必要な容量値を確保するには容量絶縁膜の薄膜化
が必要とされる。上述した従来の容量部を有する半導体
装置は、容量絶縁膜として熱酸化膜/Si3 4 膜の構
造を有していた。Si3 4 膜だけでは電気的絶縁性が
不十分なためSi3 4 膜を下部電極上に堆積した後、
熱酸化を行って、容量絶縁膜の電気的絶縁性を高めてい
たが、Si3 4 の膜厚が7nmより薄くなると、この
熱酸化によって下部電極まで酸化されてしまい、容量絶
縁膜の膜厚が厚くなって、単位面積当りの容量値を高め
ることが困難であるという問題があった。
With the miniaturization of semiconductor devices, the area occupied by the capacitance portion has been gradually reduced.
In order to secure a necessary capacitance value in a circuit, it is necessary to reduce the thickness of a capacitance insulating film. The above-described conventional semiconductor device having a capacitance portion has a thermal oxide film / Si 3 N 4 film structure as a capacitance insulating film. After the the Si 3 N 4 film is only electrically insulative insufficient for the Si 3 N 4 film was deposited on the lower electrode,
The electrical insulation of the capacitor insulating film was increased by performing thermal oxidation. However, when the film thickness of Si 3 N 4 became thinner than 7 nm, the lower electrode was oxidized by this thermal oxidation, and the film of the capacitor insulating film was formed. There has been a problem that the thickness is so large that it is difficult to increase the capacitance value per unit area.

【0005】図3は実効的なSiO2 換算膜厚teff
Si3 4 膜厚の関係を示している。SiO2 換算膜厚
とは、最終的に作成された容量部の単位面積当りの容量
値をSiO2 膜厚に換算したものである。熱酸化をしな
いもの(実線B)では比例関係にあるが、熱酸化をした
もの(実線A)ではSi3 4 膜が7nmより薄くなる
と逆にSiO2 換算膜厚は増加してしまい容量値を高く
できないことが分かる。
FIG. 3 shows the relationship between the effective SiO 2 equivalent film thickness t eff and the Si 3 N 4 film thickness. The SiO 2 equivalent film thickness is a value obtained by converting a capacitance value per unit area of a finally produced capacitance portion into an SiO 2 film thickness. In the case of no thermal oxidation (solid line B), there is a proportional relationship, but in the case of thermal oxidation (solid line A), when the Si 3 N 4 film becomes thinner than 7 nm, the equivalent SiO 2 film thickness increases, and the capacitance value increases. It can be seen that cannot be increased.

【0006】本発明の目的は、熱酸化による換算膜厚の
増加を避け、単位面積当りの容量値が高く、かつ電気的
絶縁性に優れた容量部を有する半導体装置を提供するこ
とにある。
An object of the present invention is to provide a semiconductor device having a capacitance portion having a high capacitance value per unit area and an excellent electrical insulation property while avoiding an increase in equivalent film thickness due to thermal oxidation.

【0007】[0007]

【課題を解決するための手段】本発明の半導体装置は、
容量絶縁膜として、膜厚方向に組成を変えた窒化酸化ケ
イ素(SiOx y )膜を有するものである。
According to the present invention, there is provided a semiconductor device comprising:
The capacitor insulating film has a silicon nitride oxide (SiO x N y ) film whose composition is changed in the thickness direction.

【0008】[0008]

【作用】SiOx y 膜の組成X,Yを変えることで誘
電率と電気的絶縁性を変えることが出来る。一般にXを
大、Yを小にすると電気的絶縁性が高まり、逆にXを
小、Yを大にすると誘電率が高まる。これを利用して、
同一工程で容量絶縁膜の膜厚方向に誘電率の高い部分
と、電気的絶縁性の高い部分を設けることにより、熱酸
化を行う事なく、従来よりも単位面積当りの容量値が高
く、かつ電気的絶縁性に優れた容量部を有する半導体装
置を製造することができる。
The dielectric constant and the electrical insulation can be changed by changing the compositions X and Y of the SiO x N y film. In general, when X is large and Y is small, the electrical insulation is enhanced. Conversely, when X is small and Y is large, the dielectric constant is increased. Using this,
By providing a portion having a high dielectric constant and a portion having a high electrical insulation in the thickness direction of the capacitor insulating film in the same step, the capacitance value per unit area is higher than before without performing thermal oxidation, and A semiconductor device having a capacitor portion with excellent electrical insulation can be manufactured.

【0009】[0009]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の第1の実施例のSiOx y からな
る容量絶縁膜の膜厚方向の組成分布を示す模式図であ
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a schematic diagram showing a composition distribution in a thickness direction of a capacitive insulating film made of SiO x N y according to a first embodiment of the present invention.

【0010】この第1の実施例では従来と同様にシリコ
ン基板上に多結晶シリコンからなる下部電極を形成し、
自然酸化膜を除去した後に、N2 OとSiH4 とNH3
からなるガス系を用いる減圧化学気相成長により、成長
温度800℃,成長圧力0.2TorrでSiOx y
膜を成長させる。SiOx y 膜は予め各ガスの流量比
と組成比の関係を調べておき、ガスの流量を成長中に変
える事で、その組成を変えることができる。
In the first embodiment, a lower electrode made of polycrystalline silicon is formed on a silicon substrate as in the prior art,
After removing the natural oxide film, N 2 O, SiH 4 and NH 3
SiO x N y at a growth temperature of 800 ° C. and a growth pressure of 0.2 Torr by reduced pressure chemical vapor deposition using a gas system consisting of
Grow the film. The composition of the SiO x N y film can be changed by checking the relationship between the flow ratio of each gas and the composition ratio in advance and changing the flow rate of the gas during growth.

【0011】図1に示したように、膜の厚さ方向の両端
で酸素(0)の割合が高くなるような組成分布を持つ容
量絶縁膜を6.5nmの厚さに形成し、その後多結晶シ
リコンからなる上部電極を形成して容量部とする。この
ようにして形成された第1の実施例における容量絶縁膜
は、SiO2 の膜厚に換算して5.5nm程度となる。
この第1の実施例では容量絶縁膜の組成が、上部と下部
とで対称なので、印加された電圧によるリーク電流の極
性依存性は現れない。
As shown in FIG. 1, a capacitor insulating film having a composition distribution such that the proportion of oxygen (0) is increased at both ends in the thickness direction of the film is formed to a thickness of 6.5 nm, and thereafter, a multi-layer capacitor is formed. An upper electrode made of crystalline silicon is formed to form a capacitor. The capacitance insulating film thus formed in the first embodiment has a thickness of about 5.5 nm in terms of the thickness of SiO 2 .
In the first embodiment, since the composition of the capacitive insulating film is symmetrical between the upper part and the lower part, the polarity dependence of the leak current due to the applied voltage does not appear.

【0012】図4に本第1の実施例と従来技術によって
製作された半導体装置の容量素子(従来例)とのJ−V
特性を表す。図4より同程度の換算膜厚でも本第1の実
施例のリーク電流が従来例と比較して十分低いことが分
かる。また図5は1×10-8A/cm2 の電流が流れて
いるときの電界強度を縦軸に、横軸にSiO2 換算膜厚
をとって表したものであるが、本第1の実施例の特性
は、電気的絶縁性の高い部分を容量絶縁膜の両側に有す
るため、従来例よりも1MV/cmほど向上しているこ
とが分かる。
FIG. 4 shows the JV of the first embodiment and the capacitance element (conventional example) of the semiconductor device manufactured by the prior art.
Indicates characteristics. From FIG. 4, it can be seen that the leak current of the first embodiment is sufficiently lower than that of the conventional example even at the same reduced film thickness. FIG. 5 shows the electric field intensity when a current of 1 × 10 −8 A / cm 2 flows on the vertical axis and the SiO 2 equivalent film thickness on the horizontal axis. It can be seen that the characteristics of the example are improved by about 1 MV / cm compared to the conventional example because the portions having high electrical insulation are provided on both sides of the capacitance insulating film.

【0013】図2は本発明の第2の実施例の容量絶縁膜
の膜厚方向の組成分布を示す模式図である。第1の実施
例とはSiOx y 膜の組成分布だけが異なり、特に容
量絶縁膜の片側のみ酸素濃度が高くなるような組成分布
を持たせたものである。この第2の実施例では、印加さ
れた電圧によるリーク電流の極性依存性が現れる。しか
し、第1の実施例と比較して誘電率の高い部分の占める
割合が大きい分SiO2 換算の膜厚はさらに薄くなり、
4.8nm程度となる。
FIG. 2 is a schematic diagram showing a composition distribution in a thickness direction of a capacitive insulating film according to a second embodiment of the present invention. The first embodiment differs from the first embodiment only in the composition distribution of the SiO x N y film. In particular, the composition distribution is such that the oxygen concentration is increased only on one side of the capacitive insulating film. In the second embodiment, the polarity dependence of the leak current due to the applied voltage appears. However, as compared with the first embodiment, the proportion occupied by the portion having a higher dielectric constant is larger, so that the film thickness in terms of SiO 2 is further reduced.
It is about 4.8 nm.

【0014】[0014]

【発明の効果】以上説明したように本発明は、膜厚方向
にSiOx y 膜の組成を変えたものを容量絶縁膜とす
ることにより、膜厚方向に誘電率の高い部分と、電気的
絶縁性の高い部分を設けることができるため、従来のも
のよりも単位面積当りの容量値が高く(SiO2 換算膜
厚4nm台)かつ電気的絶縁性に優れた(2.5V印加
時1×10-8A/cm2 程度のリーク電流)容量部を有
する半導体装置が得られるという効果を有する。
As described above, according to the present invention, by changing the composition of the SiO x N y film in the film thickness direction to a capacitor insulating film, the portion having a high dielectric constant in the film thickness direction can be removed. Since a portion having high electrical insulation can be provided, the capacitance value per unit area is higher than that of the conventional one (SiO 2 equivalent film thickness of the order of 4 nm), and the electrical insulation is excellent (1 when 2.5 V is applied). This has the effect of obtaining a semiconductor device having a leakage current (capacity portion of about 10 −8 A / cm 2 ).

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例の容量絶縁膜の組成分布
を示す模式図である。
FIG. 1 is a schematic diagram showing a composition distribution of a capacitive insulating film according to a first example of the present invention.

【図2】本発明の第2の実施例の容量絶縁膜の組成分布
を示す模式図である。
FIG. 2 is a schematic diagram showing a composition distribution of a capacitive insulating film according to a second embodiment of the present invention.

【図3】窒化膜(Si3 4 )熱酸化による換算膜厚の
増加特性を表す図である。
FIG. 3 is a diagram showing a characteristic of increasing a reduced film thickness by thermal oxidation of a nitride film (Si 3 N 4 ).

【図4】実施例と従来例のJ−V特性を表す図である。FIG. 4 is a diagram showing JV characteristics of an example and a conventional example.

【図5】実施例と従来例の初期耐圧の換算膜厚依存性を
表す図である。
FIG. 5 is a diagram showing the converted film thickness dependence of the initial breakdown voltage of the example and the conventional example.

【図6】従来の半導体装置の容量部の断面図である。FIG. 6 is a cross-sectional view of a capacitance section of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 フィールド酸化膜 3 下部電極 4 Si3 4 膜 5 熱酸化膜 6 上部電極 10 容量絶縁膜Reference Signs List 1 silicon substrate 2 field oxide film 3 lower electrode 4 Si 3 N 4 film 5 thermal oxide film 6 upper electrode 10 capacitance insulating film

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 上部電極と容量絶縁膜と下部電極とで構
成される容量部を有する半導体装置において、前記容量
絶縁膜が膜厚方向に組成を変えた窒化酸化ケイ素膜を含
むことを特徴とする半導体装置。
1. A semiconductor device having a capacitor portion composed of an upper electrode, a capacitor insulating film, and a lower electrode, wherein the capacitor insulating film includes a silicon nitride oxide film having a composition changed in a film thickness direction. Semiconductor device.
JP3966491A 1991-03-06 1991-03-06 Semiconductor device Expired - Fee Related JP2903735B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3966491A JP2903735B2 (en) 1991-03-06 1991-03-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3966491A JP2903735B2 (en) 1991-03-06 1991-03-06 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH04277674A JPH04277674A (en) 1992-10-02
JP2903735B2 true JP2903735B2 (en) 1999-06-14

Family

ID=12559356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3966491A Expired - Fee Related JP2903735B2 (en) 1991-03-06 1991-03-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2903735B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100480914B1 (en) 2002-08-05 2005-04-07 주식회사 하이닉스반도체 Method for fabricating semiconductor device

Also Published As

Publication number Publication date
JPH04277674A (en) 1992-10-02

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