JP2901259B2 - Evaporation jig and method for manufacturing semiconductor device - Google Patents

Evaporation jig and method for manufacturing semiconductor device

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Publication number
JP2901259B2
JP2901259B2 JP63327939A JP32793988A JP2901259B2 JP 2901259 B2 JP2901259 B2 JP 2901259B2 JP 63327939 A JP63327939 A JP 63327939A JP 32793988 A JP32793988 A JP 32793988A JP 2901259 B2 JP2901259 B2 JP 2901259B2
Authority
JP
Japan
Prior art keywords
semiconductor wafer
permanent magnet
metal mask
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63327939A
Other languages
Japanese (ja)
Other versions
JPH02175856A (en
Inventor
毅 山田
輝 中西
一明 柄澤
茂樹 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63327939A priority Critical patent/JP2901259B2/en
Publication of JPH02175856A publication Critical patent/JPH02175856A/en
Application granted granted Critical
Publication of JP2901259B2 publication Critical patent/JP2901259B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔概要〕 半導体ウエハ上にはんだバンプを真空蒸着で形成する
際に用いるメタルマスクと半導体ウエハとを支持するた
めの蒸着治具に関し、 半導体ウエハ上のはんだが蒸着中に溶融することを防
止することを目的とし、 外周をホルダで支持された永久磁石により半導体ウエ
ハを挟んで軟質磁性体のメタルマスクを吸着し、該半導
体ウエハをメタルマスクと共に支持するように蒸着治具
において、上記ホルダ及び半導体ウエハと永久磁石との
間に銅板を挿入配置するように構成する。
DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a metal mask used for forming solder bumps on a semiconductor wafer by vacuum evaporation and an evaporation jig for supporting the semiconductor wafer. A vapor deposition jig for preventing a melting, adsorbing a soft magnetic metal mask with a semiconductor wafer sandwiched between semiconductor wafers by a permanent magnet supported by a holder on the outer periphery, and supporting the semiconductor wafer together with the metal mask. , A copper plate is inserted and arranged between the permanent magnet and the semiconductor wafer.

〔産業上の利用分野〕[Industrial applications]

本発明は半導体ウエハ上にはんだバンプを真空蒸着で
形成する際に用いるメタルマスクと半導体ウエハとを支
持するための蒸着治具及びそれを用いた半導体装置の製
造方法に関する。
The present invention relates to an evaporation jig for supporting a semiconductor mask and a metal mask used for forming solder bumps on a semiconductor wafer by vacuum evaporation, and a method of manufacturing a semiconductor device using the same.

〔従来の技術〕[Conventional technology]

近年、半導体素子の配線基板上への実装方法は、より
高密度実装が可能な方向へと向かっている。その方法の
一つとして、フリップチップ実装法がある。この方法
は、半導体素子上の信号入出力部に直接はんだを盛り、
配線基板上の相対するパターンと突き合わせてはんだ付
けする。このため、半導体素子上には、予めはんだバン
プを形成しておく必要がある。はんだバンプの形成には
蒸着による方法があり、この場合メタルマスクを使用す
るが、真空蒸着チャンバー内に第3図に示すような複数
のチップ1aを形成した半導体ウエハ1をセットする際、
単にメタルマスクと半導体ウエハを重ね合わせただけで
は、第4図に示すように半導体ウエハ1とメタルマスク
2との間に隙間が生じ、はんだバンプ3以外の不必要な
部分にまでまわり込み、絶縁不良となることがある。
In recent years, a method of mounting a semiconductor element on a wiring board has been moving toward a direction where higher density mounting is possible. One of the methods is a flip chip mounting method. In this method, solder is applied directly to the signal input / output part on the semiconductor element,
Solder it against the opposing pattern on the wiring board. Therefore, it is necessary to form solder bumps on the semiconductor element in advance. There is a method by vapor deposition for forming the solder bumps. In this case, a metal mask is used. When the semiconductor wafer 1 on which a plurality of chips 1a are formed as shown in FIG.
If the metal mask and the semiconductor wafer are simply overlapped, a gap is created between the semiconductor wafer 1 and the metal mask 2 as shown in FIG. It may be defective.

このため従来は第5図に示すように、ホルダ4に支持
された支持された永久磁石5に半導体ウエハ1を挟んで
軟質磁性体のメタルマスク2を吸着させ半導体ウエハ1
を支持するようにした蒸着治具を用いている。
Conventionally, as shown in FIG. 5, a soft magnetic metal mask 2 is attracted to a permanent magnet 5 supported by a holder 4 with a semiconductor wafer 1 interposed therebetween.
Is used.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

上記従来の蒸着治具では、半導体ウエハ1がシリコン
の場合は問題ないが、ガリウムヒ素の場合は熱伝導が悪
いため、蒸着による発熱のためウエハ上のはんだが溶融
してしまうという問題が生ずる。
In the above-described conventional vapor deposition jig, there is no problem when the semiconductor wafer 1 is silicon, but in the case of gallium arsenide, there is a problem that the heat on the wafer is melted due to heat generated by vapor deposition due to poor heat conduction.

本発明は上記従来の問題点に鑑み、半導体ウエハ上の
はんだが蒸着中に溶融することがないようにした蒸着治
具及びそれを用いた半導体装置の製造方法を提供するこ
とを目的とする。
The present invention has been made in view of the above-described conventional problems, and has as its object to provide a deposition jig that prevents solder on a semiconductor wafer from being melted during deposition and a method of manufacturing a semiconductor device using the same.

〔課題を解決するための手段〕[Means for solving the problem]

上記目的を達成するために、本発明の蒸着治具は、外
周をホルダ(4)と支持された永久磁石5により半導体
ウエハ1を挟んで軟質磁性体のメタルマスク2を吸着
し、該半導体ウエハ1をメタルマスク2と共に支持し
て、該半導体ウエハ1のメタルマスク2覆われない表面
にバンプを蒸着する蒸着治具において、上記半導体ウエ
ハ1と永久磁石5との間に銅板6を挿入配置したことを
特徴とする。
In order to achieve the above object, a vapor deposition jig of the present invention adsorbs a soft magnetic metal mask 2 across a semiconductor wafer 1 by a permanent magnet 5 supported on the outer periphery by a holder (4). 1 is supported together with the metal mask 2, and a copper plate 6 is inserted between the semiconductor wafer 1 and the permanent magnet 5 in a vapor deposition jig for vapor-depositing bumps on the surface of the semiconductor wafer 1 that is not covered with the metal mask 2. It is characterized by the following.

また、本発明の半導体装置の製造方法は、半導体ウエ
ハ1の背面に永久磁石5を配置してかつ該半導体ウエハ
1の表面にメタルマスク2を密着させ、該メタルマスク
2表面の開口パターンを通して、該半導体ウエハ1の表
面に選択的にバンプを蒸着する半導体装置の製造方法で
あって、前記半導体ウエハ1と前記永久磁石5との間に
銅板6を挿入配置したことを特徴とする。
In the method of manufacturing a semiconductor device according to the present invention, the permanent magnet 5 is arranged on the back surface of the semiconductor wafer 1 and the metal mask 2 is brought into close contact with the surface of the semiconductor wafer 1. A method of manufacturing a semiconductor device in which bumps are selectively deposited on a surface of the semiconductor wafer 1, wherein a copper plate 6 is inserted between the semiconductor wafer 1 and the permanent magnet 5.

〔作用〕[Action]

ホルダ4及び半導体ウエハ1と永久磁石5との間に胴
体6を挿入配置したことにより、はんだ蒸着時に半導体
ウエハ1に発生する熱を銅板6を介してホルダ4に逃す
ことができ、はんだの溶融を防止することができる。
Since the body 6 is inserted and arranged between the holder 4 and the semiconductor wafer 1 and the permanent magnet 5, heat generated in the semiconductor wafer 1 at the time of solder deposition can be released to the holder 4 via the copper plate 6, and the solder can be melted. Can be prevented.

〔実施例〕〔Example〕

第1図は本発明の蒸着治具の実施例を示す断面図であ
る。
FIG. 1 is a sectional view showing an embodiment of the vapor deposition jig of the present invention.

本実施例の蒸着治具は、第1図に示すように円板状の
永久磁石5が円板状の銅板6と共にその外周をホルダ4
に支持されており、該ホルダ4と銅板6とは接触してい
る。
In the vapor deposition jig of this embodiment, as shown in FIG. 1, a disk-shaped permanent magnet 5 and a disk-shaped copper plate 6
, And the holder 4 and the copper plate 6 are in contact with each other.

このように構成された本実施例の蒸着治具を用いた本
発明の半導体装置の製造方法は、第1図に示すように銅
板6の下面に円板状の半導体ウエハ1を挟んで円形薄板
状のメタルマスク2を永久磁石5により吸着しウエハ1
を支持し、該メタルマスク2の表面の開口パターン(図
示省略)を通して半導体ウエハ1の表面に選択的にバン
プを蒸着するものである。
The method of manufacturing a semiconductor device according to the present invention using the vapor deposition jig of the present embodiment having the above-described configuration includes a circular thin plate having a disc-shaped semiconductor wafer 1 sandwiched on the lower surface of a copper plate 6 as shown in FIG. The metal mask 2 is attracted by the permanent magnet 5 and the wafer 1
And bumps are selectively deposited on the surface of the semiconductor wafer 1 through an opening pattern (not shown) on the surface of the metal mask 2.

このように構成された本実施例の半導体装置の製造方
法は、半導体ウエハ1にはんだバンプを蒸着するとき
に、半導体ウエハ1に発生した熱は、第2図に白ぬき矢
印で示すように半導体ウエハ1から銅板6内に伝わり、
その外周からホルダ4に放熱される。この放熱により半
導体ウエハ1の温度上昇を抑えることができ、さらには
んだバンプの溶融を防止することができる。
In the method of manufacturing a semiconductor device according to the present embodiment having the above-described configuration, when the solder bumps are deposited on the semiconductor wafer 1, the heat generated in the semiconductor wafer 1 is reduced as shown by a white arrow in FIG. Transmitted from the wafer 1 into the copper plate 6,
Heat is radiated to the holder 4 from the outer periphery. Due to this heat radiation, the temperature rise of the semiconductor wafer 1 can be suppressed, and the melting of the solder bumps can be prevented.

〔発明の効果〕〔The invention's effect〕

以上説明した様に、本発明によれは、蒸着治具のメタ
ルマスクを吸着して半導体ウエハを支持する永久磁石
と、該永久磁石の外周を支持するホルダとの間に銅板を
挿入配置することにより、はんだバンプ蒸着時の半導体
ウエハの温度上昇を抑えることができ、蒸着されたはん
だバンプの溶融を防止することが可能となる。
As described above, according to the present invention, a copper plate is inserted and arranged between a permanent magnet that supports a semiconductor wafer by adsorbing a metal mask of a vapor deposition jig and a holder that supports an outer periphery of the permanent magnet. Thereby, the temperature rise of the semiconductor wafer at the time of solder bump deposition can be suppressed, and the deposited solder bumps can be prevented from melting.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の実施例の示す図、 第2図は本発明の実施例の作用を説明する図、 第3図は従来の半導体ウエハを示す図、 第4図は従来技術の問題点を説明するための図、 第5図は従来の蒸着治具を示す図である。 図において、 1は半導体ウエハ、2はメタルマスク、4はホルダ、5
は永久磁石、6は銅板 を示す。
1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of the embodiment of the present invention, FIG. 3 is a diagram showing a conventional semiconductor wafer, and FIG. FIG. 5 is a view showing a conventional vapor deposition jig. In the figure, 1 is a semiconductor wafer, 2 is a metal mask, 4 is a holder, 5
Denotes a permanent magnet, and 6 denotes a copper plate.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 柄澤 一明 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 (72)発明者 岡本 茂樹 神奈川県川崎市中原区上小田中1015番地 富士通株式会社内 (56)参考文献 特開 昭57−126967(JP,A) 特開 昭58−126978(JP,A) ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Kazuaki Karasawa 1015 Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Shigeki Okamoto 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited (56) References JP-A-57-126967 (JP, A) JP-A-58-126978 (JP, A)

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】外周をホルダ(4)で支持された永久磁石
(5)により半導体ウエハ(1)を挟んで軟質磁性体の
メタルマスク(2)を吸着し、該半導体ウエハ(1)を
メタルマスク(2)と共に支持して、該半導体ウエハ
(1)のメタルマスク(2)で覆われない表面にバンプ
を蒸着する蒸着治具において、 上記半導体ウエハ(1)と永久磁石(5)との間に銅板
(6)を挿入配置したことを特徴とする蒸着治具。
1. A soft magnetic metal mask (2) is attracted by a permanent magnet (5) whose outer periphery is supported by a holder (4) across a semiconductor wafer (1), and the semiconductor wafer (1) is metallized. A vapor deposition jig supporting the mask together with the mask and depositing bumps on a surface of the semiconductor wafer not covered with the metal mask, wherein the semiconductor wafer and the permanent magnet are separated. An evaporating jig characterized in that a copper plate (6) is inserted between the jigs.
【請求項2】半導体ウエハ(1)の背面に永久磁石
(5)を配置してかつ該半導体ウエハ(1)の表面にメ
タルマスク(2)を密着させ、該メタルマスク(2)表
面の開口パターンを通して、該半導体ウエハ(1)の表
面に選択的にバンプを蒸着する半導体装置の製造方法で
あって、 前記半導体ウエハ(1)を前記永久磁石(5)との間に
銅板(6)を挿入配置したことを特徴とする半導体装置
の製造方法。
2. A permanent magnet (5) is arranged on the back surface of the semiconductor wafer (1), and a metal mask (2) is brought into close contact with the surface of the semiconductor wafer (1), and an opening on the surface of the metal mask (2) is provided. A method for manufacturing a semiconductor device, wherein bumps are selectively deposited on a surface of a semiconductor wafer (1) through a pattern, wherein a copper plate (6) is placed between the semiconductor wafer (1) and the permanent magnet (5). A method for manufacturing a semiconductor device, wherein the semiconductor device is inserted and arranged.
JP63327939A 1988-12-27 1988-12-27 Evaporation jig and method for manufacturing semiconductor device Expired - Lifetime JP2901259B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63327939A JP2901259B2 (en) 1988-12-27 1988-12-27 Evaporation jig and method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63327939A JP2901259B2 (en) 1988-12-27 1988-12-27 Evaporation jig and method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH02175856A JPH02175856A (en) 1990-07-09
JP2901259B2 true JP2901259B2 (en) 1999-06-07

Family

ID=18204699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63327939A Expired - Lifetime JP2901259B2 (en) 1988-12-27 1988-12-27 Evaporation jig and method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2901259B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7729680B2 (en) 2004-11-02 2010-06-01 Panasonic Corporation Noise suppresser

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007119895A (en) * 2005-10-31 2007-05-17 Toshiba Matsushita Display Technology Co Ltd Vapor deposition device
KR100696554B1 (en) * 2005-12-16 2007-03-19 삼성에스디아이 주식회사 Deposition apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57126967A (en) * 1981-01-29 1982-08-06 Fujitsu Ltd Method for holding mask for film formation
JPS58126978A (en) * 1982-01-22 1983-07-28 Hitachi Ltd Base plate holding device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7729680B2 (en) 2004-11-02 2010-06-01 Panasonic Corporation Noise suppresser

Also Published As

Publication number Publication date
JPH02175856A (en) 1990-07-09

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