JP2892204B2 - Dielectric circuit board - Google Patents

Dielectric circuit board

Info

Publication number
JP2892204B2
JP2892204B2 JP33191491A JP33191491A JP2892204B2 JP 2892204 B2 JP2892204 B2 JP 2892204B2 JP 33191491 A JP33191491 A JP 33191491A JP 33191491 A JP33191491 A JP 33191491A JP 2892204 B2 JP2892204 B2 JP 2892204B2
Authority
JP
Japan
Prior art keywords
dielectric
copper
porcelain
circuit board
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP33191491A
Other languages
Japanese (ja)
Other versions
JPH05166670A (en
Inventor
明宏 金内
信儀 藤川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP33191491A priority Critical patent/JP2892204B2/en
Publication of JPH05166670A publication Critical patent/JPH05166670A/en
Application granted granted Critical
Publication of JP2892204B2 publication Critical patent/JP2892204B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/024Dielectric details, e.g. changing the dielectric material around a transmission line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Capacitors (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はマイクロ波領域で使用さ
れる誘電体回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric circuit board used in a microwave region.

【0002】[0002]

【従来の技術】現在、マイクロ波回路技術の進歩によ
り、種々の誘電体基板を用いて、マイクロストリップ線
路を主とする伝送線路及びその線路波長を利用した共振
器、カップラ、フィルター等のマイクロ波回路素子が普
及しつつある。これらを構成する誘電体磁器に要求され
る特性として、小型化の要求に対して比誘電率が大きい
こと、高周波での誘電損失が小さいこと、言い換えれば
Q値が大きいこと、共振周波数の温度に対する変化が小
さいこと等が主として挙げられる。信頼性に対しては、
化学的に安定であること、機械的強度が高いことが挙げ
られる。
2. Description of the Related Art At present, with the progress of microwave circuit technology, various dielectric substrates are used to transmit microwaves such as resonators, couplers, and filters using transmission lines mainly including microstrip lines and their line wavelengths. Circuit elements are becoming widespread. The characteristics required of the dielectric porcelain constituting these are that the relative dielectric constant is large for the demand for miniaturization, the dielectric loss at high frequencies is small, in other words, the Q value is large, and the resonance frequency with respect to temperature is large. Mainly, the change is small. For reliability,
They are chemically stable and have high mechanical strength.

【0003】従来、この種の誘電体磁器としては、例え
ば、BaO−TiO2 系材料、BaaO−REO−Ti
2 (但し、REOは希土類元素酸化物)系材料および
CaZrO3 系材料などが知られている。
Conventionally, as this kind of dielectric porcelain, for example, BaO-TiO 2 material, BaaO-REO-Ti
O 2 (where REO is a rare earth oxide) -based material and CaZrO 3 -based material are known.

【0004】また、マイクロ波領域において適用される
回路基板としては、マイクロ波領域で導体損失が小さ
く、信頼性の高い導体材料である銅により配線パターン
を形成することが好適であると言われている。この銅に
よる配線は通常、高性能化、低コスト化、及び、リード
タイムの短縮化に有利な銅厚膜手法により形成されてい
る。
It is said that a circuit board applied in the microwave region is preferably formed of copper, which is a highly reliable conductor material, with small conductor loss in the microwave region. I have. The copper wiring is usually formed by a copper thick film method that is advantageous for high performance, low cost, and short lead time.

【0005】[0005]

【発明が解決しようとする問題点】しかしながら、基板
材料として従来より知られるチタン酸塩系の誘電体磁器
に対して銅厚膜法により銅配線パターンを形成する場
合、窒化雰囲気中で焼成する際に磁器が還元してしまう
という問題がある。そのために、Q値が大きく低下する
等誘電特性の劣化を引き起こすため、銅の配線パターン
を形成することができなかった。
However, when a copper wiring pattern is formed on a titanate-based dielectric porcelain conventionally known as a substrate material by a copper thick film method, it is difficult to fire the film in a nitriding atmosphere. There is a problem that porcelain is reduced. As a result, deterioration of dielectric characteristics such as a large decrease in the Q value is caused, so that a copper wiring pattern cannot be formed.

【0006】よって、本発明は、マイクロ波回路基板の
小型化、高信頼性化を可能とするため、優れた誘電特性
を有するとともに厚膜法によっても誘電特性の劣化のな
い銅配線パターンを形成した回路基板を提供することを
目的とするものである。
Accordingly, the present invention forms a copper wiring pattern having excellent dielectric characteristics and not deteriorating in dielectric characteristics even by a thick film method, in order to make the microwave circuit substrate smaller and more reliable. It is an object of the present invention to provide a circuit board having the above configuration.

【0007】[0007]

【問題点を解決するための手段】本発明者等は、CaZ
rO3 系に対して検討を加えた結果、添加物としてLa
3/2 、CeO2 、NdO3/2 、SmO3/2 、YO3/2
から選ばれる少なくとも1種の酸化物を1〜10モル%
の割合で含有することによってCaZrO3 系組成物の
結晶性が大幅に改善されることにより結晶性のよい磁器
が得られ、特性上において高誘電率、高Q値、低τfと
優れた磁器が得られ、且つこの誘電体材料が従来の誘電
体基板に比べ、耐還元性が高く、銅厚膜形成時の熱処理
において、特性が劣化しないことを知見した。
[Means for Solving the Problems] The present inventors have proposed CaZ
As a result of studying the rO 3 system, La
O 3/2 , CeO 2 , NdO 3/2 , SmO 3/2 , YO 3/2
1 to 10 mol% of at least one oxide selected from
By containing at a ratio of the above, the crystallinity of the CaZrO 3 -based composition is greatly improved, whereby a porcelain having good crystallinity can be obtained. In terms of characteristics, a porcelain excellent in high dielectric constant, high Q value, low τf It has been found that the obtained dielectric material has a higher resistance to reduction than a conventional dielectric substrate and does not deteriorate its properties in the heat treatment for forming a thick copper film.

【0008】即ち、本発明の回路基板はCaZrO
3 に、LaO3/2 、CeO2 、NdO3/ 2 、Sm
3/2 、YO3/2 から選ばれる少なくとも1種の希土類
元素酸化物を1〜10モル%の割合で含有する誘電体磁
器組基板上に、銅導体による配線パターンを形成したこ
とを特徴とするものである。
That is, the circuit board of the present invention is made of CaZrO.
To 3, LaO 3/2, CeO 2, NdO 3/2, Sm
A wiring pattern made of a copper conductor is formed on a dielectric ceramic assembly substrate containing at least one kind of rare earth element oxide selected from O 3/2 and YO 3/2 at a ratio of 1 to 10 mol%. It is assumed that.

【0009】本発明の回路基板において、磁器中の希土
類元素酸化物のモル比および重量比を上記の範囲に設定
した理由は、前記希土類元素酸化物の量が1モル%以下
では焼結性が不十分で誘電特性、特にQ値が低く、10
モル%を越えると焼結性は向上するが誘電特性の低下を
招くためである。
In the circuit board of the present invention, the reason why the molar ratio and the weight ratio of the rare earth element oxide in the porcelain are set in the above ranges is that when the amount of the rare earth element oxide is 1 mol% or less, the sinterability is low. Insufficient dielectric properties, especially low Q value
If it exceeds mol%, the sinterability is improved, but the dielectric properties are lowered.

【0010】なお、本発明におけるCa元素に対してB
a、Srを、Zrに対してHfをそれぞれ5モル%以下
で置換してもよい。
It is to be noted that B in the present invention corresponds to Ca element.
a and Sr may be substituted with Hf to 5 mol% or less with respect to Zr, respectively.

【0011】本発明において誘電体磁器を製造する方法
としては、磁器を構成する金属の酸化物、即ち、Ca
O、ZrO3 、LaO3/2 、CeO2 、NdO3/2 、S
mO3/ 2 、YO3/2 あるいは熱処理により酸化物に変換
し得る、例えば炭酸塩、硝酸塩、硫酸塩等の化合物を用
いて秤量混合後、所望により1200〜1500℃で仮
焼する。この混合物あるいは仮焼粉末を成型後、150
0〜1700℃の大気中で焼成することによって磁器を
得ることができる。
In the present invention, a method for manufacturing a dielectric porcelain includes a metal oxide constituting the porcelain, ie, Ca.
O, ZrO 3 , LaO 3/2 , CeO 2 , NdO 3/2 , S
mO 3/2, can be converted to oxides by YO 3/2 or heat treatment, for example carbonates, nitrates, after weighing mixed with a compound such as sulfates, calcined at desired 1200 to 1500 ° C.. After molding this mixture or calcined powder,
Porcelain can be obtained by firing in the air at 0 to 1700 ° C.

【0012】次に、上記により得られた磁器に対して銅
厚膜を形成する時は、厚膜ペーストとして銅粉末と金属
酸化物とガラスと、有機バインダーを調合し、これをス
クリーン印刷法やスプレー法により印刷した後、窒素雰
囲気中で850〜950℃で熱処理することにより得ら
れる。なお磁器の表面に形成される銅厚膜の厚みは10
〜25μmが好適である。
Next, when a copper thick film is formed on the porcelain obtained as described above, copper powder, metal oxide, glass, and an organic binder are prepared as a thick film paste, and the mixture is formed by a screen printing method or the like. After printing by the spray method, it is obtained by performing a heat treatment at 850 to 950 ° C. in a nitrogen atmosphere. The thickness of the copper thick film formed on the surface of the porcelain is 10
2525 μm is preferred.

【0013】[0013]

【作用】本発明において用いられる誘電体磁器は、それ
自体耐還元性に優れることから、銅厚膜法等により配線
パターンを形成しても磁器が還元されることがなく、誘
電率やQ値の低下がほとんどない。また、この磁器は、
0.8〜10GHzのマイクロ波領域において高誘電
率、高Q値を有し、且つ誘電率の温度変化が小さくしか
も強度が高いことから、マイクロ波領域で使用される共
振器、カップ、フィルター、ディレイライン等の回路基
板として高信頼性に優れたものである。
The dielectric porcelain used in the present invention is itself excellent in reduction resistance. Therefore, even if a wiring pattern is formed by a copper thick film method or the like, the porcelain is not reduced, and the dielectric constant and Q value are not reduced. There is almost no decrease. Also, this porcelain
Since it has a high dielectric constant and a high Q value in a microwave region of 0.8 to 10 GHz, and has a small temperature change in the dielectric constant and a high strength, a resonator, a cup, a filter, It is excellent in high reliability as a circuit board such as a delay line.

【0014】以下、本発明を次の例で説明する。Hereinafter, the present invention will be described with reference to the following examples.

【0015】[0015]

【実施例】出発原料として純度99%以上のCaC
3 、ZrO2 、LaO3/2 、CeO2 、NdO3/2
SmO3/2 、YO3/2 、MgCO3 、TiO2 の各粉末
を用いてそれらをモル比で表1になるように秤量後、純
水を加え樹脂ボールを用いて一昼夜ボールミル混合を行
なった。この混合物を乾燥後、1000〜1500℃で
2時間仮焼し、さらに約1重量%のバインダーを加えて
から整粒し得られた粉末を約1000kg/cm2 の圧
力でプレス成形し約30mm×30mm×1mmのゆが
みのない角板状の成形体を作製した。その後この成形体
を400℃で4時間脱バインダー処理し、さらに130
0〜1700℃の温度で2時間空気中において焼成し
た。
EXAMPLE CaC with a purity of 99% or more as a starting material
O 3 , ZrO 2 , LaO 3/2 , CeO 2 , NdO 3/2 ,
SmO 3/2, YO 3/2, MgCO 3 , after weighing such that in Table 1 thereof in a molar ratio with the powders of TiO 2, was carried out overnight ball milling using a resin ball adding pure water . After drying this mixture, it is calcined at 1000 to 1500 ° C. for 2 hours, and after adding about 1% by weight of a binder, sizing is performed. The resulting powder is press-molded under a pressure of about 1000 kg / cm 2 to form about 30 mm × A 30 mm × 1 mm square plate-shaped molded body without distortion was produced. Thereafter, the molded body was subjected to a binder removal treatment at 400 ° C. for 4 hours.
Calcination was performed in air at a temperature of 0 to 1700 ° C. for 2 hours.

【0016】得られた基板形状の磁器を平面研磨しサン
プルを得た。このサンプルを用いて、磁器表面に銅導体
ペーストをスクリーン印刷し、約20μm厚みのペース
ト層を形成した。これを乾燥後、窒素雰囲気中(酸素濃
度=8ppm )で900℃で10分間焼成し、基板上に銅
導体層を形成した。次に銅導体の接着強度(ピール強
度)を評価した。評価方法は、0.8φすずメッキ軟導
線を銅導体パッド(2mm角)に半田付けし、その銅線
を垂直に折り曲げた後、引っ張り試験により評価した。
The obtained substrate-shaped porcelain was planar-polished to obtain a sample. Using this sample, a copper conductor paste was screen-printed on the porcelain surface to form a paste layer having a thickness of about 20 μm. After drying, it was baked at 900 ° C. for 10 minutes in a nitrogen atmosphere (oxygen concentration = 8 ppm) to form a copper conductor layer on the substrate. Next, the adhesive strength (peel strength) of the copper conductor was evaluated. The evaluation method was such that a 0.8φ tin-plated soft conductive wire was soldered to a copper conductor pad (2 mm square), and the copper wire was bent vertically, and then evaluated by a tensile test.

【0017】また、空洞共振器法(基板試料を中央に挟
んだ金属円筒の電磁界共振器の共振特性より、試料基板
の誘電率と tanδを求める方法)により、共振周波数4
〜6GHzにて熱処理後の誘電率(εr)、Q値(1/
tanδ)を測定した。その後、銅厚膜形成時と同一条
件で熱処理し、再び空洞共振器法により、共振周波数4
〜6GHzにて誘電率、Q値を測定した。また、磁器表
面の両面に銀導体ペーストをスクリーン印刷し、約10
μm厚みのペースト層を形成した。これを乾燥後、大気
中で530℃で30分間焼成し、基板上に導体層を形成
し、平行平板コンデンサとした。このコンデンサを用い
て、誘電率の温度係数を−40℃〜+85℃の範囲で測
定した。結果は表1に示した。
Further, the resonance frequency is determined by the cavity resonator method (a method of obtaining the dielectric constant and tan δ of the sample substrate from the resonance characteristics of the electromagnetic field resonator formed of a metal cylinder with the substrate sample interposed therebetween).
Dielectric constant (εr) after heat treatment at up to 6 GHz, Q value (1 /
tan δ) was measured. Thereafter, heat treatment is performed under the same conditions as when forming the thick copper film, and the resonance frequency is again increased by the cavity resonator method.
The dielectric constant and Q value were measured at 66 GHz. Also, silver conductor paste was screen-printed on both sides of the porcelain surface,
A paste layer having a thickness of μm was formed. After this was dried, it was baked at 530 ° C. for 30 minutes in the air to form a conductor layer on the substrate, thereby obtaining a parallel plate capacitor. Using this capacitor, the temperature coefficient of the dielectric constant was measured in the range of −40 ° C. to + 85 ° C. The results are shown in Table 1.

【0018】[0018]

【表1】 [Table 1]

【0019】表1からも明らかなように、チタン酸塩を
用いた誘電体基板である試料No.14は銅厚膜焼成炉投
入後のQ値の劣化が著しい。これに対してCaZrO3
系誘電体材料は銅厚膜炉入前後の誘電特性は、誤差の範
囲で一致し、Q値の劣化等はみられなかった。しかし希
土類元素酸化物を全く含有しないCaZrO3 のみの試
料No.1はQ値が低く、また、希土類元素の酸化物量が
10モル%を越える試料No.6ではQ値が低く本発明の
目的に適しない。
As is clear from Table 1, Sample No. 14, which is a dielectric substrate using titanate, has a remarkable deterioration in the Q value after being put into a thick copper film firing furnace. On the other hand, CaZrO 3
The dielectric properties of the system dielectric material before and after entering the copper thick film furnace matched within an error range, and no deterioration of the Q value was observed. However, the sample No. 1 containing only CaZrO 3 containing no rare earth element oxide has a low Q value, and the sample No. 6 having a rare earth element oxide content of more than 10 mol% has a low Q value. Not suitable.

【0020】本発明の範囲内の回路基板は、いずれも比
誘電率25以上、Q値4000以上、τεが±100
(ppm/℃)以下の誘電特性が得られ、銅厚膜の接着
強度はいずれの試料も、2kgf/2mm□以上であ
り、基板表面に銅厚膜を形成することが可能となった。
Each of the circuit boards within the scope of the present invention has a relative dielectric constant of 25 or more, a Q value of 4000 or more, and τε of ± 100.
(Ppm / ° C.) or less, and the adhesive strength of the copper thick film was 2 kgf / 2 mm □ or more in each sample, and it was possible to form a copper thick film on the substrate surface.

【0021】[0021]

【発明の効果】以上詳述した通り、本発明の回路基板
は、特定のZr酸塩系誘電体を基板として用いることに
より、マイクロ波領域において優れた誘電特性を有する
とともに、耐還元性に優れることから、銅厚膜法による
銅の配線パターンを形成しても還元雰囲気において誘電
特性が劣化することがなく、高信頼性のマイクロ波領域
に適した誘電体回路基板を提供できる。
As described above in detail, the circuit board of the present invention has excellent dielectric characteristics in the microwave region and excellent reduction resistance by using a specific Zr salt-based dielectric as the substrate. Therefore, even if a copper wiring pattern is formed by a copper thick film method, a dielectric circuit board suitable for a microwave region with high reliability can be provided without deteriorating dielectric characteristics in a reducing atmosphere.

フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01G 4/12 Continuation of front page (58) Field surveyed (Int.Cl. 6 , DB name) H01G 4/12

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】CaZrO3 に対して、LaO3/2 、Ce
2 、NdO3/2 、SmO3/2 、YO3/2 から選ばれる
少なくとも1種を1〜10モル%の割合で含有する誘電
体磁器基板上に銅導体層を形成したことを特徴とする誘
電体回路基板。
(1) LaO 3/2 , Ce (CaZrO 3 )
A copper conductor layer is formed on a dielectric ceramic substrate containing at least one selected from O 2 , NdO 3/2 , SmO 3/2 , and YO 3/2 at a ratio of 1 to 10 mol%. Dielectric circuit board.
JP33191491A 1991-12-16 1991-12-16 Dielectric circuit board Expired - Fee Related JP2892204B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33191491A JP2892204B2 (en) 1991-12-16 1991-12-16 Dielectric circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33191491A JP2892204B2 (en) 1991-12-16 1991-12-16 Dielectric circuit board

Publications (2)

Publication Number Publication Date
JPH05166670A JPH05166670A (en) 1993-07-02
JP2892204B2 true JP2892204B2 (en) 1999-05-17

Family

ID=18249049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33191491A Expired - Fee Related JP2892204B2 (en) 1991-12-16 1991-12-16 Dielectric circuit board

Country Status (1)

Country Link
JP (1) JP2892204B2 (en)

Also Published As

Publication number Publication date
JPH05166670A (en) 1993-07-02

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