JP2796679B2 - PWM inverter device - Google Patents
PWM inverter deviceInfo
- Publication number
- JP2796679B2 JP2796679B2 JP1311809A JP31180989A JP2796679B2 JP 2796679 B2 JP2796679 B2 JP 2796679B2 JP 1311809 A JP1311809 A JP 1311809A JP 31180989 A JP31180989 A JP 31180989A JP 2796679 B2 JP2796679 B2 JP 2796679B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- voltage
- pass filter
- inverter
- pwm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Inverter Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、無停電電源装置や誘導電動機制御等に利用
されている、PWMインバータ装置の電力変換素子と、ロ
ーパスフィルタの損失改善に関するものである。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power conversion element of a PWM inverter device used for an uninterruptible power supply and an induction motor control and the like, and to a loss reduction of a low-pass filter. is there.
〔従来の技術〕 第１図は、キャリア周波数を一定とした従来のPWMイ
ンバータ装置の回路図である。第１図において、１は直
流入力電圧Ebを交流方形波電圧V2に変換するインバータ
回路、２は交流方形波電圧V2に含まれている高調波成分
を低減するローパスフィルタ回路、３は制御回路であ
る。[Prior Art] FIG. 1 is a circuit diagram of a conventional PWM inverter device having a constant carrier frequency. In FIG. 1, 1 is an inverter circuit for converting a DC input voltage Eb into an AC square wave voltage V2, 2 is a low-pass filter circuit for reducing harmonic components included in the AC square wave voltage V2, and 3 is a control circuit. is there.
次に動作について説明する。制御回路３において、信
号発生回路から出力される基準正弦波Vsと、三角波発生
回路から出力される三角波Vt（基準正弦波Vsの周波数に
比べ充分に高い）とを、比較回路CMPで比較し、基準正
弦波Vsの電圧値に比例するパルス幅を出力する。このパ
ルスでインバータ回路１のQ1、Q4とQ2、Q3を交互にオン
・オフ制御を行い、ローパスフィルタ回路２で高調波成
分を低減し、基準正弦波Vsに相似の交流出力電圧Voを出
力する。Next, the operation will be described. In the control circuit 3, the reference sine wave Vs output from the signal generation circuit is compared with the triangular wave Vt output from the triangular wave generation circuit (which is sufficiently higher than the frequency of the reference sine wave Vs) by the comparison circuit CMP. A pulse width proportional to the voltage value of the reference sine wave Vs is output. With this pulse, Q1, Q4 and Q2, Q3 of the inverter circuit 1 are alternately turned on / off, the harmonic component is reduced by the low-pass filter circuit 2, and an AC output voltage Vo similar to the reference sine wave Vs is output. .
第３図はインバータ回路１の動作波形図であり、V2は
インバータ回路１から出力される交流方形電圧を表し、
三角波状の電流波形ifはインバータ回路１から出力され
る高周波電流を表す。FIG. 3 is an operation waveform diagram of the inverter circuit 1, where V2 represents an AC square voltage output from the inverter circuit 1,
The triangular waveform current waveform if represents a high-frequency current output from the inverter circuit 1.
交流方形波電圧V2に含まれる高調波成分は、ローパス
フィルタ回路２で低減されて、交流出力電圧Voのキャリ
ア周波数での電圧はほぼ一定となり、ローパスフィルタ
回路２のインダクタンスをL1、L2とすると、インバータ
回路１から出力される単位時間あたりの高周波電流ifの
変化量は、 Δif＝（Eb−Vo）ton/（L1＋L2） となり、交流出力電圧Voが零のときに最大電流になる。
この電流により、インバータ回路１およびローパスフィ
ルタ回路２の導通損失が増大する。The harmonic component contained in the AC square wave voltage V2 is reduced by the low-pass filter circuit 2, and the voltage of the AC output voltage Vo at the carrier frequency becomes substantially constant. If the inductances of the low-pass filter circuit 2 are L1 and L2, The change amount of the high-frequency current if per unit time output from the inverter circuit 1 is Δif = (Eb−Vo) ton / (L1 + L2), and becomes the maximum current when the AC output voltage Vo is zero.
Due to this current, conduction loss of the inverter circuit 1 and the low-pass filter circuit 2 increases.
次に一例としてEb＝200V、L1＋L2＝1mH、キャリア周
波数ｆ＝25KHz（周期Ｔ＝40μＳ）としたときのifの変
化を計算してみる。交流出力電圧Voが141Vにあった場
合、インバータ回路１のQ1、Q4またはQ2、Q3のオン時間
は次式で表される。Next, as an example, change in if is calculated when Eb = 200 V, L1 + L2 = 1 mH, and carrier frequency f = 25 KHz (period T = 40 μS). When the AC output voltage Vo is 141 V, the ON time of Q1, Q4 or Q2, Q3 of the inverter circuit 1 is represented by the following equation.
ton＝Ｔ（Vo/2Ed＋0.5） 前述の条件にてオン時間を算出すると、ton＝34.1μ
Ｓとなり、このオン時間で変化する電流値Δifは約2Aに
なる。これに対し、Vo＝0Vのときを同様にして求める
と、ton＝20μＳとなりΔifは約4Aになる。すなわち、
出力電圧が小さくなるにしたがい高周波電流は大きくな
り、導通損失も増大する。ton = T (Vo / 2Ed + 0.5) When the on-time is calculated under the above conditions, ton = 34.1μ
S, and the current value Δif that changes during this on-time is about 2A. On the other hand, when Vo = 0V is similarly obtained, ton = 20 μS, and Δif becomes about 4A. That is,
As the output voltage decreases, the high-frequency current increases and the conduction loss increases.
本発明は上記問題点を解決するために、基準正弦波の
振幅によって変調された三角波（基準正弦波の振幅に反
比例している）と、該基準正弦波とを比較することで、
PWM変調とFM変調が混合された形のパルス波形を出力
し、インバータ回路を構成する電力変換素子のオン／オ
フ制御をおこない、PWMインバータ装置の出力に正弦波
を出力する。The present invention solves the above problem by comparing a triangular wave (inversely proportional to the amplitude of the reference sine wave) modulated by the amplitude of the reference sine wave with the reference sine wave,
It outputs a pulse waveform in the form of a mixture of PWM modulation and FM modulation, performs on / off control of the power conversion elements that constitute the inverter circuit, and outputs a sine wave to the output of the PWM inverter device.
本発明に係わるPWMインバータ装置は、三角波（キャ
リア周波数）を基準正弦波にて変調し、基準正弦波の振
幅に反比例して三角波（キャリア周波数）を変化させる
ことで、基準正弦波の0V付近における三角波（キャリア
周波数）が高周波化され、PWMインバータ装置の交流出
力電圧の0V付近において、インバータ回路とローパスフ
ィルタ回路間を流れる三角波状の電流ifを抑制するよう
に作用する。The PWM inverter device according to the present invention modulates a triangular wave (carrier frequency) with a reference sine wave, and changes the triangular wave (carrier frequency) in inverse proportion to the amplitude of the reference sine wave, thereby generating a signal at around 0 V of the reference sine wave. The triangular wave (carrier frequency) is increased in frequency, and acts so as to suppress the triangular wave-like current if flowing between the inverter circuit and the low-pass filter circuit near 0 V of the AC output voltage of the PWM inverter device.
本発明の実施例を前記第１図と同一部分に同一符号を
付した第２図について説明する。第２図において４は基
準正弦波発生回路、５は基準正弦波Vsを整流する全波整
流回路、６は全波整流回路５の整流波形を正・負両極性
の電圧の変換する電圧変換回路、７は入力電圧値に応じ
た周期の三角波信号を発生する三角波発生回路、８は基
準正弦波発生回路４と三角波発生回路７の出力電圧を比
較し、変調パルスを出力する電圧比較回路、９は反転回
路である。An embodiment of the present invention will be described with reference to FIG. 2 in which the same parts as those in FIG. In FIG. 2, reference numeral 4 denotes a reference sine wave generating circuit, reference numeral 5 denotes a full-wave rectifier circuit for rectifying the reference sine wave Vs, and reference numeral 6 denotes a voltage conversion circuit for converting the rectified waveform of the full-wave rectifier circuit 5 into a voltage having both positive and negative polarities. , 7 is a triangular wave generating circuit for generating a triangular wave signal having a cycle corresponding to the input voltage value, 8 is a voltage comparing circuit for comparing the output voltages of the reference sine wave generating circuit 4 and the triangular wave generating circuit 7 and outputting a modulation pulse, 9 Is an inverting circuit.
次に動作について説明する。基準正弦波発生回路４の
出力電圧（基準正弦波）Vsと、基準正弦波Vsの振幅に反
比例するように変調された三角波信号Vtとを比較して、
パルス幅変調された信号を発生し、インバータ回路１の
トランジスタ（Q1〜Q4）をスイッチングする。Next, the operation will be described. By comparing the output voltage (reference sine wave) Vs of the reference sine wave generation circuit 4 with the triangular wave signal Vt modulated so as to be inversely proportional to the amplitude of the reference sine wave Vs,
A pulse width modulated signal is generated, and the transistors (Q1 to Q4) of the inverter circuit 1 are switched.
第４図は交流出力電圧Voと高周波電流を表わした図で
ある。このように、交流出力電圧Voの出力電圧が小さく
なるにつれて、キャリア周波数が高くなるように動作
し、インバータ回路１とローパスフィルタ回路間に流れ
る高周波電流ifを制御する。FIG. 4 is a diagram showing the AC output voltage Vo and the high-frequency current. As described above, the operation is performed so that the carrier frequency increases as the output voltage of the AC output voltage Vo decreases, and the high-frequency current if flowing between the inverter circuit 1 and the low-pass filter circuit is controlled.
以上のように、本発明によれば、インバータ回路とロ
ーパスフィルタ回路間を流れる高周波電流を抑制でき、
インバータ回路およびローパスフィルタ回路の高周波電
流による導通損失を低減する効果がある。As described above, according to the present invention, high-frequency current flowing between the inverter circuit and the low-pass filter circuit can be suppressed,
This has the effect of reducing conduction loss due to high-frequency current in the inverter circuit and the low-pass filter circuit.
第１図は従来のPWMインバータ装置の回路図、第２図は
本発明によるキャリア周波数を可変するPWMインバータ
装置の回路図、第３図は従来のPWMインバータ回路の動
作波形図、第４図は本発明によるキャリア周波数を可変
するPWMインバータ回路の動作波形図である。FIG. 1 is a circuit diagram of a conventional PWM inverter device, FIG. 2 is a circuit diagram of a PWM inverter device for varying a carrier frequency according to the present invention, FIG. 3 is an operation waveform diagram of a conventional PWM inverter circuit, and FIG. FIG. 4 is an operation waveform diagram of a PWM inverter circuit that varies a carrier frequency according to the present invention.
───────────────────────────────────────────────────── フロントページの続き 審査官 松澤 福三郎 ──────────────────────────────────────────────────続 き Continued on the front page Examiner Fukusaburo Matsuzawa
Claims (1)
形波電圧に変換するインバータ回路と、該インバータ回
路の出力電圧波形に含まれる、高調波成分の低減を行う
ローパスフィルタ回路を有するPWMインバータ装置にお
いて、ローパスフィルタ回路の出力電圧の基準となる信
号の大きさに、反比例してキャリア周波数を可変し、そ
のキャリアと基準信号とを比較する制御回路を有するこ
とを特徴とする、PWMインバータ装置。An inverter circuit for converting a DC voltage into an AC square wave voltage of pulse width modulation (PWM), and a PWM having a low-pass filter circuit for reducing harmonic components contained in an output voltage waveform of the inverter circuit. In the inverter device, a PWM inverter characterized by having a control circuit that varies a carrier frequency in inverse proportion to the magnitude of a signal serving as a reference of an output voltage of a low-pass filter circuit, and compares the carrier with a reference signal. apparatus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1311809A JP2796679B2 (en) | 1989-11-30 | 1989-11-30 | PWM inverter device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1311809A JP2796679B2 (en) | 1989-11-30 | 1989-11-30 | PWM inverter device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03173358A JPH03173358A (en) | 1991-07-26 |
| JP2796679B2 true JP2796679B2 (en) | 1998-09-10 |
Family
ID=18021684
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1311809A Expired - Fee Related JP2796679B2 (en) | 1989-11-30 | 1989-11-30 | PWM inverter device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2796679B2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5944974A (en) * | 1982-09-07 | 1984-03-13 | Fujitsu Denso Ltd | Power source circuit |
| JPS62138068A (en) * | 1985-12-11 | 1987-06-20 | Fuji Electric Co Ltd | Controller for pwm inverter |
| JPS63294265A (en) * | 1987-05-27 | 1988-11-30 | Shinko Electric Co Ltd | Pulse width modulation circuit for inverter |
-
1989
- 1989-11-30 JP JP1311809A patent/JP2796679B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5944974A (en) * | 1982-09-07 | 1984-03-13 | Fujitsu Denso Ltd | Power source circuit |
| JPS62138068A (en) * | 1985-12-11 | 1987-06-20 | Fuji Electric Co Ltd | Controller for pwm inverter |
| JPS63294265A (en) * | 1987-05-27 | 1988-11-30 | Shinko Electric Co Ltd | Pulse width modulation circuit for inverter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03173358A (en) | 1991-07-26 |
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