JP2703861B2 - Stress-resistant chip component and its mounting method - Google Patents
Stress-resistant chip component and its mounting methodInfo
- Publication number
- JP2703861B2 JP2703861B2 JP5244300A JP24430093A JP2703861B2 JP 2703861 B2 JP2703861 B2 JP 2703861B2 JP 5244300 A JP5244300 A JP 5244300A JP 24430093 A JP24430093 A JP 24430093A JP 2703861 B2 JP2703861 B2 JP 2703861B2
- Authority
- JP
- Japan
- Prior art keywords
- board
- chip component
- glass epoxy
- thermal expansion
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Combinations Of Printed Boards (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は面実装用のチップ部品及
びその実装方法に関し、特に実装後の温度変化によりハ
ンダ付け部に熱ストレスが加わるのを軽減する技術に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip component for surface mounting and a method for mounting the same, and more particularly to a technique for reducing the application of thermal stress to a soldered portion due to a temperature change after mounting.
【０００２】[0002]
【従来の技術】一般に、電子部品をプリント基板に実装
する場合、その電子部品から出ているリード線を基板の
スルーホールに通し裏側（Ｂ面側）からハンダ付けを行
う。これに対し、近年、リード線を微小化あるいは省略
した電子部品を直接に基板の表側（Ａ面側）に実装する
面実装技術が採用されている。このような面実装技術に
よると、プリント基板の両面を有効に活用でき、電子部
品の小型化及びそれに伴なう実装ピッチの縮小と相俟っ
て、高密度の実装が可能となるメリットを有する。2. Description of the Related Art Generally, when an electronic component is mounted on a printed circuit board, a lead wire protruding from the electronic component is passed through a through hole of the substrate and soldered from the back side (surface B side). On the other hand, in recent years, a surface mounting technique has been adopted in which an electronic component whose lead wires are miniaturized or omitted is directly mounted on the front side (A side) of the substrate. According to such a surface mounting technology, both sides of the printed circuit board can be effectively utilized, and there is an advantage that high-density mounting becomes possible in conjunction with the miniaturization of electronic components and the accompanying reduction in mounting pitch. .
【０００３】図３に、リード線のないチップ部品１をプ
リント基板３上に面実装した状態を示す。プリント基板
３の表面に形成されたパターン５に対し、チップ部品１
の両端の電極７がハンダ付けされる。このようなチップ
部品１には、抵抗器、コンデンサ、トランジスタ、ある
いはＩＣなどがある。FIG. 3 shows a state in which a chip component 1 having no lead wire is surface-mounted on a printed circuit board 3. For the pattern 5 formed on the surface of the printed circuit board 3, the chip component 1
Are soldered. Such a chip component 1 includes a resistor, a capacitor, a transistor, or an IC.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、チップ
部品１はその両端に配置されている電極７をハンダで基
板３に固定してしまうため、チップ部品１と基板３との
熱膨張係数の差が大きいと、電子部品であるチップ部品
１の動作と停止が繰り返されることによる温度変化によ
って、ハンダ付け部９に熱ストレスが加わり、ハンダ付
け部９にクラックが入る可能性があった。甚だしい場合
にはハンダ付け部９が完全に破断してしまう恐れもあ
る。特に装置の小型化を図るために高密度実装されたプ
リント基板にあっては、部品１から発生するジュール熱
を効率的に排出するために、基板３に熱伝導性が高い金
属材料を採用する傾向が強くなってきており、前記熱膨
張係数の差はさらに大きくなる傾向にある。このような
背景のもとに、熱ストレスに強いチップ部品が待望され
ていた。However, the chip component 1 has the electrodes 7 arranged at both ends thereof fixed to the substrate 3 by soldering, so that the difference in the coefficient of thermal expansion between the chip component 1 and the substrate 3 is small. If it is large, the soldering portion 9 may be subjected to thermal stress due to a temperature change due to the repeated operation and stoppage of the chip component 1, which is an electronic component, and the soldering portion 9 may be cracked. In severe cases, the soldered portion 9 may be completely broken. In particular, in the case of a printed circuit board mounted at high density in order to reduce the size of the device, a metal material having high thermal conductivity is used for the substrate 3 in order to efficiently discharge Joule heat generated from the component 1. The tendency is increasing, and the difference in the coefficient of thermal expansion tends to be further increased. Against this background, chip components resistant to heat stress have been long-awaited.
【０００５】本発明は、以上の問題点を解決するために
なされたもので、部品の温度変化に伴う熱ストレスに強
い耐ストレスチップ部品とその実装方法を提供すること
を目的とする。The present invention has been made to solve the above problems, and an object of the present invention is to provide a stress-resistant chip component that is resistant to thermal stress caused by a temperature change of the component, and a mounting method thereof.
【０００６】[0006]
【課題を解決するための手段】以上の目的を達成するた
めに、この発明に係る耐ストレスチップ部品は、面実装
用の比較的低熱膨張係数を有するチップ部品を比較的高
熱膨張係数を有する金属製プリント基板に電気的に接続
するために、該チップ部品と該プリント基板との中間の
熱膨張係数を有するガラスエポキシ基板に該チップ部品
を電気的な接続を保って一体的に固設するとともに、該
ガラスエポキシ基板に形成したスルーホールを介して該
チップ部品を該プリント基板と電気的に接続するように
するとともに該スルーホールを該ガラスエポキシ基板を
該プリント基板へ面実装のために半田付けする部分に位
置させ、該ガラスエポキシ基板を該プリント基板へ半田
付けした際に該スルーホールを介して該半田付の有無を
確認可能としてなることを特徴とする。In order to achieve the above object, a stress-resistant chip component according to the present invention has a relatively high coefficient of thermal expansion for chip mounting.
In order to electrically connect to a metal printed board having a coefficient of thermal expansion , the chip part is integrated with a glass epoxy board having a coefficient of thermal expansion intermediate between the chip part and the printed board while maintaining an electrical connection. manner as well as fixed, the
Through the through hole formed in the glass epoxy substrate
To electrically connect the chip components to the printed circuit board
And insert the through hole into the glass epoxy board.
The part to be soldered to the printed circuit board for surface mounting
And solder the glass epoxy board to the printed board.
At the time of attaching, the presence or absence of the soldering through the through hole
It is characterized in that it can be confirmed .
【０００７】また、この発明のチップ部品をプリント基
板に電気的に接続する実装方法は、面実装用の比較的低
熱膨張係数を有するチップ部品を比較的高熱膨張係数を
有するプリント基板に電気的に接続する方法において、
該チップ部品と該プリント基板との中間の熱膨張係数を
有するガラスエポキシ基板を準備し、該ガラスエポキシ
基板には予め該チップ部品を該プリント基板に電気的に
接続するスルーホールを該プリント基板との半田付け部
に形成しておき、該ガラスエポキシ基板に該チップ部品
を電気的な接続を保って一体的に固設し、前記ガラスエ
ポキシ基板に設けられた該半田付け部を介して該ガラス
エポキシ基板をリフローハンダ付け法によって該プリン
ト基板に実装することを特徴とする。Further, the mounting method for electrically connecting the chip component of the present invention to a printed circuit board is relatively low for surface mounting.
The relatively high thermal expansion coefficient chip component having a thermal expansion coefficient
In a method of electrically connecting to a printed circuit board having ,
Preparing a glass epoxy substrate having a coefficient of thermal expansion intermediate between the chip component and the printed circuit board;
The chip components are electrically connected to the printed circuit board beforehand.
Connect the through hole to be soldered to the printed circuit board
The chip components are integrally fixed to the glass epoxy substrate while maintaining electrical connection , and the glass epoxy substrate is formed.
The glass via the soldered portion provided on the oxy board
An epoxy board is mounted on the printed board by a reflow soldering method.
【０００８】[0008]
【作用】前記の構成を有するこの発明によれば、チップ
部品との熱膨張係数の差が大きい金属製基板を使用する
場合であっても、チップ部品とプリント基板との間に介
在するガラスエポキシ基板が熱膨張によるストレスを和
らげ、ハンダ付け部に過度の熱ストレスが加えられるこ
とを防止する。SUMMARY OF] According to the present invention having the configuration described above, even when using a metal substrate having a large difference in thermal expansion coefficient between the switch-up components, interposed between the chip component and the printed board The glass epoxy substrate relieves stress due to thermal expansion and prevents excessive thermal stress from being applied to the soldered portion.
【０００９】[0009]
【実施例】以下、本発明の一実施例を図１及び図２を用
いて説明する。本実施例のプリント基板３（メイン基
板）は放熱性に優れた金属製であり、具体的にはアルミ
ニウム（熱膨張係数０．２４×１０-4）又は銅（熱膨張
係数０．１８×１０-4）が用いられる。この基板３に取
り付けられるチップ部品１は抵抗器であり、両端に電極
７が形成されている。チップ部品１の熱膨張係数は０．
０７６×１０-4であり、前記メイン基板３よりも１桁小
さい。チップ部品１と基板３との間に介在するサブ基板
１１は、ガラスエポキシ基板である。サブ基板１１の熱
膨張係数は０．１３×１０-4であり、前記メイン基板３
とチップ部品１との中間の値となっている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. The printed board 3 (main board) of the present embodiment is made of metal having excellent heat dissipation, and specifically, aluminum (coefficient of thermal expansion 0.24 × 10 −4 ) or copper (coefficient of thermal expansion 0.18 × 10 4 ). -4 ) is used. The chip component 1 attached to the substrate 3 is a resistor, and electrodes 7 are formed at both ends. The thermal expansion coefficient of the chip component 1 is 0.
076 × 10 −4 , which is one digit smaller than that of the main substrate 3. The sub board 11 interposed between the chip component 1 and the board 3 is a glass epoxy board. The thermal expansion coefficient of the sub substrate 11 is 0.13 × 10 −4 ,
And the chip component 1 have an intermediate value.
【００１０】サブ基板１１の上面には、前記チップ部品
１の電極７と接続される銅箔パターン１３が形成されて
いる。サブ基板１１の下面には、メイン基板３の回路を
形成する銅箔パターン５と接続するための銅箔パターン
１５が形成されている。これらの銅箔パターン１３，１
５は、スルーホール１７により電気的に接続されてい
る。又、スルーホール１７はメイン基板３とサブ基板１
１との半田付けがなされているかどうかを確認する機能
も有している。On the upper surface of the sub-substrate 11, a copper foil pattern 13 connected to the electrodes 7 of the chip component 1 is formed. On the lower surface of the sub-board 11, a copper foil pattern 15 for connection with the copper foil pattern 5 forming a circuit of the main board 3 is formed. These copper foil patterns 13, 1
5 are electrically connected by through holes 17. Further, the through hole 17 is formed between the main board 3 and the sub board 1.
It also has a function of confirming whether or not soldering has been performed.
【００１１】本実施例において、チップ部品１及びサブ
基板１１を面実装するためのハンダ付けは、リフローに
よる。すなわち、メイン基板３及びサブ基板１１の両面
の銅箔パターン１３，５に、ハンダぺーストを印刷す
る。そして、メイン基板３の上に、サブ基板１１を介し
てチップ部品１を載置する。その載置したままの状態で
メイン基板３をＵＶ炉の中に入れ、高温雰囲気中で印刷
されたハンダを再溶融させる。溶融したハンダは、表面
張力によってチップ部品１の電極７あるいは銅箔パター
ン１３，１５，５へ引き寄せられ、各電極あるいはパタ
ーン間を確実に接合する。In this embodiment, the soldering for surface mounting the chip component 1 and the sub-substrate 11 is based on reflow. That is, the solder paste is printed on the copper foil patterns 13 and 5 on both sides of the main board 3 and the sub board 11. Then, the chip component 1 is placed on the main board 3 via the sub board 11. The main substrate 3 is placed in a UV furnace with the mounted state, and the printed solder is melted again in a high-temperature atmosphere. The melted solder is attracted to the electrodes 7 or the copper foil patterns 13, 15, 5 of the chip component 1 by surface tension, so that the electrodes or the patterns are securely joined.
【００１２】このように、本実施例によれば、チップ部
品１とメイン基板３との間に両者の中間の熱膨張係数を
有するサブ基板１１が介装されているので、チップ部品
１とサブ基板１１との間の接合部に作用する熱ストレス
は、チップ部品１をメイン基板３に直接取り付ける場合
と比較して大幅に低減される。また、チップ部品１とサ
ブ基板１１、及びサブ基板１１とメイン基板３との間の
ハンダ付けは、リフロー方式で実施することができるの
で、実装作業の効率は部品をメイン基板に直接実装する
従来の場合と比較して遜色ないものとなる。As described above, according to the present embodiment, the sub-substrate 11 having a thermal expansion coefficient intermediate between the chip component 1 and the main substrate 3 is interposed between the chip component 1 and the main substrate 3. The thermal stress acting on the joint with the substrate 11 is greatly reduced as compared with the case where the chip component 1 is directly attached to the main substrate 3. Further, since the soldering between the chip component 1 and the sub-board 11 and between the sub-board 11 and the main board 3 can be performed by a reflow method, the efficiency of the mounting operation is reduced by the conventional method in which the components are directly mounted on the main board. It is comparable to the case of.
【００１３】なお、以上の実施例では、チップ部品１と
サブ基板１１とを別々に用意し、メイン基板３に実装す
る際にチップ部品１及びサブ基板１１を重ねた状態でメ
イン基板３に載置するものであったが、他の実施例にお
いては予めチップ部品１とサブ基板１１とを一体化させ
ておくことも可能である。このチップ部品１とサブ基板
１１との一体化は、ハンダ付けのみならず、金属部分の
かしめ、あるいは金属部分を接触させた状態で樹脂コー
ティングする等の他の方法を適宜採用してよい。なお、
ハンダ付け以外の方法で一体化を行えば、リフローのＵ
Ｖ炉内で、チップ部品１とサブ基板１１との接合部が再
溶融する恐れがなくなる。In the above embodiment, the chip component 1 and the sub-substrate 11 are separately prepared, and when the chip component 1 and the sub-substrate 11 are mounted on the main substrate 3, the chip component 1 and the sub-substrate 11 are stacked on the main substrate 3. However, in another embodiment, the chip component 1 and the sub-substrate 11 can be integrated in advance. The integration of the chip component 1 and the sub-substrate 11 may be appropriately performed not only by soldering, but also by other methods such as caulking a metal portion or resin coating with the metal portion in contact. In addition,
If integration is performed by a method other than soldering, U
In the V furnace, there is no possibility that the joint between the chip component 1 and the sub-substrate 11 is re-melted.
【００１４】[0014]
【発明の効果】以上実施例によって説明したように、本
発明の耐ストレスチップ部品及びその実装方法によれ
ば、チップ部品とメイン基板との間に、両者の中間の熱
膨張係数を有するガラスエポキシ基板を介在させること
になるので、チップ部品とメイン基板との間の熱膨張係
数の差が大きい場合であっても、チップ部品の温度変化
に伴って接合部に作用する熱ストレスを和らげ、ハンダ
付け部にクラックが入るなどの不都合が生じるのを防止
できる。また、ガラスエポキシ基板に形成したスルーホ
ールを介してチップ部品をプリント基板と電気的に接続
するようにするとともにスルーホールをガラスエポキシ
基板をプリント基板へ面実装のために半田付けする部分
に位置させたので、スルーホールを通して両者の半田付
けの状態を確認することができる。 As described in the above embodiments, according to the stress-resistant chip component and the mounting method of the present invention, a glass epoxy having a thermal expansion coefficient intermediate between the chip component and the main board is provided. Since the board is interposed, even if the difference in thermal expansion coefficient between the chip component and the main board is large, the thermal stress acting on the joint due to the temperature change of the chip component is relieved and the solder It is possible to prevent inconveniences such as cracks in the attachment portion. Also, a through-hole formed on a glass epoxy substrate
Electrical connection of chip components to printed circuit boards via tools
So that the through holes are glass epoxy
The part where the board is soldered to the printed circuit board for surface mounting
And soldered through the through hole.
You can check the status of injury.
【図１】本発明の一実施例を示す斜視図である。FIG. 1 is a perspective view showing an embodiment of the present invention.
【図２】図１の断面図である。FIG. 2 is a sectional view of FIG.
【図３】従来例を示す図である。FIG. 3 is a diagram showing a conventional example.
１ チップ部品 ３ メイン基板 ５，１３，１５ 銅箔パターン ７ 電極 ９ ハンダ付け部 １１ サブ基板 １７ スルーホール DESCRIPTION OF SYMBOLS 1 Chip component 3 Main board 5, 13, 15 Copper foil pattern 7 Electrode 9 Soldering part 11 Sub board 17 Through hole
フロントページの続き (72)発明者 和泉 清彦 東京都港区新橋５丁目36番11号 いわき 電子株式会社内 (56)参考文献 特開 平２−83946（ＪＰ，Ａ) 特開 平６−77631（ＪＰ，Ａ) 特開 平５−129768（ＪＰ，Ａ)Continuation of the front page (72) Inventor Kiyohiko Izumi 5-36-11 Shimbashi, Minato-ku, Tokyo Iwaki Electronics Co., Ltd. (56) References JP-A-2-83946 (JP, A) JP-A-6-77631 ( JP, A) JP-A-5-129768 (JP, A)
Claims (2)
チップ部品を比較的高熱膨張係数を有する金属製プリン
ト基板に電気的に接続するために、該チップ部品と該プ
リント基板との中間の熱膨張係数を有するガラスエポキ
シ基板に該チップ部品を電気的な接続を保って一体的に
固設するとともに、該ガラスエポキシ基板に形成したス
ルーホールを介して該チップ部品を該プリント基板と電
気的に接続するようにするとともに該スルーホールを該
ガラスエポキシ基板を該プリント基板へ面実装のために
半田付けする部分に位置させ、該ガラスエポキシ基板を
該プリント基板へ半田付けした際に該スルーホールを介
して該半田付の有無を確認可能としてなることを特徴と
する耐ストレスチップ部品。1. A chip component having a relatively low coefficient of thermal expansion for surface mounting to electrically connect a chip component having a relatively high coefficient of thermal expansion to a metal printed board having a relatively high coefficient of thermal expansion. Glass epoxy with thermal expansion coefficient in between
The chip parts are integrally fixed to the glass epoxy board while maintaining the electrical connection, and the chip parts formed on the glass epoxy board are formed.
The chip component is connected to the printed circuit board through a through hole.
And the through hole is
For surface mounting of glass epoxy board to the printed board
Place the glass epoxy board on the part to be soldered.
When soldered to the printed circuit board,
Wherein the presence or absence of the soldering can be confirmed .
チップ部品を比較的高熱膨張係数を有するプリント基板
に電気的に接続する方法において、該チップ部品と該プ
リント基板との中間の熱膨張係数を有するガラスエポキ
シ基板を準備し、該ガラスエポキシ基板には予め該チッ
プ部品を該プリント基板に電気的に接続するスルーホー
ルを該プリント基板との半田付け部に形成しておき、該
ガラスエポキシ基板に該チップ部品を電気的な接続を保
って一体的に固設し、前記ガラスエポキシ基板に設けら
れた該半田付け部を介して該ガラスエポキシ基板をリフ
ローハンダ付け法によって該プリント基板に実装するこ
とを特徴とする耐ストレスチップ部品の実装方法。To 2. A printed circuit board having a relatively <br/> chip component having a low thermal expansion coefficient relatively high thermal expansion coefficient for surface mounting in the method of electrically connecting, with said chip component and the printed board Glass epoxy with intermediate thermal expansion coefficient
A glass substrate is prepared, and the glass epoxy substrate is
Through-housing for electrically connecting the components to the printed circuit board.
Is formed on the soldering part with the printed circuit board.
The chip components are integrally fixed on a glass epoxy substrate while maintaining electrical connection, and provided on the glass epoxy substrate.
The glass epoxy board is mounted on the printed board by the reflow soldering method via the soldered portion .
And a method for mounting a stress-resistant chip component.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5244300A JP2703861B2 (en) | 1993-09-30 | 1993-09-30 | Stress-resistant chip component and its mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5244300A JP2703861B2 (en) | 1993-09-30 | 1993-09-30 | Stress-resistant chip component and its mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07106751A JPH07106751A (en) | 1995-04-21 |
| JP2703861B2 true JP2703861B2 (en) | 1998-01-26 |
Family
ID=17116691
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5244300A Expired - Lifetime JP2703861B2 (en) | 1993-09-30 | 1993-09-30 | Stress-resistant chip component and its mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2703861B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SE512366C2 (en) * | 1998-07-07 | 2000-03-06 | Ericsson Telefon Ab L M | Device and method for mounting on electronic circuit boards |
| JP5655818B2 (en) * | 2012-06-12 | 2015-01-21 | 株式会社村田製作所 | Chip component structure |
| DE102016105910A1 (en) * | 2016-03-31 | 2017-10-05 | Epcos Ag | capacitor arrangement |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0283946A (en) * | 1988-09-21 | 1990-03-26 | Hitachi Ltd | Connection of multilayer film |
| JPH0677631A (en) * | 1992-08-28 | 1994-03-18 | Matsushita Electric Ind Co Ltd | Mounting method of chip component onto aluminum board |
-
1993
- 1993-09-30 JP JP5244300A patent/JP2703861B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07106751A (en) | 1995-04-21 |
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