JP2671576B2 - ATM switch redundant switching method - Google Patents
ATM switch redundant switching methodInfo
- Publication number
- JP2671576B2 JP2671576B2 JP19965890A JP19965890A JP2671576B2 JP 2671576 B2 JP2671576 B2 JP 2671576B2 JP 19965890 A JP19965890 A JP 19965890A JP 19965890 A JP19965890 A JP 19965890A JP 2671576 B2 JP2671576 B2 JP 2671576B2
- Authority
- JP
- Japan
- Prior art keywords
- system switch
- cells
- switching information
- switch
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Data Exchanges In Wide-Area Networks (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はATMスイッチの冗長切替方式に関し、特にセ
ルの競合を避けるため出力部にバッファを設けたATMス
イッチの冗長切替方式に関する。Description: TECHNICAL FIELD The present invention relates to a redundant switching system of an ATM switch, and more particularly to a redundant switching system of an ATM switch having a buffer at an output section to avoid cell contention.
従来のこの種のATM（非同期転送モード）スイッチの
冗長切替方式では、第４図に示すように分岐回路14及び
選択回路18が上位制御部12からの切替情報を直接受信し
て同時に分岐回路14及び選択回路18を現用系スイッチ15
及び予備系スイッチ16の一方から他方へ切替えている。In this type of conventional ATM (asynchronous transfer mode) switch redundancy switching method, as shown in FIG. 4, the branch circuit 14 and the selection circuit 18 directly receive the switching information from the upper control unit 12 and simultaneously branch the branch circuit 14 and And the selection circuit 18 to the active system switch 15
And the standby system switch 16 is switched from one to the other.
上述した従来のATMスイッチの冗長切替方式では、例
えば現用系スイッチ15から予備系スイッチ16への切替が
行われるときに、現用系スイッチ15内のバッファに残っ
ていたデータが廃棄されてしまうため、瞬断が発生する
という問題点がある。In the above-mentioned conventional ATM switch redundancy switching method, for example, when switching from the active switch 15 to the standby switch 16, the data remaining in the buffer in the active switch 15 is discarded, There is a problem that a momentary interruption occurs.
本発明の冗長切替方式は、それぞれセルデータを一時
記憶するためのバッファを持つ非同期転送モード（AT
M）用の現用系スイッチ及び予備系スイッチと、入力デ
ータ中のセルに切替情報を書き込む切替情報挿入部と、
該切替情報の書き込まれたセルを監視して前記現用系ス
イッチ及び前記予備系スイッチへ転送するセルの振り分
けを行う分岐回路と、該分岐回路のセル振り分けを制御
する第１の監視制御部と、前記現用系スイッチ及び前記
予備系スイッチから読み出されるセルの選択を行う選択
回路と、該選択回路の選択を制御する第２の監視制御部
とを備えている。The redundancy switching method of the present invention is an asynchronous transfer mode (AT) which has a buffer for temporarily storing cell data.
M) active system switch and standby system switch, a switching information insertion unit that writes switching information to cells in the input data,
A branch circuit that monitors the cells in which the switching information is written and distributes the cells to be transferred to the active system switch and the standby system switch; and a first monitoring controller that controls the cell distribution of the branch circuits. A selection circuit for selecting cells read from the active system switch and the standby system switch, and a second monitoring controller for controlling selection of the selection circuit are provided.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は本発明の第１の実施例を示すブロック図でら
う。この実施例と第４図の従来方式との相違点は、分岐
回路４の前段にアイドルセルへ切替情報を書き込むため
の切替情報挿入部１を設けたことと、該切替情報の書き
込まれた切替制御用セルを監視しながら分岐回路４及び
選択回路８をそれぞれ制御する監視制御部３及び７を設
けたことである。第４図の従来方式では、上位制御部12
から送信する切替情報が分岐回路14と選択回路18と直接
制御してスイッチが切替を行なうので、切替情報受信時
に現用系スイッチ５（あるいは予備系スイッチ16）内の
バッファ内に溜っているセルが廃棄されてしまう。FIG. 1 is a block diagram showing a first embodiment of the present invention. The difference between this embodiment and the conventional method shown in FIG. 4 is that a switching information insertion unit 1 for writing switching information to an idle cell is provided in the preceding stage of the branch circuit 4 and that switching in which the switching information is written is performed. That is, the monitoring control units 3 and 7 for controlling the branch circuit 4 and the selection circuit 8 while monitoring the control cell are provided. In the conventional method shown in FIG. 4, the host controller 12
Since the switch information is directly controlled by the branch circuit 14 and the selection circuit 18 to be switched by the switch, when the switch information is received, the cells accumulated in the buffer in the active switch 5 (or the standby switch 16) are not stored. It will be discarded.
本実施例では、切替情報挿入部１で受信したアイドル
セルに、上位制御部２から受信する切替情報を書き込
む。監視制御部３では、該切替情報が書き込まれている
切替制御用セルの出現を監視し、切替制御用セルを受信
すると分岐回路４を制御して現用系スイッチ５から予備
系スイッチ６への切替を行う。これにより、切替制御用
セルは現用系スイッチ５内のバッファ51の最後に溜り、
切替制御用セルの直後に続くセルは予備系スイッチ６の
バッファ61に溜る。監視制御部７では、現用系スイッチ
５からの出力信号S7を選択中に切替制御用セルを受信す
ると、予備系スイッチ６からの出力信号S8の選択に切替
える。これにより、上位制御部２からの切替情報受信時
に現用系スイッチ５のバッファ51に内に溜っているセル
を廃棄せずに、無瞬断でスイッチ切替えを行うことがで
きる。In this embodiment, the switching information received from the higher-level control unit 2 is written in the idle cell received by the switching information insertion unit 1. The monitoring control unit 3 monitors the appearance of the switching control cell in which the switching information is written, and when receiving the switching control cell, controls the branch circuit 4 to switch from the active system switch 5 to the standby system switch 6. I do. As a result, the switching control cell accumulates at the end of the buffer 51 in the active system switch 5,
The cells immediately following the switching control cell are accumulated in the buffer 61 of the standby system switch 6. When the switching control cell is received while the output signal S7 from the active system switch 5 is being selected, the supervisory control unit 7 switches to the selection of the output signal S8 from the standby system switch 6. As a result, when receiving the switching information from the host controller 2, it is possible to switch without interruption without discarding the cells stored in the buffer 51 of the active system switch 5.
第２図は本発明の第２の実施例のブロック図である。
本実施例は、第１図の実施例（第１図参照）にデータ消
去部9,11を付加した構成を有する。冗長切替えを行なう
場合には、予備系スイッチ６内のバッファ61はデータ消
去部11により何も書き込まれていない状態にされ、上位
制御部２から切替情報挿入部１に切替情報S2が送信され
る。切替情報挿入部１は、データS1の空きセル（アイド
ルセル）に切替情報S2を書き込む。分岐回路４に入力さ
れるデータS3の空きセルを監視している監視制御部３
は、切替情報を持つ空きセルを検出すると、その空きセ
ルを現用系スイッチ５に送出した後、データS5と同じデ
ータS6を予備系スイッチ６にも送出するよう分岐回路４
に指示を出し、分岐回路４は現用系スイッチ５と予備系
スイッチ６に同じデータS5、S6を送出し、同じように書
き込んでいく。ここでバッファ51及びその予備系である
バッファ61に着目すると、バッファ51内には切替情報を
持つ空きセルより順序が前のセル、切替情報を持つ空き
セル及び切替情報を持つ空きセルより順序が後のセルが
データとして書き込まれている。またバッファ61内には
切替情報を持つ空きセルより順序が後のセルがデータと
して書き込まれている。監視制御部７は、バッファ51に
書き込まれているデータを順に読み出していく選択回路
８を監視しており、選択回路８が切替情報を持つ空きセ
ルを読み出したことを検出すると、選択回路に対して現
用系スイッチ５から予備系スイッチ６へ切替えるように
指示を出す。選択回路８の切替え完了後、分岐回路４は
データS5の送出を停止する。選択回路８は予備系スイッ
チ６へ切替えを行った後、バッファ61に書き込まれてい
るデータを順に読み出していき、データS10として出力
する。データ消去部９は、予備系スイッチ６から現用系
スイッチ５への切り戻しに備え、現用系スイッチ５のバ
ッファ51内に残っているデータを消去する。予備系スイ
ッチ６から現用系スイッチ５への切り戻しは、上述の動
作を逆にしたものである。以上の手順を行うと、有効な
データを運んでいるセルは１つも廃棄されないので、無
瞬断で冗長切替えを行うことができる。FIG. 2 is a block diagram of a second embodiment of the present invention.
This embodiment has a configuration in which data erasing units 9 and 11 are added to the embodiment of FIG. 1 (see FIG. 1). When performing redundant switching, the buffer 61 in the spare system switch 6 is set to a state in which nothing is written by the data erasing unit 11, and the switching information S 2 is transmitted from the higher-level control unit 2 to the switching information insertion unit 1. It The switching information insertion unit 1 writes the switching information S 2 in the empty cell (idle cell) of the data S 1 . Monitor control unit 3 that monitors the empty cells of the data S 3 input to the branch circuit 4.
When detecting an empty cell having switching information, the branch circuit 4 sends out the empty cell to the active switch 5 and then sends the same data S 6 as the data S 5 to the standby switch 6.
The branch circuit 4 sends the same data S 5 and S 6 to the active system switch 5 and the standby system switch 6 and writes them in the same manner. Focusing on the buffer 51 and the buffer 61 that is a backup system thereof, the order of the cells in the buffer 51 is earlier than the empty cell having the switching information, the empty cell having the switching information, and the empty cell having the switching information. Later cells are written as data. Further, in the buffer 61, cells that are later than the empty cells having the switching information are written as data. The monitoring control unit 7 monitors the selection circuit 8 that sequentially reads the data written in the buffer 51, and when it detects that the selection circuit 8 has read the empty cell having the switching information, And gives an instruction to switch from the active system switch 5 to the standby system switch 6. After the switching of the selection circuit 8 is completed, the branch circuit 4 stops the transmission of the data S 5 . After switching to the backup system switch 6, the selection circuit 8 sequentially reads the data written in the buffer 61 and outputs it as the data S 10 . The data erasing unit 9 erases the data remaining in the buffer 51 of the active system switch 5 in preparation for switching back from the standby system switch 6 to the active system switch 5. Switching back from the standby system switch 6 to the active system switch 5 is the reverse of the above operation. When the above procedure is performed, no cell carrying valid data is discarded, so that redundant switching can be performed without interruption.
第３図は本発明の第３の実施例を示すブロック図であ
る。この実施例では一定周期で装置内制御用セルを発生
する周期セル発生部10を設けて、入力データS1に時分割
セルを多重化し、この周期セルに切替情報を書き込ん
で、第１あるいは第２の実施例の場合と同様に現用系ス
イッチ５及び予備系スイッチ６の相互切替えを行なわ
せ、無瞬断で冗長切替えができる。FIG. 3 is a block diagram showing a third embodiment of the present invention. In this embodiment, a periodic cell generating unit 10 for generating control cells in the apparatus is provided at a constant period, time division cells are multiplexed in the input data S 1 , and switching information is written in the periodic cells to generate the first or first data. As in the case of the second embodiment, the active system switch 5 and the standby system switch 6 are switched to each other, and redundant switching can be performed without interruption.
以上説明したように本発明は、入力データのアイドル
セルあるいは同期セルに切替情報の書き込んだ冗長切替
えのタイミング指示用とすることにより、セルを廃棄せ
ずに、無瞬断でATMスイッチの冗長切替えを行なえると
いう効果を有する。INDUSTRIAL APPLICABILITY As described above, according to the present invention, the redundant switching of the ATM switch is performed without interruption without discarding the cells by using the timing instruction of the redundant switching in which the switching information is written in the idle cell or the synchronous cell of the input data. Has the effect of being able to
第１図ないし第３図は本発明の実施例を示すブロック
図、第４図は従来のATMスイッチの冗長切替方式を示す
ブロック図である。 １……切替情報挿入部、2,12……上位制御部、3,7……
監視制御部、4,14……分岐回路、5,15……現用系スイッ
チ、51……バッファ、6,16……予備系スイッチ、61……
バッファ、７……切替制御用セル監視及び選択回路制御
部、8,18……選択回路、9,11……データ消去部、10……
同期セル発生部。1 to 3 are block diagrams showing an embodiment of the present invention, and FIG. 4 is a block diagram showing a conventional ATM switch redundant switching system. 1 …… Switching information insertion part, 2,12 …… High-order control part, 3,7 ……
Supervisory control unit, 4,14 ... Branching circuit, 5,15 ... Current system switch, 51 ... Buffer, 6,16 ... Standby system switch, 61 ...
Buffer, 7 ... Switching control cell monitoring and selection circuit control unit, 8,18 ... Selection circuit, 9,11 ... Data erasing unit, 10 ...
Synchronous cell generator.
フロントページの続き (56)参考文献 特開 平１−270427（ＪＰ，Ａ) 特開 平１−286645（ＪＰ，Ａ) 特開 平２−56133（ＪＰ，Ａ) 特開 平２−86347（ＪＰ，Ａ) 特開 平２−246646（ＪＰ，Ａ) 特開 平２−228146（ＪＰ，Ａ)Continuation of front page (56) Reference JP-A-1-270427 (JP, A) JP-A-1-286645 (JP, A) JP-A-2-56133 (JP, A) JP-A-2-86347 (JP , A) JP-A-2-246646 (JP, A) JP-A-2-228146 (JP, A)
Claims (2)
バッファを持つ非同期転送モード（ATM）用の現用系ス
イッチおよび予備系スイッチと、 入力データ中のセルに切り替え情報を書き込む切り替え
情報挿入部と、 この切り替え情報の書き込まれたセルを監視して前記現
用系スイッチおよび予備系スイッチへ転送するセルの振
り分けを行う分岐回路と、 この分岐回路のセルの振り分けを制御する第１の監視制
御部と、 前記現用系スイッチおよび予備系スイッチから読み出さ
れるセルの選択を行う選択回路と、 この選択回路の選択を制御する第２の監視制御部とを備
え、 前記切り替え情報を書き込む前記セルは、前記入力デー
タ中に一定周期で発生させた同期セルであることを特徴
とするATMスイッチの冗長切り替え方式。1. A working system switch and a standby system switch for asynchronous transfer mode (ATM) each having a buffer for temporarily storing cell data, and a switching information insertion section for writing switching information to a cell in input data. A branch circuit that monitors the cells in which the switching information is written and distributes the cells to be transferred to the active system switch and the standby system switch; and a first monitoring control unit that controls the distribution of the cells in this branch circuit. A selection circuit for selecting cells read from the active system switch and the standby system switch, and a second monitoring control unit for controlling selection of the selection circuit are provided, and the cells to which the switching information is written are the input data. Redundant switching method for ATM switches, which is characterized in that it is a synchronous cell generated at regular intervals.
バッファを持つ非同期転送モード（ATM）用の現用系ス
イッチおよび予備系スイッチと、 入力データ中のセルに切り替え情報を書き込む切り替え
情報挿入部と、 この切り替え情報の書き込まれたセルを監視して前記現
用系スイッチおよび予備系スイッチへ転送するセルの振
り分けを行う分岐回路と、 この分岐回路のセルの振り分けを制御する第１の監視制
御部と、 前記現用系スイッチおよび予備系スイッチから読み出さ
れるセルの選択を行う選択回路と、 この選択回路の選択を制御する第２の監視制御部と、 前記切り替え情報に応ずる制御に先立って現用系スイッ
チおよび予備系スイッチの前記バッファ内のデータを消
去するデータ消去部を有することを特徴とするATMスイ
ッチの冗長切り替え方式。2. An active system switch and a standby system switch for asynchronous transfer mode (ATM) each having a buffer for temporarily storing cell data, a switching information insertion unit for writing switching information to a cell in input data, A branch circuit that monitors the cells in which the switching information is written and distributes the cells to be transferred to the active system switch and the standby system switch; and a first monitoring control unit that controls the distribution of the cells in this branch circuit. A selection circuit for selecting cells read from the active system switch and the standby system switch, a second supervisory control unit for controlling selection of the selection circuit, and an active system switch and a standby system prior to control according to the switching information. Redundancy of ATM switch characterized by having a data erasing unit for erasing data in the buffer of the system switch Toggles system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19965890A JP2671576B2 (en) | 1990-07-27 | 1990-07-27 | ATM switch redundant switching method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19965890A JP2671576B2 (en) | 1990-07-27 | 1990-07-27 | ATM switch redundant switching method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0486043A JPH0486043A (en) | 1992-03-18 |
| JP2671576B2 true JP2671576B2 (en) | 1997-10-29 |
Family
ID=16411490
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19965890A Expired - Lifetime JP2671576B2 (en) | 1990-07-27 | 1990-07-27 | ATM switch redundant switching method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2671576B2 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2546507B2 (en) * | 1993-07-05 | 1996-10-23 | 日本電気株式会社 | Redundant line system switching method |
| JP2647003B2 (en) * | 1994-05-24 | 1997-08-27 | 日本電気株式会社 | ATM switch system switching control method |
| JP2655493B2 (en) * | 1994-11-04 | 1997-09-17 | 日本電気株式会社 | ATM switch system |
| JP2809154B2 (en) * | 1995-09-29 | 1998-10-08 | 日本電気株式会社 | Output buffer type switch phase matching control circuit |
| JP2790112B2 (en) * | 1996-02-16 | 1998-08-27 | 日本電気株式会社 | Instantaneous interruption switching device and switching method of delay priority control buffer |
| JP3047861B2 (en) | 1997-07-08 | 2000-06-05 | 日本電気株式会社 | Working / standby system uninterruptible switching device for ATM communication equipment |
| JP3008923B2 (en) | 1998-03-12 | 2000-02-14 | 日本電気株式会社 | ATM switch switching method |
| EP2875745A4 (en) | 2012-07-17 | 2016-04-06 | Shima Seiki Mfg | Shoe upper and method for producing shoe upper |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2795375B2 (en) * | 1989-03-01 | 1998-09-10 | 富士通株式会社 | ATM switching device and method for switching between active and standby |
| JP2910770B2 (en) * | 1989-03-20 | 1999-06-23 | 富士通株式会社 | Self-routing switching system and current / standby switching method for self-routing switching system |
-
1990
- 1990-07-27 JP JP19965890A patent/JP2671576B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0486043A (en) | 1992-03-18 |
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