JP2658665B2 - Plasma CVD equipment - Google Patents
Plasma CVD equipmentInfo
- Publication number
- JP2658665B2 JP2658665B2 JP24386991A JP24386991A JP2658665B2 JP 2658665 B2 JP2658665 B2 JP 2658665B2 JP 24386991 A JP24386991 A JP 24386991A JP 24386991 A JP24386991 A JP 24386991A JP 2658665 B2 JP2658665 B2 JP 2658665B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- plasma cvd
- substrate holder
- frequency voltage
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Chemical Vapour Deposition (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体デバイス、液晶表
示装置、ＥＬ表示装置、太陽電池等の各種薄膜デバイス
の製造等に用いるプラズマＣＶＤ装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma CVD apparatus used for manufacturing various thin film devices such as semiconductor devices, liquid crystal displays, EL displays, and solar cells.
【０００２】[0002]
【従来の技術】プラズマＣＶＤ装置は、通常、図３に示
すように、成膜室５中に高周波電極板１と基板ホルダ３
を平行に配置し、高周波電極１にはマッチングボックス
９を介して高周波電源８を接続し、基板ホルダ３はヒー
タ４にて温度制御できるようにして接地し、成膜室５は
真空ポンプ７にて所定の成膜真空度を維持できるように
するとともに、該室中にガス導入口６から原料ガスを供
給できるように構成してある。2. Description of the Related Art As shown in FIG. 3, a plasma CVD apparatus usually includes a high-frequency electrode plate 1 and a substrate holder 3 in a film forming chamber 5.
Are arranged in parallel, a high frequency power supply 8 is connected to the high frequency electrode 1 via a matching box 9, the substrate holder 3 is grounded so that the temperature can be controlled by the heater 4, and the film forming chamber 5 is connected to the vacuum pump 7. As a result, a predetermined degree of film formation vacuum can be maintained, and a source gas can be supplied from the gas inlet 6 into the chamber.
【０００３】基板ホルダ３上には成膜すべき基板２、例
えばシリコンウェハを載置し、成膜室５中に導入した原
料ガスに高周波電圧を印加することで、これをプラズマ
化し、基板２上に所定の薄膜を形成する。A substrate 2, for example, a silicon wafer, on which a film is to be formed, is placed on a substrate holder 3, and a high-frequency voltage is applied to a raw material gas introduced into a film forming chamber 5 to convert the material gas into a plasma. A predetermined thin film is formed thereon.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、このよ
うな従来プラズマＣＶＤ装置によると、成膜室５の気相
中で発生したダストパーティクルが基板２上に降り注
ぎ、該基板にパーティクルが取り込まれ、欠陥品とな
り、歩留りが低下する。基板が、例えば高集積のパター
ン形成を行ったシリコンウェハ等の場合、特に歩留りが
悪化する。However, according to such a conventional plasma CVD apparatus, dust particles generated in the gas phase of the film forming chamber 5 fall down onto the substrate 2 and are taken in by the substrate, resulting in defects. And yield is reduced. When the substrate is, for example, a silicon wafer on which a highly integrated pattern is formed, the yield is particularly deteriorated.
【０００５】そこで本発明は、基板上に形成される薄膜
にダストパーティクルが付着したり、混入することを抑
制できるプラズマＣＶＤ装置を提供することを課題とす
る。SUMMARY OF THE INVENTION It is an object of the present invention to provide a plasma CVD apparatus capable of suppressing dust particles from adhering or mixing into a thin film formed on a substrate.
【０００６】[0006]
【課題を解決するための手段】本発明者は前記課題を解
決するにあたり、次のことに着目した。すなわち、プラ
ズマＣＶＤ装置における成膜室気相中で発生するダスト
パーティクルは負の電荷を帯びており、高周波電極はプ
ラズマが形成されると負ポテンシャルとなり、そのた
め、基板ホルダが正ポテンシャルの場合は、パーティク
ルを引き付け、接地の場合も、高周波電極とのポテンシ
ャル勾配からパーティクルが基板ホルダへ向かう。従っ
て、基板ホルダを負ポテンシャルにするとパーティクル
が基板ホルダへ近づき難くなる。In order to solve the above problems, the present inventors have paid attention to the following. That is, dust particles generated in the vapor phase of a film forming chamber in a plasma CVD apparatus have a negative charge, and the high-frequency electrode has a negative potential when plasma is formed. Therefore, when the substrate holder has a positive potential, Even when the particles are attracted and grounded, the particles are directed to the substrate holder due to the potential gradient with the high-frequency electrode. Therefore, when the substrate holder is set to a negative potential, it becomes difficult for particles to approach the substrate holder.
【０００７】本発明者は前記知見に基づき本発明を完成
した。すなわち、本発明は、基板ホルダに予め定めたプ
ラス成分を削除した高周波電圧を印加する手段を設けた
ことを特徴とするプラズマＣＶＤ装置を提供するもので
ある。本発明にいうプラズマＣＶＤ装置には、図３に示
したような平行平板型プラズマＣＶＤ装置は勿論のこ
と、ＥＣＲＣＶＤ装置等、要するに基板ホルダに予め定
めたプラス成分を削除した高周波電圧を印加することに
より基板ホルダへのダストパーティクルの移行を抑制で
きる各種プラズマ利用のＣＶＤ装置を含む。The present inventors have completed the present invention based on the above findings. That is, the present invention provides a plasma CVD apparatus characterized in that a means for applying a high-frequency voltage from which a predetermined plus component has been removed is provided to a substrate holder. In the plasma CVD apparatus according to the present invention, not only a parallel plate type plasma CVD apparatus as shown in FIG. 3 but also an ECRCVD apparatus or the like, that is, a high frequency voltage from which a predetermined plus component is removed is applied to a substrate holder. And various plasma-based CVD devices that can suppress the transfer of dust particles to the substrate holder.
【０００８】前記プラス成分の削除をどの程度行うか
は、成膜条件等に応じ、形成した膜へのパーティクル付
着、混入をできるだけ防止できるように任意に定めるこ
とができる。The extent to which the positive component is removed can be arbitrarily determined according to the film forming conditions and the like so as to prevent particles from adhering and mixing into the formed film as much as possible.
【０００９】[0009]
【作用】本発明プラズマＣＶＤ装置によると、成膜すべ
き基板を支持する基板ホルダに予め定めたプラス成分を
削除した高周波電圧が印加されることで、基板ホルダが
負ポテンシャルとなり、負電荷を帯びたダストパーティ
クルの該ホルダ方向への移動が抑制され、それだけ、基
板上へのパーティクルの付着、混入が防止される。According to the plasma CVD apparatus of the present invention, a high frequency voltage from which a predetermined plus component has been removed is applied to a substrate holder that supports a substrate on which a film is to be formed, so that the substrate holder has a negative potential and takes on a negative charge. The movement of the dust particles in the direction of the holder is suppressed, so that adhesion and mixing of the particles on the substrate are prevented.
【００１０】[0010]
【実施例】以下、本発明の実施例を図１を参照して説明
する。図１は、実施例装置である平行平板型のプラズマ
ＣＶＤ装置の概略構成図である。この装置は、基板ホル
ダ３へ高周波電圧を印加する部分Ａを備えている点で図
３に示す従来装置と異なっているが、他の点は実質上図
３の装置と同構成である。図１中、図３の装置と同一部
品等については、図３と同一符号を付してある。An embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a schematic configuration diagram of a parallel plate type plasma CVD apparatus which is an embodiment apparatus. This device is different from the conventional device shown in FIG. 3 in that a portion A for applying a high-frequency voltage to the substrate holder 3 is provided, but the other points are substantially the same as those in the device shown in FIG. 1, the same components as those in the apparatus of FIG. 3 are denoted by the same reference numerals as those in FIG.
【００１１】本発明に係る図１の装置において基板ホル
ダ３へ高周波電圧を印加する部分Ａは、基板ホルダ３へ
順次接続されたマッチングボックス９０、高周波波形フ
ィルタ１０及び高周波電源８０を含んでいる。電源８０
にてホルダ３へ印加される高周波電圧は、図２に示すよ
うに、そのプラス成分の全部又は一部がフィルタ１０に
より削除される。A portion A for applying a high-frequency voltage to the substrate holder 3 in the apparatus shown in FIG. 1 according to the present invention includes a matching box 90, a high-frequency waveform filter 10, and a high-frequency power supply 80 which are sequentially connected to the substrate holder 3. Power supply 80
As shown in FIG. 2, the filter 10 removes all or a part of the high frequency voltage applied to the holder 3 as shown in FIG.
【００１２】この装置によると、従来装置と同様、ヒー
タ４にて所定温度に維持された基板ホルダ３上に成膜す
べき基板２０が設置され、成膜室５中へガス導入口６か
ら原料ガスが供給されるとともに、該成膜室が真空ポン
プ７にて所定の成膜真空度に維持される。そして、高周
波電極１に電源８にて高周波電圧が印加されて、原料ガ
スがプラズマ化され、かくして基板２０上に所定の薄膜
が形成される。According to this apparatus, as in the conventional apparatus, a substrate 20 on which a film is to be formed is placed on a substrate holder 3 maintained at a predetermined temperature by a heater 4 and a raw material is introduced into a film forming chamber 5 from a gas inlet 6. While the gas is supplied, the film forming chamber is maintained at a predetermined film forming vacuum degree by the vacuum pump 7. Then, a high-frequency voltage is applied to the high-frequency electrode 1 by the power supply 8, and the source gas is turned into plasma. Thus, a predetermined thin film is formed on the substrate 20.
【００１３】しかしこの装置では、この成膜中、基板ホ
ルダ３に高周波電圧印加部Ａにて、図２に示すように、
予め定めたプラス成分を除去した高周波電圧が印加さ
れ、それによってホルダ３が負のポテンシャルとなり、
気相部において発生する負帯電のパーティクルが基板２
０へ近づくことが抑制され、それだけ基板２０上の膜へ
のパーティクルの付着、混入が防止され、歩留りが良く
なる。However, in this apparatus, during this film formation, the substrate holder 3 is applied to the high-frequency voltage applying section A as shown in FIG.
A high-frequency voltage from which a predetermined plus component has been removed is applied, whereby the holder 3 has a negative potential,
The negatively charged particles generated in the gas phase
The approach to zero is suppressed, so that adhesion and mixing of particles to the film on the substrate 20 are prevented, and the yield is improved.
【００１４】図１の装置において次の条件で成膜を行っ
たところ、基板ホルダ２０を単に接地しただけの場合に
比べ、基板上へのパーティクル付着、混入が約５分の１
に減少した。 電源８の周波数及び電力：１３．５６ＭＨｚ、２００Ｗ 原料ガス ： ＳｉＨ4 、１５０ＣＣＭ 成膜真空度： ０．５Ｔｏｒｒ 成膜温度 ： ２５０℃ 成膜時間 ： １０分 高周波電圧印加部Ａによる交流波形：４００Ｈｚで図２
に示すように、プラス成分を僅かに残して殆ど削除した
もの 基板 ： ５インチシリコンウェハ 以上の条件で０．５μｍ以上のパーティクルは２０個／
５インチウェハであった。When the film was formed in the apparatus shown in FIG. 1 under the following conditions, the amount of particles adhering and mixing on the substrate was reduced to about one-fifth as compared with the case where the substrate holder 20 was simply grounded.
Decreased to. Frequency and power of power supply 8: 13.56 MHz, 200 W Source gas: SiH 4 , 150 CCM Deposition degree of vacuum: 0.5 Torr Deposition temperature: 250 ° C. Deposition time: 10 minutes AC waveform by high-frequency voltage application part A: 400 Hz FIG.
Substrate: 5 inch silicon wafer 20 particles / 0.5 μm or more under the above conditions as shown in FIG.
It was a 5-inch wafer.
【００１５】なお、絶縁材料の成膜時や基板がガラス等
の絶縁物の場合、印加部Ａにおけるプラス成分の削除量
でチャージアップをコントロールしてもよい。When the insulating material is formed or when the substrate is made of an insulating material such as glass, the charge-up may be controlled by removing the positive component in the application section A.
【００１６】[0016]
【発明の効果】以上説明したように本発明によると、基
板上に形成される薄膜にダストパーティクルが付着した
り、混入することを抑制できるプラズマＣＶＤ装置を提
供することができる。As described above, according to the present invention, it is possible to provide a plasma CVD apparatus capable of suppressing dust particles from adhering or mixing into a thin film formed on a substrate.
【図１】本発明の一実施例の概略構成図である。FIG. 1 is a schematic configuration diagram of an embodiment of the present invention.
【図２】高周波電圧印加部Ａによる交流波形例を示す図
である。FIG. 2 is a diagram illustrating an example of an AC waveform by a high-frequency voltage applying unit A;
【図３】従来例の概略構成図である。FIG. 3 is a schematic configuration diagram of a conventional example.
１ 高周波電極 ２、２０ 基板 ３ 基板ホルダ ４ ヒータ ５ 成膜室 ６ ガス導入口 ７ 真空ポンプ ８ 高周波電源 ９ マッチングボックス Ａ 高周波電圧印加部 ８０ 高周波電源 ９０ マッチングボックス １０ フィルタ DESCRIPTION OF SYMBOLS 1 High frequency electrode 2, 20 Substrate 3 Substrate holder 4 Heater 5 Film formation chamber 6 Gas inlet 7 Vacuum pump 8 High frequency power supply 9 Matching box A High frequency voltage application part 80 High frequency power supply 90 Matching box 10 Filter
Claims (1)
除した高周波電圧を印加する手段を設けたことを特徴と
するプラズマＣＶＤ装置。1. A plasma CVD apparatus, comprising: means for applying a high-frequency voltage from which a predetermined plus component has been removed to a substrate holder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24386991A JP2658665B2 (en) | 1991-09-25 | 1991-09-25 | Plasma CVD equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24386991A JP2658665B2 (en) | 1991-09-25 | 1991-09-25 | Plasma CVD equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0578850A JPH0578850A (en) | 1993-03-30 |
| JP2658665B2 true JP2658665B2 (en) | 1997-09-30 |
Family
ID=17110192
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24386991A Expired - Fee Related JP2658665B2 (en) | 1991-09-25 | 1991-09-25 | Plasma CVD equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2658665B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060174835A1 (en) * | 2005-02-10 | 2006-08-10 | Misako Saito | Vacuum processing apparatus and method of using the same |
| DE102005055093A1 (en) * | 2005-11-18 | 2007-05-24 | Aixtron Ag | Chemical vapor deposition device for coating a substrate comprises a unit for electrostatically discharging or polarizing particles in the gas phase using an electrostatic field within a chamber to keep the particles from a substrate holder |
| JP6333302B2 (en) * | 2016-03-30 | 2018-05-30 | 株式会社日立国際電気 | Semiconductor device manufacturing method, substrate processing apparatus, and program |
| WO2022211073A1 (en) * | 2021-03-31 | 2022-10-06 | Ａｐｂ株式会社 | Active material treatment device, battery electrode manufacturing device, active material treatment method, and battery electrode manufacturing method |
-
1991
- 1991-09-25 JP JP24386991A patent/JP2658665B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0578850A (en) | 1993-03-30 |
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