JP2642423B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JP2642423B2
JP2642423B2 JP63165250A JP16525088A JP2642423B2 JP 2642423 B2 JP2642423 B2 JP 2642423B2 JP 63165250 A JP63165250 A JP 63165250A JP 16525088 A JP16525088 A JP 16525088A JP 2642423 B2 JP2642423 B2 JP 2642423B2
Authority
JP
Japan
Prior art keywords
semiconductor device
insulating substrate
manufacturing
glass
active layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63165250A
Other languages
Japanese (ja)
Other versions
JPH0215669A (en
Inventor
孝二 森
正樹 廣居
豊 佐野
弘 池口
守 石田
修也 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RIKOO OYO DENSHI KENKYUSHO KK
Ricoh Co Ltd
Original Assignee
RIKOO OYO DENSHI KENKYUSHO KK
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RIKOO OYO DENSHI KENKYUSHO KK, Ricoh Co Ltd filed Critical RIKOO OYO DENSHI KENKYUSHO KK
Priority to JP63165250A priority Critical patent/JP2642423B2/en
Publication of JPH0215669A publication Critical patent/JPH0215669A/en
Application granted granted Critical
Publication of JP2642423B2 publication Critical patent/JP2642423B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は完全密着型等倍センサーの駆動回路、液晶駆
動回路、EL駆動回路等に好適に使用される半導体装置を
安価に製造する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for inexpensively manufacturing a semiconductor device suitably used for a drive circuit of a close contact type 1: 1 sensor, a liquid crystal drive circuit, an EL drive circuit and the like. .

〔従来の技術〕[Conventional technology]

従来の集積回路、大規模集積回路等の半導体装置を製
造するプロセスにおいては、Siウエハ上に絶縁膜、各種
の拡散層、活性層等を形成して種々の駆動回路を作製し
ている。しかしながら、Siウエハを使用する場合、ウエ
ハサイズを大面積化できないため、等倍センサのような
20〜30cmといった長尺の駆動回路を形成するには石英基
板が使用されていた。
In a conventional process for manufacturing a semiconductor device such as an integrated circuit or a large-scale integrated circuit, various drive circuits are manufactured by forming an insulating film, various diffusion layers, active layers, and the like on a Si wafer. However, when using a Si wafer, the size of the wafer cannot be increased, so that the
A quartz substrate has been used to form a drive circuit as long as 20 to 30 cm.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

上記石英を基板とした半導体装置の製造においては、
この上に集積回路(IC)、大規模集積回路(LST)の製
造プロセスにおいて、高温使用する条件で多結晶或いは
単結晶性の薄膜材料、特にSiを形成して駆動回路を形成
している。従って、この高温条件に耐え得るために、石
英基板を使用する必要があり、石英基板自体のコストが
高いので、全体としての半導体装置のコストを低下する
ことができない問題点があった。
In the manufacture of a semiconductor device using the above quartz as a substrate,
In addition, in a manufacturing process of an integrated circuit (IC) and a large-scale integrated circuit (LST), a polycrystalline or single-crystal thin film material, particularly Si, is formed under a condition of using a high temperature to form a driving circuit. Therefore, it is necessary to use a quartz substrate in order to withstand the high temperature condition, and the cost of the quartz substrate itself is high, so that there has been a problem that the cost of the semiconductor device as a whole cannot be reduced.

本発明は等倍センサー等の長尺の駆動回路を安価に製
造できる半導体装置の製造方法を提供するものである。
SUMMARY OF THE INVENTION The present invention provides a method for manufacturing a semiconductor device capable of manufacturing a long drive circuit such as a 1: 1 sensor at low cost.

〔課題を解決するための手段〕[Means for solving the problem]

本発明は、絶縁基板上に薄膜トランジスタを形成する
半導体装置を製造方法において、絶縁基板がホウケウ酸
ガラス、耐熱ガラス、ソーダガラスのいずれかであり、
Hg増感光CVD法を用いて薄膜トランジスタの活性層を500
℃以下で形成し、先ずゲート拡散を行ない、次いでソー
ス・ドレイン拡散をレーザー照射により行なう。ことに
よりコスト並びに製造法を容易にした半導体装置の製造
方法である。
The present invention is a method for manufacturing a semiconductor device in which a thin film transistor is formed on an insulating substrate, wherein the insulating substrate is any of borosilicate glass, heat-resistant glass, and soda glass,
500g active layer of thin film transistor using Hg sensitized CVD
The gate diffusion is performed first, and then the source / drain diffusion is performed by laser irradiation. This is a method for manufacturing a semiconductor device, which facilitates cost and manufacturing method.

本発明において絶縁基板としては、安価で、しかも軟
化点が約500℃以上であるホウケイ酸ガラス、耐熱ガラ
ス(パイレックスガラス:商品名)、ソーダガラスのい
ずれかを使用する。
In the present invention, as the insulating substrate, any of borosilicate glass, heat-resistant glass (Pyrex glass: trade name), and soda glass, which are inexpensive and have a softening point of about 500 ° C. or more, is used.

本発明の絶縁基板上に薄膜トランジスタを形成する半
導体の製造プロセスは一般の方法が採用される。この方
法を第1図により説明する。その工程は(a)工程:絶
縁基板(1)上に活性層(2)を形成する工程、(b)
工程:この活性層をトリミングスする工程、(c)工
程:この活性層(2)上にゲート絶縁膜(3)を形成す
る工程、(d)工程:ゲート絶縁膜(3)上にゲート拡
散膜(4)を形成する工程、(e)工程:ソース・ドレ
イン拡散を行ないソース・ドレイン膜(5)を形成し、
エッチングする工程よりなる。
A general method is used for a semiconductor manufacturing process for forming a thin film transistor on an insulating substrate according to the present invention. This method will be described with reference to FIG. The step is (a) step: a step of forming an active layer (2) on an insulating substrate (1), (b)
Step: Step of trimming this active layer, Step (c): Step of forming a gate insulating film (3) on this active layer (2), Step (d): Gate diffusion on the gate insulating film (3) A step of forming a film (4), a step (e): performing source / drain diffusion to form a source / drain film (5);
It consists of an etching step.

従来の方法においては、上記工程において、(a)工
程は、絶縁基板として石英を使用し、活性層のpoly−Si
を629℃で形成する。(d)工程は、ゲート拡散膜を100
0℃で形成する。(e)工程は、ソース・ドレインの拡
散を900℃以上で行なっている。このように、半導体装
置の製造工程において高温が使用されるため、絶縁基板
は高温に耐え得る石英、セラミック等を使用することが
必須である。
In the conventional method, in the above steps, the step (a) uses quartz as an insulating substrate, and uses poly-Si as an active layer.
At 629 ° C. In the step (d), the gate diffusion film is
Form at 0 ° C. In the step (e), the source / drain is diffused at 900 ° C. or higher. As described above, a high temperature is used in the process of manufacturing a semiconductor device, and therefore, it is essential that the insulating substrate be made of quartz, ceramic, or the like that can withstand the high temperature.

本発明においては、絶縁基板として、上記500℃以上
の軟化点を有するガラスを使用し、活性層形成工程にお
いて、レーザー照射によるか又はレーザー照射とプラズ
マCVDとの併用により、200〜500℃の温度で活性層を形
成することができる。また、(d)工程、(e)工程も
レーザー照射により行なうことにより、500℃以下の温
度で行なうことができる。
In the present invention, as the insulating substrate, using a glass having a softening point of 500 ℃ or more, in the active layer forming step, by laser irradiation or by using both laser irradiation and plasma CVD, the temperature of 200 ~ 500 ℃ Can form an active layer. Further, the steps (d) and (e) can also be performed at a temperature of 500 ° C. or less by performing laser irradiation.

次に本発明の実施例を示す。 Next, examples of the present invention will be described.

〔実施例〕〔Example〕

例 1 ホウケイ酸ガラスを絶縁基板とし、その上にpoly−Si
の活性層をSi2H6(1〜50cm3/min)をHg増感光CVDで200
〜300℃、0.1〜10Torrの圧力で形成し、この活性層を、
室温〜200℃でプラズマ酸化し(O2 10〜50cm3/min)、
次いで、その上にSiH4(10cm3/min)をサイクロトロン
共鳴(ECR)で蒸着し、O2(30cm3/min),100℃以下でSi
O2のゲート絶縁膜を形成する。このゲート膜をXeClエキ
シマレーザー(10mJ/cm2,10〜100ショット)で室温〜10
0℃でゲート拡散する。次にXeClエキシマレーザー8
(1〜100mJ/cm2,10〜100ショット)で室温〜100℃でソ
ース・ドレイン拡散を行なう。
Example 1 Borosilicate glass is used as an insulating substrate, and poly-Si
Of active layer of Si 2 H 6 (1 to 50 cm 3 / min) by Hg-sensitized CVD
Formed at a pressure of 0.1 to 10 Torr at ~ 300 ° C, and this active layer is
Plasma oxidized at room temperature ~ 200 ° C (O 2 10 ~ 50cm 3 / min),
Next, SiH 4 (10 cm 3 / min) was deposited thereon by cyclotron resonance (ECR), and O 2 (30 cm 3 / min) was deposited at 100 ° C. or less.
An O 2 gate insulating film is formed. The gate film is cooled to room temperature to 10 by XeCl excimer laser (10 mJ / cm 2 , 10 to 100 shots).
Gate diffusion at 0 ° C. Next, XeCl excimer laser 8
(1-100 mJ / cm 2 , 10-100 shots) at room temperature to 100 ° C. to perform source / drain diffusion.

〔発明の効果〕〔The invention's effect〕

以上のように、本発明の半導体装置の製法は500℃以
下の定温で全工程を行なうことができるので、低コスト
のガラスを使用することが可能となり、全体として半導
体装置のコスト低減が図られる工業上極めて有用な効果
を奏するものである。
As described above, the manufacturing method of the semiconductor device of the present invention can perform all steps at a constant temperature of 500 ° C. or less, so that low-cost glass can be used, and the cost of the semiconductor device can be reduced as a whole. It has an industrially very useful effect.

【図面の簡単な説明】[Brief description of the drawings]

第1図は一般の絶縁基板上に薄層トランジスタを作製す
る1部工程図である。 図中:1絶縁基板、2:活性層、3:ゲート絶縁膜、4:ゲート
拡散膜、5:ソース・ドレイン膜をそれぞれ表わす。
FIG. 1 is a partial process diagram for producing a thin-layer transistor on a general insulating substrate. In the figure, one insulating substrate, two active layers, three gate insulating films, four gate diffusion films, and five source / drain films are shown.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 佐野 豊 宮城県名取市高舘熊野堂字余方上5番地 の10 リコー応用電子研究所株式会社内 (72)発明者 池口 弘 東京都大田区中馬込1丁目3番6号 株 式会社リコー内 (72)発明者 石田 守 東京都大田区中馬込1丁目3番6号 株 式会社リコー内 (72)発明者 阿部 修也 宮城県名取市高舘熊野堂字余方上5番地 の10 リコー応用電子研究所株式会社内 (56)参考文献 特開 昭63−29978(JP,A) 特開 昭62−14472(JP,A) 特開 昭58−164267(JP,A) 特開 昭59−75670(JP,A) 特開 昭58−93273(JP,A) 特開 昭60−100468(JP,A) ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yutaka Sano 5-10, Takakata Kumanodo Hall, Natori City, Miyagi Prefecture 10 Ricoh Applied Electronics Research Laboratories Co., Ltd. (72) Inventor Hiroshi Ikeguchi Nakamagome, Ota-ku, Tokyo 1-3-6, Ricoh Co., Ltd. (72) Inventor Mamoru Ishida 1-3-6, Nakamagome, Ota-ku, Tokyo Inside Ricoh Co., Ltd. (72) Inventor Shuya Abe Kumanodo, Takadate, Natori City, Miyagi Prefecture No. 5 at 10 Ricoh Applied Electronics Research Laboratory Co., Ltd. (56) References JP-A-63-29978 (JP, A) JP-A-62-14472 (JP, A) JP-A-58-164267 (JP) JP-A-59-75670 (JP, A) JP-A-58-93273 (JP, A) JP-A-60-100468 (JP, A)

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】絶縁基板上に薄膜トランジスタを形成する
半導体装置の製造方法において、絶縁基板がホウケイ酸
ガラス、耐熱ガラス、ソーダガラスのいずれかであり、
Hg増感光CVD法を用いて薄膜トランジスタの活性層を500
℃以下で絶縁基板上に形成し、レーザーを照射して、先
ずゲート拡散を行ない、次いでソース・ドレイン拡散を
行なうことを特徴とする半導体装置の製造方法。
1. A method for manufacturing a semiconductor device in which a thin film transistor is formed on an insulating substrate, wherein the insulating substrate is any of borosilicate glass, heat-resistant glass, and soda glass;
500g active layer of thin film transistor using Hg sensitized CVD
A method of manufacturing a semiconductor device, comprising forming an insulating substrate at a temperature of not more than ° C and irradiating a laser, first performing gate diffusion, and then performing source / drain diffusion.
JP63165250A 1988-07-01 1988-07-01 Method for manufacturing semiconductor device Expired - Lifetime JP2642423B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63165250A JP2642423B2 (en) 1988-07-01 1988-07-01 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63165250A JP2642423B2 (en) 1988-07-01 1988-07-01 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH0215669A JPH0215669A (en) 1990-01-19
JP2642423B2 true JP2642423B2 (en) 1997-08-20

Family

ID=15808736

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63165250A Expired - Lifetime JP2642423B2 (en) 1988-07-01 1988-07-01 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2642423B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6429120B1 (en) 2000-01-18 2002-08-06 Micron Technology, Inc. Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
US7195960B2 (en) 1996-06-28 2007-03-27 Seiko Epson Corporation Thin film transistor, manufacturing method thereof, and circuit and liquid crystal display device using the thin film transistor
CN1196832A (en) 1996-06-28 1998-10-21 精工爱普生株式会社 Thin film transistor, method of its manufacture and circuit and liquid crystal display using thin film transistor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893273A (en) * 1981-11-30 1983-06-02 Toshiba Corp Thin film semiconductor device
JPS58164267A (en) * 1982-03-25 1983-09-29 Seiko Epson Corp Manufacture of thin film silicon transistor
JPS5975670A (en) * 1982-10-25 1984-04-28 Seiko Epson Corp Manufacture of thin film semiconductor device
JPS60100468A (en) * 1983-11-07 1985-06-04 Hitachi Ltd Thin film semiconductor device and manufacture thereof
JPS60253215A (en) * 1984-05-29 1985-12-13 Seiko Epson Corp Formation of thin film
JPH0797565B2 (en) * 1985-07-12 1995-10-18 ソニー株式会社 Method for manufacturing semiconductor device
JPS6329978A (en) * 1986-07-23 1988-02-08 Sharp Corp Manufacture of thin-film transistor

Also Published As

Publication number Publication date
JPH0215669A (en) 1990-01-19

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