JP2556325B2 - Lead frame for IC card - Google Patents

Lead frame for IC card

Info

Publication number
JP2556325B2
JP2556325B2 JP62125087A JP12508787A JP2556325B2 JP 2556325 B2 JP2556325 B2 JP 2556325B2 JP 62125087 A JP62125087 A JP 62125087A JP 12508787 A JP12508787 A JP 12508787A JP 2556325 B2 JP2556325 B2 JP 2556325B2
Authority
JP
Japan
Prior art keywords
lead
mount portion
frame
card
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62125087A
Other languages
Japanese (ja)
Other versions
JPS63290795A (en
Inventor
昌夫 後上
佳明 肥田
喜久夫 一木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP62125087A priority Critical patent/JP2556325B2/en
Publication of JPS63290795A publication Critical patent/JPS63290795A/en
Application granted granted Critical
Publication of JP2556325B2 publication Critical patent/JP2556325B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Credit Cards Or The Like (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はICカード用リードフレームに関する。Description: TECHNICAL FIELD The present invention relates to a lead frame for an IC card.

〔従来の技術〕[Conventional technology]

従来、ICカードに装着するIC用のリードフレームとし
て、第4図示のような方形のマウント部1と該マウント
部1の相対する2辺に沿って配列された複数のリード2
とからなり、マウント部1、及びリード2はフレーム3
に連設されているリードフレームが用いられている。
Conventionally, as a lead frame for an IC to be mounted on an IC card, a rectangular mount portion 1 as shown in FIG. 4 and a plurality of leads 2 arranged along two opposite sides of the mount portion 1
And the mount 1 and the leads 2 are the frame 3
Is used for the lead frame.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

ICカードには外部応力が加えられる機会が多々あり、
カードに装着されたICモジュールにも、種々の外部応力
が加えられる。
There are many opportunities for external stress to be applied to IC cards,
Various external stresses are also applied to the IC module mounted on the card.

しかしながら、従来のICモジュールには変形を防止す
る構造は備えられていず、外部応力による変形、破損は
完全には防止し難い。
However, the conventional IC module does not have a structure for preventing deformation, and it is difficult to completely prevent deformation and damage due to external stress.

そこで、本発明が解決しようとする問題点は外部応力
によるICモジュールの変形、破損を防止したICカード用
リードフレームを提供することにある。
Therefore, a problem to be solved by the present invention is to provide a lead frame for an IC card in which deformation and damage of the IC module due to external stress are prevented.

〔問題点を解決するための手段〕[Means for solving problems]

本発明者は、上記の問題点を解決すべく研究の結果、
マウント部の上下に横方向の補強用枠を設けることによ
り、上記の問題点を解決し得ること、及び、更にリード
部に縦方向の補強用枠を連接することにより更によりよ
い変形防止効果が奏せられることを見出し、かかる知見
に基づき本発明を完成したものである。
The present inventor, as a result of research to solve the above problems,
By providing lateral reinforcing frames above and below the mount, the above problems can be solved, and by connecting the vertical reinforcing frames to the leads, a better deformation preventing effect can be obtained. The present invention has been completed based on such findings.

即ち、第1の発明は、『方形のマウント部と、該マウ
ント部の縦方向の2辺に沿って、マウント部から間隙を
おいて配列された複数のリード部とからなり、マウント
部、及び各リード部は、それぞれフレーム部に連設され
ているリードフレームにおいて、前記マウント部及び各
リード部はICカードの端子電極面であって、前記マウン
ト部の上下にマウント部の左右より突出して延びる横方
向の補強用枠を設け、それぞれの補強用枠は、隣接する
リード部に接触しないように形成したことを特徴とする
ICカード用リードフレーム。』を要旨とするものであ
る。
That is, the first aspect of the present invention is a "mounting part which is rectangular and comprises a plurality of lead parts which are arranged along two longitudinal sides of the mounting part with a gap from the mounting part. Each lead portion is a lead frame connected to the frame portion, and the mount portion and each lead portion are terminal electrode surfaces of the IC card and extend above and below the mount portion so as to project from the left and right of the mount portion. A lateral reinforcing frame is provided, and each reinforcing frame is formed so as not to contact adjacent lead portions.
Lead frame for IC card. ] Is the gist.

次に第2の発明は、『方形のマウント部と、該マウン
ト部の縦方向の2辺に沿って、マウント部から間隙をお
いて配列された複数のリード部とからなり、マウント
部、及び各リード部は、それぞれフレーム部に連設され
ているリードフレームにおいて、前記マウント部及び各
リード部はICカードの端子電極面であって、前記マウン
ト部の上下にマウント部の左右より突出して延びる横方
向の補強用枠を設け、且つリード部の各アウターリード
部の両側より縦方向に突出する縦方向の補強用枠を設
け、それぞれの補強用枠は、隣接するリード部に接触し
ないように形成した、ことを特徴とするICカード用リー
ドフレーム。』を要旨とするものである。
Next, a second aspect of the present invention is a "rectangular mount part, and a plurality of lead parts arranged along the two vertical sides of the mount part with a gap from the mount part. Each lead portion is a lead frame connected to the frame portion, and the mount portion and each lead portion are terminal electrode surfaces of the IC card and extend above and below the mount portion so as to project from the left and right of the mount portion. A horizontal reinforcing frame is provided, and vertical reinforcing frames projecting vertically from both sides of each outer lead part of the lead part are provided, so that each reinforcing frame does not contact the adjacent lead part. A lead frame for an IC card, which is characterized by being formed. ] Is the gist.

而して、本発明において、リードフレームの構成材料
として、42合金、コバール、鉄、50合金、アンバー材、
426合金、無酸素銅、リン青銅、ベリリウム銅、OLIN19
5、その他の鉄合金、及び銅合金、及びステンレス鋼等
を用いることが出来る。
Thus, in the present invention, as the constituent material of the lead frame, 42 alloy, kovar, iron, 50 alloy, amber material,
426 alloy, oxygen-free copper, phosphor bronze, beryllium copper, OLIN19
5, other iron alloys, copper alloys, stainless steel, etc. can be used.

また、補強用枠の幅は0.5ないし3mmが適当である。補
強用枠の長さは12.5〜18.5mmが適当である。
The width of the reinforcing frame is preferably 0.5 to 3 mm. A suitable length of the reinforcing frame is 12.5-18.5 mm.

〔作用〕[Action]

本発明において、補強用枠はモジュールの変形を防止
する機能を果たすものである。ICモジュールに補強用枠
の方向と同方向の曲げ応力が加えられたとき、補強用枠
は曲げ応力に抗してICモジュールの変形、破損を防止す
る。
In the present invention, the reinforcing frame has a function of preventing the module from being deformed. When bending stress is applied to the IC module in the same direction as the direction of the reinforcing frame, the reinforcing frame resists the bending stress and prevents the IC module from being deformed or damaged.

〔実施例〕〔Example〕

第1図aないしcは、第1の発明に係るICカード用リ
ードフレームの一例を示すものである。
1A to 1C show an example of an IC card lead frame according to the first invention.

リードフレーム16の中央に、マウント部11があり、こ
のマウント部11はタイバー12を介して、フレーム13に連
設されている。マウント部11の左右2辺に沿って、フレ
ーム部13に連設された複数のリード部が、マウント部11
と間隙をおいて、配列されている。
A mount portion 11 is provided at the center of the lead frame 16, and the mount portion 11 is connected to the frame 13 via a tie bar 12. A plurality of lead portions connected to the frame portion 13 along the left and right sides of the mount portion 11 are
It is arranged with a gap.

そして、マウント部11の上下2辺と同方向に、上下各
辺の両端から突出して延びる補強用枠15がマウント部11
に連設されている。
Then, the reinforcing frame 15 extending from both ends of the upper and lower sides in the same direction as the upper and lower sides of the mount portion 11 extends.
It is installed continuously.

補強用枠の幅は1mmで、一方長手方向の長さは12.5mm
である。尚、図において、点線17はICが搭載されるIC搭
載部の領域を示す。
The width of the reinforcing frame is 1 mm, while the longitudinal length is 12.5 mm
Is. In the figure, the dotted line 17 indicates the area of the IC mounting portion where the IC is mounted.

第2図は第2の発明のリードフレームの実施例を示
す。
FIG. 2 shows an embodiment of the lead frame of the second invention.

この実施例は、アウターリード部に縦方向のその両側
より縦方向の補強枠が突出形成されている点が第1の発
明の実施例と異なるものである。縦方向の補強枠の巾は
0.7mmで、アウターリード部の両側に、1.2mmの長さに突
出している。
This embodiment is different from the first embodiment of the invention in that the outer lead portion is provided with vertical reinforcing frames protruding from both sides in the vertical direction. The width of the vertical reinforcing frame is
0.7mm, 1.2mm long on both sides of the outer lead.

ここに例示する両実施例は、母材16a、銅メッキ層16
b、ニッケルメッキ層16c、及び金メッキ層16d、16eによ
って構成されるものである。裏側の軟質金メッキ層16d
はICチップとのボンデイング用に設けたものであり、一
方表側の硬質金メッキ層16eはカード表面に露出し、外
部接続端子をなすもので、銅メッキ層16bの表裏の所要
領域にニッケルメッキ層16cを介して表裏の金メッキ層1
6d、16eが設けられている。
Both examples illustrated here are the base material 16a and the copper plating layer 16
b, nickel plating layer 16c, and gold plating layers 16d and 16e. Soft gold plated layer 16d on the back side
Is provided for bonding with the IC chip, while the hard gold plating layer 16e on the front side is exposed on the surface of the card and serves as an external connection terminal. Through the front and back gold-plated layer 1
6d and 16e are provided.

次に、上記のリードフレームの製造例についてのべ
る。
Next, an example of manufacturing the above lead frame will be described.

厚さ0.27mmの42合金を用意し、この金属表面の油、汚
れ等の付着物を脱脂液を用いて取り除き、しかるのち、
金属板の両面にネガタイプの感光液、例えば(MR−
S)、諸星インキ(株)製を塗布し、80〜100℃の温度
で加熱乾燥後、両面よりパターンをあてがい、露光す
る。
Prepare a 0.27 mm thick 42 alloy, remove the oil, dirt and other deposits on the metal surface using a degreasing solution, and then
A negative type photosensitive solution such as (MR-
S) and Moroboshi Ink Co., Ltd. are applied, and after heating and drying at a temperature of 80 to 100 ° C., a pattern is applied from both sides and exposed.

両パターンを真空密着させ、両面同時に高圧水銀灯の
紫外線に富んだ光にて露光し、次に、30ないし45℃の温
水にて現像し、レジストパターンを形成させる。
Both patterns are brought into vacuum contact with each other, both surfaces are exposed simultaneously with light rich in ultraviolet rays from a high-pressure mercury lamp, and then developed with warm water at 30 to 45 ° C. to form a resist pattern.

次いで両面より腐食液(35〜46゜Be′,50〜65℃のFeC
l3液)をノイズから吹き掛け、不要部分をエッチングす
る。
Next, from both sides, etchant (35-46 ° Be ', 50-65 ° C FeC
l 3 liquid) is sprayed from the noise to etch unnecessary parts.

その後、レジスト剥離液を用いて、レジストを除去
し、次いでメッキを施す。メッキは必要な前処理(酸、
アルカリ、水洗処理等)を行い、下地メッキを施した
後、金メッキを行う。この時、リードフレームのICチッ
プが搭載される側には、軟質の金メッキを施す。表裏で
異なるメッキを施すため、どちらか片面にマスキングす
る治具を用意し、片面ずつメッキ作業を行う。
Thereafter, the resist is removed using a resist stripper, and then plating is performed. Plating requires pretreatment (acid,
(Base treatment with alkali, water, etc.), and after plating the base, gold plating is performed. At this time, soft gold plating is applied to the side of the lead frame on which the IC chip is mounted. Since different plating is applied to the front and back sides, prepare a jig for masking either one side and perform plating work on each side.

第3図は、上記のような第1の発明、及び第2の発明
に係るリードフレームを用い、形成したICモジュールの
一例を示す。
FIG. 3 shows an example of an IC module formed using the lead frame according to the first invention and the second invention as described above.

リードフレーム16の上に、第1図(a)図示のマウン
ト部11に、補強絶縁体21として熱硬化型接着剤が片面に
塗布されている厚さ80μのポリイミドシート(商品名;
リードフレーム固定用ポリイミドテープJR−2250,日東
電工(株)製)を、温度150℃で、加熱接着した。
An 80 μm-thick polyimide sheet (product name; a thermosetting adhesive is applied on one surface as a reinforcing insulator 21 to the mount portion 11 shown in FIG. 1A on the lead frame 16 (trade name;
A polyimide tape JR-2250 for fixing a lead frame, manufactured by Nitto Denko KK was heat-bonded at a temperature of 150 ° C.

次に、上記補強絶縁体21上のチップダイパット部に、
熱硬化型エポキシダイ接着剤を塗布厚み20μに形成し
て、その接着剤層を介して、ICチップ22をリードフレー
ム16に設置した。
Next, in the chip die pad portion on the reinforcing insulator 21,
A thermosetting epoxy die adhesive was formed to a coating thickness of 20 μm, and the IC chip 22 was placed on the lead frame 16 via the adhesive layer.

次に、ワイヤーボンデイング機により、ICチップボン
デイング部と、軟質金メッキされたリードフレーム16の
端子部とを、25μ径の金ワイヤー23で結線した。
Next, a wire bonding machine was used to connect the IC chip bonding part and the terminal part of the lead frame 16 plated with soft gold with a gold wire 23 having a diameter of 25 μm.

次に、結線が終了したICチップ22とリードフレーム16
とをトランスファーモールド法により、エポキシ系のト
ランスファーモールド用樹脂24(商品名;MP−10,日東電
工(株)製)で、片面封止した後、パッケージ単位に、
それぞれ断裁し、且つ必要とあれば、樹脂面を研磨し
て、厚みを整えて、第3図示のようなICモジュールを得
る。
Next, the connected IC chip 22 and the lead frame 16
And by a transfer molding method with epoxy transfer molding resin 24 (trade name; MP-10, manufactured by Nitto Denko Corporation) on one side, and then in package units,
Each is cut, and if necessary, the resin surface is polished to adjust the thickness to obtain an IC module as shown in FIG.

このICモジュールをICカード基材に装着してICカード
を構成し、長辺方向に2cm、短辺方向に1cm、各々1/30秒
サイクルで数100回、曲げ試験を行ったが、変形、破損
は生じなかった。
This IC module was mounted on an IC card base material to form an IC card, and a bending test was performed several times several times in a long side direction of 2 cm, a short side direction of 1 cm, and a 1/30 second cycle. No damage occurred.

一方、従来のリードフレームを用いて形成したICモジ
ュールを、前記と同様にしてICカード基材に装着して形
成したICカードにつき、曲げ試験を行った所、変形が見
られた。
On the other hand, when a bending test was performed on an IC card formed by mounting an IC module formed using a conventional lead frame on an IC card base material in the same manner as above, deformation was observed.

〔発明の効果〕〔The invention's effect〕

以上、詳記したとおり、本発明に係るリードフレーム
を用いれば、曲げ応力が加えられても、それによって、
ICモジュールの変形、破損が生じることのないICカード
を作成することが出来る。
As described above in detail, by using the lead frame according to the present invention, even if bending stress is applied,
It is possible to create an IC card without the IC module being deformed or damaged.

【図面の簡単な説明】[Brief description of drawings]

第1図aないしcは第1の発明に係るリードフレームを
示し、第1図aは平面図、第1図bは断面図、第1図c
はリードフレームの層構成を示す断面図、第2図は第2
の発明に係るリードフレームの平面図、第3図は本発明
のリードフレームを用いて形成したICモジュールの断面
図、第4図は従来のリードフレームの平面図である。 16……リードフレーム 11……マウント部 12……タイバー 13……フレーム部 14……リード部 15……補強枠
1A to 1C show a lead frame according to the first invention, wherein FIG. 1A is a plan view, FIG. 1B is a sectional view, and FIG. 1C.
Is a cross-sectional view showing the layer structure of the lead frame, and FIG.
3 is a plan view of a lead frame according to the present invention, FIG. 3 is a sectional view of an IC module formed by using the lead frame of the present invention, and FIG. 4 is a plan view of a conventional lead frame. 16 …… Lead frame 11 …… Mounting section 12 …… Tie bar 13 …… Frame section 14 …… Lead section 15 …… Reinforcing frame

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】方形のマウント部と、該マウント部の縦方
向の2辺に沿って、マウント部から間隙をおいて配列さ
れた複数のリード部とからなり、マウント部、及び各リ
ード部は、それぞれフレーム部に連設されているリード
フレームにおいて、 前記マウント部及び各リード部はICカードの端子電極面
であって、前記マウント部の上下にマウント部の左右よ
り突出して延びる横方向の補強用枠を設け、それぞれの
補強用枠は、隣接するリード部に接触しないように形成
した、 ことを特徴とするICカード用リードフレーム。
1. A rectangular mount portion and a plurality of lead portions arranged along two longitudinal sides of the mount portion with a gap from the mount portion, wherein the mount portion and each lead portion are In the lead frame connected to the frame portion, the mount portion and each lead portion are terminal electrode surfaces of the IC card, and lateral reinforcement extending above and below the mount portion and protruding from the left and right of the mount portion. A lead frame for an IC card, characterized in that a reinforcing frame is provided, and each reinforcing frame is formed so as not to contact adjacent lead portions.
【請求項2】方形のマウント部と、該マウント部の縦方
向の2辺に沿って、マウント部から間隙をおいて配列さ
れた複数のリード部とからなり、マウント部、及び各リ
ード部は、それぞれフレーム部に連設されているリード
フレームにおいて、 前記マウント部及び各リード部はICカードの端子電極面
であって、前記マウント部の上下にマウント部の左右よ
り突出して延びる横方向の補強用枠を設け、且つリード
部の各アウターリード部の両側より縦方向に突出する縦
方向の補強用枠を設け、それぞれの補強用枠は、隣接す
るリード部に接触しないように形成した、 ことを特徴とするICカード用リードフレーム。
2. A square mount portion and a plurality of lead portions arranged along two longitudinal sides of the mount portion with a gap from the mount portion, wherein the mount portion and each lead portion are arranged. In the lead frame connected to the frame portion, the mount portion and each lead portion are terminal electrode surfaces of the IC card, and lateral reinforcement extending above and below the mount portion and protruding from the left and right of the mount portion. A frame for use and a vertical reinforcing frame that projects vertically from both sides of each outer lead part of the lead part, and each reinforcing frame is formed so as not to contact adjacent lead parts. A lead frame for IC cards characterized by.
JP62125087A 1987-05-22 1987-05-22 Lead frame for IC card Expired - Lifetime JP2556325B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62125087A JP2556325B2 (en) 1987-05-22 1987-05-22 Lead frame for IC card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62125087A JP2556325B2 (en) 1987-05-22 1987-05-22 Lead frame for IC card

Publications (2)

Publication Number Publication Date
JPS63290795A JPS63290795A (en) 1988-11-28
JP2556325B2 true JP2556325B2 (en) 1996-11-20

Family

ID=14901514

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62125087A Expired - Lifetime JP2556325B2 (en) 1987-05-22 1987-05-22 Lead frame for IC card

Country Status (1)

Country Link
JP (1) JP2556325B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007004459A (en) * 2005-06-23 2007-01-11 Nec Tokin Corp Ic module structure of ic card or tag with contact terminal

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6092848U (en) * 1983-11-30 1985-06-25 松下電工株式会社 semiconductor equipment
JPH0829628B2 (en) * 1985-10-09 1996-03-27 松下電器産業株式会社 IC card

Also Published As

Publication number Publication date
JPS63290795A (en) 1988-11-28

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