JP2537893B2 - Electronic circuit board manufacturing method - Google Patents

Electronic circuit board manufacturing method

Info

Publication number
JP2537893B2
JP2537893B2 JP62209611A JP20961187A JP2537893B2 JP 2537893 B2 JP2537893 B2 JP 2537893B2 JP 62209611 A JP62209611 A JP 62209611A JP 20961187 A JP20961187 A JP 20961187A JP 2537893 B2 JP2537893 B2 JP 2537893B2
Authority
JP
Japan
Prior art keywords
conductive resin
circuit
insulating substrate
electronic circuit
circuit element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62209611A
Other languages
Japanese (ja)
Other versions
JPS6451693A (en
Inventor
恒 中村
要一 春田
孝治 西田
大 川山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62209611A priority Critical patent/JP2537893B2/en
Publication of JPS6451693A publication Critical patent/JPS6451693A/en
Application granted granted Critical
Publication of JP2537893B2 publication Critical patent/JP2537893B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ビデオテープレコーダなどを構成する電子
回路基板の製造方法に関するものである。
Description: TECHNICAL FIELD The present invention relates to a method for manufacturing an electronic circuit board that constitutes a video tape recorder or the like.

従来の技術 近年、ビデオテープレコーダーをはじめとする電子機
器の軽薄短小化は急速な勢いで進んでおり、それととも
にそれらの電子回路基板もさまざまな実装形態が採用さ
れるようになってきた。
2. Description of the Related Art In recent years, electronic devices such as video tape recorders are rapidly becoming lighter, thinner, smaller, and smaller, and along with that, various mounting forms of electronic circuit boards have been adopted.

電子回路基板の実装形態として、昨今、チップ部品と
称する平面接続タイプの回路素子が広範囲に普及するよ
うになり、これらのチップ部品を印刷配線板上に高密度
に実装して電子回路を構成する実装形態が多くの電子機
器分野で採用されている。
2. Description of the Related Art Recently, planar connection type circuit elements called chip parts have become widespread as a mounting form of electronic circuit boards, and these chip parts are densely mounted on a printed wiring board to form an electronic circuit. The mounting form is adopted in many electronic device fields.

ところで、平面接続タイプの回路素子を用いた電子回
路基板の構成法の一例として、従来第2図(a)〜
(c)に示す方法が行われている。この方法は先づ第2
図(a)に示したように紙フェノールやガラスエポキシ
などの合成樹脂基板から成る絶縁基板1の主面上に第2
図(b)に示したように銀や銅などの微粉末をエポキシ
樹脂などからなる熱硬化性樹脂に分散,混練したいわゆ
る導電性樹脂2をスクリーン印刷法によって所望とする
回路図形状に塗布し、次いで第2図(c)に示すよう
に、この絶縁基板1の上に抵抗やコンデンサーなどの平
面接続型の回路素子3を搭載して、その外部接続端子4,
4′を導電性樹脂2に接触させ、導電性樹脂2を硬化さ
せることによって電子回路基板を構成したものである。
By the way, as an example of a method for constructing an electronic circuit board using a planar connection type circuit element, a conventional method shown in FIG.
The method shown in (c) is performed. This method is first
As shown in FIG. 2A, the second surface is formed on the main surface of the insulating substrate 1 made of a synthetic resin substrate such as paper phenol or glass epoxy.
As shown in Figure (b), a so-called conductive resin 2 in which fine powder of silver or copper is dispersed and kneaded in a thermosetting resin such as an epoxy resin is applied to a desired circuit diagram shape by a screen printing method. Then, as shown in FIG. 2 (c), a planar connection type circuit element 3 such as a resistor or a capacitor is mounted on the insulating substrate 1 and its external connection terminals 4,
4'is brought into contact with the conductive resin 2 and the conductive resin 2 is cured to form an electronic circuit board.

発明が解決しようとする問題点 しかしながら、この方法では導電性樹脂2のみによっ
て回路導体層が構成されると同時に、回路素子3との接
続がなされるため、導電性樹脂2そのものの導体抵抗値
が高いことにより、回路素子3の接続の信頼性が乏しく
なることや回路構成上種々支障をきたすこと、さらには
導電性樹脂2による回路導体層ははんだづけ性に乏しい
ため、はんだづけ法によってリード付き部品を後付けす
ることができない不都合があった。
Problems to be Solved by the Invention However, in this method, since the circuit conductor layer is formed only by the conductive resin 2 and the circuit element 3 is connected, the conductive resistance value of the conductive resin 2 itself is reduced. Higher leads to poor reliability of connection of the circuit element 3 and various troubles in the circuit configuration. Furthermore, since the circuit conductor layer made of the conductive resin 2 has poor solderability, a leaded component can be formed by the soldering method. There was a problem that it could not be retrofitted.

本発明は、上述したような従来例の欠点を解消し、接
続の信頼性にすぐれるとともに、高電力回路にも使用可
能でかつはんだづけも可能にした電子回路基板の製造方
法を提供するものである。
The present invention provides a method for manufacturing an electronic circuit board which eliminates the above-mentioned drawbacks of the conventional example, has excellent connection reliability, and can be used in a high power circuit and can be soldered. is there.

問題点を解決するための手段 本発明による電子回路基板は、絶縁基板の少くとも一
方の主面上に無電解めっきに活性な導電性樹脂をスクリ
ーン印刷法などによって所望とする配線回路図形状に塗
布し、この絶縁基板の所定の位置に複数個の小型回路素
子を載置して、この回路素子の外部接続端子を導電性樹
脂の一部に接触させ、しかる後に導電性樹脂を硬化させ
てから、絶縁基板を無電解めっき液に浸漬して導電性樹
脂表面および回路素子の外部接続端子部に導電性金属層
を析出させることにより作られるものである。
Means for Solving Problems The electronic circuit board according to the present invention has a wiring circuit diagram shape in which a conductive resin active for electroless plating is formed on at least one main surface of an insulating substrate by a screen printing method or the like. Apply and place a plurality of small circuit elements at predetermined positions on this insulating substrate, contact the external connection terminals of this circuit element with a part of the conductive resin, and then cure the conductive resin. From the above, the insulating substrate is immersed in an electroless plating solution to deposit a conductive metal layer on the surface of the conductive resin and the external connection terminal portion of the circuit element.

作 用 これにより、回路導体層の形成と、回路素子の電気的
接続を同時に行うことができるとともに、無電解めっき
によって導体層を厚く構成できるので、回路導体層への
はんだづけ性はもとより、回路素子と回路導体層間の接
続抵抗を低くすることによる接続の信頼性の向上を可能
とした電子回路基板が実現できるものである。
This enables the formation of the circuit conductor layer and the electrical connection of the circuit element at the same time, and the thick conductor layer can be formed by electroless plating. It is possible to realize an electronic circuit board that can improve the reliability of connection by lowering the connection resistance between the circuit conductor layers.

実施例 以下、本発明の実施例について図面を参照しながら説
明する。
Examples Hereinafter, examples of the present invention will be described with reference to the drawings.

第1図(a)〜(d)は、本発明の一実施例における
電子回路基板の一連の製造工程を示したものであり、5
は絶縁基板、6は導電性樹脂、7は回路素子、8,8′は
回路素子の外部接続端子、9は導電金属層である。
FIGS. 1A to 1D show a series of manufacturing steps of an electronic circuit board according to an embodiment of the present invention.
Is an insulating substrate, 6 is a conductive resin, 7 is a circuit element, 8 and 8'are external connection terminals of the circuit element, and 9 is a conductive metal layer.

以上のように構成された電子回路基板は、まず第1図
(a)に示したように、絶縁基板5として、紙フェノー
ル積層板やガラスエポキシ積層板などの硬質の合成樹脂
基板や、ポリイミド,ポリエステル,エポキシ樹脂など
からなるフィルムの基板,ポリサルフォン,ポリエーテ
ルイミド,ポリフェニレンオキサイドナイロンなどから
なるいわゆるエンジニアリングプラスチックと呼ばれる
熱可塑性樹脂の成型体、さらにはアルミナなどのセラミ
ック基板,ガラス基板,表面を絶縁処理したアルミニウ
ムや鉄,銅などの金属基板の中から適宜選択される。
As shown in FIG. 1 (a), the electronic circuit board having the above-described structure first uses a hard synthetic resin board such as a paper phenol laminated board or a glass epoxy laminated board, a polyimide, Film substrate made of polyester, epoxy resin, etc., molded body of thermoplastic resin called so-called engineering plastic made of polysulfone, polyetherimide, polyphenylene oxide nylon, etc., further ceramic substrate such as alumina, glass substrate, surface insulation treatment It is appropriately selected from among metal substrates such as aluminum, iron, and copper.

次に、第1図(b)に示したように、その絶縁基板5
の主面上にスクリーン印刷技術によって無電解めっきが
可能な導電性樹脂6からなるペーストを所望とする配線
回路図形状に塗布する。
Next, as shown in FIG. 1 (b), the insulating substrate 5
A paste made of a conductive resin 6 that can be electroless plated by a screen printing technique is applied to the main surface of the above in a desired wiring circuit diagram shape.

この場合、導電性樹脂6としては、熱硬化性樹脂材
料、例えばフェノール樹脂,エポキシ樹脂,ポリイミド
樹脂などをベースとして、この樹脂中に無電解めっきの
触媒および導電性を付与するための例えば銀や銅,パラ
ジウムなどの微粒子状の金属粉末や導電性を有するカー
ボン微粉末を分散し、ペースト状としてすぐれた印刷適
性と接着性を持たせたものを使用する。
In this case, as the conductive resin 6, a thermosetting resin material such as phenol resin, epoxy resin, or polyimide resin is used as a base, and a catalyst for electroless plating and silver for imparting conductivity to the resin are used. A fine metal powder such as copper or palladium, or a fine carbon powder having conductivity is dispersed, and a paste having excellent printability and adhesiveness is used.

またこの導電性樹脂6として、ベースとなる絶縁基板
5にセラミックやガラスなどの耐熱性基板を使用する場
合には、銀や銀−パラジウムなどの金属微粉末とガラス
フリットを樹脂バインダーに分散して混練したペースト
を使用し、600〜800℃の高温中で焼成できるものも使用
した。また、導電性樹脂6の無電解めっきに対する活性
をより強力にするために、配線回路状に塗布した導電性
樹脂6の表面に金属粉末を散布して固着させる方法も試
みた。
When a heat-resistant substrate such as ceramic or glass is used as the insulating substrate 5 serving as the conductive resin 6, fine metal powder such as silver or silver-palladium and glass frit are dispersed in a resin binder. The kneaded paste was used, and one that could be fired at a high temperature of 600 to 800 ° C was also used. Further, in order to make the activity of the conductive resin 6 against electroless plating stronger, a method of spraying and fixing metal powder on the surface of the conductive resin 6 applied in the form of a wiring circuit was also tried.

次いで、第1図(c)に示したように、導電性樹脂6
を所望とする配線回路図形状に塗布した絶縁基板5上の
所定の位置に電子回路を構成するのに必要な小型の回路
素子7を載置し、これらの回路素子7の外部接続端子8,
8′を未硬化状態の導電性樹脂6の一部に接続させ、し
かる後に導電性樹脂6を硬化させる。これにより回路素
子7は絶縁基板5上に固定される。
Then, as shown in FIG. 1 (c), the conductive resin 6
A small circuit element 7 necessary for forming an electronic circuit is placed at a predetermined position on the insulating substrate 5 coated in a desired wiring circuit diagram shape, and external connection terminals 8 of these circuit elements 7 are provided.
8'is connected to a part of the uncured conductive resin 6, and then the conductive resin 6 is cured. As a result, the circuit element 7 is fixed on the insulating substrate 5.

ここで、使用する回路素子7は、小型で、かつ接続を
必要とする回路導体層に対し平面接続が可能な外部接続
端子8,8′を有していることが必要であり、このような
回路素子7としてリードレスタイプのメタルグレーズ抵
抗器,リードレス積層セラミックコンデンサー,リード
レス積層インダクター,ミニモールドタイプのトランジ
スタやIC,LSiなどが使用される。
Here, the circuit element 7 to be used must be small in size and have external connection terminals 8 and 8'that can be connected in a plane to the circuit conductor layer that requires connection. As the circuit element 7, a leadless type metal glaze resistor, a leadless multilayer ceramic capacitor, a leadless multilayer inductor, a minimold type transistor, IC, LSi, or the like is used.

次いで、第1図(d)に示したように、小型の回路素
子7を絶縁基板5の所定の位置に導電性樹脂6で固定し
たものを無電解めっき液に浸漬して配線回路状に固着し
た導電性樹脂6の表面と回路素子7の外部接続端子部8,
8′に導電金属層9を析出させる。
Then, as shown in FIG. 1 (d), a small circuit element 7 fixed on a predetermined position of an insulating substrate 5 with a conductive resin 6 is immersed in an electroless plating solution and fixed in a wiring circuit shape. The surface of the conductive resin 6 and the external connection terminal portion 8 of the circuit element 7,
A conductive metal layer 9 is deposited on 8 '.

この場合、無電解めっきとしては、銅やニッケルなど
の無電解めっきを行った。
In this case, as the electroless plating, electroless plating of copper or nickel was performed.

尚、本実施例では各種絶縁基板5の一方の主面上に回
路導体層の形成と、同時に各種回路素子7の電気的接続
を行った電子回路基板の方法について説明したが、本発
明では、各種絶縁基板5の一方の主面のみではなく、回
路の高密度化をはかることを目的として絶縁基板5の表
裏両面にわたって回路導体層を形成し、必要により回路
素子7を両面に配置して両者をスルーホールめっきによ
って接続する方法や、多層配線化した基板の最外層にこ
の方法を用いて回路素子7を接続して回路の高密度化を
はかる方法も試みた。
In this embodiment, the method of forming the circuit conductor layer on one main surface of the various insulating substrates 5 and at the same time electrically connecting the various circuit elements 7 to the electronic circuit substrate has been described. A circuit conductor layer is formed not only on one main surface of each insulating substrate 5 but also on both front and back surfaces of the insulating substrate 5 for the purpose of increasing the density of the circuit, and if necessary, the circuit elements 7 are arranged on both surfaces. A method of connecting the circuit elements by through-hole plating, and a method of connecting the circuit element 7 to the outermost layer of the substrate having the multilayer wiring by using this method to increase the circuit density were also tried.

発明の効果 以上説明したように、本発明によれば、広範囲な材料
の絶縁基板上に導電性樹脂を用いてスクリーン印刷法に
より回路導体層を形成し、導電性樹脂が硬化しない状態
で平面接続タイプの小型回路素子を載置して、その外部
接続端子を所定の導電性樹脂層の一部に接続させてか
ら、導電性樹脂を硬化させ、しかる後に無電解めっきを
行って固着した導電樹脂層と回路素子の外部接続端子層
に同時に導電金属層を析出させることにより電子回路を
構成するものであり、導電樹脂と無電解めっきによって
回路導体層の形成と同時に回路素子の電子的接続を行う
ことができる特徴を有する。
As described above, according to the present invention, a circuit conductor layer is formed by a screen printing method using a conductive resin on an insulating substrate made of a wide range of materials, and planar connection is performed in a state where the conductive resin is not cured. A small-sized circuit element of the type is placed, and its external connection terminals are connected to a part of the specified conductive resin layer, then the conductive resin is cured, and then electroless plating is performed to fix the conductive resin. An electronic circuit is formed by simultaneously depositing a conductive metal layer on the layer and the external connection terminal layer of the circuit element, and the circuit element is electronically connected at the same time as the formation of the circuit conductor layer by the conductive resin and electroless plating. It has the characteristics that can be.

従って、無電解めっきにより、導体抵抗値の低い回路
導体層が構成できるため、高電力回路への適用はもとよ
り回路素子と回路導体層の接続抵抗を著しく低下させる
ことができるので接続の信頼性が向上するとともに、回
路導体層へ他の回路素子をはんだづけ法により後付けす
ることができるなどの従来例にない効果が得られるもの
である。
Therefore, since the circuit conductor layer having a low conductor resistance value can be formed by the electroless plating, the connection resistance between the circuit element and the circuit conductor layer can be remarkably reduced as well as being applied to the high power circuit. In addition to the improvement, it is possible to obtain an effect which has not been obtained in the conventional example such that another circuit element can be attached to the circuit conductor layer by a soldering method.

【図面の簡単な説明】[Brief description of drawings]

第1図(a)〜(d)は、本発明の一実施例における電
子回路基板の一連の製造工程を示す図、第2図(a)〜
(c)は、従来例による電子回路基板の一連の製造工程
を示す図である。 5……絶縁基板、6……導電樹脂層、7……回路素子、
8,8′……外部電極端子層、9……導電金属層。
1 (a) to (d) are views showing a series of manufacturing steps of an electronic circuit board in one embodiment of the present invention, and FIGS. 2 (a) to (d).
(C) is a figure which shows a series of manufacturing processes of the electronic circuit board by a prior art example. 5 ... Insulating substrate, 6 ... Conductive resin layer, 7 ... Circuit element,
8,8 '... External electrode terminal layer, 9 ... Conductive metal layer.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】絶縁基板の少なくとも一主面上に無電解め
っきに活性な導電性樹脂を所望とする配線回路図形状に
塗布し、前記絶縁基板の所定の位置に複数個の小型回路
素子を載置して、前記回路素子の外部接続端子を前記導
電性樹脂の一部に接触させ、しかる後に前記導電性樹脂
を硬化させてから、前記絶縁基板を無電解めっき液に浸
漬し、前記導電性樹脂表面および前記回路素子の外部接
続端子部に同時に導電金属を析出させることを特徴とす
る電子回路基板の製造方法。
1. A conductive resin active in electroless plating is applied on at least one main surface of an insulating substrate in a desired wiring circuit diagram shape, and a plurality of small circuit elements are provided at predetermined positions on the insulating substrate. After placing, the external connection terminals of the circuit element are brought into contact with a part of the conductive resin, after which the conductive resin is cured, the insulating substrate is immersed in an electroless plating solution, A method for manufacturing an electronic circuit board, characterized in that a conductive metal is simultaneously deposited on the surface of the conductive resin and the external connection terminal portion of the circuit element.
【請求項2】回路素子は、平面接続が可能な外部接続端
子を有することを特徴とする特許請求の範囲第1項記載
の電子回路基板の製造方法。
2. The method for manufacturing an electronic circuit board according to claim 1, wherein the circuit element has an external connection terminal capable of planar connection.
JP62209611A 1987-08-24 1987-08-24 Electronic circuit board manufacturing method Expired - Lifetime JP2537893B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62209611A JP2537893B2 (en) 1987-08-24 1987-08-24 Electronic circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62209611A JP2537893B2 (en) 1987-08-24 1987-08-24 Electronic circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPS6451693A JPS6451693A (en) 1989-02-27
JP2537893B2 true JP2537893B2 (en) 1996-09-25

Family

ID=16575670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62209611A Expired - Lifetime JP2537893B2 (en) 1987-08-24 1987-08-24 Electronic circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JP2537893B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4235019C1 (en) * 1992-10-16 1994-04-21 Ame Gmbh Printed circuit board manufacture as well as assembly and contacting processes for components by electroless metal deposition

Also Published As

Publication number Publication date
JPS6451693A (en) 1989-02-27

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