JP2519402B2 - Method for manufacturing power semiconductor module substrate - Google Patents
Method for manufacturing power semiconductor module substrateInfo
- Publication number
- JP2519402B2 JP2519402B2 JP6300702A JP30070294A JP2519402B2 JP 2519402 B2 JP2519402 B2 JP 2519402B2 JP 6300702 A JP6300702 A JP 6300702A JP 30070294 A JP30070294 A JP 30070294A JP 2519402 B2 JP2519402 B2 JP 2519402B2
- Authority
- JP
- Japan
- Prior art keywords
- aln
- active metal
- power semiconductor
- plate
- semiconductor module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、パワー半導体モジュー
ル基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a power semiconductor module substrate.
【０００２】[0002]
【従来の技術】近年、パワー半導体素子に対する高密度
集積化、ハイブリッド化、さらに大電流の制御など、種
々の要求が高まっている。こうした要求を達成しようと
すると、半導体素子より発生する多量の熱が問題にな
る。このため、発生する多量の熱を放出して半導体素子
の温度上昇を防ぐことが必要である。2. Description of the Related Art In recent years, various demands such as high-density integration, hybridization, and control of large current for power semiconductor elements are increasing. In order to meet these requirements, a large amount of heat generated by the semiconductor device becomes a problem. Therefore, it is necessary to release a large amount of generated heat to prevent the temperature rise of the semiconductor element.
【０００３】このようなことから、従来、放熱基板を用
いた図５に示すパワー半導体モジュールが知られてい
る。図中の１は、銅等からなるヒートシンクである。前
記ヒートシンク１上には、後述する熱拡散板との絶縁を
図るためのＡｌ2 Ｏ3 からなる第１絶縁板２1 が半田層
３を介して接合されている。前記絶縁板２1 上には、熱
拡散板４が半田層３を介して接合されている。前記熱拡
散板４上には、実装すべき半導体素子との絶縁を図るた
めのＡｌ2 Ｏ3 からなる複数の第２絶縁板２2 がそれぞ
れ半田層３を介して接合されている。前記各第２絶縁板
２2 上には、図示しないメタライズ層が形成され、この
メタライズ層上には半導体素子５が半田層３を介してそ
れぞれ接合されている。なお、図中の６は前記第１絶縁
板２1 両面と前記半田層３の間、および前記第２絶縁板
２2 両面と前記半田層３の間にそれぞれ形成された接合
層である。For this reason, the power semiconductor module shown in FIG. 5 using a heat dissipation board has been conventionally known. Reference numeral 1 in the figure is a heat sink made of copper or the like. On the heat sink 1, a first insulating plate 2 1 made of Al 2 O 3 for insulation from a heat diffusion plate described later is joined via a solder layer 3. Wherein on the insulating plate 2 1, the thermal diffusion plate 4 is bonded through the solder layer 3. On the heat diffusion plate 4, a plurality of second insulating plates 2 2 made of Al 2 O 3 for insulation from a semiconductor element to be mounted are joined via solder layers 3, respectively. A metallization layer (not shown) is formed on each of the second insulating plates 2 2 , and the semiconductor elements 5 are bonded to the metallization layers via the solder layers 3, respectively. Reference numeral 6 in the figure denotes a bonding layer formed between both surfaces of the first insulating plate 2 1 and the solder layer 3 and between both surfaces of the second insulating plate 2 2 and the solder layer 3, respectively.
【０００４】しかしながら、従来のパワー半導体モジュ
ール基板に用いられる放熱基板は前述した図３に示すよ
うに非常に複雑な構造になるという問題があった。これ
は、第１、第２の絶縁板２1 、２2 を構成するＡｌ2 Ｏ
3 は耐圧が１００ｋＶ／ｃｍと良好であるものの、熱伝
導率が２０Ｗ／ｍ・℃と低いために、放熱性と絶縁耐性
との両方の機能を銅とアルミナの両材料を用いて満足さ
せる必要があるからである。However, there is a problem in that the heat dissipation board used in the conventional power semiconductor module board has a very complicated structure as shown in FIG. This is the Al 2 O that constitutes the first and second insulating plates 2 1 and 2 2.
Although 3 has a good withstand voltage of 100 kV / cm, it has a low thermal conductivity of 20 W / m · ° C. Therefore, it is necessary to satisfy both functions of heat dissipation and insulation by using both copper and alumina materials. Because there is.
【０００５】一方、窒化アルミニウム（ＡｌＮ）は電気
絶縁性が１４０〜１７０ｋＶ／ｃｍ、熱伝導性が６０Ｗ
／ｍ・℃と共に優れた特性を有することに着目し、前記
ＡｌＮ部材を銅（Ｃｕ）部材に接合してモジュールを製
造することが試みられている。しかしながら、ＡｌＮは
ろう材に対する濡れ性が劣るため、銀ろう材等でＡｌＮ
部材とＣｕ部材とを接合しようとしても十分な接合強度
を得ることは殆ど困難であった。On the other hand, aluminum nitride (AlN) has an electrical insulating property of 140 to 170 kV / cm and a thermal conductivity of 60 W.
Attention has been paid to the fact that it has excellent characteristics together with / m · ° C., and attempts have been made to manufacture a module by bonding the AlN member to a copper (Cu) member. However, since AlN has poor wettability with the brazing filler metal, it is not possible to use AlN with silver brazing filler metal.
Even if an attempt was made to join the member and the Cu member, it was almost difficult to obtain sufficient joining strength.
【０００６】[0006]
【発明が解決しようとする課題】本発明は、簡略化され
た構造で、かつ良好な絶縁耐圧を有することは勿論、優
れた放熱性、耐熱衝撃性を有し、さらに低抵抗の配線材
料等として機能するＣｕ部材がＡｌＮ部材に強固に接合
されたパワー半導体モジュール基板の製造方法を提供し
ようとするものである。DISCLOSURE OF THE INVENTION The present invention has a simplified structure and has a good withstand voltage, as well as excellent heat dissipation and thermal shock resistance, and further has a low resistance wiring material and the like. An attempt is made to provide a method for manufacturing a power semiconductor module substrate in which a Cu member that functions as a member is firmly bonded to an AlN member.
【０００７】[0007]
【課題を解決するための手段】本発明に係わるパワー半
導体モジュール基板の製造方法は、窒化アルミニウム
（ＡｌＮ）部材と銅（Ｃｕ）部材との間に活性金属層ま
たは活性金属および銅からなる合金層を介在させる工程
と、前記活性金属層または合金層が介在された前記Ａｌ
Ｎ部材および前記Ｃｕ部材を真空雰囲気もしくは不活性
雰囲気で加熱して前記ＡｌＮ部材と前記Ｃｕ部材との間
にＣｕと活性金属からなる合金融液を生成する工程と、
さらに加熱を続行して前記合金融液を前記Ｃｕ部材に拡
散させる工程とを具備したことを特徴とするものであ
る。A method of manufacturing a power semiconductor module substrate according to the present invention includes an active metal layer or an alloy layer composed of an active metal and copper between an aluminum nitride (AlN) member and a copper (Cu) member. And a step of interposing the Al with the active metal layer or alloy layer interposed.
Heating the N member and the Cu member in a vacuum atmosphere or an inert atmosphere to generate a financial liquid composed of Cu and an active metal between the AlN member and the Cu member;
Further, heating is continued to diffuse the synthetic financial liquid into the Cu member.
【０００８】以下、本発明のパワー半導体モジュール基
板の製造方法を詳細に説明する。まず、ＡｌＮ部材とＣ
ｕ部材の間の接合部に活性金属層または活性金属および
Ｃｕからなる合金層を介在させる。前記活性金属として
は、例えばＴｉ、Ｚｒ、Ｈｆ等を用いることがことがで
きる。前記活性金属層または前記合金層は、１００μｍ
以下の厚さを有することが好ましい。このような工程に
おいて、前記活性金属層または合金層を前記接合部に介
在させる手段としては、例えば活性金属または合金から
なる箔を前記接合部に介在させる方法、或いはＣｕ部材
の片面に前記活性金属層または前記合金層をスパッタリ
ング法、ＬＰＣ法（低圧プラズマコーティング法）など
により堆積し、前記Ｃｕ部材を前記ＡｌＮ部材に前記活
性金属層等の堆積面が前記ＡｌＮ部材側に位置するよう
に重ねる方法等を採用し得る。The method of manufacturing the power semiconductor module substrate of the present invention will be described in detail below. First, AlN member and C
An active metal layer or an alloy layer composed of active metal and Cu is interposed at the joint between the u members. As the active metal, for example, Ti, Zr, Hf or the like can be used. The active metal layer or the alloy layer has a thickness of 100 μm.
It preferably has the following thickness. In such a step, as a means for interposing the active metal layer or alloy layer in the joint, for example, a method of interposing a foil made of an active metal or alloy in the joint, or the active metal on one surface of the Cu member is used. Layer or the alloy layer is deposited by a sputtering method, an LPC method (low-pressure plasma coating method) or the like, and the Cu member is superposed on the AlN member so that the deposition surface of the active metal layer or the like is located on the AlN member side. Etc. can be adopted.
【０００９】次いで、前記活性金属層または前記合金層
が介在されたＡｌＮ部材とＣｕ部材を真空雰囲気もしく
は不活性雰囲気で加熱する。この加熱工程において、前
記ＡｌＮ部材と前記Ｃｕ部材間の前記活性金属層等に圧
力を加えなくてもよいが、必要に応じて０．０１〜１ｋ
ｇ／ｍｍ2 の低圧を加えて加熱してもよい。前記加熱温
度は、Ｃｕ部材の融点より低いことが必要である。具体
的には、８７２〜１０８２℃の範囲で加熱すればよい。
このような熱処理によりして前記ＡｌＮ部材と前記Ｃｕ
部材との間にＣｕと活性金属からなる合金融液が生成さ
れる。つづいて、前記加熱を続行して前記合金融液を前
記Ｃｕ部材に拡散させた後、冷却することにより前記Ａ
ｌＮ部材と前記Ｃｕ部材とが強固に接合されたパワー半
導体モジュール基板が製造される。前記拡散工程は、前
記合金融液の冷却後において合金層が著しく薄く存在す
るか、または殆どの存在しない状態にすることが好まし
い。Next, the AlN member and the Cu member in which the active metal layer or the alloy layer is interposed are heated in a vacuum atmosphere or an inert atmosphere. In this heating step, it is not necessary to apply pressure to the active metal layer or the like between the AlN member and the Cu member, but if necessary, 0.01 to 1 k
You may heat by adding the low pressure of g / mm < 2 >. The heating temperature needs to be lower than the melting point of the Cu member. Specifically, it may be heated in the range of 872 to 1082 ° C.
By such heat treatment, the AlN member and the Cu are
A financial liquid composed of Cu and an active metal is generated between the member and the member. Then, the heating is continued to diffuse the synthetic financial liquid in the Cu member, and then the cooling is performed to cool the A member.
A power semiconductor module substrate in which the 1N member and the Cu member are firmly joined is manufactured. In the diffusion step, it is preferable that the alloy layer is present very thinly or hardly after the cooling liquid is cooled.
【００１０】[0010]
【作用】本発明に係わるパワー半導体モジュール基板の
製造方法は、ＡｌＮ部材とＣｕ部材との間に活性金属層
または活性金属および銅からなる合金層を介在させる工
程と、前記活性金属層または合金層が介在された前記Ａ
ｌＮ部材および前記Ｃｕ部材を真空雰囲気もしくは不活
性雰囲気で加熱して前記ＡｌＮ部材と前記Ｃｕ部材との
間にＣｕと活性金属からなる合金融液を生成する工程
と、さらに加熱を続行して前記合金融液を前記Ｃｕ部材
に拡散させる工程とを具備する。このような本発明方法
において、前記活性金属層または合金層が介在された前
記ＡｌＮ部材および前記Ｃｕ部材を真空雰囲気もしくは
不活性雰囲気で加熱することによって、ろう材等に対し
て濡れ性の劣るＡｌＮ部材と低抵抗の配線材料等として
機能するＣｕ部材とが高い強度で接合されたパワー半導
体モジュール基板を製造することができる。このような
モジュール基板のＣｕ部材にパワー半導体素子を搭載し
た場合、前記Ｃｕ部材が接合されたＡｌＮ部材は高い熱
伝導率を有するため、前記半導体素子で発生した熱を前
記Ｃｕ部材、ＡｌＮ等を通して良好に放出することがで
きる。The method of manufacturing a power semiconductor module substrate according to the present invention comprises a step of interposing an active metal layer or an alloy layer composed of active metal and copper between an AlN member and a Cu member, and the active metal layer or alloy layer. The above-mentioned A
a step of heating the 1N member and the Cu member in a vacuum atmosphere or an inert atmosphere to generate a synthetic financial liquid composed of Cu and an active metal between the AlN member and the Cu member; And diffusing a synergistic liquid into the Cu member. In such a method of the present invention, by heating the AlN member and the Cu member in which the active metal layer or the alloy layer is interposed in a vacuum atmosphere or an inert atmosphere, AlN having poor wettability with respect to a brazing filler metal or the like. It is possible to manufacture a power semiconductor module substrate in which a member and a Cu member functioning as a low-resistance wiring material or the like are joined with high strength. When a power semiconductor element is mounted on a Cu member of such a module substrate, since the AlN member joined to the Cu member has high thermal conductivity, the heat generated in the semiconductor element is transmitted through the Cu member, AlN, etc. It can be released well.
【００１１】また、前記加熱を続行して前記ＡｌＮ部材
と前記Ｃｕ部材との間に生成されたＣｕと活性金属から
なる合金融液を前記Ｃｕ部材に拡散させることによっ
て、熱衝撃による前記ＡｌＮ部材のクラック発生を防止
したパワー半導体モジュール基板を製造することができ
る。Further, by continuing the heating and diffusing into the Cu member a synthetic financial liquid composed of Cu and an active metal generated between the AlN member and the Cu member, the AlN member due to thermal shock. It is possible to manufacture a power semiconductor module substrate in which the occurrence of cracks is prevented.
【００１２】すなわち、Ｃｕまたは活性金属のような金
属とＡｌＮとは熱膨張係数（Ｃｕ；１７×１０-6／℃、
ＡｌＮ；４×１０-6／℃）が大きく異なるため、前記Ｃ
ｕ部材と前記ＡｌＮ部材の温度が上昇ないし下降する
と、前記部材間の接合部に大きな応力が加わる。この場
合、Ｃｕはその硬度が低く、柔らかいために前記Ｃｕ部
材は前記応力により容易に変形してそれを緩和する作用
を有する。これに対し、ＣｕとＴｉ、Ｚｒのような活性
金属からなる合金は硬く変形し難いために、前記接合部
に前記合金の層が厚く存在すると、前記応力の緩和作用
が小さく、ＡｌＮ部材に前記応力が加わってクラックを
発生する恐れがある。このようなことから本発明方法
は、前述したようにＡｌＮ部材と前記Ｃｕ部材との間に
生成されたＣｕと活性金属からなる合金融液をさらに加
熱を続行して前記Ｃｕ部材に拡散させることによって、
冷却後のＡｌＮ部材と前記Ｃｕ部材との間に位置する合
金層を著しく薄くするか、もしくは殆どの存在しない状
態にすることができる。その結果、前記合金層に起因す
る熱衝撃による前記ＡｌＮ部材のクラック発生を抑制な
いし防止することができる。That is, a metal such as Cu or an active metal and AlN have a coefficient of thermal expansion (Cu; 17 × 10 -6 / ° C.,
AlN; 4 × 10 −6 / ° C.) is significantly different,
When the temperature of the u member and the temperature of the AlN member rise or fall, a large stress is applied to the joint between the members. In this case, since Cu has low hardness and is soft, the Cu member has a function of easily deforming and relaxing the stress. On the other hand, since an alloy composed of Cu and an active metal such as Ti or Zr is hard and difficult to deform, if a thick layer of the alloy is present in the joint, the stress relaxation effect is small and the AlN member has the above-mentioned effect. There is a risk that stress will be applied and cracks will occur. From the above, the method of the present invention, as described above, is to continue heating the diffused solution of Cu and active metal generated between the AlN member and the Cu member to diffuse it into the Cu member. By
The alloy layer located between the cooled AlN member and the Cu member can be made extremely thin, or can be made almost nonexistent. As a result, cracking of the AlN member due to thermal shock caused by the alloy layer can be suppressed or prevented.
【００１３】さらに、ＡｌＮ部材と前記Ｃｕ部材との間
に介在させる活性金属層または活性金属および銅からな
る合金層の厚さを１００μｍ以下と薄くすれば、より一
層放熱特性の優れたパワー半導体モジュール基板を製造
することができる。Further, if the thickness of the active metal layer or the alloy layer composed of the active metal and copper interposed between the AlN member and the Cu member is made as thin as 100 μm or less, the power semiconductor module having further excellent heat dissipation characteristics. The substrate can be manufactured.
【００１４】すなわち、前記パワー半導体モジュール基
板において前記Ｃｕ部材にパワー半導体素子を搭載する
と、前記半導体素子からの熱は前記Ｃｕ部材、および前
記Ｃｕ部材と前記ＡｌＮ部材の間のＣｕと活性金属から
なる合金層を通して熱伝導率の高いＡｌＮ部材に伝達さ
れ、前記ＡｌＮ部材から放熱される。この放熱特性は、
前記ＡｌＮ部材の熱伝導率の良否のみならず、前記熱伝
達経路に位置し、ＡｌＮおよびＣｕに比べて熱伝導率が
劣る前記合金層や前記活性金属が拡散された前記Ｃｕ部
材の拡散領域の厚さも影響される。前述したように前記
活性金属層または活性金属および銅からなる前記合金層
の厚さを１００μｍ以下と薄くすることによって、前記
ＡｌＮ部材と前記Ｃｕ部材との間に生成されるＣｕと活
性金属からなる合金融液の量を少なくすることができ
る。その結果、さらに加熱を続行して前記合金融液を前
記Ｃｕ部材に拡散させることにより前記Ｃｕ部材の接合
部側に形成されるＣｕと活性金属からなる合金層の厚さ
や活性金属の拡散領域の厚さを薄くすることができる。
したがって、熱伝達経路に位置する前記拡散領域に起因
する熱伝導熱の低下を抑制できるため、より一層放熱特
性の優れたパワー半導体モジュール基板を製造すること
ができる。That is, when a power semiconductor element is mounted on the Cu member in the power semiconductor module substrate, the heat from the semiconductor element is composed of the Cu member and Cu between the Cu member and the AlN member and the active metal. It is transmitted to the AlN member having a high thermal conductivity through the alloy layer and is radiated from the AlN member. This heat dissipation characteristic is
Not only the thermal conductivity of the AlN member is good or bad, but the alloy layer located in the heat transfer path and inferior in thermal conductivity to AlN and Cu or the diffusion region of the Cu member in which the active metal is diffused Thickness is also affected. As described above, by reducing the thickness of the active metal layer or the alloy layer made of active metal and copper to 100 μm or less, Cu formed between the AlN member and the Cu member and the active metal are formed. The amount of synergistic liquid can be reduced. As a result, the thickness of the alloy layer formed of Cu and the active metal and the diffusion region of the active metal formed on the joint side of the Cu member by continuing heating to diffuse the synthetic financial liquid into the Cu member The thickness can be reduced.
Therefore, it is possible to suppress a decrease in heat conduction heat due to the diffusion region located in the heat transfer path, and thus it is possible to manufacture a power semiconductor module substrate having further excellent heat dissipation characteristics.
【００１５】[0015]
【実施例】以下、本発明の実施例を図面を参照して詳細
に説明する。 実施例１ まず、絶縁板、放熱板およびヒートシンクを兼ねるＡｌ
Ｎ板１１と複数枚のＣｕ板１２をトリクレンおよびアセ
トンで洗浄して脱脂した後、ＡｌＮ板１１とＣｕ板１２
の接合部に厚さ２０μｍのＴｉ箔を介在させ、２×１０
-5ｔｏｒｒの真空度に保持したホットプレス内にセット
した。つづいて、ＡｌＮ板１１と複数枚のＣｕ板１２を
上下方向から０．１ｋｇ／ｍｍ2 の圧力を加え、高周波
加熱により接合部を９３０℃に保持した。加熱後３０分
間未満の時間で前記Ｔｉ箔が溶融してＣｕとＴｉを含む
合金融液が生成された。圧力を解除した後、９５０℃で
９６時間保持する加熱をさらに続行することにより、Ｃ
ｕとＴｉを含む合金融液をＣｕ板１２に拡散させた。加
熱後、アルゴンガス雰囲気中で冷却することにより図１
に示すようにＡｌＮ板１１とＣｕ板１２とが接合された
構造のパワー半導体モジュール１３を製造した。Embodiments of the present invention will now be described in detail with reference to the drawings. Example 1 First, Al that also serves as an insulating plate, a heat sink and a heat sink
After cleaning the N plate 11 and the plurality of Cu plates 12 with trichlene and acetone to degrease them, the AlN plate 11 and the Cu plate 12
A Ti foil with a thickness of 20 μm is interposed at the joint part of 2 × 10
It was set in a hot press maintained at a vacuum degree of -5 torr. Subsequently, a pressure of 0.1 kg / mm 2 was applied to the AlN plate 11 and the plurality of Cu plates 12 from above and below, and the joint was maintained at 930 ° C. by high frequency heating. The Ti foil was melted in less than 30 minutes after heating to generate a combined financial liquid containing Cu and Ti. After releasing the pressure, by further maintaining heating at 950 ° C. for 96 hours, C
A joint finance liquid containing u and Ti was diffused on the Cu plate 12. After heating, it is cooled in an argon gas atmosphere, as shown in FIG.
A power semiconductor module 13 having a structure in which an AlN plate 11 and a Cu plate 12 are joined as shown in FIG.
【００１６】得られたモジュール基板１３の接合部を１
００倍の光学顕微鏡で観察した。その結果、前記ＡｌＮ
板１１と前記Ｃｕ板１２との間の接合部にはＣｕとＴｉ
を含む合金層は観察されず、かつ前記ＡｌＮ板１１には
クラック発生もなく、良好な接合状態を有することが確
認された。The joint portion of the obtained module substrate 13 is set to 1
It was observed with an optical microscope of 00 magnification. As a result, the AlN
At the joint between the plate 11 and the Cu plate 12, Cu and Ti
It was confirmed that an alloy layer containing P was not observed, and that the AlN plate 11 had no cracks and had a good bonding state.
【００１７】また、図２に示すように前記モジュール基
板１３の複数枚のＣｕ板１２にパワー半導体素子１４を
Ｐｂ−Ｓｎ系半田層１５を介してそれぞれ実装した。そ
の結果、半導体素子１４からの多量の熱を良好に放出で
きると共に、ＡｌＮ板１１のクラック発生のない高信頼
性のパワー半導体モジュールを得ることができた。Further, as shown in FIG. 2, the power semiconductor elements 14 are mounted on the plurality of Cu plates 12 of the module substrate 13 via the Pb-Sn solder layers 15 respectively. As a result, a large amount of heat from the semiconductor element 14 can be satisfactorily radiated, and a highly reliable power semiconductor module without cracking of the AlN plate 11 can be obtained.
【００１８】実施例２ まず、複数枚のＣｕ板１２およびＣｕからなる熱拡散板
１６をそれぞれトリクレンおよびアセトンで洗浄して脱
脂した後、前記Ｃｕ板１２および熱拡散板１６の片面に
６０ｔｏｒｒのアルゴン雰囲気中で低圧プラズマ溶射法
により厚さ３０μｍのＣｕ−Ｔｉ合金層（７２重量％Ｃ
ｕ−Ｔｉ）をそれぞれ堆積した。つづいて、ＡｌＮ板１
１をトリクレンおよびアセトンで洗浄し、このＡｌＮ板
１１を前記熱拡散板１６のＣｕ−Ｔｉ合金層上に載せ、
さらに前記ＡｌＮ板１１上に複数枚の前記Ｃｕ板１２を
予め堆積されたＣｕ−Ｔｉ合金層が前記ＡｌＮ板１１側
に位置するように載せた後、２×１０-5ｔｏｒｒの真空
度に保持したホットプレス内にセットした。ひきつづ
き、Ｃｕ板１２、ＡｌＮ板１１および熱拡散板１６を上
下方向から０．１ｋｇ／ｍｍ2 の圧力を加え、高周波加
熱により前記ＡｌＮ１１と前記Ｃｕ板の間の接合部およ
び前記ＡｌＮ板１１と前記熱拡散板１６の間の接合部を
９００℃に保持した。加熱直後に前記Ｃｕ−Ｔｉ合金層
が溶融してＣｕとＴｉを含む合金融液が生成された。圧
力を解除した後、９５０℃で９６時間保持する加熱をさ
らに続行することにより、ＣｕとＴｉを含む合金融液を
前記ＡｌＮ１１と前記Ｃｕ板の間の接合部においてＣｕ
板１２に拡散させ、前記ＡｌＮ板１１と前記熱拡散板１
６の間の接合部において熱拡散板１６に拡散させた。加
熱後、アルゴンガス雰囲気中で冷却することによりＡｌ
Ｎ板１１とＣｕ板１２、ＡｌＮ板１１と熱拡散板１６を
それぞれ接合した。次いで、前記熱拡散板１６の下面に
Ｃｕ製のヒートシンク１７をＰｂ−Ｓｎ系半田層１５を
介して接合することにより図３に示すパワー半導体モジ
ュール１３´を製造した。Example 2 First, a plurality of Cu plates 12 and a heat diffusion plate 16 made of Cu were washed and degreased with trichlene and acetone, respectively. A Cu-Ti alloy layer (72 wt% C) having a thickness of 30 μm was formed by low pressure plasma spraying in an atmosphere.
u-Ti) were deposited respectively. Next, AlN plate 1
1 was washed with trichlene and acetone, and this AlN plate 11 was placed on the Cu—Ti alloy layer of the heat diffusion plate 16,
Further, a plurality of the Cu plates 12 are placed on the AlN plate 11 so that the previously deposited Cu—Ti alloy layer is located on the AlN plate 11 side, and then the vacuum degree of 2 × 10 −5 torr is maintained. It was set in the hot press. Subsequently, a pressure of 0.1 kg / mm 2 is applied to the Cu plate 12, the AlN plate 11 and the thermal diffusion plate 16 from above and below, and the joint between the AlN 11 and the Cu plate and the AlN plate 11 and the thermal diffusion are applied by high frequency heating. The joint between the plates 16 was kept at 900 ° C. Immediately after heating, the Cu-Ti alloy layer was melted to generate a combined financial liquid containing Cu and Ti. After releasing the pressure, by continuing heating at 950 ° C. for 96 hours, the combined financial liquid containing Cu and Ti was added to Cu at the joint between the AlN 11 and the Cu plate.
The AlN plate 11 and the heat diffusion plate 1 are diffused in the plate 12.
It was diffused to the heat diffusion plate 16 at the joint portion between 6. After heating, cooling in an argon gas atmosphere causes Al
The N plate 11 and the Cu plate 12 were joined together, and the AlN plate 11 and the heat diffusion plate 16 were joined together. Next, a heat sink 17 made of Cu was bonded to the lower surface of the heat diffusion plate 16 via the Pb-Sn solder layer 15 to manufacture a power semiconductor module 13 'shown in FIG.
【００１９】得られたモジュール基板１３´における前
記ＡｌＮ１１と前記Ｃｕ板の間、前記ＡｌＮ板１１と前
記熱拡散板１６の間の各接合部を１００倍の光学顕微鏡
で観察した。その結果、前記各接合部にはＣｕとＴｉを
含む合金層は観察されず、かつ前記ＡｌＮ板１１にはク
ラック発生もなく、良好な接合状態を有することが確認
された。The joints between the AlN 11 and the Cu plate and between the AlN plate 11 and the thermal diffusion plate 16 in the obtained module substrate 13 'were observed with a 100 × optical microscope. As a result, it was confirmed that no alloy layer containing Cu and Ti was observed in each of the joints, and that the AlN plate 11 had no cracks and had a good joint state.
【００２０】また、図４に示すように前記モジュール基
板１３´の複数枚のＣｕ板１２にパワー半導体素子１４
をＰｂ−Ｓｎ系半田層１５を介してそれぞれ実装した。
その結果、半導体素子１４からの多量の熱を良好に放出
できると共に、ＡｌＮ板１１のクラック発生のない高信
頼性のパワー半導体モジュールを得ることができた。As shown in FIG. 4, the power semiconductor element 14 is formed on the plurality of Cu plates 12 of the module substrate 13 '.
Were mounted via the Pb-Sn solder layer 15.
As a result, a large amount of heat from the semiconductor element 14 can be satisfactorily radiated, and a highly reliable power semiconductor module without cracking of the AlN plate 11 can be obtained.
【００２１】[0021]
【発明の効果】以上詳述したように本発明によれば、簡
略化された構造で、かつ良好な絶縁耐圧を有することは
勿論、優れた放熱特性、耐熱衝撃性を有し、さらに低抵
抗の配線材料等として機能するＣｕ部材がＡｌＮ部材に
強固に接合されたパワー半導体モジュール基板の製造方
法を提供することができる。As described in detail above, according to the present invention, not only the structure is simplified and the dielectric strength is good, but also the heat dissipation property and the thermal shock resistance are excellent, and the resistance is low. It is possible to provide a method for manufacturing a power semiconductor module substrate, in which a Cu member functioning as a wiring material or the like is firmly bonded to an AlN member.
【図１】本発明の実施例１により製造されたパワー半導
体モジュール基板を示す断面図。FIG. 1 is a cross-sectional view showing a power semiconductor module substrate manufactured according to a first embodiment of the present invention.
【図２】本発明の実施例１により製造されたパワー半導
体モジュールを示す断面図。FIG. 2 is a sectional view showing a power semiconductor module manufactured according to Example 1 of the present invention.
【図３】本発明の実施例２により製造されたパワー半導
体モジュール基板を示す断面図。FIG. 3 is a cross-sectional view showing a power semiconductor module substrate manufactured according to a second embodiment of the present invention.
【図４】本発明の実施例１により製造されたパワー半導
体モジュールを示す断面図。FIG. 4 is a sectional view showing a power semiconductor module manufactured according to Example 1 of the present invention.
【図５】従来の放熱板を有するパワー半導体モジュール
を示す断面図。FIG. 5 is a sectional view showing a power semiconductor module having a conventional heat sink.
１１…ＡｌＮ板、１２…Ｃｕ板、１３、１３´…パワー
半導体モジュール基板、１４…パワー半導体素子、１５
…半田層、１７…熱拡散板、１７…ヒートシンク。11 ... AlN plate, 12 ... Cu plate, 13, 13 '... Power semiconductor module substrate, 14 ... Power semiconductor element, 15
... Solder layer, 17 ... Heat diffusion plate, 17 ... Heat sink.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 山崎 達雄 神奈川県川崎市幸区小向東芝町１番地 株式会社東芝総合研究所内 (72)発明者 白兼 誠 神奈川県川崎市幸区小向東芝町１番地 株式会社東芝総合研究所内 (56)参考文献 特開 昭58−48926（ＪＰ，Ａ) 特開 昭50−75208（ＪＰ，Ａ) 特開 昭51−73014（ＪＰ，Ａ) 特開 昭60−32648（ＪＰ，Ａ) 特公 平５−86662（ＪＰ，Ｂ２) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tatsuo Yamazaki 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Toshiba Research Institute, Ltd. (72) Inventor Makoto Shirakane Komukai-shi Toshiba, Kawasaki-shi, Kanagawa No. 1 in Toshiba Research Institute Co., Ltd. (56) Reference JP 58-48926 (JP, A) JP 50-75208 (JP, A) JP 51-73014 (JP, A) JP 60 -32648 (JP, A) Japanese Patent Publication 5-86662 (JP, B2)
Claims (3)
活性金属層または活性金属および銅からなる合金層を介
在させる工程と、 前記活性金属層または合金層が介在された前記窒化アル
ミニウム部材および前記銅部材を真空雰囲気もしくは不
活性雰囲気で加熱して前記窒化アルミニウム部材と前記
銅部材との間に銅と活性金属からなる合金融液を生成す
る工程と、 さらに加熱を続行して前記合金融液を前記銅部材に拡散
させる工程とを具備したことを特徴とするパワー半導体
モジュール基板の製造方法。1. A step of interposing an active metal layer or an alloy layer composed of an active metal and copper between an aluminum nitride member and a copper member; and the aluminum nitride member and the aluminum nitride member in which the active metal layer or alloy layer is interposed. A step of heating a copper member in a vacuum atmosphere or an inert atmosphere to generate a combined financial liquid composed of copper and an active metal between the aluminum nitride member and the copper member; And a step of diffusing the copper into the copper member.
ウムであることを特徴とする請求項１記載のパワー半導
体モジュール基板の製造方法。2. The method for manufacturing a power semiconductor module substrate according to claim 1, wherein the active metal is titanium or zirconium.
００μｍ以下の厚さを有することを特徴とする請求項１
記載のパワー半導体モジュール基板の製造方法。3. The active metal layer or the alloy layer is 1
2. A thickness of less than 00 μm.
A method for manufacturing the power semiconductor module substrate described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6300702A JP2519402B2 (en) | 1994-12-05 | 1994-12-05 | Method for manufacturing power semiconductor module substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6300702A JP2519402B2 (en) | 1994-12-05 | 1994-12-05 | Method for manufacturing power semiconductor module substrate |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14131983A Division JPS6032343A (en) | 1983-08-02 | 1983-08-02 | Power semiconductor module substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07176651A JPH07176651A (en) | 1995-07-14 |
| JP2519402B2 true JP2519402B2 (en) | 1996-07-31 |
Family
ID=17888061
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6300702A Expired - Lifetime JP2519402B2 (en) | 1994-12-05 | 1994-12-05 | Method for manufacturing power semiconductor module substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2519402B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100380107B1 (en) | 2001-04-30 | 2003-04-11 | 삼성전자주식회사 | Circuit board having a heating means and multichip package having hermetic sealing part |
-
1994
- 1994-12-05 JP JP6300702A patent/JP2519402B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07176651A (en) | 1995-07-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4611745A (en) | Method for preparing highly heat-conductive substrate and copper wiring sheet usable in the same | |
| US5981085A (en) | Composite substrate for heat-generating semiconductor device and semiconductor apparatus using the same | |
| WO2004015756A1 (en) | Submount and semiconductor device | |
| JP4700681B2 (en) | Si circuit die, method of manufacturing Si circuit die, method of attaching Si circuit die to heat sink, circuit package and power module | |
| EP1430007B1 (en) | Brazeable matallizations for diamond components | |
| JPH0697671B2 (en) | Method for manufacturing power semiconductor module substrate | |
| JPH0586662B2 (en) | ||
| US6534792B1 (en) | Microelectronic device structure with metallic interlayer between substrate and die | |
| JP2003168770A (en) | Silicon nitride circuit board | |
| JP2519402B2 (en) | Method for manufacturing power semiconductor module substrate | |
| US6699571B1 (en) | Devices and methods for mounting components of electronic circuitry | |
| JP4244723B2 (en) | Power module and manufacturing method thereof | |
| JPH09234826A (en) | Metal-ceramic composite base plate and manufacture thereof | |
| JPH08102570A (en) | Ceramic circuit board | |
| JP2000138320A (en) | Semiconductor element mounting substrate or heat sink and its manufacture and jointed body of the substrate or the heat sink with semiconductor element | |
| JP3192911B2 (en) | Ceramic circuit board | |
| JPS61119051A (en) | Semiconductor device | |
| JPH0518477B2 (en) | ||
| JP2503775B2 (en) | Substrate for semiconductor device | |
| JPS639665B2 (en) | ||
| JPH10138052A (en) | Method of coupling diamond substrate to at least one metal substrate | |
| JP2717918B2 (en) | Metal composite parts | |
| JPH1041443A (en) | Semiconductor device | |
| JPH0786444A (en) | Manufacture of compound heat dissipating substrate for semiconductor | |
| JPH0834265B2 (en) | Good thermal conductive substrate |