JP2501406B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2501406B2 JP2501406B2 JP5028680A JP2868093A JP2501406B2 JP 2501406 B2 JP2501406 B2 JP 2501406B2 JP 5028680 A JP5028680 A JP 5028680A JP 2868093 A JP2868093 A JP 2868093A JP 2501406 B2 JP2501406 B2 JP 2501406B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- lead
- width
- semiconductor device
- supply lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】この発明は半導体装置に関し、特
に給電用リードの改良に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to improvement of a power supply lead.
【０００２】[0002]
【従来の技術】図３は従来の半導体装置を示す構造図で
あり、図において、１は半導体チップ、２はこの半導体
チップ１を固着する半田、３は信号用リード、４は給電
用リード、５は半導体チップ１と信号用リード３、給電
用リード４の間を接続する金線、６は半田２及び金線５
の安定した接続のためのメッキ、７はパッケージの基体
を成す封止材である。2. Description of the Related Art FIG. 3 is a structural view showing a conventional semiconductor device. In the figure, 1 is a semiconductor chip, 2 is a solder for fixing the semiconductor chip 1, 3 is a signal lead, 4 is a power supply lead, 5 is a gold wire connecting the semiconductor chip 1 to the signal lead 3 and the power supply lead 4, 6 is a solder 2 and a gold wire 5
Is a plating for stable connection, and 7 is an encapsulant forming a base of the package.
【０００３】図４は図３の半導体装置を搭載する基板に
設けるパッドのレイアウト図であり、８は信号用パッ
ド、９は給電用のパッドである。上記半導体チップ１は
集積回路として機能するもので、その電源は給電用リー
ド４と金線５を経由して外部より供給される。その時生
じる電圧降下を少なくするために、給電用リード４はそ
の幅を信号用リード３より広くして導通抵抗を小さくし
てある。また、給電用リード４の幅は、封止材７との熱
膨張係数の差によって生じる隙間発生の防止のために制
限値が設けられている。FIG. 4 is a layout diagram of pads provided on a substrate on which the semiconductor device of FIG. 3 is mounted. Reference numeral 8 is a signal pad, and 9 is a power supply pad. The semiconductor chip 1 functions as an integrated circuit, and its power is supplied from the outside via the power supply lead 4 and the gold wire 5. In order to reduce the voltage drop that occurs at that time, the width of the power supply lead 4 is made wider than that of the signal lead 3 to reduce the conduction resistance. Further, the width of the power supply lead 4 is provided with a limit value in order to prevent a gap from being generated due to a difference in coefficient of thermal expansion from the sealing material 7.
【０００４】[0004]
【発明が解決しようとする課題】しかし、上記構成の半
導体装置では、給電用リードが基体に固着される側から
基板に装着される側まで幅広く形成されている。このた
め、基体側では封止材と給電用リードとの熱膨張特性の
差から、特に封止材の外縁において封止材と給電用リー
ド間に隙間が生じるという問題点があった。However, in the semiconductor device having the above structure, the power supply leads are formed widely from the side fixed to the base to the side mounted on the substrate. Therefore, there is a problem that a gap is generated between the sealing material and the power supply lead especially on the outer edge of the sealing material due to the difference in thermal expansion characteristics between the sealing material and the power supply lead on the substrate side.
【０００５】また、基板側では、信号用パッドより幅広
の給電用パッドが必要であり、一方、幅の狭い信号用パ
ッドも必要なため、結局２種類のパッド設計が要求され
るという問題点もあった。On the board side, a power supply pad that is wider than the signal pad is required, and on the other hand, a signal pad that is narrower is also required, so that there is a problem that two types of pad designs are eventually required. there were.
【０００６】この発明は上記のような課題を解決するた
めになされたものであり、その目的は、幅広の給電用リ
ードの低抵抗作用を保持したまま、封止材の外縁におけ
る封止材とリード間の隙間発生を防止するとともに、装
着用パッドの標準化を可能とした半導体装置を提供する
ことにある。The present invention has been made to solve the above problems, and an object thereof is to provide a sealing material at the outer edge of the sealing material while maintaining the low resistance action of the wide power supply lead. It is an object of the present invention to provide a semiconductor device in which a gap between leads can be prevented and a mounting pad can be standardized.
【０００７】[0007]
【課題を解決するための手段】この発明にかかる半導体
装置は、パッケージの外縁となる部分を内包する切り欠
きを有し上記信号用リードの幅とほぼ同等の幅を有する
分岐片と、この分岐片を連結する橋絡片とより形成され
る給電用リードを備えている。 SUMMARY OF THE INVENTION A semiconductor device according to the present invention is a notch that includes a portion which becomes an outer edge of a package.
And has a width almost equal to the width of the signal lead described above.
It is composed of a branch piece and a bridging piece connecting the branch pieces.
Equipped with a power supply lead.
【０００８】[0008]
【作用】上記のように構成したので、給電用リードは基
体のパッケージ外縁近傍への固着部分と基板への装着部
分が狭くなるので、上記固着部分での封止材との接合面
積が減少することにより、樹脂封止時の熱膨張差による
封止材と給電用リード間の隙間の発生が防止され、装着
部分では信号用リードと同様の幅にすることが可能とな
る。With the above-described structure, the power supply leads have a narrower area where the base is fixed near the outer edge of the package and the area where the power supply lead is attached to the substrate. As a result, a gap between the sealing material and the power supply lead is prevented from being generated due to the difference in thermal expansion during resin sealing, and the mounting portion can have the same width as the signal lead.
【０００９】[0009]
【実施例】以下、この発明の実施例を図を参照して詳細
に説明する。図１及び図２はこの発明の一実施例を示す
斜視図及び配置図である。なお、この実施例では上記従
来例と同一又は相当する部分には同一の符号を付し説明
を省略する。各図において、２０は平板材よりなる給電
用リードである。この給電用リード２０の両端中央には
切欠部２１ａ，２１ｂが設けられている。この切欠部２
１ａ，２１ｂは両端側から上記給電用リード２０の中央
部方向に延長して形成され、これにより両側には分岐片
２２ａ，２２ａ，２２ｂ，２２ｂがそれぞれ形成されて
いる。すなわち、上記給電用リード２０は「Ｈ」字形状
となっている。要約すると、上記給電用リード２０は、
パッケージ１０の外縁１０ａとなる部分を内包する切欠
部２１ａを有し上記信号用リード３の幅とほぼ同等の幅
を有する分岐片２２ａ，２２ａ，２２ｂ，２２ｂと、こ
の分岐片２２ａ，２２ａ，２２ｂ，２２ｂを連結する橋
絡片２３とより形成される。 尚、給電用リードとは、図
２のパッド配置図において装着用パッド２３，２３が２
組あることからもわかるように、電源電圧用リードと接
地用リードとを総称したものである。 Embodiments of the present invention will now be described in detail with reference to the drawings. 1 and 2 are a perspective view and an arrangement view showing an embodiment of the present invention. In this embodiment, the same or corresponding parts as those in the above-mentioned conventional example are designated by the same reference numerals and the description thereof will be omitted. In each figure, 20 is a power supply lead made of a flat plate material. Notches 21a and 21b are provided at the centers of both ends of the power supply lead 20. This notch 2
1a and 21b are formed to extend from both ends toward the center of the power supply lead 20, and branch pieces 22a, 22a, 22b and 22b are formed on both sides, respectively. That is, the power supply lead 20 has an "H" shape. In summary, the power supply lead 20 is
Notch that includes the portion that becomes the outer edge 10a of the package 10
A width that has a portion 21a and is approximately equal to the width of the signal lead 3 described above.
Branch pieces 22a, 22a, 22b, 22b having
Bridge connecting the branch pieces 22a, 22a, 22b, 22b of the
It is formed with the entanglement piece 23. Note that the power supply leads are
In the pad layout of FIG. 2, the mounting pads 23, 23 are 2
As you can see from the pair, it is connected to the lead for power supply voltage.
This is a general term for ground leads.
【００１０】分岐片２２ａ，２２ａは基体に固着される
もので、これらの幅は、信号用リード３の基体への固着
部分の幅と同一に形成され、分岐片２２ｂ，２２ｂは基
板側に固着されるべくその幅が信号用リード３の装着部
分の幅と同一に形成されている。なお、２３は分岐片２
２ｂを固着すべく基板に設けられた給電用パッドであ
り、その形状は信号用パッド８の形状と同一にしてあ
る。The branch pieces 22a, 22a are fixed to the base body, and the width thereof is formed to be the same as the width of the portion of the signal lead 3 fixed to the base body, and the branch pieces 22b, 22b are fixed to the substrate side. As much as possible, its width is formed to be the same as the width of the mounting portion of the signal lead 3. In addition, 23 is a branch piece 2
2b is a power supply pad provided on the substrate to fix the same, and its shape is the same as that of the signal pad 8.
【００１１】次に作用について説明する。上記給電用リ
ード２０の分岐片２２ａ，２２ｂの幅が信号用リード３
の固着部分、装着部分の幅と同一に形成されているの
で、中央部の幅が従来と同一の時は僅かに抵抗値は増す
が、幅の広い部分が給電用リード２０の大部分を占める
ため、影響は無視できる。Next, the operation will be described. The width of the branch pieces 22a and 22b of the power supply lead 20 is the signal lead 3
Since it is formed to have the same width as that of the fixed portion and the mounting portion, the resistance value slightly increases when the width of the central portion is the same as the conventional one, but the wide portion occupies most of the feeding lead 20. Therefore, the effect can be ignored.
【００１２】一方、分岐片２２ａの幅は信号用リード３
との固着部分と同一幅なので、従来の図３に示す給電用
リード４と比較すると、固着部分，すなわちパッケージ
の外縁において、給電用リード２０の分岐片２２ａ，２
２ａと封止材７との接合面積が減少するので、熱膨張差
によって、給電用リード２０の分岐片２２ａ，２２ａと
封止材７との間に隙間が発生するようなことがなくな
る。そして、基板Ｘに設けられる装着用パッド８，２３
は同一形状に形成されるので、パッド設計が容易とな
る。On the other hand, the width of the branch piece 22a is equal to the width of the signal lead 3
Since anchoring portion the same width as the, for power supply of the prior art shown in FIG. 3
Compared with the lead 4, the fixed part, that is, the package
At the outer edge of the power supply lead 20.
Since the joint area between 2a and the sealing material 7 decreases, the difference in thermal expansion
By the branch pieces 22a, 22a of the power supply lead 20
No gap is generated between the sealing material 7 and
It Then, the mounting pads 8 and 23 provided on the substrate X
Are formed in the same shape, which facilitates the pad design.
【００１３】なお、分岐片２２ａの幅は信号用リード３
の固着部分の幅と同一の場合を説明したが、これに限定
されず、例えばほぼ同等にしてもよい。The width of the branch piece 22a is the width of the signal lead 3
Although the case where the width is the same as the width of the fixed portion has been described, the width is not limited to this and may be substantially equal.
【００１４】[0014]
【発明の効果】以上のように、本発明の半導体装置によ
れば、パッケージの外縁となる部分を内包する切り欠き
を有し上記信号用リードの幅とほぼ同等の幅を有する分
岐片と、この分岐片を連結する橋絡片とより形成される
給電用リードを備えているので、給電用リードは低抵抗
な特性を持ち、さらに、パッケージの外縁における給電
用リードの分岐片と封止材とのかい離が防止されて半導
体装置としての信頼性を向上できる効果が得られる。As described above, according to the semiconductor device of the present invention, the notch that includes the outer edge portion of the package is included.
Has a width almost equal to the width of the signal lead described above.
It is formed by a branch piece and a bridging piece that connects the branch pieces.
Equipped with power supply leads, power supply leads have low resistance
Power supply at the outer edge of the package
It is possible to prevent separation of the branching piece of the use lead from the sealing material and to improve the reliability of the semiconductor device.
【００１５】また、基板上の装着用パッドの標準化が図
れるため、半導体装置を実装する装置の生産性を向上す
る効果も得られる。Further, since the mounting pads on the substrate can be standardized, the effect of improving the productivity of the device for mounting the semiconductor device can be obtained.
【図１】この発明の半導体装置の一実施例を示す斜視図
である。FIG. 1 is a perspective view showing an embodiment of a semiconductor device of the present invention.
【図２】この発明の半導体装置の一実施例を示す配置図
である。FIG. 2 is a layout showing an embodiment of the semiconductor device of the present invention.
【図３】従来の半導体装置の一例を示す構造図である。FIG. 3 is a structural diagram showing an example of a conventional semiconductor device.
【図４】図３の半導体装置を搭載する基板に設けるパッ
ドのレイアウト図である。FIG. 4 is a layout diagram of pads provided on a substrate on which the semiconductor device of FIG. 3 is mounted.
【符号の説明】 １ 半導体チップ ３ 信号用リード ２０ 給電用リード ２１ａ，２１ｂ 切欠部 ２２ａ，２２ｂ 分岐片[Description of Reference Signs] 1 semiconductor chip 3 signal lead 20 power supply lead 21a, 21b cutout 22a, 22b branching piece
Claims (1)
このパッケージの外縁から突出した信号用リード及び給
電用リードとを備えた半導体装置において、 上記給電用リードは、上記パッケージの外縁となる部分
を内包する切り欠きを有し上記信号用リードの幅とほぼ
同等の幅を有する分岐片と、この分岐片を連結する橋絡
片とを形成して成ることを特徴とする半導体装置。1. A package for accommodating a semiconductor chip ,
In a semiconductor device including a signal lead and a power supply lead protruding from an outer edge of the package, the power supply lead is a portion that is an outer edge of the package.
Has a notch that includes
A branch having the same width and a bridge connecting the branches.
A semiconductor device, characterized in that it is formed by forming a piece .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5028680A JP2501406B2 (en) | 1993-01-25 | 1993-01-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5028680A JP2501406B2 (en) | 1993-01-25 | 1993-01-25 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0661410A JPH0661410A (en) | 1994-03-04 |
| JP2501406B2 true JP2501406B2 (en) | 1996-05-29 |
Family
ID=12255218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5028680A Expired - Lifetime JP2501406B2 (en) | 1993-01-25 | 1993-01-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2501406B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6162520B2 (en) * | 2013-07-26 | 2017-07-12 | 京セラ株式会社 | Package for housing semiconductor element and mounting structure including the same |
| WO2017056144A1 (en) * | 2015-09-28 | 2017-04-06 | 三菱電機株式会社 | Semiconductor device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5025176A (en) * | 1973-05-19 | 1975-03-17 | ||
| JPS5887359U (en) * | 1981-12-09 | 1983-06-14 | 日本電気ホームエレクトロニクス株式会社 | semiconductor equipment |
| JPS6114739A (en) * | 1984-06-30 | 1986-01-22 | Sony Corp | Semiconductor device |
-
1993
- 1993-01-25 JP JP5028680A patent/JP2501406B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0661410A (en) | 1994-03-04 |
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