JP2024001751A - Nitride semiconductor wafer and method for manufacturing the same - Google Patents

Nitride semiconductor wafer and method for manufacturing the same Download PDF

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JP2024001751A
JP2024001751A JP2022100615A JP2022100615A JP2024001751A JP 2024001751 A JP2024001751 A JP 2024001751A JP 2022100615 A JP2022100615 A JP 2022100615A JP 2022100615 A JP2022100615 A JP 2022100615A JP 2024001751 A JP2024001751 A JP 2024001751A
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nitride semiconductor
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和徳 萩本
Kazunori Hagimoto
一平 久保埜
Ippei KUBONO
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Shin Etsu Handotai Co Ltd
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    • HELECTRICITY
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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Abstract

PROBLEM TO BE SOLVED: To provide a nitride semiconductor wafer in which warpage is suppressed.
SOLUTION: The nitride semiconductor wafer includes: a silicon-based substrate; a buffer layer formed of a nitride semiconductor which is laminated on the silicon-based substrate; and a functional layer including at least a GaN layer which is laminated on the buffer layer. The buffer layer is doped with Fe. An Fe concentration distribution in the laminating direction in the buffer layer has a point at which the Fe concentration is maximum, and is a concentration distribution in which the Fe concentration decreases from the point at which the Fe concentration is maximum toward the functional layer. The Fe concentration at the point at which the Fe concentration is maximum is 2.5×1018atoms/cm3 or more and 6.0×1018atoms/cm3 or less, and the Fe concentration of the upper surface of the buffer layer on the functional layer side is 4.0×1017atoms/cm3 or less.
SELECTED DRAWING: Figure 1
COPYRIGHT: (C)2024,JPO&INPIT

Description

本発明は、窒化物半導体ウェーハに関し、特に反りが抑制された窒化物半導体ウェーハに関する。 The present invention relates to a nitride semiconductor wafer, and particularly to a nitride semiconductor wafer with suppressed warpage.

シリコン単結晶基板上に初期AlN層、バッファ層、及びGaN-HEMT構造エピタキシャル層をこの順で積層した窒化物半導体ウェーハは、パワーデバイス用、RFデバイス用エピタキシャル基板として用いられている。 A nitride semiconductor wafer in which an initial AlN layer, a buffer layer, and a GaN-HEMT structure epitaxial layer are laminated in this order on a silicon single crystal substrate is used as an epitaxial substrate for power devices and RF devices.

また、SOI基板上に窒化物半導体をエピタキシャル成長したウェーハも用いられるが、SOI基板上にエピタキシャル成長した場合、ウェーハの反りがシリコン単結晶基板に比べて大きくなる。反りを抑制するために、バッファ層を工夫し、且つ、in-situの反りデータを見ながら反りを低減する必要がある(特許文献1)。 Also, wafers in which nitride semiconductors are epitaxially grown on SOI substrates are also used, but when epitaxially grown on SOI substrates, the warpage of the wafers is greater than that in single-crystal silicon substrates. In order to suppress warpage, it is necessary to devise a buffer layer and reduce warpage while checking in-situ warpage data (Patent Document 1).

シリコン単結晶基板は比較的反りを小さくできるが、SOI基板上に窒化物半導体をエピタキシャル成長させる場合、反りの抑制が難しい。 Although silicon single crystal substrates can have relatively small warpage, it is difficult to suppress warpage when a nitride semiconductor is epitaxially grown on an SOI substrate.

特許第6473017号公報Patent No. 6473017

本発明は上記課題を解決するためになされたもので、反りを抑制した窒化物半導体ウェーハを提供することを目的とする。 The present invention was made to solve the above problems, and an object of the present invention is to provide a nitride semiconductor wafer with suppressed warpage.

上記課題を解決するために、本発明では、
シリコン系基板と、該シリコン系基板上に積層された窒化物半導体からなるバッファ層と、該バッファ層上に積層された少なくともGaN層を含む機能層とを備えたものである窒化物半導体ウェーハであって、
前記バッファ層にFeがドープされており、前記バッファ層における積層方向のFe濃度分布は、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から前記機能層に向かってFe濃度が減少するような濃度分布であり、
前記Fe濃度が最大となる点におけるFe濃度が2.5×1018atoms/cm以上6.0×1018atoms/cm以下であり、かつ、前記バッファ層の前記機能層側の上面のFe濃度が4.0×1017atoms/cm以下である窒化物半導体ウェーハを提供する。
In order to solve the above problems, in the present invention,
A nitride semiconductor wafer comprising a silicon-based substrate, a buffer layer made of a nitride semiconductor stacked on the silicon-based substrate, and a functional layer containing at least a GaN layer stacked on the buffer layer. There it is,
The buffer layer is doped with Fe, and the Fe concentration distribution in the stacking direction in the buffer layer has a point where the Fe concentration is maximum, and Fe concentration distribution from the point where the Fe concentration is maximum toward the functional layer. The concentration distribution is such that the concentration decreases,
The Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms/cm 3 or less, and the upper surface of the buffer layer on the functional layer side is A nitride semiconductor wafer having an Fe concentration of 4.0×10 17 atoms/cm 3 or less is provided.

このような濃度分布でFeがドープされていることで、窒化物半導体ウェーハの構造を変えることなく反りを抑制することができる。バッファ層内のFeの最も高い濃度が2.5×1018atoms/cm以上であれば反りを顕著に抑制することができる。また、6.0×1018atoms/cm以下とすることでバッファ層上面のFe濃度が4.0×1017atoms/cm以下とすることが可能となる。バッファ層上面のFe濃度が4.0×1017atoms/cm以下であれば、Feのメモリー効果によりデバイス表面のFe濃度が高くなってしまいデバイスの特性を悪化させてしまうことを防止できる。 By doping Fe with such a concentration distribution, warpage can be suppressed without changing the structure of the nitride semiconductor wafer. If the highest concentration of Fe in the buffer layer is 2.5×10 18 atoms/cm 3 or more, warping can be significantly suppressed. Furthermore, by setting the Fe concentration to 6.0×10 18 atoms/cm 3 or less, the Fe concentration on the upper surface of the buffer layer can be made to be 4.0×10 17 atoms/cm 3 or less. If the Fe concentration on the upper surface of the buffer layer is 4.0×10 17 atoms/cm 3 or less, it is possible to prevent the Fe concentration on the device surface from increasing due to the memory effect of Fe and deteriorating the characteristics of the device.

また、前記シリコン系基板は、シリコン単結晶基板、又はSOI(シリコン・オン・インシュレーター)基板であることが好ましい。 Further, the silicon-based substrate is preferably a silicon single crystal substrate or an SOI (silicon on insulator) substrate.

本発明では、このようなシリコン系基板を用いることができるが、中でもSOI基板を用いた場合は反りが大きいので本発明が特に有効となる。 In the present invention, such silicon-based substrates can be used, but the present invention is particularly effective when an SOI substrate is used because the warpage is large.

また、前記バッファ層は、AlGaN層と、GaN層とAlN層とが交互に積層された超格子層と、からなることが好ましい。 Further, the buffer layer preferably includes an AlGaN layer and a superlattice layer in which GaN layers and AlN layers are alternately stacked.

このような構造とすることでより反りの抑制に有効である。 Such a structure is more effective in suppressing warpage.

また本発明では、窒化物半導体ウェーハを製造する方法であって、
(1)シリコン系基板上に窒化物半導体からなるバッファ層を積層する工程、及び
(2)前記バッファ層上に少なくともGaN層を含む機能層を積層して窒化物半導体ウェーハを製造する工程
を含み、かつ、
前記工程(1)において、Feをドープするためのドーピングガスを流し、該ドーピングガスの流量を調整することによって、前記バッファ層における積層方向のFe濃度分布を、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から前記機能層に向かってFe濃度が減少するような濃度分布とし、
前記Fe濃度が最大となる点におけるFe濃度を2.5×1018atoms/cm以上6.0×1018atoms/cm以下とし、かつ、前記バッファ層の前記機能層側の上面のFe濃度を4.0×1017atoms/cm以下とする窒化物半導体ウェーハの製造方法を提供する。
The present invention also provides a method for manufacturing a nitride semiconductor wafer, comprising:
(1) a step of laminating a buffer layer made of a nitride semiconductor on a silicon-based substrate; and (2) a step of laminating a functional layer including at least a GaN layer on the buffer layer to manufacture a nitride semiconductor wafer. ,and,
In the step (1), by flowing a doping gas for doping Fe and adjusting the flow rate of the doping gas, the Fe concentration distribution in the stacking direction in the buffer layer is changed to a point where the Fe concentration is maximum. and a concentration distribution such that the Fe concentration decreases from the point where the Fe concentration is maximum toward the functional layer,
The Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms/cm 3 or less, and the Fe concentration on the upper surface of the functional layer side of the buffer layer is A method for manufacturing a nitride semiconductor wafer having a concentration of 4.0×10 17 atoms/cm 3 or less is provided.

本発明の反りを抑制した窒化物半導体ウェーハはこのようにして製造することができる。 The nitride semiconductor wafer of the present invention with suppressed warpage can be manufactured in this manner.

また、前記工程(1)において、前記シリコン系基板を、シリコン単結晶基板、又はSOI(シリコン・オン・インシュレーター)基板とすることが好ましい。 Further, in the step (1), it is preferable that the silicon-based substrate is a silicon single crystal substrate or an SOI (silicon on insulator) substrate.

本発明では、このようなシリコン系基板を用いることができるが、中でもSOI基板を用いた場合は反りが大きいので本発明が特に有効となる。 In the present invention, such silicon-based substrates can be used, but the present invention is particularly effective when an SOI substrate is used because the warpage is large.

また、前記工程(1)において、前記バッファ層を、AlGaN層と、GaN層とAlN層とが交互に積層された超格子層と、からなるものとすることが好ましい。 Further, in the step (1), it is preferable that the buffer layer is composed of an AlGaN layer and a superlattice layer in which GaN layers and AlN layers are alternately laminated.

このような構造とすることでより反りの抑制に有効である。 Such a structure is more effective in suppressing warpage.

以上のように、本発明であれば、シリコン単結晶基板またはSOI基板上に窒化物半導体をエピタキシャル成長させた窒化物半導体ウェーハであって、バッファ層等の構造を変えることなく反りを抑制した窒化物半導体ウェーハ、及びその製造方法を提供することができる。 As described above, the present invention provides a nitride semiconductor wafer in which a nitride semiconductor is epitaxially grown on a silicon single crystal substrate or an SOI substrate, and which suppresses warpage without changing the structure of the buffer layer or the like. A semiconductor wafer and a method for manufacturing the same can be provided.

本発明の窒化物半導体ウェーハの一例を示す概略図である。1 is a schematic diagram showing an example of a nitride semiconductor wafer of the present invention. 実施例1、2で製造した窒化物半導体ウェーハ(シリコン系基板:シリコン単結晶基板)の積層方向のFe濃度分布をSIMSで測定した結果である。These are the results of SIMS measurement of the Fe concentration distribution in the stacking direction of the nitride semiconductor wafers (silicon-based substrates: silicon single crystal substrates) manufactured in Examples 1 and 2. 実施例1、2で製造した窒化物半導体ウェーハ(シリコン系基板:SOI基板)の積層方向のFe濃度分布をSIMSで測定した結果である。These are the results of SIMS measurement of the Fe concentration distribution in the stacking direction of the nitride semiconductor wafers (silicon-based substrates: SOI substrates) manufactured in Examples 1 and 2.

上述のように、反りを抑制した窒化物半導体ウェーハの開発が求められていた。 As mentioned above, there has been a demand for the development of nitride semiconductor wafers that suppress warpage.

本発明者らは、上記課題について鋭意検討を重ねた結果、窒化物半導体ウェーハのバッファ層中のFe濃度分布を適切に制御することによって、窒化物半導体ウェーハの反りを抑制できることを見出し、本発明を完成させた。 As a result of intensive studies on the above-mentioned problems, the present inventors discovered that warping of nitride semiconductor wafers can be suppressed by appropriately controlling the Fe concentration distribution in the buffer layer of nitride semiconductor wafers, and the present invention completed.

即ち、本発明は、シリコン系基板と、該シリコン系基板上に積層された窒化物半導体からなるバッファ層と、該バッファ層上に積層された少なくともGaN層を含む機能層とを備えたものである窒化物半導体ウェーハであって、前記バッファ層にFeがドープされており、前記バッファ層における積層方向のFe濃度分布は、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から前記機能層に向かってFe濃度が減少するような濃度分布であり、前記Fe濃度が最大となる点におけるFe濃度が2.5×1018atoms/cm以上6.0×1018atoms/cm以下であり、かつ、前記バッファ層の前記機能層側の上面のFe濃度が4.0×1017atoms/cm以下である窒化物半導体ウェーハである。 That is, the present invention includes a silicon-based substrate, a buffer layer made of a nitride semiconductor stacked on the silicon-based substrate, and a functional layer including at least a GaN layer stacked on the buffer layer. In a certain nitride semiconductor wafer, the buffer layer is doped with Fe, and the Fe concentration distribution in the stacking direction in the buffer layer has a point where the Fe concentration is maximum, and the Fe concentration is the maximum. The concentration distribution is such that the Fe concentration decreases from the point toward the functional layer, and the Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms /cm 3 or less, and the Fe concentration on the upper surface of the buffer layer on the functional layer side is 4.0×10 17 atoms/cm 3 or less.

以下、本発明について詳細に説明するが、本発明はこれらに限定されるものではない。 Hereinafter, the present invention will be explained in detail, but the present invention is not limited thereto.

[窒化物半導体ウェーハ]
本発明の窒化物半導体ウェーハについて図1を用いて説明する。なお、図1の窒化物半導体ウェーハの構造は一例であって、本発明はこれに限定されるものではない。
[Nitride semiconductor wafer]
A nitride semiconductor wafer of the present invention will be explained using FIG. 1. Note that the structure of the nitride semiconductor wafer in FIG. 1 is one example, and the present invention is not limited thereto.

図1に示す窒化物半導体ウェーハ10は、シリコン系基板1と、シリコン系基板1上に積層された窒化物半導体からなるバッファ層3と、バッファ層3上に積層された少なくともGaN層を含む機能層4を有している。機能層4は、例えば、GaNからなるチャネル層(C-GaN)とチャネル層とバンドギャップの異なるAlGaNからなるバリア層(不図示)で構成される。また、バッファ層3とチャネル層の間に高抵抗GaN層(耐圧層:R-GaN)を形成することが好ましい。 The nitride semiconductor wafer 10 shown in FIG. 1 has a function including a silicon-based substrate 1, a buffer layer 3 made of a nitride semiconductor layered on the silicon-based substrate 1, and at least a GaN layer layered on the buffer layer 3. It has layer 4. The functional layer 4 includes, for example, a channel layer (C-GaN) made of GaN and a barrier layer (not shown) made of AlGaN having a different band gap from the channel layer. Further, it is preferable to form a high-resistance GaN layer (withstand voltage layer: R-GaN) between the buffer layer 3 and the channel layer.

ここで、シリコン系基板1は特に限定されないが、シリコン単結晶基板、又はSOI(シリコン・オン・インシュレーター)基板とすることが好ましく、例えば、150mmφ、675μm、(111)のSi基板または150mmφ、675μm、(111)のSOI基板である。 Here, the silicon-based substrate 1 is not particularly limited, but is preferably a silicon single crystal substrate or an SOI (silicon on insulator) substrate, for example, a 150 mmφ, 675 μm, (111) Si substrate or a 150 mmφ, 675 μm , (111) SOI substrate.

シリコン系基板1と、バッファ層3の間に厚さ100~200nmのAlNからなる初期層2を設けてもよい。 An initial layer 2 made of AlN and having a thickness of 100 to 200 nm may be provided between the silicon-based substrate 1 and the buffer layer 3.

バッファ層3は特に限定されないが、AlGaN層と、GaN層とAlN層とが交互に積層された超格子層とからなることが好ましく、例えば、厚さ100~200nmのAlGaN層上に厚さ5~30nmのGaN層と厚さ3~10nmのAlN層とが交互に例えば23ペア積層された超格子層(SLs)からなるものとすることができる。 Although the buffer layer 3 is not particularly limited, it is preferably composed of an AlGaN layer and a superlattice layer in which GaN layers and AlN layers are alternately stacked. It can be made of superlattice layers (SLs) in which, for example, 23 pairs of GaN layers with a thickness of ~30 nm and AlN layers with a thickness of 3 to 10 nm are laminated alternately.

ここで本発明の窒化物半導体ウェーハは、バッファ層3にFeがドープされており、バッファ層3における積層方向のFe濃度分布は、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から機能層4に向かってFe濃度が減少するような濃度分布であり、Fe濃度が最大となる点におけるFe濃度が2.5×1018atoms/cm以上6.0×1018atoms/cm以下であり、かつ、バッファ層3の機能層4側の上面のFe濃度が4.0×1017atoms/cm以下である。なお本発明において、Fe濃度分布はSIMSの測定結果から求めることができる。 Here, in the nitride semiconductor wafer of the present invention, the buffer layer 3 is doped with Fe, and the Fe concentration distribution in the stacking direction in the buffer layer 3 has a point where the Fe concentration is maximum; The concentration distribution is such that the Fe concentration decreases from the point toward the functional layer 4, and the Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more 6.0×10 18 atoms/cm 3 or less, and the Fe concentration on the upper surface of the buffer layer 3 on the functional layer 4 side is 4.0×10 17 atoms/cm 3 or less. In the present invention, the Fe concentration distribution can be determined from the SIMS measurement results.

バッファ層中におけるFe濃度分布を、後述の実施例の結果を示す図2、3を参照してより具体的に説明する。図2にシリコン単結晶基板上にエピタキシャル成長させた窒化物半導体ウェーハのSIMSによるFe濃度分布を示す。また、図3にはSOI基板上に同様な条件でエピタキシャル成長させた場合のFe濃度分布を示す。図2、3のいずれにおいても、バッファ層中においてFe濃度が最大となる点(図中横軸の深さ1.2μmの付近)を有しており、この点からFe濃度は機能層側に向かって減少(漸減)し、バッファ層の機能層側の上面(図中横軸の深さ0.55μmの付近)においてFe濃度が4.0×1017atoms/cm以下となる。このようにFe濃度はバッファ層でピークとなり、デバイス層に向けて減少(漸減)しているのが分かる。 The Fe concentration distribution in the buffer layer will be explained in more detail with reference to FIGS. 2 and 3 showing the results of Examples described later. FIG. 2 shows the Fe concentration distribution obtained by SIMS of a nitride semiconductor wafer epitaxially grown on a silicon single crystal substrate. Further, FIG. 3 shows the Fe concentration distribution when epitaxially growing on an SOI substrate under similar conditions. In both Figures 2 and 3, there is a point where the Fe concentration is maximum in the buffer layer (near the depth of 1.2 μm on the horizontal axis in the figure), and from this point the Fe concentration increases toward the functional layer side. The Fe concentration decreases (gradually decreases) toward 4.0×10 17 atoms/cm 3 or less at the upper surface of the buffer layer on the functional layer side (near the depth of 0.55 μm on the horizontal axis in the figure). It can be seen that the Fe concentration peaks in the buffer layer and decreases (gradually decreases) toward the device layer.

Fe濃度の最高値が2.5×1018atoms/cmより低い場合は、反りに対して顕著な抑制効果が見られず、また、6.0×1018atoms/cmを超えるとバッファ層上面の濃度を4.0×1017atoms/cm以下とするのが難しくなる。バッファ層上面の濃度が4.0×1017atoms/cmを超えると、Feのメモリー効果によりデバイス表面のFe濃度が高くなってしまいデバイスの特性を悪化させてしまう。 When the maximum Fe concentration is lower than 2.5×10 18 atoms/cm 3 , no significant effect is observed on warping, and when it exceeds 6.0×10 18 atoms/cm 3 , the buffer It becomes difficult to reduce the concentration on the upper surface of the layer to 4.0×10 17 atoms/cm 3 or less. If the concentration on the upper surface of the buffer layer exceeds 4.0×10 17 atoms/cm 3 , the memory effect of Fe increases the Fe concentration on the device surface, deteriorating the characteristics of the device.

このようなFe濃度分布とするには、MOCVD装置で、例えば超格子層の下部約1/3及びその下のAlGaN層のエピタキシャル成長時にCpFe(ビスクロペンタジエニル鉄)等のドーピングガスを流し、その流量を調整することで所望の濃度のFeをドープすることができる。このようにFeをドープすることでSOI基板を用いた場合に限らず、シリコン単結晶基板を用いた場合にもバッファ層の構造を変えることなく反りを抑制することができるが、SOI基板を用いた場合により顕著な効果が得られる。 In order to obtain such a Fe concentration distribution, a doping gas such as Cp 2 Fe (bisclopentadienyl iron) is used in the MOCVD apparatus during the epitaxial growth of, for example, the lower one-third of the superlattice layer and the AlGaN layer below it. By flowing and adjusting the flow rate, it is possible to dope Fe at a desired concentration. By doping Fe in this way, warping can be suppressed not only when using an SOI substrate but also when using a silicon single crystal substrate without changing the structure of the buffer layer. A more noticeable effect can be obtained if

機能層4として、バッファ層3上には厚さ300~900nmの高抵抗GaN層(耐圧層)を設けることが好ましい。このような高抵抗層をデバイス層とバッファ層との間に設けることで、電流コラプス現象の悪化と高温時の横方向リーク電流をより確実に抑制することができるとともに、チャネル層へのFeの混入をより確実に抑制できるので、移動度の低下等の順方向特性の劣化を防止することができる。高抵抗GaN層の上には、デバイス層となるGaN層からなるチャネル層が形成されている。図1には示されていないが、GaN層からなるチャネル層上にAlGaN層からなるバリア層を形成し、ソース電極、ドレイン電極、及び、ゲート電極を設けることで、例えば、高電子移動度トランジスタ(HEMT)とすることができる。 As the functional layer 4, it is preferable to provide a high resistance GaN layer (withstand voltage layer) with a thickness of 300 to 900 nm on the buffer layer 3. By providing such a high-resistance layer between the device layer and the buffer layer, it is possible to more reliably suppress the worsening of the current collapse phenomenon and the lateral leakage current at high temperatures, and also to prevent Fe from entering the channel layer. Since contamination can be suppressed more reliably, deterioration of forward characteristics such as a decrease in mobility can be prevented. A channel layer made of a GaN layer that becomes a device layer is formed on the high-resistance GaN layer. Although not shown in FIG. 1, by forming a barrier layer made of an AlGaN layer on a channel layer made of a GaN layer and providing a source electrode, a drain electrode, and a gate electrode, it is possible to create a high electron mobility transistor, for example. (HEMT).

[窒化物半導体ウェーハの製造方法]
また本発明は、窒化物半導体ウェーハを製造する方法であって、(1)シリコン系基板上に窒化物半導体からなるバッファ層を積層する工程、及び(2)前記バッファ層上に少なくともGaN層を含む機能層を積層して窒化物半導体ウェーハを製造する工程を含み、かつ、前記工程(1)において、Feをドープするためのドーピングガスを流し、該ドーピングガスの流量を調整することによって、前記バッファ層における積層方向のFe濃度分布を、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から前記機能層に向かってFe濃度が減少するような濃度分布とし、前記Fe濃度が最大となる点におけるFe濃度を2.5×1018atoms/cm以上6.0×1018atoms/cm以下とし、かつ、前記バッファ層の前記機能層側の上面のFe濃度を4.0×1017atoms/cm以下とする窒化物半導体ウェーハの製造方法である。
[Method for manufacturing nitride semiconductor wafer]
The present invention also provides a method for manufacturing a nitride semiconductor wafer, comprising: (1) stacking a buffer layer made of a nitride semiconductor on a silicon-based substrate; and (2) stacking at least a GaN layer on the buffer layer. a step of manufacturing a nitride semiconductor wafer by laminating functional layers containing Fe, and in the step (1), flowing a doping gas for doping Fe and adjusting the flow rate of the doping gas. The Fe concentration distribution in the stacking direction in the buffer layer has a point where the Fe concentration is maximum, and the Fe concentration decreases from the point where the Fe concentration is maximum toward the functional layer, and the Fe concentration is The Fe concentration at the point where the concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms/cm 3 or less, and the Fe concentration on the upper surface of the functional layer side of the buffer layer is This is a method for manufacturing a nitride semiconductor wafer with a density of 4.0×10 17 atoms/cm 3 or less.

本発明の窒化物半導体ウェーハは、このようにして製造することができる。以下、本発明の窒化物半導体ウェーハの製造方法について詳細に説明する。 The nitride semiconductor wafer of the present invention can be manufactured in this manner. Hereinafter, the method for manufacturing a nitride semiconductor wafer of the present invention will be explained in detail.

[工程(1)]
工程(1)は、シリコン系基板上に窒化物半導体からなるバッファ層を積層する工程である。
[Step (1)]
Step (1) is a step of laminating a buffer layer made of a nitride semiconductor on a silicon-based substrate.

本工程では、まず、シリコン単結晶基板やSOI(シリコン・オン・インシュレーター)基板等のシリコン系基板を準備する。次に、MOCVD装置内にて、シリコン系基板上に窒化物半導体からなるバッファ層をエピタキシャル成長させればよい。もしくは、シリコン系基板上にAlNからなる初期層をエピタキシャル成長させ、その上に窒化物半導体からなるバッファ層をエピタキシャル成長させてもよい。バッファ層としては、上述のようにAlGaN層と、GaN層とAlN層とが交互に積層された超格子層とからなるものとすることが好ましい。 In this step, first, a silicon-based substrate such as a silicon single crystal substrate or an SOI (silicon-on-insulator) substrate is prepared. Next, a buffer layer made of a nitride semiconductor may be epitaxially grown on the silicon-based substrate in an MOCVD apparatus. Alternatively, an initial layer made of AlN may be epitaxially grown on a silicon-based substrate, and a buffer layer made of a nitride semiconductor may be epitaxially grown thereon. As described above, the buffer layer is preferably composed of an AlGaN layer and a superlattice layer in which GaN layers and AlN layers are alternately laminated.

エピタキシャル成長の際、Al源としてトリメチルアルミニウム(TMAl)、Ga源としてTMGa、N源としてNHを用いることができ、これらに限定されない。また、キャリアガスはNおよびH、またはそのいずれかとすることができ、プロセス温度は例えば900~1200℃程度とすることが好ましい。 During epitaxial growth, trimethylaluminum (TMAl) can be used as an Al source, TMGa as a Ga source, and NH 3 as an N source, but are not limited to these. Further, the carrier gas can be N 2 and/or H 2 , and the process temperature is preferably about 900 to 1200° C., for example.

本発明では、バッファ層における積層方向のFe濃度分布を、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から機能層に向かってFe濃度が減少するような濃度分布とし、Fe濃度が最大となる点におけるFe濃度を2.5×1018atoms/cm以上6.0×1018atoms/cm以下とし、かつ、バッファ層の機能層側の上面のFe濃度を4.0×1017atoms/cm以下とする。 In the present invention, the Fe concentration distribution in the stacking direction in the buffer layer is such that the Fe concentration has a maximum point and the Fe concentration decreases toward the functional layer from the maximum Fe concentration point. , the Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms/cm 3 or less, and the Fe concentration on the upper surface of the functional layer side of the buffer layer is 4.0×10 17 atoms/cm 3 or less.

このようなFe濃度分布とするには、MOCVD装置で、例えば超格子層の下部約1/3及びその下のAlGaN層のエピタキシャル成長時にCpFe(ビスクロペンタジエニル鉄)等のドーピングガスを流し、その流量を調整することで所望の濃度のFeをドープすることができる。 In order to obtain such a Fe concentration distribution, a doping gas such as Cp 2 Fe (bisclopentadienyl iron) is used in the MOCVD apparatus during the epitaxial growth of, for example, the lower one-third of the superlattice layer and the AlGaN layer below it. By flowing and adjusting the flow rate, it is possible to dope Fe at a desired concentration.

[工程(2)]
工程(2)は、バッファ層上に少なくともGaN層を含む機能層を積層して窒化物半導体ウェーハを製造する工程である。
[Step (2)]
Step (2) is a step of manufacturing a nitride semiconductor wafer by laminating a functional layer including at least a GaN layer on the buffer layer.

本工程では、窒化物半導体ウェーハの用途に応じて、適切な機能層をエピタキシャル成長により積層すればよい。例えば、MOCVD装置内にて、上述のような高抵抗GaN層をエピタキシャル成長させ、その上にデバイス層となるGaN層をエピタキシャル成長させ、さらにその上に、AlGaN層からなるバリア層をエピタキシャル成長させることができる。その上にソース電極、ドレイン電極、及び、ゲート電極を設けることで、例えば、高電子移動度トランジスタ(HEMT)とすることができる。 In this step, appropriate functional layers may be laminated by epitaxial growth depending on the use of the nitride semiconductor wafer. For example, in an MOCVD apparatus, a high-resistance GaN layer as described above can be epitaxially grown, a GaN layer that will become a device layer can be epitaxially grown on top of the high-resistance GaN layer, and a barrier layer made of an AlGaN layer can be further epitaxially grown on top of that. . By providing a source electrode, a drain electrode, and a gate electrode thereon, a high electron mobility transistor (HEMT) can be obtained, for example.

このようにして製造された窒化物半導体ウェーハは、バッファ層内のFe濃度分布が適切に制御されることによって、反りの抑制されたものとなる。 The nitride semiconductor wafer manufactured in this manner has suppressed warpage by appropriately controlling the Fe concentration distribution in the buffer layer.

以下、実施例及び比較例を用いて本発明を具体的に説明するが、本発明はこれらに限定されるものではない。 Hereinafter, the present invention will be specifically explained using Examples and Comparative Examples, but the present invention is not limited thereto.

(実施例1)
シリコン系基板として、以下のシリコン単結晶基板及びSOI基板を準備した。
(1)シリコン単結晶基板
150mmφ p-Type(111) 675μm Oi:25.6ppmaASTM79 5000Ωcm
(2)SOI基板
150mmφ SOI層:100nm/Box層:200nm/Si基板:675μm
SOI層:(111) CZ 1kΩcm N(窒素):5e14atoms/cm Oi:25.6ppmaASTM79
Si基板:(100) 8mΩcm Oi:16ppmaASTM79
(Example 1)
As silicon-based substrates, the following silicon single crystal substrates and SOI substrates were prepared.
(1) Silicon single crystal substrate 150mmφ p-Type (111) 675μm Oi: 25.6ppma ASTM79 5000Ωcm
(2) SOI substrate 150mmφ SOI layer: 100nm/Box layer: 200nm/Si substrate: 675μm
SOI layer: (111) CZ 1kΩcm N (nitrogen): 5e14atoms/cm 3 Oi: 25.6ppma ASTM79
Si substrate: (100) 8mΩcm Oi: 16ppma ASTM79

次に、これらの2枚のウェーハをMOCVD装置で同一のバッチでエピタキシャル成長を行い、以下の条件で窒化物半導体ウェーハを製造した。 Next, epitaxial growth was performed on these two wafers in the same batch using an MOCVD apparatus, and a nitride semiconductor wafer was manufactured under the following conditions.

最初に厚さ150nmのAlNからなる初期層を形成し、次に厚さ160nmのAlGaN層を成長させた。このときCpFeを50sccmの流量で流すことでFeドープを開始した。次に厚さ25nmのGaN層と厚さ4.2nmのAlN層を交互に成長させた。GaN層とAlN層のペアを8ペア成長した時点で、CpFeの供給を止めた。その後もGaN層とAlN層を交互に成長させ全部で23ペアの超格子層(SLs)を形成し、AlGaN層と超格子層からなるバッファ層を形成した。次に高抵抗GaN層を670nm成長させ、次にチャネル層となるGaN層を200nm成長させた。 First, an initial layer of AlN with a thickness of 150 nm was formed, and then a layer of AlGaN with a thickness of 160 nm was grown. At this time, Fe doping was started by flowing Cp 2 Fe at a flow rate of 50 sccm. Next, 25 nm thick GaN layers and 4.2 nm thick AlN layers were grown alternately. When eight pairs of GaN layers and AlN layers were grown, the supply of Cp 2 Fe was stopped. Thereafter, GaN layers and AlN layers were alternately grown to form a total of 23 pairs of superlattice layers (SLs), and a buffer layer consisting of the AlGaN layer and the superlattice layer was formed. Next, a high resistance GaN layer was grown to a thickness of 670 nm, and then a GaN layer to be a channel layer was grown to a thickness of 200 nm.

その後、2枚のウェーハを取り出し、反り量を測定した。その結果を表1に示す。また、SIMSにより深さ方向のFe濃度を測定した。シリコン単結晶基板を用いたウェーハのFe濃度分布を図2に、SOI基板を用いたウェーハのFe濃度分布を図3に示す。いずれのウェーハもバッファ層中のFeの最大濃度は6.0×1018atoms/cmでバッファ層上面のFe濃度は4.0×1017atoms/cmであった。表1から明らかなように、実施例1はいずれのウェーハも後述する比較例1、2に比べ反り量が抑制されていることが判る。 Thereafter, two wafers were taken out and the amount of warpage was measured. The results are shown in Table 1. Further, the Fe concentration in the depth direction was measured by SIMS. FIG. 2 shows the Fe concentration distribution of a wafer using a silicon single crystal substrate, and FIG. 3 shows the Fe concentration distribution of a wafer using an SOI substrate. In each wafer, the maximum concentration of Fe in the buffer layer was 6.0×10 18 atoms/cm 3 and the Fe concentration on the upper surface of the buffer layer was 4.0×10 17 atoms/cm 3 . As is clear from Table 1, it can be seen that the amount of warpage of all wafers in Example 1 is suppressed compared to Comparative Examples 1 and 2, which will be described later.

なお本発明において、反り量は3点支持ステージに基準となるフラットなシリコン単結晶基板を載せ、水平面を出し、その平面との差異によって測定した。 In the present invention, the amount of warpage was measured by placing a flat silicon single crystal substrate serving as a reference on a three-point support stage, exposing a horizontal plane, and measuring the difference from that plane.

(実施例2)
CpFeを20sccmの流量としたことを除き、実施例1と同様の条件で窒化物半導体ウェーハを製造した。図2、3に示すように、いずれのウェーハもバッファ層中のFeの最大濃度は2.5×1018atoms/cmでバッファ層上面のFe濃度は2.5×1017atoms/cmであった。表1に示す通り、実施例2ではいずれのウェーハも実施例1ほどではないものの比較例1,2に比べて反りが抑制されているのが判る。
(Example 2)
A nitride semiconductor wafer was manufactured under the same conditions as in Example 1, except that the flow rate of Cp 2 Fe was 20 sccm. As shown in FIGS. 2 and 3, the maximum concentration of Fe in the buffer layer of each wafer is 2.5×10 18 atoms/cm 3 , and the Fe concentration on the top surface of the buffer layer is 2.5×10 17 atoms/cm 3 Met. As shown in Table 1, it can be seen that in Example 2, the warpage of all wafers was suppressed compared to Comparative Examples 1 and 2, although not as much as in Example 1.

(比較例1)
CpFeの流量をさらに低くして、バッファ層中の最大Fe濃度を2.0×1018atoms/cmとしたことを除き実施例1と同様な方法で窒化物半導体ウェーハを製造した。表1に示す通り、比較例1はいずれのウェーハも比較例2よりは反りが改善しているものの、実施例1,2ほどの顕著な効果は見られなかった。
(Comparative example 1)
A nitride semiconductor wafer was manufactured in the same manner as in Example 1, except that the flow rate of Cp 2 Fe was further lowered and the maximum Fe concentration in the buffer layer was 2.0×10 18 atoms/cm 3 . As shown in Table 1, although all wafers of Comparative Example 1 had better warpage than Comparative Example 2, the effect as remarkable as that of Examples 1 and 2 was not observed.

(比較例2)
CpFeを流さなかったことを除き、実施例1と同様の条件で窒化物半導体ウェーハを製造した。表1に示す通り、比較例2はいずれのウェーハも実施例1,2に比べて反りが大きいことが判る。
(Comparative example 2)
A nitride semiconductor wafer was manufactured under the same conditions as in Example 1 except that Cp 2 Fe was not flowed. As shown in Table 1, it can be seen that both wafers of Comparative Example 2 have greater warpage than those of Examples 1 and 2.

Figure 2024001751000002
Figure 2024001751000002

以上のように、本発明であれば、シリコン単結晶基板またはSOI基板上に窒化物半導体をエピタキシャル成長させた窒化物半導体ウェーハであって、バッファ層等の構造を変えることなく反りを抑制した窒化物半導体ウェーハ、及びその製造方法を提供することができることが明らかになった。 As described above, the present invention provides a nitride semiconductor wafer in which a nitride semiconductor is epitaxially grown on a silicon single crystal substrate or an SOI substrate, and which suppresses warpage without changing the structure of the buffer layer or the like. It has become clear that a semiconductor wafer and a method for manufacturing the same can be provided.

なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。 Note that the present invention is not limited to the above embodiments. The above-mentioned embodiments are illustrative, and any embodiment that has substantially the same configuration as the technical idea stated in the claims of the present invention and has similar effects is the present invention. covered within the technical scope of.

1…シリコン系基板、 2…初期層、 3…バッファ層、 4…機能層、
10…窒化物半導体ウェーハ。
1... Silicon-based substrate, 2... Initial layer, 3... Buffer layer, 4... Functional layer,
10...Nitride semiconductor wafer.

Claims (6)

シリコン系基板と、該シリコン系基板上に積層された窒化物半導体からなるバッファ層と、該バッファ層上に積層された少なくともGaN層を含む機能層とを備えたものである窒化物半導体ウェーハであって、
前記バッファ層にFeがドープされており、前記バッファ層における積層方向のFe濃度分布は、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から前記機能層に向かってFe濃度が減少するような濃度分布であり、
前記Fe濃度が最大となる点におけるFe濃度が2.5×1018atoms/cm以上6.0×1018atoms/cm以下であり、かつ、前記バッファ層の前記機能層側の上面のFe濃度が4.0×1017atoms/cm以下であることを特徴とする窒化物半導体ウェーハ。
A nitride semiconductor wafer comprising a silicon-based substrate, a buffer layer made of a nitride semiconductor stacked on the silicon-based substrate, and a functional layer containing at least a GaN layer stacked on the buffer layer. There it is,
The buffer layer is doped with Fe, and the Fe concentration distribution in the stacking direction in the buffer layer has a point where the Fe concentration is maximum, and Fe concentration distribution from the point where the Fe concentration is maximum toward the functional layer. The concentration distribution is such that the concentration decreases,
The Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms/cm 3 or less, and the upper surface of the buffer layer on the functional layer side is A nitride semiconductor wafer having an Fe concentration of 4.0×10 17 atoms/cm 3 or less.
前記シリコン系基板は、シリコン単結晶基板、又はSOI(シリコン・オン・インシュレーター)基板であることを特徴とする請求項1に記載の窒化物半導体ウェーハ。 The nitride semiconductor wafer according to claim 1, wherein the silicon-based substrate is a silicon single crystal substrate or an SOI (silicon on insulator) substrate. 前記バッファ層は、AlGaN層と、GaN層とAlN層とが交互に積層された超格子層と、からなることを特徴とする請求項1又は請求項2に記載の窒化物半導体ウェーハ。 3. The nitride semiconductor wafer according to claim 1, wherein the buffer layer includes an AlGaN layer and a superlattice layer in which GaN layers and AlN layers are alternately stacked. 窒化物半導体ウェーハを製造する方法であって、
(1)シリコン系基板上に窒化物半導体からなるバッファ層を積層する工程、及び
(2)前記バッファ層上に少なくともGaN層を含む機能層を積層して窒化物半導体ウェーハを製造する工程
を含み、かつ、
前記工程(1)において、Feをドープするためのドーピングガスを流し、該ドーピングガスの流量を調整することによって、前記バッファ層における積層方向のFe濃度分布を、Fe濃度が最大となる点を有し、該Fe濃度が最大となる点から前記機能層に向かってFe濃度が減少するような濃度分布とし、
前記Fe濃度が最大となる点におけるFe濃度を2.5×1018atoms/cm以上6.0×1018atoms/cm以下とし、かつ、前記バッファ層の前記機能層側の上面のFe濃度を4.0×1017atoms/cm以下とすることを特徴とする窒化物半導体ウェーハの製造方法。
A method of manufacturing a nitride semiconductor wafer, the method comprising:
(1) a step of laminating a buffer layer made of a nitride semiconductor on a silicon-based substrate; and (2) a step of laminating a functional layer including at least a GaN layer on the buffer layer to manufacture a nitride semiconductor wafer. ,and,
In the step (1), by flowing a doping gas for doping Fe and adjusting the flow rate of the doping gas, the Fe concentration distribution in the stacking direction in the buffer layer is changed to a point where the Fe concentration is maximum. and a concentration distribution such that the Fe concentration decreases from the point where the Fe concentration is maximum toward the functional layer,
The Fe concentration at the point where the Fe concentration is maximum is 2.5×10 18 atoms/cm 3 or more and 6.0×10 18 atoms/cm 3 or less, and the Fe concentration on the upper surface of the functional layer side of the buffer layer is A method for manufacturing a nitride semiconductor wafer, characterized in that the concentration is 4.0×10 17 atoms/cm 3 or less.
前記工程(1)において、前記シリコン系基板を、シリコン単結晶基板、又はSOI(シリコン・オン・インシュレーター)基板とすることを特徴とする請求項4に記載の窒化物半導体ウェーハの製造方法。 5. The method for manufacturing a nitride semiconductor wafer according to claim 4, wherein in the step (1), the silicon-based substrate is a silicon single crystal substrate or an SOI (silicon on insulator) substrate. 前記工程(1)において、前記バッファ層を、AlGaN層と、GaN層とAlN層とが交互に積層された超格子層と、からなるものとすることを特徴とする請求項4又は請求項5に記載の窒化物半導体ウェーハの製造方法。 5. In the step (1), the buffer layer is composed of an AlGaN layer and a superlattice layer in which GaN layers and AlN layers are alternately laminated. A method for manufacturing a nitride semiconductor wafer according to .
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