JP2021141213A - Polishing method for interlayer insulating material of semiconductor package substrate - Google Patents

Polishing method for interlayer insulating material of semiconductor package substrate Download PDF

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JP2021141213A
JP2021141213A JP2020038191A JP2020038191A JP2021141213A JP 2021141213 A JP2021141213 A JP 2021141213A JP 2020038191 A JP2020038191 A JP 2020038191A JP 2020038191 A JP2020038191 A JP 2020038191A JP 2021141213 A JP2021141213 A JP 2021141213A
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polishing
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JP7370904B2 (en
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忠弥 梅村
Tadaya Umemura
忠弥 梅村
友美 北
Tomomi Kita
友美 北
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Toppan Infomedia Co Ltd
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Abstract

To achieve both the advancement of the flatness by polishing and the improvement of polishing speed.SOLUTION: A method for polishing a semiconductor package substrate includes the steps of: using an interlayer insulating material as an inorganic-organic mixing resin sheet formed of inorganic particles and a resin material on a substrate; preparing a first polishing slurry containing a dispersant and first polishing particles whose average particle diameter is equal to or larger than the average particle diameter of the inorganic particles; preparing a second polishing slurry containing the dispersant and second polishing particles whose average particle diameter is smaller than the average particle diameter of the inorganic particles; polishing the interlayer insulating material with the first polishing slurry; and further polishing the interlayer insulating material, which is polished with the first polishing slurry, with the second polishing slurry.SELECTED DRAWING: None

Description

本発明は、半導体パッケージ基板の層間絶縁材料の研磨方法に関し、より具体的には、無機粒子と樹脂材料が混合された無機有機混合樹脂シートからなる層間絶縁材料の研磨方法に関する。 The present invention relates to a method for polishing an interlayer insulating material of a semiconductor package substrate, and more specifically, to a method for polishing an interlayer insulating material composed of an inorganic-organic mixed resin sheet in which inorganic particles and a resin material are mixed.

プリント配線基板(プリント基板)は、集積回路、抵抗器、コンデンサーなどの多数の電子部品をその表面に固定してその部品間を配線で接続することで電子回路を構成するために使用させる板状またはフィルム上の部品である。プリント基板はパソコンやスマートフォンなどの様々な電子機器に搭載されている。 A printed wiring board (printed circuit board) is a plate-like structure used to form an electronic circuit by fixing a large number of electronic components such as integrated circuits, resistors, and capacitors to the surface and connecting the components with wiring. Or it is a part on the film. Printed circuit boards are mounted on various electronic devices such as personal computers and smartphones.

近年、電子機器の高密度化・多様化に伴い、半導体素子をプリント基板に実装するための技術として、半導体パッケージが用いられている。半導体パッケージは、半導体素子自体を外部から保護するための樹脂部分と、半導体素子を電気的に外部に接続するための外部端子とから構成される。その中でも、高機能素子向けパッケージに分類されるFCBGA(Flip Chip Ball Grid Array)は、半導体素子と外部端子を、はんだバンプと導電層と絶縁層からなるパッケージ基板を介して接続することで、従来のようにワイヤ接続を用いない手法である。FCBGAは、半導体パッケージの多ピン化に伴って開発された手法であり、パッケージ裏面全体にハンダボール端子を形成してエリアレイ化することを特徴としている。このためFCBGAは、省スペース、高速伝送などに適したパッケージ技術として知られている(特許文献1)。 In recent years, with the increasing density and diversification of electronic devices, semiconductor packages have been used as a technique for mounting semiconductor elements on printed circuit boards. The semiconductor package is composed of a resin portion for protecting the semiconductor element itself from the outside and an external terminal for electrically connecting the semiconductor element to the outside. Among them, FCBGA (Flip Chip Ball Grid Array), which is classified as a package for high-performance elements, is conventionally used by connecting a semiconductor element and an external terminal via a package substrate composed of a solder bump, a conductive layer, and an insulating layer. This is a method that does not use wire connection. FCBGA is a method developed with the increase in the number of pins in a semiconductor package, and is characterized by forming solder ball terminals on the entire back surface of the package to form an area lay. For this reason, FCBGA is known as a packaging technology suitable for space saving and high-speed transmission (Patent Document 1).

さらにFCBGAの次世代技術として、FOWLP(Fan-Out Wafer Level Package)が注目を集めている。FOWLPは、再配線層をウェハプロセスを用いて形成するので、ワイヤやバンプを必要とせずに厚みを薄くできるため、電気信号の伝送速度を高速化できるという特徴がある。 Furthermore, FOWLP (Fan-Out Wafer Level Package) is attracting attention as the next-generation technology of FCBGA. Since the rewiring layer is formed by using a wafer process, FOWLP has a feature that the thickness can be reduced without the need for wires or bumps, so that the transmission speed of electric signals can be increased.

FOWLP技術では、半導体素子と外部素子を接合するために用いられるパッケージ基板を、導体層(導電層)と絶縁層を積み上げて回路形成を行なうビルドアップ工法により形成する。その導体層には主に金属が用いられ、絶縁層には樹脂材料が用いられる。そして銅などの金属で再配線層をポリイミド基板上に形成して、その上から樹脂フィルムを熱圧着して絶縁層を形成する。その後、再配線層の表面にある絶縁層を除去する。 In the FOWLP technology, a package substrate used for joining a semiconductor element and an external element is formed by a build-up method in which a conductor layer (conductive layer) and an insulating layer are stacked to form a circuit. A metal is mainly used for the conductor layer, and a resin material is used for the insulating layer. Then, a rewiring layer is formed on the polyimide substrate with a metal such as copper, and a resin film is thermocompression bonded from the rewiring layer to form an insulating layer. After that, the insulating layer on the surface of the rewiring layer is removed.

微細配線を要求されるFOWLP技術では、処理対象となる層がそれぞれ非常に薄いため、従来の製造プロセス(レーザー加工)の適用が困難である。そのため、半導体分野における精密研磨による微細配線形成工程で実績のあるCMP(Chemical-Mechanical Polishing)処理工程を、FOWLP技術にも導入することが新たに検討されている。例えば、特許文献2、3には、半導体素子製造技術における基板表面の平坦化工程において使用される研磨方法が開示されている。 In FOWLP technology, which requires fine wiring, it is difficult to apply the conventional manufacturing process (laser processing) because the layers to be processed are very thin. Therefore, it is newly considered to introduce the CMP (Chemical-Mechanical Polishing) processing process, which has a proven track record in the fine wiring forming process by precision polishing in the semiconductor field, into the FOWLP technology. For example, Patent Documents 2 and 3 disclose a polishing method used in a substrate surface flattening step in a semiconductor device manufacturing technique.

特開2000−353776号公報Japanese Unexamined Patent Publication No. 2000-353776 特開2011−233748号公報Japanese Unexamined Patent Publication No. 2011-233748 国際公開第2004/100242号International Publication No. 2004/100242

半導体製品の生産に求められる速度は年々上がっているため、各生産工程にかけられる時間は非常に限られているのが現実である。しかしながら、従来技術に係るCMP処理をそのままFOWLP技術に適用しようとしても、半導体パッケージ基板に求められる平坦化の程度がきわめて高いので、研磨速度を十分に大きくできない問題が解決できていなかった。 Since the speed required for the production of semiconductor products is increasing year by year, the reality is that the time spent in each production process is very limited. However, even if the CMP process according to the conventional technique is applied to the FOWLP technique as it is, the degree of flattening required for the semiconductor package substrate is extremely high, so that the problem that the polishing speed cannot be sufficiently increased cannot be solved.

上記課題を解決するため、本発明では以下を提供できる。 In order to solve the above problems, the present invention can provide the following.

態様1.
半導体パッケージ基板を研磨する方法であって、
基板上に、無機粒子と樹脂材料とからなる無機有機混合樹脂シートとして層間絶縁材料を適用する工程と、
前記無機粒子の平均粒子径と等しいかまたは大きい平均粒子径を有する第一の研磨粒子と、分散剤とを含んだ第一の研磨スラリーを調製する工程と、
前記無機粒子の平均粒子径よりも小さい平均粒子径を有する第二の研磨粒子と、分散剤とを含んだ第二の研磨スラリーを調製する工程と、
前記層間絶縁材料を、前記第一の研磨スラリーで研磨する工程と、
前記第一の研磨スラリーで研磨された前記層間絶縁材料を、前記第二の研磨スラリーでさらに研磨する工程と
を含む、方法。
Aspect 1.
It is a method of polishing a semiconductor package substrate.
A process of applying an interlayer insulating material as an inorganic-organic mixed resin sheet composed of inorganic particles and a resin material on a substrate, and
A step of preparing a first polishing slurry containing a first polishing particle having an average particle size equal to or larger than the average particle size of the inorganic particles and a dispersant, and a step of preparing the first polishing slurry.
A step of preparing a second polishing slurry containing a second polishing particle having an average particle size smaller than the average particle size of the inorganic particles and a dispersant, and a step of preparing the second polishing slurry.
The step of polishing the interlayer insulating material with the first polishing slurry and
A method comprising a step of further polishing the interlayer insulating material polished with the first polishing slurry with the second polishing slurry.

態様2.
前記無機有機混合樹脂シートにおける前記無機粒子の含有量が、80〜90質量%であることを特徴とする、態様1に記載の方法。
Aspect 2.
The method according to aspect 1, wherein the content of the inorganic particles in the inorganic-organic mixed resin sheet is 80 to 90% by mass.

態様3.
前記無機有機混合樹脂シートが、無機粒子としてシリカ粒子を、樹脂材料としてエポキシ樹脂を含み、
前記第一の研磨スラリーおよび前記第二の研磨スラリーの一方もしくは両方が、研磨粒子としてシリカ粒子を、分散剤として硝酸を含む
ことを特徴とする、態様1または2に記載の方法。
Aspect 3.
The inorganic-organic mixed resin sheet contains silica particles as inorganic particles and an epoxy resin as a resin material.
The method according to aspect 1 or 2, wherein one or both of the first polishing slurry and the second polishing slurry contain silica particles as polishing particles and nitric acid as a dispersant.

態様4.
前記無機有機混合樹脂シートが含む前記無機粒子の平均粒子径Psに対して、前記第一の研磨スラリーが含む前記第一の研磨粒子の平均粒子径P1が、P1≧2Psを満たし、
前記第二の研磨スラリーが含む前記第二の研磨粒子の平均粒子径P2が、P2≦0.5Psを満たす
ことを特徴とする、態様1〜3のいずれか一項に記載の方法。
Aspect 4.
The average particle size P1 of the first polishing particles contained in the first polishing slurry satisfies P1 ≧ 2Ps with respect to the average particle size Ps of the inorganic particles contained in the inorganic-organic mixed resin sheet.
The method according to any one of aspects 1 to 3, wherein the average particle size P2 of the second polishing particles contained in the second polishing slurry satisfies P2 ≦ 0.5 Ps.

態様5.
前記無機有機混合樹脂シートが含む前記無機粒子の平均粒子径Psが、Ps = 0.5〜1.5μmであることを特徴とする、態様1〜4のいずれか一項に記載の方法。
Aspect 5.
The method according to any one of aspects 1 to 4, wherein the average particle size Ps of the inorganic particles contained in the inorganic-organic mixed resin sheet is Ps = 0.5 to 1.5 μm.

態様6.
前記第一の研磨スラリーおよび前記第二の研磨スラリーの少なくとも一方がさらにpH調整剤を含むことにより、pHが6.5〜7.5であることを特徴とする、態様1〜5のいずれか一項に記載の方法。
Aspect 6.
The item according to any one of aspects 1 to 5, wherein the pH is 6.5 to 7.5 by further containing a pH adjuster in at least one of the first polishing slurry and the second polishing slurry. the method of.

本発明によれば、十分に大きな研磨速度を以って半導体パッケージ基板を十分に平坦化でき、特にFOWLP技術において顕著な効果が得られる。 According to the present invention, the semiconductor package substrate can be sufficiently flattened with a sufficiently large polishing rate, and a remarkable effect can be obtained particularly in the FOWLP technique.

FOWLP技術における基板表面の平坦化工程の概要を説明する模式図である。It is a schematic diagram explaining the outline of the substrate surface flattening process in FOWLP technology. 実施例における研磨対象物表面の、研磨前の状態を撮影した倍率20000倍の電子顕微鏡写真を示す。An electron micrograph of the surface of the object to be polished in the example before polishing is shown at a magnification of 20000. 実施例における研磨対象物表面の、第一の研磨スラリーを用いて一度目の研磨をした後の状態を撮影した倍率20000倍の電子顕微鏡写真を示す。An electron micrograph of the surface of the object to be polished in the example after the first polishing using the first polishing slurry is shown at a magnification of 20000. 実施例における研磨対象物表面の、第二の研磨スラリーを用いて二度目の研磨をした後の状態を撮影した倍率20000倍の電子顕微鏡写真を示す。An electron micrograph of the surface of the object to be polished in the example after the second polishing with the second polishing slurry is shown at a magnification of 20000.

本明細書における数値範囲は、別段の断わりがないかぎりはその下限値および上限値を含むものとする。本明細書に開示される方法が含む各工程の順番は、その効果を発揮できるかぎりにおいて、時系列的に自由に変更してもよい。 Unless otherwise specified, the numerical range in the present specification shall include the lower limit value and the upper limit value thereof. The order of each step included in the methods disclosed herein may be freely changed in chronological order as long as the effect can be exerted.

本明細書における粒子の平均粒子径とは、レーザー回折散乱法によって求められる粒度分布における、体積基準積算値50%での粒径(D50)を意味する。 The average particle size of the particles in the present specification means the particle size (D50) at a volume-based integrated value of 50% in the particle size distribution obtained by the laser diffraction / scattering method.

本発明に係る研磨方法は、半導体パッケージ基板を対象とするものであり、より好ましくはFOWLP技術に基づきビルドアップ工法により形成する半導体パッケージ基板を対象にできる。図1には、分かりやすくするために簡略化した基板表面と、その平坦化工程の概要を示す。 The polishing method according to the present invention targets a semiconductor package substrate, and more preferably a semiconductor package substrate formed by a build-up method based on FOWLP technology. FIG. 1 shows a simplified substrate surface for easy understanding and an outline of the flattening process.

まず図1(a)に示すように、ベースとなる基板(ベークライト基板、ガラスエポキシ基板、エポキシやポリエステルなどの樹脂基板、またはこれらのコンポジット基板など)の表面に、導体層を形成する。この導体層は、金・銀・銅・ニッケル・コバルト・スズ・鉛などの金属で形成するピラー(例えばCuピラー)であってもよく、例えば金属の箔(銅箔など)を貼り付けてエッチングで形成したものであってもよい。あるいは導体層を、インクジェット印刷などの印刷手法により回路を直接形成するようにして作成してもよい。この状態のものを「コア基板」とも称する。特にFOWLP技術によるコア基板の場合は、エポキシやポリエステルなどの樹脂基板上に導電層を回路形成したものが好ましい。 First, as shown in FIG. 1A, a conductor layer is formed on the surface of a base substrate (baklite substrate, glass epoxy substrate, resin substrate such as epoxy or polyester, or a composite substrate thereof). This conductor layer may be a pillar (for example, Cu pillar) formed of a metal such as gold, silver, copper, nickel, cobalt, tin, or lead. For example, a metal foil (copper foil or the like) is attached and etched. It may be formed by. Alternatively, the conductor layer may be created by directly forming a circuit by a printing method such as inkjet printing. The one in this state is also referred to as a "core substrate". In particular, in the case of a core substrate based on FOWLP technology, it is preferable that a conductive layer is circuit-formed on a resin substrate such as epoxy or polyester.

次に図1(b)に示すように、コア基板上に層間絶縁材料を積層する。この図では、わかりやすくするために凹凸を極端に誇張していることに留意されたい。本発明に係る方法においては、層間絶縁材料は、無機粒子と樹脂材料とからなる無機有機混合樹脂シートであるのが好ましい。そうした無機有機混合樹脂シートは、加熱圧着などによって樹脂をBステージ(半硬化状態)とすることで、コア基板上に接着(積層)でき、コア基板へ薄膜絶縁性を付与できる。無機有機混合樹脂シートの厚みは本発明の効果を発揮できるかぎりにおいて任意に設定できるが、例えば15μm以下が好ましい。 Next, as shown in FIG. 1 (b), the interlayer insulating material is laminated on the core substrate. It should be noted that in this figure, the unevenness is extremely exaggerated for the sake of clarity. In the method according to the present invention, the interlayer insulating material is preferably an inorganic-organic mixed resin sheet composed of inorganic particles and a resin material. Such an inorganic-organic mixed resin sheet can be adhered (laminated) on the core substrate by setting the resin in the B stage (semi-cured state) by heat crimping or the like, and can impart thin film insulation to the core substrate. The thickness of the inorganic-organic mixed resin sheet can be arbitrarily set as long as the effects of the present invention can be exhibited, but is preferably 15 μm or less, for example.

無機有機混合樹脂シートが含む無機粒子の材料としては任意のものを使用でき、例えば、シリカ、アルミナ、ガラス、硫酸バリウム、炭酸バリウムなどを使用可能である。好ましくは無機粒子としてシリカ粒子を使用でき、さらに好ましくは充填性のよい球状シリカを使用できる。 Any material can be used as the material of the inorganic particles contained in the inorganic-organic mixed resin sheet, and for example, silica, alumina, glass, barium sulfate, barium carbonate and the like can be used. Silica particles can be preferably used as the inorganic particles, and more preferably spherical silica having good filling property can be used.

無機粒子の平均粒子径(Ps)は、後述する研磨スラリー中の研磨粒子の平均粒子径との所定の関係を満たすようにしつつ任意に設定可能である。例えば無機粒子を高充填させ薄膜絶縁性を向上させる観点からは、Ps = 0.5〜1.5μm が好ましい。 The average particle size (Ps) of the inorganic particles can be arbitrarily set while satisfying a predetermined relationship with the average particle size of the polishing particles in the polishing slurry described later. For example, Ps = 0.5 to 1.5 μm is preferable from the viewpoint of highly filling inorganic particles and improving thin film insulation.

無機有機混合樹脂シートが含む樹脂材料としては任意のものを使用でき、例えばエポキシ樹脂、ポリイミド樹脂、またはエポキシ樹脂と熱可塑性樹脂との複合体などを使用できる。好ましくはエポキシ樹脂を使用できる。樹脂材料は必要に応じて硬化剤を含めてもよい。 Any resin material can be used as the resin material contained in the inorganic-organic mixed resin sheet, and for example, an epoxy resin, a polyimide resin, or a composite of an epoxy resin and a thermoplastic resin can be used. Epoxy resin can be preferably used. The resin material may contain a curing agent if necessary.

無機有機混合樹脂シートにおける無機粒子の含有量は任意に設定でき、作業性向上の観点からはシート全体の重量を基準として80〜90質量%であるのが好ましい。 The content of the inorganic particles in the inorganic-organic mixed resin sheet can be arbitrarily set, and is preferably 80 to 90% by mass based on the weight of the entire sheet from the viewpoint of improving workability.

そして図1(c)に示したように、コア基板上の層間絶縁材料を研磨して、導体層を露出させるように基板表面を平坦化する。平坦化の評価には公知の手法を使用でき、任意の表面粗さパラメータを測定することで評価可能である。例えばそうした表面粗さパラメータとしては、JIS B0601:2013の附属書JBに定義される中心線平均粗さRa75が挙げられるがこれに限定はされない。 Then, as shown in FIG. 1 (c), the interlayer insulating material on the core substrate is polished to flatten the substrate surface so as to expose the conductor layer. A known method can be used for the evaluation of flattening, and it can be evaluated by measuring an arbitrary surface roughness parameter. For example, such a surface roughness parameter includes, but is not limited to, the center line average roughness R a75 defined in Annex JB of JIS B 0601: 2013.

本発明に係る方法では、研磨工程において研磨スラリーを使用する。研磨スラリーは、研磨粒子と分散剤とを含むように調製する。 In the method according to the present invention, a polishing slurry is used in the polishing step. The polishing slurry is prepared to contain polishing particles and a dispersant.

本発明に係る方法では、短時間で高い研磨速度かつ高い平坦化を実現するために、研磨スラリーを二種類以上使用できる。すなわち、機械的研磨力の高い研磨スラリーを用いて層間絶縁材料を高速かつ粗く研磨したのちに、機械的研磨力の低い研磨スラリーを用いて層間絶縁材料を細かく研磨することで、優れた効果を得られる。 In the method according to the present invention, two or more types of polishing slurries can be used in order to realize a high polishing rate and a high flattening in a short time. That is, an excellent effect is obtained by polishing the interlayer insulating material at high speed and roughly using a polishing slurry having a high mechanical polishing power, and then finely polishing the interlayer insulating material using a polishing slurry having a low mechanical polishing power. can get.

第一の研磨スラリーが含む第一の研磨粒子の平均粒子径(P1)は、層間絶縁材料の含む無機粒子の平均粒子径(Ps)以上にできる。第二の研磨スラリーが含む第二の研磨粒子の平均粒子径(P2)は、Ps未満にできる。すなわち一般に P1 > P2 である。 The average particle size (P1) of the first polishing particles contained in the first polishing slurry can be equal to or larger than the average particle size (Ps) of the inorganic particles contained in the interlayer insulating material. The average particle size (P2) of the second polishing particles contained in the second polishing slurry can be less than Ps. That is, in general, P1> P2.

機械的研磨力の高い第一の研磨スラリーについて、P1は大きめであることが好ましく、例えば P1 = 1〜10μm 、より好ましくは P1 = 1.5〜10μm 、さらに好ましくは P1 = 2.5〜10μm にできる。さらに好ましい実施形態においては、 P1≧2Ps であってよい。仮説ではあるが、無機粒子と研磨粒子の平均粒子径が倍以上違うと、そうでない場合に比べて研磨速度に大きな差が出ることから、このように平均粒子径の大小関係を設定することで顕著な効果が得られると考えられる。特に、無機粒子と研磨粒子の硬度が同程度(例えばJIS Z2244:2009に定義されるビッカース硬度として、同じ試験力においてのHV値が、一方を基準として他方がその90〜110%の範囲であることなど)であるか、もしくはそれらの材質が同種である場合、この効果が顕著であり、材料の硬度差による大きな傷(スクラッチ)の発生を抑えられる。第一の研磨工程によっては、研磨前の表面よりも表面粗さが粗くなってもよい。 For the first polishing slurry having high mechanical polishing power, P1 is preferably large, for example, P1 = 1 to 10 μm, more preferably P1 = 1.5 to 10 μm, and even more preferably P1 = 2.5 to 10 μm. In a more preferred embodiment, P1 ≧ 2Ps may be. Although it is a hypothesis, if the average particle size of the inorganic particles and the abrasive particles is more than doubled, there will be a large difference in the polishing speed compared to the case where it is not, so by setting the magnitude relationship of the average particle size in this way. It is considered that a remarkable effect can be obtained. In particular, the hardness of the inorganic particles and the abrasive particles are about the same (for example, as the Vickers hardness defined in JIS Z 2244: 2009, the HV value at the same test force is in the range of 90 to 110% based on one. This effect is remarkable when the materials are of the same type, and the occurrence of large scratches (scratches) due to the difference in hardness of the materials can be suppressed. Depending on the first polishing step, the surface roughness may be rougher than the surface before polishing.

また精密な研磨をするための第二の研磨スラリーについて、P2は小さめであるのが好ましく、例えば P2 = 0.01〜1μm 、より好ましくは P2 = 0.01〜0.5μm 、さらに好ましくは P2 = 0.01〜0.2μm にできる。さらに好ましい実施形態においては、 P2≦0.5Ps としてよい。 Regarding the second polishing slurry for precision polishing, P2 is preferably small, for example, P2 = 0.01 to 1 μm, more preferably P2 = 0.01 to 0.5 μm, and even more preferably P2 = 0.01 to 0.2 μm. Can be done. In a more preferred embodiment, P2 ≤ 0.5 Ps may be set.

特に好ましくは、各研磨スラリーの組み合わせとして P1≧2Ps かつ P2≦0.5Ps とすることで、高速かつ優れた研磨性能を発揮できる。 Particularly preferably, by setting P1 ≧ 2Ps and P2 ≦ 0.5Ps as a combination of each polishing slurry, high-speed and excellent polishing performance can be exhibited.

さらに別の研磨スラリーを調製して研磨に使用してもかまわないことは言うまでもない。例えば三種類の研磨スラリーを使う場合、第一の研磨スラリーが含む第三の研磨粒子の平均粒子径(P3)について、 P1 > P2 > P3 としてもよいことは当業者には理解できる。 Needless to say, another polishing slurry may be prepared and used for polishing. For example, when three types of polishing slurries are used, those skilled in the art can understand that the average particle size (P3) of the third polishing particles contained in the first polishing slurry may be P1> P2> P3.

研磨粒子の材料としては、無機有機混合樹脂シートである層間絶縁材料を研磨できる硬度を持つものであれば任意のものを使用でき、例えば樹脂、酸化セリウム、酸化チタン、酸化クロム、シリカ、アルミナ、またはダイヤモンドなどの粒子を用いてよい。研磨性能の観点から好ましくはヒュームドシリカを使用できる。複数種の研磨スラリーにおいて、研磨粒子の材料は同じであってもよいしそれぞれ異なっていてもよい。複数種の研磨スラリーにおいて、研磨粒子の材料が無機粒子の材料と同種である場合、または研磨粒子の材料の硬度が無機粒子のそれと同程度である場合には、材料の硬度差による大きな傷(スクラッチ)の発生を抑えられる効果がある。 As the material of the polishing particles, any material can be used as long as it has a hardness capable of polishing the interlayer insulating material which is an inorganic organic mixed resin sheet. For example, resin, cerium oxide, titanium oxide, chromium oxide, silica, alumina, etc. Alternatively, particles such as diamond may be used. From the viewpoint of polishing performance, fumed silica can be preferably used. In the plurality of types of polishing slurries, the materials of the polishing particles may be the same or different from each other. In multiple types of polishing slurries, when the material of the polishing particles is the same as the material of the inorganic particles, or when the hardness of the material of the polishing particles is similar to that of the inorganic particles, a large scratch due to the difference in the hardness of the materials ( It has the effect of suppressing the occurrence of scratches).

研磨スラリーの研磨粒子の濃度(すわなち砥粒濃度)は任意に設定でき、例えば0.01〜10質量%、さらに好ましくは0.5〜5質量%であってよい。 The concentration of the polishing particles in the polishing slurry (that is, the concentration of abrasive grains) can be arbitrarily set, and may be, for example, 0.01 to 10% by mass, more preferably 0.5 to 5% by mass.

また研磨スラリーが分散剤を含むことにより、研磨粒子を効率よく分散させて、層間絶縁材料内にすみやかに研磨粒子を供給できる効果が得られる。そうした分散剤としては公知のものを使用でき、例えば界面活性剤にある分子鎖の立体障害を利用するものや、粒子表面電位の電気的反発により分散向上させるものなどを使用できる。 Further, when the polishing slurry contains a dispersant, the effect of efficiently dispersing the polishing particles and promptly supplying the polishing particles into the interlayer insulating material can be obtained. As such a dispersant, known ones can be used, for example, those utilizing the steric hindrance of the molecular chain in the surfactant, those for improving the dispersion by the electrical repulsion of the particle surface potential, and the like can be used.

研磨粒子として酸化セリウム、酸化チタン、酸化クロム、シリカ、アルミナなどの極性が高い酸化物を使う場合においては、分散剤として界面活性作用を有する物質を使用するのが好ましく、例えばポリアクリル酸塩やポリスチレンスルホン酸塩などのイオン性高分子界面活性剤や、塩酸や硝酸などの酸を使用できる。半導体パッケージ基板への表面汚染の回避(洗浄のしやすさ)という観点と、研磨粒子の電気的反発を利用して単分散に近い分散性が得られるという観点からは、分散剤として酸を使用するのが好ましい。また層間絶縁材料が含む樹脂材料への適度な侵食性を得る観点からは、分散剤として樹脂材料をある程度溶解できる物質を使うのが好ましい。例えば樹脂材料がエポキシ樹脂を含む場合には、分散剤として硝酸を使用できる。 When highly polar oxides such as cerium oxide, titanium oxide, chromium oxide, silica, and alumina are used as the abrasive particles, it is preferable to use a substance having a surfactant action as the dispersant, for example, polyacrylate or Ionic polymer surfactants such as polystyrene sulfonate and acids such as hydrochloric acid and nitrate can be used. Acid is used as a dispersant from the viewpoint of avoiding surface contamination on the semiconductor package substrate (easy to clean) and from the viewpoint of obtaining dispersibility close to monodisperse by utilizing the electrical repulsion of the abrasive particles. It is preferable to do so. Further, from the viewpoint of obtaining appropriate erosion resistance to the resin material contained in the interlayer insulating material, it is preferable to use a substance capable of dissolving the resin material to some extent as a dispersant. For example, when the resin material contains an epoxy resin, nitric acid can be used as the dispersant.

層間絶縁材料が含む無機粒子の材料と、研磨スラリーが含む研磨粒子の材料とが同一であってもよいし異なっていてもよい。目的である薄膜絶縁性を阻害しない観点からは、当該材料が上述した分散剤に対し難溶性であるのが好ましい。 The material of the inorganic particles contained in the interlayer insulating material and the material of the polishing particles contained in the polishing slurry may be the same or different. From the viewpoint of not impairing the target thin film insulating property, it is preferable that the material is sparingly soluble in the above-mentioned dispersant.

研磨スラリーがさらに他の成分を含んでもよく、例えばpH調整剤、増粘剤、酸化剤、錯形成剤、腐食防止剤などを適宜含んでいてもよい。好ましい実施形態では、半導体パッケージ基板を損傷させにくい観点から、研磨スラリーがpH調整剤を含むことで、研磨スラリーのpHを6.5〜7.5の範囲としてもよい。 The polishing slurry may further contain other components, such as a pH regulator, a thickener, an oxidizing agent, a complex forming agent, a corrosion inhibitor and the like as appropriate. In a preferred embodiment, the pH of the polishing slurry may be in the range of 6.5 to 7.5 by containing a pH adjuster in the polishing slurry from the viewpoint of not easily damaging the semiconductor package substrate.

以下、本発明の実施例について詳細に説明する。 Hereinafter, examples of the present invention will be described in detail.

(実験例1)
<研磨スラリーの作製>
粒子径の異なる各種シリカの40質量%シリカ/水混合物に対し、硝酸0.7質量%を添加し、ビーズミルで分散した後、希釈してシリカ濃度(砥粒濃度)が1質量%である研磨スラリーをそれぞれ作製した。研磨スラリーのpHを、アンモニア添加により pH = 7 に調整した。
(Experimental example 1)
<Preparation of polishing slurry>
To a 40% by mass silica / water mixture of various silicas having different particle sizes, 0.7% by mass of nitrate is added, dispersed by a bead mill, and then diluted to obtain a polishing slurry having a silica concentration (abrasive grain concentration) of 1% by mass. Each was prepared. The pH of the polishing slurry was adjusted to pH = 7 by adding ammonia.

<被研磨物>
研磨対象基板を模擬する被研磨物として以下を調製した。平均粒子径1μmの球状シリカ粒子を85質量%含有したエポキシ樹脂シートを、シリコンウェハ(株式会社アドバンテック社製、φ200mm低抵抗シリコンウェハ)上に熱圧着して積層したものを準備した。積層したエポキシ樹脂シートは、厚さ35μm、Ra75 ≒ 25nmであった。中心線平均粗さ Ra75 は、接触式表面粗さ計(Tencor社製 P-15 KLA)を用いて測定した。
<Object to be polished>
The following was prepared as an object to be polished to simulate the substrate to be polished. An epoxy resin sheet containing 85% by mass of spherical silica particles having an average particle diameter of 1 μm was thermocompression-bonded and laminated on a silicon wafer (manufactured by Advantec Co., Ltd., φ200 mm low resistance silicon wafer). The laminated epoxy resin sheet had a thickness of 35 μm and Ra75 ≈ 25 nm. The center line average roughness R a75 was measured using a contact type surface roughness meter (P-15 KLA manufactured by Tencor).

<研磨条件>
研磨実験は、スピードファム・アイペック社製SH-24型を使用して以下に示す条件設定で行った。研磨機の定盤には研磨パッド(ニッタ・ハース社製IC 1400)を貼り付けて使用した。
Down Force = 4.0 psi (1.11kg/cm2)
Career Speed / Table Speed = 103/100 rpm
Slurry Flow = 200 ml/min
Polish Time = 180 sec
<Polishing conditions>
The polishing experiment was carried out using the SH-24 type manufactured by Speedfam Ipec Co., Ltd. under the conditions shown below. A polishing pad (IC 1400 manufactured by Nitta Haas) was attached to the surface plate of the polishing machine.
Down Force = 4.0 psi (1.11kg / cm 2 )
Career Speed / Table Speed = 103/100 rpm
Slurry Flow = 200 ml / min
Polish Time = 180 sec

<測定方法>
研磨速度は、研磨前後の被研磨物の重量変化を精密天秤で測定し、重量変化値を膜厚値に換算して、研磨時間あたりの膜厚減少量を研磨速度として算出した。研磨後の中心線平均粗さも上記と同様に測定した。
<Measurement method>
The polishing rate was calculated by measuring the weight change of the object to be polished before and after polishing with a precision balance, converting the weight change value into a film thickness value, and calculating the amount of film thickness reduction per polishing time as the polishing rate. The average roughness of the center line after polishing was also measured in the same manner as described above.

<実験結果>
粒子径の異なる各種シリカを研磨粒子として用いた研磨スラリーによる研磨結果を下記表1に示す。
<Experimental results>
Table 1 below shows the results of polishing with a polishing slurry using various silicas with different particle sizes as polishing particles.

Figure 2021141213
Figure 2021141213

上記結果から、平均粒子径1μmの球状シリカ粒子を含有したエポキシ樹脂シートを層間絶縁材料とした被研磨物に対し、平均粒子径が2μm以上のシリカ粒子を含んだ研磨スラリーでは表面粗さを荒らしながら(大きくしながら)研磨速度が増加することがわかり、また平均粒子径が0.5μm以下のシリカ粒子を含んだ研磨スラリーでは表面粗さを低下させる(平坦性が向上する)ことがわかった。 From the above results, the surface roughness is roughened with a polishing slurry containing silica particles with an average particle size of 2 μm or more, as opposed to an object to be polished using an epoxy resin sheet containing spherical silica particles with an average particle size of 1 μm as an interlayer insulating material. However, it was found that the polishing rate increased (while increasing), and that the polishing slurry containing silica particles having an average particle diameter of 0.5 μm or less reduced the surface roughness (improved flatness).

(実験例2)
実験例1で使用したものと同じ被研磨物に対し、実験例1で使用した研磨スラリーNo.8(平均粒子径2.8μm)を使って上記条件下で第一研磨工程を行い、さらにその後に研磨スラリーNo.3(平均粒子径0.20μm)を使って上記条件下で第二研磨工程を行った。結果を下記表に示す。また、研磨前、第一研磨後、および第二研磨後の被研磨物の表面をそれぞれ日立ハイテクフィールディング社製S-4800型走査電子顕微鏡を使って、被研磨物の表面にAu蒸着を施した後、加速電圧5〜10kV、倍率20000倍で撮影した写真を図2〜4に示した。
(Experimental example 2)
For the same object to be polished as that used in Experimental Example 1, the first polishing step was performed under the above conditions using the polishing slurry No. 8 (average particle size 2.8 μm) used in Experimental Example 1, and then after that. The second polishing step was performed under the above conditions using polishing slurry No. 3 (average particle size 0.20 μm). The results are shown in the table below. In addition, the surface of the object to be polished before, after the first polishing, and after the second polishing was Au vapor-deposited on the surface of the object to be polished using an S-4800 scanning electron microscope manufactured by Hitachi High-Tech Fielding. Later, photographs taken at an acceleration voltage of 5 to 10 kV and a magnification of 20000 times are shown in FIGS. 2 to 4.

Figure 2021141213
Figure 2021141213

図3からは、第一研磨工程だけでは表面に凹凸がかなり残っていたことがわかる。そして図4から、第二研磨工程によって平滑な表面が得られていることもわかる。 From FIG. 3, it can be seen that a considerable amount of unevenness remained on the surface only in the first polishing step. It can also be seen from FIG. 4 that a smooth surface is obtained by the second polishing step.

以上の結果から、第一の研磨スラリーが含む研磨粒子の平均粒子径を、層間絶縁材料が含む無機粒子のそれ以上とし、かつ第二の研磨スラリーが含む研磨粒子の平均粒子径をそれ未満とすることで、十分に高速にしかも優れた平坦化を実現できることがわかった。 From the above results, the average particle size of the polishing particles contained in the first polishing slurry is set to be larger than that of the inorganic particles contained in the interlayer insulating material, and the average particle size of the polishing particles contained in the second polishing slurry is set to be smaller than that. It was found that by doing so, it was possible to achieve sufficiently high speed and excellent flattening.

Claims (6)

半導体パッケージ基板を研磨する方法であって、
基板上に、無機粒子と樹脂材料とからなる無機有機混合樹脂シートとして層間絶縁材料を適用する工程と、
前記無機粒子の平均粒子径と等しいかまたは大きい平均粒子径を有する第一の研磨粒子と、分散剤とを含んだ第一の研磨スラリーを調製する工程と、
前記無機粒子の平均粒子径よりも小さい平均粒子径を有する第二の研磨粒子と、分散剤とを含んだ第二の研磨スラリーを調製する工程と、
前記層間絶縁材料を、前記第一の研磨スラリーで研磨する工程と、
前記第一の研磨スラリーで研磨された前記層間絶縁材料を、前記第二の研磨スラリーでさらに研磨する工程と
を含む、方法。
It is a method of polishing a semiconductor package substrate.
A process of applying an interlayer insulating material as an inorganic-organic mixed resin sheet composed of inorganic particles and a resin material on a substrate, and
A step of preparing a first polishing slurry containing a first polishing particle having an average particle size equal to or larger than the average particle size of the inorganic particles and a dispersant, and a step of preparing the first polishing slurry.
A step of preparing a second polishing slurry containing a second polishing particle having an average particle size smaller than the average particle size of the inorganic particles and a dispersant, and a step of preparing the second polishing slurry.
The step of polishing the interlayer insulating material with the first polishing slurry and
A method comprising a step of further polishing the interlayer insulating material polished with the first polishing slurry with the second polishing slurry.
前記無機有機混合樹脂シートにおける前記無機粒子の含有量が、80〜90質量%であることを特徴とする、請求項1に記載の方法。 The method according to claim 1, wherein the content of the inorganic particles in the inorganic-organic mixed resin sheet is 80 to 90% by mass. 前記無機有機混合樹脂シートが、無機粒子としてシリカ粒子を、樹脂材料としてエポキシ樹脂を含み、
前記第一の研磨スラリーおよび前記第二の研磨スラリーの一方もしくは両方が、研磨粒子としてシリカ粒子を、分散剤として硝酸を含む
ことを特徴とする、請求項1または2に記載の方法。
The inorganic-organic mixed resin sheet contains silica particles as inorganic particles and an epoxy resin as a resin material.
The method according to claim 1 or 2, wherein one or both of the first polishing slurry and the second polishing slurry contain silica particles as polishing particles and nitric acid as a dispersant.
前記無機有機混合樹脂シートが含む前記無機粒子の平均粒子径Psに対して、前記第一の研磨スラリーが含む前記第一の研磨粒子の平均粒子径P1が、P1≧2Psを満たし、
前記第二の研磨スラリーが含む前記第二の研磨粒子の平均粒子径P2が、P2≦0.5Psを満たす
ことを特徴とする、請求項1〜3のいずれか一項に記載の方法。
The average particle size P1 of the first polishing particles contained in the first polishing slurry satisfies P1 ≧ 2Ps with respect to the average particle size Ps of the inorganic particles contained in the inorganic-organic mixed resin sheet.
The method according to any one of claims 1 to 3, wherein the average particle size P2 of the second polishing particles contained in the second polishing slurry satisfies P2 ≦ 0.5 Ps.
前記無機有機混合樹脂シートが含む前記無機粒子の平均粒子径Psが、Ps = 0.5〜1.5μmであることを特徴とする、請求項1〜4のいずれか一項に記載の方法。 The method according to any one of claims 1 to 4, wherein the average particle diameter Ps of the inorganic particles contained in the inorganic-organic mixed resin sheet is Ps = 0.5 to 1.5 μm. 前記第一の研磨スラリーおよび前記第二の研磨スラリーの少なくとも一方がさらにpH調整剤を含むことにより、pHが6.5〜7.5であることを特徴とする、請求項1〜5のいずれか一項に記載の方法。 The first polishing slurry and at least one of the second polishing slurries further contain a pH adjuster, so that the pH is 6.5 to 7.5, according to any one of claims 1 to 5. The method described.
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