JP2017123408A - Wiring board and manufacturing method of the same - Google Patents

Wiring board and manufacturing method of the same Download PDF

Info

Publication number
JP2017123408A
JP2017123408A JP2016002008A JP2016002008A JP2017123408A JP 2017123408 A JP2017123408 A JP 2017123408A JP 2016002008 A JP2016002008 A JP 2016002008A JP 2016002008 A JP2016002008 A JP 2016002008A JP 2017123408 A JP2017123408 A JP 2017123408A
Authority
JP
Japan
Prior art keywords
wiring
substrate body
wiring board
bump
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016002008A
Other languages
Japanese (ja)
Inventor
田中 直樹
Naoki Tanaka
直樹 田中
吉田 美隆
Yoshitaka Yoshida
美隆 吉田
浅野 俊哉
Toshiya Asano
俊哉 浅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2016002008A priority Critical patent/JP2017123408A/en
Publication of JP2017123408A publication Critical patent/JP2017123408A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board and a manufacturing method capable of successfully manufacturing the wiring board, which do not cause conduction failure, plating failure, print drop, print bleed and the like occurring in the past and is less likely to cause deterioration in impedance characteristics even when surface wiring along a surface of a substrate body composed of an insulating material and a comparatively thick bump on an end of the surface wiring are formed on a surface side of the substrate body.SOLUTION: A wiring board 1a-1c includes: a substrate body 2 which is composed of ceramic (insulating material) c1, c2 and has a pair of opposite surfaces 3, 4; surface wiring 10a which is embedded in the substrate body 2 on the side of one surface 3 and has a top face 11 flush with the surface 3 and has a belt-like shape in plan view; and a bump 20 formed over on the surface 3 and on at least one end of the surface wiring 10a in a longer direction, in which an end face of the surface wiring 10a on the end is an inclined surface composed of a curved surface 15 which is convex from the surface 3 toward the deep side in side view in a direction parallel with the surface 3.SELECTED DRAWING: Figure 2

Description

本発明は、セラミックなどの絶縁材からなる基板本体の表面側に引き回し用の表面配線および該表面配線の端部上にバンプを有する配線基板、および該配線基板の製造方法に関する。   The present invention relates to a surface wiring for routing on the surface side of a substrate body made of an insulating material such as ceramic, a wiring board having bumps on end portions of the surface wiring, and a method for manufacturing the wiring board.

例えば、セラミックからなる基体の表面に沿ったメタライズ配線およびその一端に接続した同じ厚みである下層のメタライズ層(両者を併せて表面配線に相当)を形成し、かかる下層のメタライズ層の上に電子部品支持台となる上層のメタライズ層(バンプに相当)を形成すると共に、該上層のメタライズ層の上方にロウ材を介して、電子部品の一端側を接合して搭載可能とした電子部品収納用パッケージが提案されている(例えば、特許文献1参照)。   For example, a metallized wiring along the surface of a ceramic substrate and a lower metallized layer having the same thickness connected to one end thereof (both are equivalent to a surface wiring) are formed, and electrons are formed on the lower metallized layer. For electronic component storage that forms an upper metallization layer (corresponding to a bump) that serves as a component support base and that can be mounted by joining one end of the electronic component via a brazing material above the upper metallization layer A package has been proposed (see, for example, Patent Document 1).

また、特許文献1に記載された前記電子部品収納用パッケージのように、絶縁材からなる表面上に一定の厚みを有し、且つ所要の引き回し用のパターンによる表面配線を形成し、該表面配線の長手方向と垂直な一端面側の上に、かかる一端面を覆うように前記表面配線よりも厚肉のバンプを形成し、該バンプの上方にロウ材を介して電子部品を搭載するようにした配線基板も提供されている。
しかし、上記のような表面配線の一端面の上にバンプを重ねて形成した場合、該表面配線の一端面とバンプの底部との隙間が形成され、電流の導通不良や、これに起因して表面配線およびバンプの表面に対する電解金属メッキが施せなくなると共に、表面配線の長手方向と垂直な端面に電流が反射するため、インピーダンス特性が悪化するなどの不具合を招くことがあった。
更に、製造時において、絶縁材の表面に導電性ペーストにより、表面配線と、これよりも厚肉のバンプとを重ねて印刷形成するため、該バンプを複数回にわたり重ね印刷した際に、上記導電性ペーストの一部が印刷ダレや、印刷ニジミなどを生じて、所定の形状から該導電性ペーストの一部が外側に突出する場合もあった。かかる突出部が生じると、不用意な短絡を招いたり、追って電子部品の搭載時における画像処理作業の障害になり得る、などの問題点があった。
Further, like the electronic component storage package described in Patent Document 1, a surface wiring having a predetermined thickness on a surface made of an insulating material and having a required routing pattern is formed. A bump that is thicker than the surface wiring is formed on one end surface side perpendicular to the longitudinal direction so as to cover the one end surface, and an electronic component is mounted on the bump via a brazing material. A wiring board is also provided.
However, when bumps are formed on one end surface of the surface wiring as described above, a gap is formed between the one end surface of the surface wiring and the bottom of the bump, resulting in poor current conduction. Electrolytic metal plating cannot be applied to the surface wiring and the surface of the bump, and current is reflected on the end face perpendicular to the longitudinal direction of the surface wiring, which may lead to problems such as deterioration of impedance characteristics.
Furthermore, since the surface wiring and bumps thicker than this are overprinted and formed on the surface of the insulating material by conductive paste on the surface of the insulating material at the time of manufacture, when the bumps are overprinted several times, the above conductive In some cases, a part of the conductive paste causes printing sagging, printing blurring, and the like, and a part of the conductive paste protrudes outward from a predetermined shape. When such a protruding portion occurs, there is a problem that an inadvertent short circuit is caused or an image processing operation can be hindered when an electronic component is mounted.

特開2003−243554号公報(第1〜5頁、図1,2)JP 2003-243554 A (pages 1 to 5, FIGS. 1 and 2)

本発明は、背景技術で説明した問題点を解決し、絶縁材からなる基板本体の表面側に、該表面に沿った表面配線とその一端部の上に比較的厚肉のバンプとを形成しても、前述した導通不良、メッキ不良、印刷ダレ、印刷ニジミなどが生じず、且つインピーダンス特性も低下しにくい配線基板、およびかかる配線基板を確実に製造できる製造方法を提供する、ことを課題とする。   The present invention solves the problems described in the background art, and forms a surface wiring along the surface and a relatively thick bump on one end of the surface of the substrate body made of an insulating material. However, it is an object to provide a wiring board that does not cause the above-described conduction failure, plating failure, printing sagging, printing blur, and the like, and that impedance characteristics are not easily lowered, and a manufacturing method that can reliably manufacture such a wiring board. To do.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明は、前記課題を解決するため、前記表面配線をその上面が絶縁基板の表面と面一状となるように該絶縁基板の表面に埋設すると共に、該表面配線の端面を電流が反射し難い傾斜面とする、ことに着想して成されたものである。
即ち、本発明の配線基板(請求項1)は、絶縁材からなり、対向する一対の表面を有する基板本体と、該基板本体における少なくとも一方の表面側に埋設され、該表面と上面が面一状となり且つ平面視が帯状の表面配線と、上記一方の表面の上および上記表面配線の長手方向における少なくとも一方の端部の上に跨って形成されたバンプと、を含む配線基板であって、上記表面配線の端部における端面は、上記一方の表面に平行な方向の側面視で該表面から奥側に凸の曲面、および、該表面配線の上面と該端面との成す角度が鋭角となるように傾斜した平坦面の少なくとも一方からなる傾斜面である、ことを特徴とする。尚、上記表面配線の上面と、上記曲面からなる端面のうち前記上面側の接線との成す角度も鋭角である。
In order to solve the above problems, the present invention embeds the surface wiring on the surface of the insulating substrate so that the upper surface of the surface wiring is flush with the surface of the insulating substrate, and the current reflects the end surface of the surface wiring. It was made with the idea of making it a difficult slope.
That is, the wiring board of the present invention (Claim 1) is made of an insulating material and is embedded in a substrate body having a pair of opposing surfaces and at least one surface side of the substrate body, and the surface and the upper surface are flush with each other. A wiring board including a surface wiring having a band shape in plan view and a bump formed over at least one end in the longitudinal direction of the one surface and the surface wiring, The end surface of the end portion of the surface wiring has a curved surface convex from the surface to the back side in a direction parallel to the one surface, and an angle formed by the upper surface of the surface wiring and the end surface is an acute angle. Thus, it is an inclined surface composed of at least one of the inclined flat surfaces. The angle formed between the upper surface of the surface wiring and the tangent on the upper surface side of the end surface formed of the curved surface is also an acute angle.

前記配線基板によれば、以下の効果(1)〜(3)を得ることが可能である。
(1)前記表面配線が、基板本体における少なくとも一方の表面側に埋設され、且つ該表面と該表面配線の上面とが面一状となっているため、上記表面配線とバンプとの間に隙間が形成されにくいので、前述した導通不良や、メッキ不良を皆無にできる。
(2)前記曲面からなる傾斜面や、傾斜した平坦面からなる傾斜面などと、前記表面配線の上面と該端面との成す角度が鋭角であるので、表面配線の長手方向に沿った電流の反射が生じにくくなり、インピーダンス特性の低下を抑制できる。
(3)表面配線が基板本体の表面上に突出せず、且つバンプの厚みを低減し易くなるので、該バンプ上に電子部品を搭載する際の画像処理に支障を生じにくくできると共に、前記電子部品を搭載するためのスペースの確保が容易となる。
According to the wiring board, the following effects (1) to (3) can be obtained.
(1) Since the surface wiring is embedded in at least one surface side of the substrate body, and the surface and the upper surface of the surface wiring are flush with each other, there is a gap between the surface wiring and the bump. Therefore, it is possible to eliminate the above-described conduction failure and plating failure.
(2) Since the angle formed between the inclined surface formed of the curved surface, the inclined surface formed of an inclined flat surface, and the upper surface of the surface wiring and the end surface is an acute angle, the current along the longitudinal direction of the surface wiring is Reflection is less likely to occur, and a decrease in impedance characteristics can be suppressed.
(3) Since the surface wiring does not protrude on the surface of the substrate main body and the thickness of the bumps can be easily reduced, it is difficult to cause trouble in image processing when electronic components are mounted on the bumps. It is easy to secure a space for mounting components.

尚、前記基板本体を構成する絶縁材は、セラミック(アルミナなどの高温焼成セラミックまたはガラス−セラミックなどの低温焼成セラミック)、あるいはエポキシなどの樹脂である。該絶縁材は、1層のセラミック層または樹脂層のほか、複数のセラミック層または樹脂層を積層した多層基板を形成するものでも良い。
また、前記「対向する一対の表面」とは、相対的な呼称であり、例えば、一方を表面と称し且つ他方を裏面と称することもできる。
更に、前記表面配線およびバンプは、前記絶縁材が高温焼成セラミックの場合には、例えば、タングステン(W)、またはモリブデン(Mo)などが適用され、前記絶縁材が低温焼成セラミックや前記樹脂の場合には、例えば、銀(Ag)または銅(Cu)などが適用される。
また、前記表面配線は、前記基板本体の少なくとも表面側のセラミック層または樹脂層を貫通するビア導体、あるいは前記基板本体の側面に形成された側面導体(凹形導体)と導通されている。かかる表面配線は、その両端部の上ごとに跨って前記バンプが個別に形成されていても良い。
The insulating material constituting the substrate body is ceramic (high-temperature fired ceramic such as alumina or low-temperature fired ceramic such as glass-ceramic), or resin such as epoxy. The insulating material may form a multilayer substrate in which a plurality of ceramic layers or resin layers are laminated in addition to a single ceramic layer or resin layer.
In addition, the “a pair of opposing surfaces” is a relative designation, and for example, one can be referred to as a front surface and the other as a back surface.
Further, when the insulating material is a high-temperature fired ceramic, for example, tungsten (W) or molybdenum (Mo) is applied to the surface wiring and bumps, and the insulating material is a low-temperature fired ceramic or the resin. For example, silver (Ag) or copper (Cu) is applied.
The surface wiring is electrically connected to a via conductor that penetrates at least a ceramic layer or a resin layer on the surface side of the substrate body, or a side conductor (concave conductor) formed on a side surface of the substrate body. The bumps may be individually formed across the upper ends of the surface wiring.

更に、前記「面一状」とは、前記基板本体の表面の高さに対して、表面配線の上面の高さが±5μm以下であることを意味するものである。
また、前記「奥側」とは、前記基板本体における一方の表面に対し直交する垂直方向の視覚において、前記表面から離れて行く上記基板本体の最深部側(他方の表面側)を指す。
更に、前記基板本体の端面には、前記曲面と前記平坦面とを組み合わせた複合面、互いに半径が異なる複数の前記曲面を組み合わせた複合面、あるいは、互いに表面配線の上面との間で成す角度が相違する複数の平坦面を組み合わせた複合面も含まれる。これらの形態による端面は、3次元の曲面もしくは複合面となる。
加えて、前記基板本体の表面には、該表面の周辺に沿って立設された絶縁材からなる側壁に囲まれたキャビティの底面も含まれる。かかるキャビティは、上記基板本体における一対の表面の双方に個別に形成されていても良い。
Further, the “flat surface” means that the height of the upper surface of the surface wiring is ± 5 μm or less with respect to the height of the surface of the substrate body.
Further, the “back side” refers to the deepest side (the other surface side) of the substrate main body that is away from the surface in the visual perception perpendicular to the one surface of the substrate main body.
Further, the end surface of the substrate body has a composite surface combining the curved surface and the flat surface, a composite surface combining a plurality of curved surfaces having different radii, or an angle formed between the top surfaces of the surface wirings. A composite surface combining a plurality of flat surfaces having different values is also included. The end surfaces according to these forms are three-dimensional curved surfaces or composite surfaces.
In addition, the surface of the substrate body also includes a bottom surface of a cavity surrounded by a side wall made of an insulating material standing along the periphery of the surface. Such cavities may be individually formed on both of the pair of surfaces of the substrate body.

また、本発明には、前記バンプの底面は、その一部の辺が平面視で前記表面配線の端部における端面と重複している、配線基板(請求項2)も含まれる。
上記配線基板によれば、前記端面の傾斜面と、前記表面配線の上面との成す角度が鋭角に保たれ、且つ前記側面視で表面配線の端面がバンプの底部から外側に突出せず、表面配線内を流れる電流が該表面配線の端面で反射を生じず、スムーズにバンプ側に流されるので、前記効果(2)を確実に奏することができる。
更に、前記表面配線とバンプとの平面視における配置を、比較的狭いスペースで行うことが容易となり、配線基板の小型化に寄与し得る(効果(4))。
Further, the present invention includes a wiring board (Claim 2) in which a part of the bottom surface of the bump overlaps with an end surface at an end of the surface wiring in a plan view.
According to the above wiring board, the angle formed between the inclined surface of the end surface and the top surface of the surface wiring is maintained at an acute angle, and the end surface of the surface wiring does not protrude outward from the bottom of the bump in the side view, Since the current flowing in the wiring does not cause reflection at the end surface of the surface wiring and flows smoothly to the bump side, the effect (2) can be reliably achieved.
Furthermore, the arrangement of the surface wiring and the bump in a plan view can be easily performed in a relatively narrow space, which can contribute to the miniaturization of the wiring board (effect (4)).

更に、本発明には、前記表面配線の少なくとも端部は、その長手方向と直交する断面において、前記基板本体における少なくとも一方の表面と平行状の底面と、該底面の両側に位置する側面とを有し、かかる側面は、上記断面視において、上記基板本体の表面から奥側に凸の曲面、および、該表面配線の上面と該側面との成す角度が鋭角となるように傾斜した平坦面の少なくとも一方からなる傾斜面である、配線基板(請求項3)も含まれる。
上記配線基板によれば、前記表面配線の端部における長手方向と直交する幅方向においても、電流の反射が生じにくくなるので、前記効果(2)を一層顕著に奏することが可能となる。
尚、前記表面配線は、その端面と両側の側面とを断面形状が同じか近似する曲面、あるいは前記傾斜した平坦面によって互いに連続させた形態としても良い。
Further, in the present invention, at least an end portion of the surface wiring includes a bottom surface parallel to at least one surface of the substrate body and side surfaces located on both sides of the bottom surface in a cross section orthogonal to the longitudinal direction. The side surface includes a curved surface that protrudes from the surface of the substrate body to the back side in the cross-sectional view, and a flat surface that is inclined so that an angle formed between the upper surface of the surface wiring and the side surface is an acute angle. The wiring board (Claim 3), which is an inclined surface composed of at least one, is also included.
According to the above wiring board, since the current is hardly reflected even in the width direction orthogonal to the longitudinal direction at the end portion of the surface wiring, the effect (2) can be more remarkably exhibited.
The surface wiring may have a form in which the end surface and the side surfaces on both sides are continuous with each other by a curved surface having the same or approximate cross-sectional shape or the inclined flat surface.

加えて、本発明には、前記表面配線の端部は、平面視において該表面配線の外側に凸の半円形状、あるいは半楕円形の上面を有している、配線基板(請求項4)も含まれる。
上記配線基板によれば、前記表面配線の端部が平面視で外側に凸の半円形状、あるいは半楕円形の上面を有するため、該表面配線の端面が3次元で4分の1の球形状となるので、前記効果(2)を一層顕著で且つ確実に奏することができる。例えば、前記表面配線の端面と両側の側面とを、断面形状が同じか酷似する曲面によって互いに連続させた形態とすることにより、前記インピーダンス特性の低下を最小限に抑えることが可能となる。
In addition, according to the present invention, the end portion of the surface wiring has a convex semicircular or semi-elliptical upper surface outside the surface wiring in a plan view (Claim 4). Is also included.
According to the above wiring board, since the end portion of the surface wiring has a semicircular or semi-elliptical upper surface that protrudes outward in plan view, the end surface of the surface wiring is a three-dimensional one-fourth sphere. Since it becomes a shape, the effect (2) can be achieved more remarkably and reliably. For example, the deterioration of the impedance characteristic can be suppressed to a minimum by adopting a form in which the end surface of the surface wiring and the side surfaces on both sides are made continuous with each other by curved surfaces having the same or very similar cross-sectional shape.

一方、本発明による配線基板の製造方法(請求項5)は、絶縁材からなり、対向する一対の表面を有する基板本体と、該基板本体における少なくとも一方の表面側に埋設され、該表面と上面が面一状となり且つ平面視が帯状の表面配線と、上記一方の表面の上および上記表面配線の長手方向における少なくとも一方の端部の上に跨って形成されたバンプと、を含む配線基板の製造方法であって、追って前記基板本体の表面を構成する絶縁シートの表面に、該表面に沿った凹溝を形成する工程と、該凹溝内に導電性ペーストを充填して未焼成の上記表面配線を形成する工程と、上記絶縁シートの表面の上および未焼成の上記表面配線の端部の上に、導電性ペーストを印刷して未焼成のバンプを形成する工程と、を含み、上記凹溝の長手方向における少なくとも一方の端面は、上記絶縁シートの表面と平行な方向に沿った側面視で該表面から奥側に凸の曲面、および、上記凹溝の開口部と上記端面との成す角度が鋭角となるように傾斜した平坦面の少なくとも一方からなる傾斜面である、ことを特徴とする。   On the other hand, a method of manufacturing a wiring board according to the present invention (Claim 5) comprises a substrate body made of an insulating material and having a pair of opposing surfaces, embedded in at least one surface side of the substrate body, and the surface and upper surface. And a bump formed on the one surface and at least one end in the longitudinal direction of the surface wiring. A method of manufacturing, the step of forming a groove along the surface of the insulating sheet constituting the surface of the substrate body later, and filling the conductive paste into the groove and unbaking the above Forming a surface bump, and forming a non-fired bump by printing a conductive paste on the surface of the insulating sheet and on an end of the non-fired surface wire, and In the longitudinal direction of the groove The at least one end surface is a curved surface convex from the surface to the back side in a side view along a direction parallel to the surface of the insulating sheet, and the angle formed by the opening of the groove and the end surface is an acute angle. It is the inclined surface which consists of at least one of the flat surface inclined so that it may become.

前記配線基板の製造方法によれば、少なくとも前記効果(1)〜(3)を奏する配線基板を確実に製造することができる(効果(5))。
尚、前記凹溝を形成する工程は、前記絶縁シートの表面に対して所要形状の金型を押し込む方法、あるいはレーザー照射による溝加工によって行われる。
また、前記凹溝内に導電性ペーストを充填して未焼成の表面配線を形成する工程は、導電性ペーストをスキージによって上記凹溝内に充填する方法、あるいは、ほぼ液状ないし軟質の導電性ペーストをディスぺンサーにより上記凹溝内に注ぎ込む方法によって行われる。
更に、前記未焼成のバンプを形成するための印刷工程は、導電性ペーストをスクリーン印刷、あるいはマスク印刷によって行われる。
また、前記バンプを形成する工程の後には、表面配線およびバンプなどの導体や基板本体の絶縁材を同時に焼成する工程、更に、かかる焼成後に外部に露出する表面配線やバンプなどの表面に金属(ニッケル、金)皮膜を被覆する電解金属メッキ工程が施される。
更に、前記凹溝の開口部とは、前記絶縁シートの表面と面一の仮想面である。
加えて、前記製造方法は、多数個取りの形態で行っても良く、この形態の場合、前記電解金属メッキ工程の後で、個々の配線基板に個片化する工程が行われる。
According to the method for manufacturing a wiring board, it is possible to reliably manufacture a wiring board that exhibits at least the effects (1) to (3) (effect (5)).
In addition, the process of forming the said recessed groove is performed by the method of pushing in the metal mold | die of a required shape with respect to the surface of the said insulating sheet, or the groove process by laser irradiation.
Further, the step of filling the concave groove with the conductive paste to form the unfired surface wiring may be performed by a method of filling the concave groove with the conductive paste with a squeegee, or a substantially liquid or soft conductive paste. Is carried out by a method of pouring into the concave groove with a dispenser.
Further, the printing process for forming the unfired bump is performed by screen printing or mask printing of a conductive paste.
Further, after the step of forming the bump, a step of simultaneously firing the surface wiring and the conductor such as the bump and the insulating material of the substrate body, and further, a metal (on the surface of the surface wiring and the bump exposed to the outside after the firing ( An electrolytic metal plating process for coating the (nickel, gold) film is performed.
Furthermore, the opening of the concave groove is a virtual surface that is flush with the surface of the insulating sheet.
In addition, the manufacturing method may be performed in a multi-cavity form, and in this case, after the electrolytic metal plating process, a process of dividing into individual wiring boards is performed.

(A)〜(C)は本発明による配線基板の形態を示す概略断面図。(A)-(C) are schematic sectional drawings which show the form of the wiring board by this invention. (A)は図1(A)中の一点鎖線部分Xの部分拡大断面図、(B)は(A)中のY−Y線に沿った矢視の部分断面図。(A) is the elements on larger scale of the dashed-dotted line part X in FIG. 1 (A), (B) is the fragmentary sectional view of the arrow along the YY line in (A). (A)は上記配線基板におけるバンプ付近の部分平面図、(B)は異なる形態のバンプ付近を示す部分平面図。(A) is a partial plan view near the bump in the wiring board, (B) is a partial plan view showing the vicinity of the bump in a different form. (A),(B)はバンプの形成工程を示す斜視図。(A), (B) is a perspective view which shows the formation process of bump. (A)は上前記配線基板におけるバンプ付近の部分断面図、(B)は(A)中のY−Y線に沿った矢視の部分断面図。(A) is a fragmentary sectional view near the bump in the upper wiring board, and (B) is a fragmentary sectional view taken along the line YY in (A). (A)〜(D)は表面配線とバンプの製造工程を示す概略断面図。(A)-(D) are schematic sectional drawings which show the manufacturing process of surface wiring and a bump. (A)〜(D)は前記バンプ付近の形態を示す概略断面図。(A)-(D) are schematic sectional drawing which shows the form of the said bump vicinity. (A)〜(D)は前記バンプ付近の異なる形態を示す概略断面図。(A)-(D) are schematic sectional drawing which shows the different form of the said bump vicinity. (A)〜(C)は、図8の各形態の平面図、(D)は(C)中のZ−Z線に沿った矢視の部分断面図。(A)-(C) are top views of each form of FIG. 8, (D) is a fragmentary sectional view of the arrow along the ZZ line in (C).

以下において、本発明を実施するための形態について説明する。
図1(A)〜(C)は、互いに異なる形態の配線基板1a〜1cを示す断面図である。
上記配線基板1aは、図1(A)に示すように、セラミック(絶縁材)層c1,c2からなり、対向する一対の表面3および裏面(表面)4を有する基板本体2と、該基板本体2の前記表面3側に埋設され、該表面3と上面11が面一状となり且つ平面視が帯状である複数の表面配線10aと、上記表面3の上および表面配線10aごとの長手方向の一端部の上に跨って形成されたバンプ20と、を備えている。上記表面配線10aには、基板本体2のセラミック層c1を貫通するビア導体9の上端部が接続され、該ビア導体9、セラミック層c1,c2間の配線層、およびセラミック層c2を貫通する別のビア導体を介して、基板本体2の裏面4側に形成された複数の接続端子(何れも図示せず)と電気的に導通可能とされている。上記複数のバンプ20の上には、図示しないロウ材を介して、半導体素子やICチップなどの電子部品22が追って搭載される。
Hereinafter, modes for carrying out the present invention will be described.
1A to 1C are cross-sectional views showing wiring boards 1a to 1c having different forms.
As shown in FIG. 1A, the wiring board 1a is composed of ceramic (insulating material) layers c1 and c2, and has a substrate body 2 having a pair of front surface 3 and back surface (front surface) 4, and the substrate body. A plurality of surface wirings 10a embedded in the surface 3 side of the surface 2, the surface 3 and the upper surface 11 being flush with each other and having a band shape in plan view, and one longitudinal end of each surface wiring 10a on the surface 3 And a bump 20 formed over the portion. An upper end portion of a via conductor 9 that penetrates the ceramic layer c1 of the substrate body 2 is connected to the surface wiring 10a, and another wiring that penetrates the via conductor 9, the wiring layer between the ceramic layers c1 and c2, and the ceramic layer c2. The plurality of connection terminals (none of which are shown) formed on the back surface 4 side of the substrate body 2 can be electrically connected through the via conductors. An electronic component 22 such as a semiconductor element or an IC chip is mounted on the plurality of bumps 20 via a brazing material (not shown).

尚、前記セラミック層c1,c2は、アルミナなどの高温焼成セラミック、あるいはガラス−セラミックなどの低温焼成セラミックからなり、前者の場合には、前記表面配線10a、バンプ20、およびビア導体9などの導体は、WあるいはMoにより形成され、後者の場合には、CuあるいはAgにより形成されている。
また、図1(B)に示す配線基板1bは、前記同様の基板本体2と、該基板本体2の表面3の周辺に沿って突設され且つ平面視が矩形枠状の側壁5aと、該側壁5aの内壁面7aと上記表面3とに囲まれたキャビティ6aとを備え、該キャビティ6aの底面でもある基板本体2の表面3側に、前記同様の複数の表面配線10aと、これらの端部ごとの上および表面3の上に跨って形成された前記同様のバンプ20とを有している。上記側壁5aは、平面視が矩形枠状のセラミック層c3,c4を積層したもので、その上面8aには、複数の上記バンプ20上に追って搭載される電子部品22を含む上記キャビティ6a内を封止する際に用いるメタライズ層(図示せず)が形成されている。
The ceramic layers c1 and c2 are made of high-temperature fired ceramic such as alumina, or low-temperature fired ceramic such as glass-ceramic. In the former case, conductors such as the surface wiring 10a, bumps 20, and via conductors 9 are used. Is formed of W or Mo, and in the latter case, is formed of Cu or Ag.
Further, a wiring board 1b shown in FIG. 1B includes a board body 2 similar to the above, a side wall 5a that protrudes along the periphery of the surface 3 of the board body 2 and has a rectangular frame shape in plan view, A cavity 6a surrounded by an inner wall surface 7a of the side wall 5a and the surface 3 is provided, and on the surface 3 side of the substrate body 2 which is also the bottom surface of the cavity 6a, a plurality of the same surface wirings 10a and ends thereof are provided. Bumps 20 similar to those described above are formed over each part and over the surface 3. The side wall 5a is formed by laminating ceramic layers c3 and c4 having a rectangular frame shape in plan view, and the upper surface 8a includes the inside of the cavity 6a including the electronic components 22 mounted on the bumps 20 in succession. A metallized layer (not shown) used for sealing is formed.

更に、図1(C)に示す配線基板1cは、前記同様の基板本体2と、該基板本体2の裏面(表面)4の周辺に沿って突設され且つ平面視が矩形枠状の側壁5bと、該側壁5bの内壁面7bと上記裏面4とに囲まれたキャビティ6bとを備え、該キャビティ6bの天井面でもある基板本体2の裏面4側に、前記同様の複数の表面配線10aと、これらの端部ごとの下(上)および裏面4の下(上)に跨って形成された複数のバンプ20とを有している。上記側壁5bは、平面視が矩形枠状のセラミック層c5からなり、その底面8bには、複数の上記バンプ20上に追って搭載される電子部品22と導通する接続端子(図示せず)が形成されている。   Further, a wiring board 1c shown in FIG. 1C is provided so as to protrude along the periphery of the same substrate body 2 and the back surface (front surface) 4 of the substrate body 2, and the side wall 5b having a rectangular frame shape in plan view. And a cavity 6b surrounded by the inner wall surface 7b of the side wall 5b and the back surface 4, and a plurality of surface wirings 10a similar to the above on the back surface 4 side of the substrate body 2 which is also the ceiling surface of the cavity 6b. And a plurality of bumps 20 formed so as to straddle the bottom (upper) of each end portion and the lower (upper) of the back surface 4. The side wall 5b is composed of a ceramic layer c5 having a rectangular frame shape in plan view, and a connection terminal (not shown) that is electrically connected to the electronic components 22 mounted on the plurality of bumps 20 is formed on the bottom surface 8b. Has been.

図2(A)は、図1(A)中の一点鎖線部分Xの部分拡大図、図2(B)は、図2(A)中におけるY−Y線の矢視に沿った断面図、図3(A)は、図2(A)の平面図である。
前記表面配線10aの長手方向の端部における端面は、図2(A)に示すように、前記表面配線10aの長手方向と直交し、且つ前記基板本体2の表面3に平行な方向(視覚)の側面視で、該表面3から基板本体2を構成するセラミック層c1の奥側に凸となる曲面15からなり、該曲面15の表面3側の接線と、当該表面配線10aの上面11との成す角度θaは、鋭角である。図2(A)および図3(A)に示すように、上記曲面15は、上記側面視における半径が一定であり、全体として半カマボコ形状を呈している。
更に、図2(B)に示すように、前記表面配線10aの長手方向に沿った底面12の両側には、該表面配線10aの上面11との成す角度θbが鋭角となるように傾斜した平坦面13からなる傾斜面である左右一対の側面が対称に位置している。尚、かかる側面は、該表面配線10aの上面11と直交する垂直面であっても良い。
2A is a partially enlarged view of the alternate long and short dash line portion X in FIG. 1A, FIG. 2B is a cross-sectional view taken along the line YY in FIG. 2A, FIG. 3A is a plan view of FIG.
As shown in FIG. 2 (A), the end surface of the surface wiring 10a in the longitudinal direction is perpendicular to the longitudinal direction of the surface wiring 10a and parallel to the surface 3 of the substrate body 2 (sight). , A curved surface 15 that protrudes from the surface 3 to the back side of the ceramic layer c1 constituting the substrate body 2, and a tangent on the surface 3 side of the curved surface 15 and an upper surface 11 of the surface wiring 10a. The formed angle θa is an acute angle. As shown in FIGS. 2 (A) and 3 (A), the curved surface 15 has a constant radius in the side view and has a semi-cylindrical shape as a whole.
Further, as shown in FIG. 2B, on both sides of the bottom surface 12 along the longitudinal direction of the surface wiring 10a, a flat surface is inclined so that the angle θb formed with the top surface 11 of the surface wiring 10a is an acute angle. A pair of left and right side surfaces, which are inclined surfaces composed of the surface 13, are positioned symmetrically. The side surface may be a vertical surface orthogonal to the upper surface 11 of the surface wiring 10a.

以上のような表面配線10aとバンプ20との組み立ては、図4(A)に示すように、予め、前記基板本体2の表面3側に上面11が面一状とされ、且つ平面視が帯状を呈し、一端部に前記曲面15からなる傾斜面を有すると共に、長手方向の両側に前記傾斜した平坦面13からなる側面を有する表面配線10aを所定の位置に形成しておく。次いで、図4(A)中の白抜き矢印で示すように、基板本体2の表面3の上および表面配線10aの長手方向の端部の上に跨って、全体が扁平な箱形状(直方体)を呈するバンプ20を、導電性ペーストのスクリーン印刷などによって形成する。その結果、図4(B)の上部側を透視可能とした斜視図で示すように、表面配線10aの長手方向の前記曲面15からなる端部を、底面の中央付近とした箱形状のバンプ20が、当該表面配線10aと電気的に導通可能に接続される。   As shown in FIG. 4A, the assembly of the surface wiring 10a and the bump 20 as described above is performed in advance so that the upper surface 11 is flush with the surface 3 side of the substrate body 2 and the plan view is a band shape. A surface wiring 10a having an inclined surface made of the curved surface 15 at one end and side surfaces made of the inclined flat surface 13 on both sides in the longitudinal direction is formed in a predetermined position. Next, as indicated by a hollow arrow in FIG. 4A, a box shape (a rectangular parallelepiped) that is entirely flat across the top surface 3 of the substrate body 2 and the end portion in the longitudinal direction of the surface wiring 10a. The bumps 20 exhibiting the above are formed by screen printing of a conductive paste or the like. As a result, as shown in a perspective view in which the upper side of FIG. 4B can be seen through, the box-shaped bump 20 having the end portion made of the curved surface 15 in the longitudinal direction of the surface wiring 10a near the center of the bottom surface. Is electrically connected to the surface wiring 10a.

また、前記バンプ20に替えて、図3(B)に示すように、前記基板本体2の表面3の上および表面配線10aの長手方向の端部の上に跨って、平面視が円形で且つ全体が円盤形状のパンプ21を形成し、上記表面配線10aの長手方向の前記曲面15からなる端部を、上記パンプ21の底面の中間に位置させても良い。
更に、前記表面配線10aに替えて、図5(A),(B)に示すように、前記同様の上面11と、前記曲面15からなる傾斜面の端面とを有すると共に、長手方向に沿った両側に、基板本体2の表面3からセラミック層c1の奥側に凸となる一対の曲面14からなり、該曲面14の表面3側の接線と、上面11との成す角度θbが鋭角である左右一対の傾斜面からなる側面と、を有する表面配線10bを用いると共に、該表面配線10bの上方に前記バンプ20を形成しても良い。
尚、前記バンプ20に替えて、該表面配線10bの端部の上および前記基板本体2の表面3の上に跨って、前記バンプ21を形成しても良い。
Further, in place of the bump 20, as shown in FIG. 3B, the planar view is circular over the surface 3 of the substrate body 2 and the end portion in the longitudinal direction of the surface wiring 10a. A pump 21 having a disk shape as a whole may be formed, and an end portion made of the curved surface 15 in the longitudinal direction of the surface wiring 10 a may be positioned in the middle of the bottom surface of the pump 21.
Further, in place of the surface wiring 10a, as shown in FIGS. 5A and 5B, the upper surface 11 similar to the above and an end surface of the inclined surface made of the curved surface 15 are provided along the longitudinal direction. On both sides, there is a pair of curved surfaces 14 that protrude from the surface 3 of the substrate body 2 to the back side of the ceramic layer c1, and the angle θb formed between the tangent on the surface 3 side of the curved surface 14 and the upper surface 11 is an acute angle. A surface wiring 10b having a pair of inclined surfaces may be used, and the bumps 20 may be formed above the surface wiring 10b.
Instead of the bumps 20, the bumps 21 may be formed across the end portions of the surface wiring 10b and the surface 3 of the substrate body 2.

以上のような表面配線10a,10bおよびバンプ20,21の組合せを、前記基板本体2の表面3および裏面4の少なくとも一方に設けた前記配線基板1a〜1cによれば、以下の効果(1)〜(3)を奏することができる。
(1)前記表面配線10a,10bが、基板本体2の表面3側または裏面4側に埋設され、且つ該表面3および裏面4の少なくとも一方と上面11が面一状となっており、上記表面配線10a,10bの端面15とバンプ20,21との間に隙間が形成されにくいので、前述した導通不良や、メッキ不良を皆無にできる。
(2)前記表面配線10a,10bの端面が前記曲面15からなる傾斜面であり、且つ上記表面配線10a,10bの上面11と該曲面15との成す角度θaが鋭角であると共に、前記上面11と側面13,14の成す角度θbもそれぞれ鋭角となっている。その結果、図2(A),(B)および図5(A),(B)中の模式的な矢印で示すように、表面配線10a,10bの長手方向やほぼ幅方向に沿った電流が端面15付近や側面13,14付近で反射がしにくくなり、インピーダンス特性の低下を一層確実に抑制できる。
(3)表面配線10a,10bが基板本体2の表面3上または裏面4上に突出せず、且つバンプ20,21の厚みを低減し易くなるので、前記基板本体2の表面3および裏面4のバンプ20,21上に電子部品22を搭載する際の画像処理が容易となると共に、搭載すべき電子部品22用のスペースの確保も容易となる。
According to the wiring boards 1a to 1c in which the combination of the surface wirings 10a and 10b and the bumps 20 and 21 as described above is provided on at least one of the front surface 3 and the back surface 4 of the substrate body 2, the following effects (1) (3) can be performed.
(1) The front surface wirings 10a and 10b are embedded in the front surface 3 side or the back surface 4 side of the substrate body 2, and at least one of the front surface 3 and the back surface 4 and the upper surface 11 are flush with each other. Since a gap is not easily formed between the end face 15 of the wirings 10a and 10b and the bumps 20 and 21, the above-described conduction failure and plating failure can be eliminated.
(2) The end surfaces of the surface wirings 10a and 10b are inclined surfaces made of the curved surface 15, the angle θa formed by the upper surface 11 of the surface wirings 10a and 10b and the curved surface 15 is an acute angle, and the upper surface 11 The angle θb formed between the side surfaces 13 and 14 is also an acute angle. As a result, as indicated by the schematic arrows in FIGS. 2 (A), 2 (B) and FIGS. 5 (A), (B), the current along the longitudinal direction and substantially the width direction of the surface wirings 10a, 10b is increased. Reflection is less likely to occur near the end face 15 and the side faces 13 and 14, and the deterioration of impedance characteristics can be more reliably suppressed.
(3) Since the front surface wirings 10a and 10b do not protrude on the front surface 3 or the back surface 4 of the substrate body 2 and the thickness of the bumps 20 and 21 can be easily reduced, the front surface 3 and the back surface 4 of the substrate body 2 can be reduced. Image processing when the electronic component 22 is mounted on the bumps 20 and 21 is facilitated, and a space for the electronic component 22 to be mounted is easily secured.

以下において、本発明による前記配線基板1aの製造方法について説明する。
予め、アルミナを主成分とする2層のセラミックグリーンシート(以下、単にグリーンシートと称する)g1,g2を用意した。図6(A)は、一方のグリーンシートg1の前記表面3側を示す部分断面図である。
次いで、上記グリーンシートg1(g2)の所定の位置に穿孔した複数のビアホール(図示せず)内ごとに、W粉末あるいはMo粉末を導電性ペースト(図示せず)を充填して未焼成のビア導体9(図示せず)を形成した。
次に、上記ビア導体9を含む上記グリーンシートg1(g2)の表面3における所定の位置に対し、一端側が前記同様の曲面26あるいは前記同様に傾斜した平坦面27の傾斜面に倣った形状の金型を、下向きに一定の深さで押し込んだ。
Below, the manufacturing method of the said wiring board 1a by this invention is demonstrated.
In advance, two-layer ceramic green sheets (hereinafter simply referred to as green sheets) g1 and g2 mainly composed of alumina were prepared. FIG. 6A is a partial cross-sectional view showing the surface 3 side of one green sheet g1.
Next, in each of a plurality of via holes (not shown) drilled at predetermined positions of the green sheet g1 (g2), a W paste or a Mo powder is filled with a conductive paste (not shown) to form an unfired via. A conductor 9 (not shown) was formed.
Next, with respect to a predetermined position on the surface 3 of the green sheet g1 (g2) including the via conductor 9, one end side has a shape following the inclined surface of the curved surface 26 or the inclined flat surface 27 similarly inclined. The mold was pushed downward at a certain depth.

その結果、図6(B)に示すように、一端に上記曲面26あるいは平坦面27の傾斜面を有し、平坦な底面25および前記平坦面13あるいは曲面14と相似形の傾斜面からなる一対の側面28を有する平面視が帯状である凹溝24が形成された。図示のように、上記曲面26の接線または上記平坦面27と凹溝24の開口部との成す角度θaは、何れも鋭角であった。尚、上記凹溝24は、レーザー加工によって形成しても良い。
次に、上記凹溝24内にW粉末あるいはMo粉末を含む導電性ペーストを、図示しないスキージを用いて充填した。その結果、図6(C)に示すように、端部の端面26,27に前記曲面15を有するか、あるいは前記同様に傾斜した平坦面16を有し、且つ上面11が表面3と面一状となった未焼成の表面配線10a,10bが形成された。尚、かかる表面配線10a,10bは、液状の上記導電性ペーストをディスぺンサーにより上記凹溝内に注ぎ込む方法にて行っても良い。
更に、上記表面配線10a,10bの端部の上およびグリーンシートg1の表面3の上に跨って、図示しないメタルマスクとスキージとを用いて、前記同様の導電性ペーストを印刷形成した。その結果、図6(D)で例示するように、表面配線10a,10bの端部の上に跨って、バンプ20(21)が形成された。
As a result, as shown in FIG. 6B, a pair of inclined surfaces having the curved surface 26 or the flat surface 27 at one end and a flat bottom surface 25 and an inclined surface similar to the flat surface 13 or the curved surface 14 are formed. A concave groove 24 having a side surface 28 and having a band shape in plan view was formed. As shown in the figure, the angle θa formed between the tangent line of the curved surface 26 or the flat surface 27 and the opening of the concave groove 24 was an acute angle. The concave groove 24 may be formed by laser processing.
Next, the concave groove 24 was filled with a conductive paste containing W powder or Mo powder using a squeegee (not shown). As a result, as shown in FIG. 6C, the end surfaces 26 and 27 of the end portions have the curved surface 15 or the inclined flat surface 16 as described above, and the upper surface 11 is flush with the surface 3. Unfired surface wirings 10a and 10b were formed. The surface wirings 10a and 10b may be formed by pouring the liquid conductive paste into the concave groove with a dispenser.
Further, a conductive paste similar to that described above was printed using a metal mask and a squeegee (not shown) over the end portions of the surface wirings 10a and 10b and the surface 3 of the green sheet g1. As a result, as illustrated in FIG. 6D, bumps 20 (21) were formed over the end portions of the surface wirings 10a and 10b.

これ以降は、前記グリーンシートg1(g2)の積層工程、これによって得られたグリーンシート積層体(図示せず)の焼成工程、これによって得られた前記基板本体2の外側に露出する表面配線10a,10bの上面11やバンプ20(21)などの表面に対し、電解Niメッキ工程および電解Auメッキ工程を順次施して、所定厚さのNi被膜およびAu被膜を順次被覆した、
以上のような配線基板1aの製造方法によれば、前記効果(1)〜(4)を奏する前記配線基板1aを確実に製造することができた((効果(5))。
尚、前記ビアホールおよびビア導体9を形成する工程は、前記未焼成の表面配線10aを形成した後に、該表面配線10aと交差するようにビアホールを穿孔し、該ビアホール内に前記導電性ペーストを充填し、その上端部が上記表面配線10aの上面11とほぼ同じレベルにする工程によって行うことも可能である。
また、前記配線基板1b,1cも、前記セラミック層c3〜c5を形成する工程を付加することで、前記製造方法と同様にして製造することが可能である。
Thereafter, the step of laminating the green sheets g1 (g2), the step of firing the green sheet laminate (not shown) obtained thereby, and the surface wiring 10a exposed to the outside of the substrate body 2 obtained thereby. , 10b, the electrolytic Ni plating step and the electrolytic Au plating step are sequentially applied to the surface such as the upper surface 11 and the bump 20 (21) of the bump 10 (21), and the Ni coating and Au coating having a predetermined thickness are sequentially coated.
According to the method for manufacturing the wiring board 1a as described above, the wiring board 1a having the effects (1) to (4) can be reliably manufactured ((effect (5)).
In the step of forming the via hole and the via conductor 9, after forming the unfired surface wiring 10a, a via hole is drilled so as to intersect the surface wiring 10a, and the conductive paste is filled in the via hole. However, it is also possible to carry out by a process of making the upper end of the upper surface 11 approximately the same level as the upper surface 11 of the surface wiring 10a.
Also, the wiring boards 1b and 1c can be manufactured in the same manner as the manufacturing method by adding a process of forming the ceramic layers c3 to c5.

図7(A)は、異なる形態の表面配線10cの端部付近を示す断面図であり、同図中の矢印は、電流の流れを模式的に示すものである(以下の図でも同様)。
かかる表面配線10cは、図7(A)に示すように、前記同様の上面11、底面12、および前記傾斜面13,14からなる側面を有すると共に、その長手方向の端部の端面には、該端面と上記上面11との成す角度θaが鋭角となるように傾斜した単一の平坦面16からなる傾斜面を有している。
また、図7(B)〜(D)は、上記表面配線10cの応用形態である表面配線10d〜10fの端部付近を示す断面図である。
表面配線10dは、図7(B)に示すように、前記同様の上面11、底面12、および前記傾斜面13,14からなる側面を有し、且つその長手方向の端部の端面には、上面11との成す角度θaが鋭角となるよう傾斜した平坦面17aと、異なる傾斜角度の平坦面17bとからなる傾斜面(複合面)17を有している。
FIG. 7A is a cross-sectional view showing the vicinity of the end portion of the surface wiring 10c having a different form, and the arrows in the figure schematically show the flow of current (the same applies to the following drawings).
As shown in FIG. 7A, the surface wiring 10c has side surfaces including the top surface 11, the bottom surface 12, and the inclined surfaces 13 and 14 similar to the above, and the end surface of the end portion in the longitudinal direction thereof has It has an inclined surface composed of a single flat surface 16 inclined so that an angle θa formed by the end surface and the upper surface 11 is an acute angle.
7B to 7D are cross-sectional views showing the vicinity of the end portions of the surface wirings 10d to 10f, which are applied forms of the surface wiring 10c.
As shown in FIG. 7B, the surface wiring 10d has a side surface composed of the same upper surface 11, the bottom surface 12, and the inclined surfaces 13 and 14, and the end surface of the end portion in the longitudinal direction thereof has There is an inclined surface (composite surface) 17 composed of a flat surface 17a inclined so that an angle θa formed with the upper surface 11 is an acute angle, and a flat surface 17b having a different inclination angle.

更に、表面配線10eは、図7(C)に示すように、前記同様の上面11、底面12、および前記傾斜面13,14からなる側面を有し、且つその長手方向の端部の端面には、上面11との成す角度θaが鋭角となるよう傾斜した平坦面18aと、更に互いに傾斜角度の平坦面18b,18cとからなる傾斜面(複合面)18を有している。
加えて、表面配線10fは、図7(D)に示すように、前記同様の上面11、底面12、および前記傾斜面13,14からなる側面を有し、且つその長手方向の端部の端面には、上面11との成す角度θaが鋭角となるよう傾斜した平坦面19fと、その奥側に隣接し且つ奥側に凸となる曲面19rとからなる傾斜面(複合面)19を有している。
以上のような表面配線10c〜10fとバンプ20,21との組合せを適用した前記配線基板1a〜1cも、前記効果(1)〜(4)を奏することができる。
尚、前記傾斜面18,19のように、断面形状が奥側に凸の曲面に近付く程、前記インピーダンスの低下を一層抑制することが可能となる。
Further, as shown in FIG. 7C, the surface wiring 10e has a side surface composed of the same top surface 11, bottom surface 12, and inclined surfaces 13 and 14 as described above, and is provided on the end surface of the longitudinal end portion thereof. Has a flat surface 18a inclined so that an angle θa formed with the upper surface 11 is an acute angle, and an inclined surface (composite surface) 18 composed of flat surfaces 18b and 18c having an inclination angle with each other.
In addition, as shown in FIG. 7D, the surface wiring 10f has a side surface composed of the top surface 11, the bottom surface 12, and the inclined surfaces 13 and 14 similar to the above, and the end surface of the end portion in the longitudinal direction thereof. Has an inclined surface (composite surface) 19 composed of a flat surface 19f inclined so that the angle θa formed with the upper surface 11 is an acute angle, and a curved surface 19r adjacent to the back side and convex on the back side. ing.
The wiring boards 1a to 1c to which the combination of the surface wirings 10c to 10f and the bumps 20 and 21 as described above are applied can also achieve the effects (1) to (4).
As the inclined surfaces 18 and 19, the lower the impedance is, the more the cross-sectional shape approaches the curved surface convex toward the back side.

図8は、表面配線10c〜10fの応用形態を示す前記同様の断面図である。
図8(A)〜(D)に示すように、前記基板本体2の表面3側に前記同様に形成された表面配線10c〜10fは、これらの端面である傾斜面16〜19の最外端辺と、バンプ20(21)の底面における一辺あるいは周辺の一部とが平面視で重複している。
また、図9(A)の部分平面図に示すように、前記基板本体2の表面3側に前記同様に形成された前記表面配線10bの端面である曲面(傾斜面)15の最外端辺と、バンプ20の底面における一辺とが平面視で重複している。
以上の表面配線10b〜10fとバンプ20,21との組合せを適用した前記配線基板1a〜1cによっても、前記効果(1)〜(4)を奏することができる。
FIG. 8 is a cross-sectional view similar to the above showing an applied form of the surface wirings 10c to 10f.
As shown in FIGS. 8A to 8D, the surface wirings 10c to 10f formed in the same manner on the surface 3 side of the substrate body 2 are the outermost ends of the inclined surfaces 16 to 19 which are these end surfaces. The side and one side or a part of the periphery on the bottom surface of the bump 20 (21) overlap in plan view.
Further, as shown in the partial plan view of FIG. 9A, the outermost end side of the curved surface (inclined surface) 15 which is the end surface of the surface wiring 10b formed on the surface 3 side of the substrate body 2 in the same manner as described above. And one side of the bottom surface of the bump 20 overlap in plan view.
The effects (1) to (4) can also be achieved by the wiring boards 1a to 1c to which the combination of the surface wirings 10b to 10f and the bumps 20 and 21 is applied.

図9(B),(C)は、更に異なる形態の表面配線10gに関する部分平面図または部分断面図であり、図9(D)は図9(C)中のZ−Z線の矢視に沿った断面図である。
図9(B)〜(D)に示すように、表面配線10gは、前記基板本体2の表面3側に形成され、長手方向の端部の端面が前記表面3から奥側に凸となる部分球面状の3次元曲面15rの傾斜面であり、且つ上面11の端部側が平面視で外側に凸の半円形状のアール端辺11rとなっている。更に、かかる表面配線10gの長手方向の両側が前記曲面14からなる傾斜面であると共に、該曲面14の端部側と上記3次元曲面15rの基部側とが互いに連続している。
FIGS. 9B and 9C are partial plan views or partial cross-sectional views regarding the surface wiring 10g of still another form, and FIG. 9D is a view taken along the line ZZ in FIG. 9C. FIG.
As shown in FIGS. 9B to 9D, the surface wiring 10g is formed on the surface 3 side of the substrate body 2, and the end surface of the end portion in the longitudinal direction is convex from the surface 3 to the back side. It is an inclined surface of a spherical three-dimensional curved surface 15r, and the end portion side of the upper surface 11 is a semicircular rounded edge 11r convex outward in plan view. Further, both sides in the longitudinal direction of the surface wiring 10g are inclined surfaces formed of the curved surface 14, and the end side of the curved surface 14 and the base side of the three-dimensional curved surface 15r are continuous with each other.

しかも、図9(B),(C)に示すように、前記表面配線10gの端面である3次元曲面15rおよびアール端辺11rの最外部分と、バンプ20の底面の一辺あるいはバンプ21の底面の周縁の一部とが、平面視において重複している。
そのため、以上のような表面配線10gと前記バンプ20,21との組合せを適用した前記配線基板1a〜1cによれば、前記効果(1)〜(4)を一層顕著に奏することが可能となる。尚、上記表面配線10gにおける上面11の端部側は、平面視で外側に凸の半楕円形状のアール端辺としても良い。
In addition, as shown in FIGS. 9B and 9C, the outermost portion of the three-dimensional curved surface 15r and the rounded edge 11r, which are the end surfaces of the surface wiring 10g, and one side of the bottom surface of the bump 20 or the bottom surface of the bump 21 A part of the periphery of each overlaps in plan view.
Therefore, according to the wiring boards 1a to 1c to which the combination of the surface wiring 10g and the bumps 20 and 21 as described above is applied, the effects (1) to (4) can be more remarkably exhibited. . Note that the end portion side of the upper surface 11 in the surface wiring 10g may be a semi-elliptical rounded end that protrudes outward in plan view.

本発明は、以上において説明した各形態に限定されるものではない。
例えば、前記基板本体を構成する絶縁材は、例えば、エポキシ系などの合成樹脂としても良く、更に、前記側壁となる部分を含めて、層別にセラミック層と樹脂層とを組合せて積層した形態からなる基板本体としても良い。
また、前記表面配線やバンプなどの導体は、前記基板本体を構成する絶縁材が樹脂や低温焼成セラミックからなる場合には、CuあるいはAgが適用される。
更に、前記表面配線は、前記基板本体の少なくとも一方の表面において、平面視で直線状となるパターンのほか、任意のパターンを呈すると共に、かかる表面配線の前記傾斜面からなる端面は、一端部または両端部に形成しても良い。
また、前記バンプは、平面視が五角形以上である扁平状の正多角柱体あるいは変形多角柱体、あるいは、扁平状の長円柱体または楕円柱体を呈する形態としても良く、且つ該バンプの厚みは、前記表面配線の厚みよりも大きくしても良い。
更に、前記バンプは、複数個の該バンプの上側に跨って、半導体素子やICチップや水晶振動子などの電子部品を搭載する形態のほか、単一のバンプの上面側に前記電子部品の底面全体を搭載する形態として用いても良い、
加えて、前記配線基板の製造方法は、多数個取りの形態により行っても良い。
The present invention is not limited to the embodiments described above.
For example, the insulating material constituting the substrate body may be, for example, a synthetic resin such as an epoxy-based material, and further, from a form in which the ceramic layer and the resin layer are laminated in layers, including the portion that becomes the side wall. A substrate body may be used.
Further, the conductor such as the surface wiring and the bump is made of Cu or Ag when the insulating material constituting the substrate body is made of resin or low-temperature fired ceramic.
Furthermore, the surface wiring has an arbitrary pattern in addition to a linear pattern in a plan view on at least one surface of the substrate body, and the end surface of the inclined surface of the surface wiring has one end or You may form in both ends.
The bump may have a form of a flat regular polygonal column or a deformed polygonal column having a pentagonal shape or more in plan view, or a flat oblong or elliptical column, and the thickness of the bump. May be larger than the thickness of the surface wiring.
Furthermore, in addition to a form in which the electronic component such as a semiconductor element, an IC chip, or a crystal resonator is mounted on the upper side of the plurality of bumps, the bump has a bottom surface of the electronic component on the upper surface side of the single bump. It may be used as a form to mount the whole,
In addition, the method for manufacturing the wiring board may be performed in a multi-cavity form.

本発明によれば、絶縁材からなる基板本体の表面側に、該表面に沿った表面配線とその一端部の上に比較的厚肉のバンプとを形成しても、従来のような導通不良、メッキ不良、印刷ダレ、印刷ニジミなどが生じず、且つインピーダンス特性も低下しない配線基板、およびかかる配線基板を確実に製造できる製造方法を提供することができる。   According to the present invention, even if a surface wiring along the surface and a relatively thick bump are formed on one end of the surface of the substrate body made of an insulating material, the conventional conduction failure In addition, it is possible to provide a wiring board that does not cause plating defects, printing sagging, printing blurring, and the like and that does not deteriorate impedance characteristics, and a manufacturing method that can reliably manufacture the wiring board.

1a〜1c………配線基板
2…………………基板本体
3…………………表面
4…………………裏面(表面)
10a〜10g…表面配線
11………………上面
12………………底面
13………………平坦面(側面)
14………………曲面(側面)
15,15r……曲面(傾斜面/端面)
16………………平坦面(傾斜面/端面)
17〜19………複合面(傾斜面/端面)
20,21………バンプ
24………………凹溝
26………………曲面(凹溝の端面)
27………………平坦面(凹溝の端面)
c1,c2………セラミック層(絶縁材)
θa,θb………角度/鋭角
1a to 1c ……… Wiring board 2 ……………… Board body 3 ……………… Front side 4 …………………… Back side (front side)
10a to 10g… Surface wiring 11 ……………… Top 12 ……………… Bottom 13 ……………… Flat surface (side)
14 ……………… Surface (side)
15, 15r ...... curved surface (inclined surface / end surface)
16 ……………… Flat surface (inclined surface / end surface)
17 to 19 ……… Composite surface (inclined surface / end surface)
20, 21 ……… Bump 24 ……………… Dove groove 26 ……………… Curved surface (end surface of the groove)
27 ……………… Flat surface (end surface of groove)
c1, c2 ......... Ceramic layer (insulating material)
θa, θb ... Angle / Acute angle

Claims (5)

絶縁材からなり、対向する一対の表面を有する基板本体と、
上記基板本体における少なくとも一方の表面側に埋設され、該表面と上面が面一状となり且つ平面視が帯状の表面配線と、
上記一方の表面の上および上記表面配線の長手方向における少なくとも一方の端部の上に跨って形成されたバンプと、を含む配線基板であって、
上記表面配線の端部における端面は、上記一方の表面に平行な方向の側面視で該表面から奥側に凸の曲面、および、該表面配線の上面と該端面との成す角度が鋭角となるように傾斜した平坦面の少なくとも一方からなる傾斜面である、
ことを特徴とする配線基板。
A substrate body made of an insulating material and having a pair of opposing surfaces;
Embedded in at least one surface side of the substrate body, the surface and the upper surface are flush with each other, and the surface wiring in a plan view is a belt-like shape,
A wiring board including a bump formed on the one surface and on at least one end in the longitudinal direction of the surface wiring,
The end surface of the end portion of the surface wiring has a curved surface convex from the surface to the back side in a direction parallel to the one surface, and an angle formed by the upper surface of the surface wiring and the end surface is an acute angle. It is an inclined surface consisting of at least one of the inclined flat surfaces,
A wiring board characterized by that.
前記バンプの底面は、その一部の辺が平面視で前記表面配線の端部における端面と重複している、
ことを特徴とする請求項1に記載の配線基板。
The bottom surface of the bump is partially overlapped with the end surface of the end portion of the surface wiring in plan view.
The wiring board according to claim 1.
前記表面配線の少なくとも端部は、その長手方向と直交する断面において、前記基板本体における少なくとも一方の表面と平行状の底面と、該底面の両側に位置する側面とを有し、
上記側面は、上記断面視において、上記基板本体の表面から奥側に凸の曲面、および、該表面配線の上面と該側面との成す角度が鋭角となるように傾斜した平坦面の少なくとも一方からなる傾斜面である、
ことを特徴とする請求項1または2に記載の配線基板。
At least an end portion of the surface wiring has a bottom surface parallel to at least one surface of the substrate main body and side surfaces located on both sides of the bottom surface in a cross section orthogonal to the longitudinal direction thereof,
The side surface is at least one of a curved surface convex from the surface of the substrate body to the back side and a flat surface inclined so that an angle formed by the upper surface of the surface wiring and the side surface is an acute angle in the cross-sectional view. Is an inclined surface,
The wiring board according to claim 1 or 2, wherein
前記表面配線の端部は、平面視において該表面配線の外側に凸の半円形状、あるいは半楕円形の上面を有している、
ことを特徴とする請求項1乃至3の何れか一項に記載の配線基板。
The end of the surface wiring has a semicircular shape that protrudes outward from the surface wiring in a plan view, or a semi-elliptical upper surface,
The wiring board according to any one of claims 1 to 3, wherein
絶縁材からなり、対向する一対の表面を有する基板本体と、
上記基板本体における少なくとも一方の表面側に埋設され、該表面と上面が面一状となり且つ平面視が帯状の表面配線と、
上記一方の表面の上および上記表面配線の長手方向における少なくとも一方の端部の上に跨って形成されたバンプと、を含む配線基板の製造方法であって、
追って前記基板本体の表面を構成する絶縁シートの表面に、該表面に沿った凹溝を形成する工程と、
上記凹溝内に導電性ペーストを充填して未焼成の上記表面配線を形成する工程と、
上記絶縁シートの表面の上および未焼成の上記表面配線の端部の上に、導電性ペーストを印刷して未焼成のバンプを形成する工程と、を含み、
上記凹溝の長手方向における少なくとも一方の端面は、上記絶縁シートの表面と平行な方向に沿った側面視で該表面から奥側に凸の曲面、および、上記凹溝の開口部と上記端面との成す角度が鋭角となるように傾斜した平坦面の少なくとも一方からなる傾斜面である、
ことを特徴とする配線基板の製造方法。
A substrate body made of an insulating material and having a pair of opposing surfaces;
Embedded in at least one surface side of the substrate body, the surface and the upper surface are flush with each other, and the surface wiring in a plan view is a belt-like shape,
A bump formed over the one surface and over at least one end in the longitudinal direction of the surface wiring, and a method of manufacturing a wiring board comprising:
Forming a groove along the surface of the insulating sheet constituting the surface of the substrate body,
Filling the concave groove with a conductive paste to form the unfired surface wiring;
Forming a non-fired bump by printing a conductive paste on the surface of the insulating sheet and on the end of the non-fired surface wiring,
At least one end surface in the longitudinal direction of the concave groove is a curved surface convex from the surface to the back side in a side view along a direction parallel to the surface of the insulating sheet, and the opening and the end surface of the concave groove An inclined surface composed of at least one of flat surfaces inclined so that the angle formed by
A method for manufacturing a wiring board.
JP2016002008A 2016-01-07 2016-01-07 Wiring board and manufacturing method of the same Pending JP2017123408A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2016002008A JP2017123408A (en) 2016-01-07 2016-01-07 Wiring board and manufacturing method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016002008A JP2017123408A (en) 2016-01-07 2016-01-07 Wiring board and manufacturing method of the same

Publications (1)

Publication Number Publication Date
JP2017123408A true JP2017123408A (en) 2017-07-13

Family

ID=59306691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016002008A Pending JP2017123408A (en) 2016-01-07 2016-01-07 Wiring board and manufacturing method of the same

Country Status (1)

Country Link
JP (1) JP2017123408A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019062076A (en) * 2017-09-26 2019-04-18 京セラ株式会社 Wiring board and electronic device
JPWO2020195018A1 (en) * 2019-03-25 2020-10-01
JP7491000B2 (en) 2020-03-19 2024-05-28 Toppanホールディングス株式会社 Wiring board and method for manufacturing the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019062076A (en) * 2017-09-26 2019-04-18 京セラ株式会社 Wiring board and electronic device
JPWO2020195018A1 (en) * 2019-03-25 2020-10-01
WO2020195018A1 (en) * 2019-03-25 2020-10-01 京セラ株式会社 Electric element storage package and electric device
CN113597670A (en) * 2019-03-25 2021-11-02 京瓷株式会社 Package for housing electric element and electric device
JP7242832B2 (en) 2019-03-25 2023-03-20 京セラ株式会社 Electrical element housing package and electrical equipment
EP3951850A4 (en) * 2019-03-25 2023-05-03 Kyocera Corporation Electric element storage package and electric device
JP7491000B2 (en) 2020-03-19 2024-05-28 Toppanホールディングス株式会社 Wiring board and method for manufacturing the same

Similar Documents

Publication Publication Date Title
US11152149B2 (en) Electronic component
JP4138211B2 (en) Electronic component and manufacturing method thereof, collective electronic component, mounting structure of electronic component, and electronic apparatus
JP5333680B2 (en) Component built-in substrate and manufacturing method thereof
JP5182448B2 (en) Component built-in board
JP6880525B2 (en) Manufacturing method of coil electronic parts and coil electronic parts
JP7103573B2 (en) Capacitors and their manufacturing methods
JP2017123408A (en) Wiring board and manufacturing method of the same
JP6696121B2 (en) Composite electronic components and resistance elements
US9883589B2 (en) Wiring board, and electronic device
WO2013137338A1 (en) Chip resistor for incorporation into substrate, and method for producing same
JP2017022256A (en) Composite electronic component and resistance element
JP2017195316A (en) Ceramic package and manufacturing method thereof
JP2018181972A (en) Ceramic substrate
JP4510851B2 (en) Manufacturing method of wiring board assembly
KR20210054215A (en) Hybrid multi layer ceramic and probe card including the same
JP2006253716A (en) Multilayer ceramic electronic component and method for producing it
JP6556004B2 (en) Electronic component storage package, electronic device and electronic module
JP4140631B2 (en) Manufacturing method of electronic parts
JP6495701B2 (en) Electronic component storage package and manufacturing method thereof
JP2006269603A (en) Wiring board and multi-patterned wiring board
JP5981389B2 (en) Wiring board
JP7122939B2 (en) Wiring board and manufacturing method thereof
JP2019079835A (en) Ceramic substrate
JP2009016699A (en) Wiring circuit board and its manufacturing method
JP6506132B2 (en) Multi-cavity wiring board and wiring board