JP2017117857A - Method for forming solder bump - Google Patents

Method for forming solder bump Download PDF

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Publication number
JP2017117857A
JP2017117857A JP2015249209A JP2015249209A JP2017117857A JP 2017117857 A JP2017117857 A JP 2017117857A JP 2015249209 A JP2015249209 A JP 2015249209A JP 2015249209 A JP2015249209 A JP 2015249209A JP 2017117857 A JP2017117857 A JP 2017117857A
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solder
semiconductor element
element connection
opening
resist layer
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JP2015249209A
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Japanese (ja)
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俊哉 河野
Toshiya Kono
俊哉 河野
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board with excellent current carrying properties by accurately forming a solder bump on an upper surface of each of a plurality of semiconductor element connection pads.SOLUTION: A method for forming a solder bump H on a semiconductor element connection pad 2 exposed from an opening 3a of a solder resist layer 3 performs the steps of: depositing a resin mask layer R including an opening Ra surrounding the opening 3a on the solder resist layer 3; inserting and placing a solder ball H in the solder resist layer 3 and the opening Ra of the resin mask layer R so as to come into contact with the semiconductor element connection pad 2; forming a solder bump H on the semiconductor element connection pad 2 by cooling and solidifying the solder ball H after heating and melting the solder ball; and peeling and removing the resin mask layer R from the solder resist layer 3.SELECTED DRAWING: Figure 1

Description

本発明は、高密度に配置された半導体素子接続パッドに半田バンプを形成する方法に関するものである。   The present invention relates to a method for forming solder bumps on semiconductor element connection pads arranged at high density.

従来、半導体集積回路等の半導体素子を配線基板に接続するための半田バンプを配線基板の半導体素子接続パッドに形成するときには、例えば図2(a)に示すように、まず、配線基板Bを準備する。
配線基板Bは、絶縁板11と、半導体素子接続パッド12と、半導体素子接続パッド12を露出させる開口部13aを有するソルダーレジスト層13とを備えている。
Conventionally, when a solder bump for connecting a semiconductor element such as a semiconductor integrated circuit to a wiring board is formed on a semiconductor element connection pad of the wiring board, first, for example, as shown in FIG. To do.
The wiring board B includes an insulating plate 11, a semiconductor element connection pad 12, and a solder resist layer 13 having an opening 13 a that exposes the semiconductor element connection pad 12.

次に、図2(b)に示すように、半導体素子接続パッド12の表面を覆うようにフラックスFを塗布する。フラックスFは、半田ボールHの表面や半導体素子接続パッド12の表面の酸化被膜を除去するとともに、溶融した半田の濡れ性を向上させる機能を有する粘着性を持った薬液である。   Next, as shown in FIG. 2B, a flux F is applied so as to cover the surface of the semiconductor element connection pad 12. The flux F is an adhesive chemical solution having a function of removing the oxide film on the surface of the solder balls H and the surface of the semiconductor element connection pads 12 and improving the wettability of the molten solder.

次に、図2(c)に示すように、開口部Maを有する金属マスクMを、金属マスクMの開口部Maがソルダーレジスト層13の開口部13aを囲繞するように位置合わせをしてソルダーレジスト層13上に載置する。   Next, as shown in FIG. 2C, the metal mask M having the opening Ma is aligned so that the opening Ma of the metal mask M surrounds the opening 13 a of the solder resist layer 13. Place on the resist layer 13.

次に、図2(d)に示すように、金属マスクMの上側に多数の半田ボールHを載せて、各開口部13a、Ma内に半田ボールHを挿置するとともに、金属マスクMの上面にスキージを摺動させることで、開口部13a、Maに入らなかった残余の半田ボールHを除去する。   Next, as shown in FIG. 2D, a large number of solder balls H are placed on the upper side of the metal mask M, the solder balls H are inserted into the openings 13a, Ma, and the upper surface of the metal mask M is placed. The remaining solder balls H that have not entered the openings 13a and Ma are removed by sliding the squeegee.

次に、図2(e)に示すように、金属マスクMを配線基板Bから外す。   Next, the metal mask M is removed from the wiring board B as shown in FIG.

最後に、金属マスクMを外した配線基板Bをリフロー処理することにより、図2(f)に示すように、配線基板Bに半田バンプHが形成される。   Finally, by performing a reflow process on the wiring board B from which the metal mask M has been removed, solder bumps H are formed on the wiring board B as shown in FIG.

ところで、近年、配線基板の小型化、高密度化に伴い、半導体素子接続パッドについても小径のパッドが高密度に配置されるようになっている。これに対応して、半田ボールについても直径が非常に小さく軽量なものが用いられる。
しかしながら、上述した形成方法によると、金属マスクの開口部の周辺にフラックスが付着してしまうことがある。このため、金属マスクを配線基板から外すときに、半田ボールが金属マスクに付着したフラックスの表面張力により、ソルダーレジスト層の開口部の外に出てしまう場合がある。その結果、半田バンプが、互いに隣接する半田バンプ同士の間に形成されて短絡不良となったり、所定の半導体素子接続パッド上に形成されずに通電不良となったりするという問題がある。
By the way, in recent years, with the miniaturization and high density of the wiring substrate, as for the semiconductor element connection pads, the small-diameter pads are arranged with high density. Correspondingly, a solder ball having a very small diameter and a light weight is used.
However, according to the above-described forming method, the flux may adhere to the periphery of the opening of the metal mask. For this reason, when the metal mask is removed from the wiring board, the solder balls may come out of the opening of the solder resist layer due to the surface tension of the flux adhered to the metal mask. As a result, there is a problem that solder bumps are formed between adjacent solder bumps, resulting in a short circuit failure, or a failure in energization without being formed on a predetermined semiconductor element connection pad.

特開平11−297886号公報JP-A-11-297886

本発明は、高密度に配置された複数の各半導体素子接続パッドの上面に、半田バンプを正確に形成することで、通電性に優れた配線基板を提供することを課題とする。   An object of the present invention is to provide a wiring board having excellent electrical conductivity by accurately forming solder bumps on the upper surfaces of a plurality of semiconductor element connection pads arranged at high density.

本発明の半田バンプの形成方法は、ソルダーレジスト層の開口部から露出する半導体素子接続パッド上に半田バンプを形成する半田バンプの形成方法であって、ソルダーレジスト層上に開口部を囲繞する開口部を有する樹脂マスク層を被着する工程と、ソルダーレジスト層および樹脂マスク層の開口部内に半導体素子接続パッドに接触するように半田ボールを挿置する工程と、半田ボールを加熱溶融させた後、冷却固化することにより半導体素子接続パッドに半田バンプを形成する工程と、樹脂マスク層をソルダーレジスト層から剥離除去する工程と、を行うことを特徴とするものである。   The solder bump forming method of the present invention is a solder bump forming method for forming a solder bump on a semiconductor element connection pad exposed from an opening of a solder resist layer, and the opening surrounding the opening on the solder resist layer A step of applying a resin mask layer having a portion, a step of inserting a solder ball in contact with the semiconductor element connection pad in the openings of the solder resist layer and the resin mask layer, and after the solder ball is heated and melted The step of forming a solder bump on the semiconductor element connection pad by cooling and solidification and the step of peeling and removing the resin mask layer from the solder resist layer are performed.

本発明の半田バンプの形成方法によれば、ソルダーレジスト層上にソルダーレジスト層の開口部を囲繞する開口部を有する樹脂マスク層を被着しておく。そして、半田ボールを半導体素子接続パッドに接触するように挿置して、樹脂マスク層が被着したままの状態で半田ボールを加熱溶融させた後、冷却固化することで半導体素子接続パッドに半田バンプを形成する。
このため、半田ボールがソルダーレジスト層および樹脂マスク層の開口部の外に出てしまうことがなく、半田バンプを各半導体素子接続パッドの上に確実に形成することができる。これにより、通電性に優れた配線基板を提供することができる。
According to the solder bump forming method of the present invention, the resin mask layer having an opening surrounding the opening of the solder resist layer is deposited on the solder resist layer. Then, the solder ball is inserted so as to contact the semiconductor element connection pad, and the solder ball is heated and melted with the resin mask layer adhered, and then cooled and solidified to thereby solder the semiconductor element connection pad. Form bumps.
For this reason, the solder ball does not come out of the openings of the solder resist layer and the resin mask layer, and the solder bump can be reliably formed on each semiconductor element connection pad. Thereby, the wiring board excellent in electroconductivity can be provided.

図1(a)〜(g)は、本発明の半田バンプの形成方法の一例を示す工程毎の概略断面図である。1A to 1G are schematic cross-sectional views for each process showing an example of a method for forming solder bumps of the present invention. 図2(a)〜(f)は、従来の半田バンプの形成方法の一例を示す工程毎の概略断面図である。2A to 2F are schematic cross-sectional views for each process showing an example of a conventional solder bump forming method.

次に、本発明の半田バンプの形成方法の一例を、図1を基にして説明する。   Next, an example of the solder bump forming method of the present invention will be described with reference to FIG.

まず、図1(a)に示すように、配線基板Aを準備する。
配線基板Aは、例えばガラスクロスにエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた電気絶縁材料から成る絶縁板1と、銅等の良導電性金属から成る半導体素子接続パッド2と、半導体素子接続パッド2を露出させる開口部3aを有するソルダーレジスト層3とを備えている。
First, as shown in FIG. 1A, a wiring board A is prepared.
The wiring board A includes an insulating plate 1 made of an electrically insulating material in which a glass cloth is impregnated with a thermosetting resin such as epoxy resin or bismaleimide triazine resin, and a semiconductor element connection pad 2 made of a highly conductive metal such as copper. And a solder resist layer 3 having an opening 3a through which the semiconductor element connection pad 2 is exposed.

次に、図1(b)に示すように、ソルダーレジスト層3上に開口部3aを囲繞する開口部Raを有する樹脂マスク層Rを形成する。
樹脂マスク層Rの上面の高さは、半導体素子接続パッド2の上に挿置される半田ボールBの頂点よりも、0〜10μm程度高いことが好ましい。樹脂マスク層Rの上面の高さが半田ボールHの頂点よりも低いと半田ボールHが開口部3a、Raから外へ出てしまう恐れがある。また、樹脂マスク層Rの上面の高さが半田ボールHの頂点よりも10μmを越える高さがあると、開口部3a、Ra内に複数の半田ボールHが入ってしまう恐れがある。
樹脂マスク層Rは、例えばアクリル樹脂等の感光性樹脂を含む樹脂シートをソルダーレジスト層3上に貼着して、露光および現像することにより形成される。
Next, as shown in FIG. 1B, a resin mask layer R having an opening Ra surrounding the opening 3 a is formed on the solder resist layer 3.
The height of the upper surface of the resin mask layer R is preferably about 0 to 10 μm higher than the apex of the solder ball B inserted on the semiconductor element connection pad 2. If the height of the upper surface of the resin mask layer R is lower than the apex of the solder balls H, the solder balls H may come out of the openings 3a and Ra. Further, if the height of the upper surface of the resin mask layer R exceeds 10 μm from the apex of the solder balls H, there is a possibility that a plurality of solder balls H will enter the openings 3a, Ra.
The resin mask layer R is formed by sticking a resin sheet containing a photosensitive resin such as an acrylic resin on the solder resist layer 3 and exposing and developing the resin sheet.

次に、図1(c)に示すように、半導体素子接続パッド2の表面にフラックスFを塗布する。フラックスFは、例えば周知のスクリーン技術を用いて各開口部3a、Ra内の半導体素子接続パッド2に塗布される。   Next, as shown in FIG. 1C, flux F is applied to the surface of the semiconductor element connection pad 2. The flux F is applied to the semiconductor element connection pads 2 in the openings 3a and Ra using, for example, a well-known screen technique.

次に、図1(d)に示すように、樹脂マスク層Rの上面に多数の半田ボールHを載せてソルダーレジスト層3および樹脂マスク層Rの各開口部3a、Ra内に半田ボールHを挿置するとともに、例えばスキージを樹脂マスクR上に摺動させることで残余の半田ボールHを除去する。   Next, as shown in FIG. 1D, a large number of solder balls H are placed on the upper surface of the resin mask layer R, and the solder balls H are placed in the openings 3a and Ra of the solder resist layer 3 and the resin mask layer R. At the same time, the remaining solder balls H are removed by sliding the squeegee on the resin mask R, for example.

図1(d)で示した工程を行うことにより、図1(e)に示すように、半田ボールHが各開口部3a、Ra内に露出する半導体素子接続パッド2に接触した状態で載置される。   By performing the process shown in FIG. 1D, the solder balls H are placed in contact with the semiconductor element connection pads 2 exposed in the openings 3a and Ra as shown in FIG. 1E. Is done.

次に、配線基板Aをリフロー処理した後に冷却することにより、図1(f)に示すように、半導体素子接続パッド2に半田バンプHが固着される。   Next, the solder bump H is fixed to the semiconductor element connection pad 2 as shown in FIG.

最後に、図1(g)に示すように、樹脂マスク層Rを例えばアミン系の剥離液を用いて剥離除去するとともに、エーテル系の洗浄剤を用いてフラックスを除去すればよい。
これにより、配線基板Aに半田バンプHが形成される。
Finally, as shown in FIG. 1G, the resin mask layer R may be peeled and removed using, for example, an amine-based stripping solution, and the flux may be removed using an ether-based cleaning agent.
As a result, solder bumps H are formed on the wiring board A.

このように、本発明の半田バンプの形成方法によれば、ソルダーレジスト層3上にソルダーレジスト層3の開口部3aを囲繞する開口部Raを有する樹脂マスク層Rを被着しておく。そして、開口部3a、Ra内に半導体素子接続パッド2に接触するように半田ボールHを挿置して、樹脂マスク層Rが被着したままの状態で半田ボールHをリフロー処理により加熱溶融させた後、冷却固化することで半導体素子接続パッド2に半田バンプHを形成する。
このため、半田ボールHがソルダーレジスト層3および樹脂マスク層Rの開口部3a、Raの外に出てしまうことがなく、半田バンプHを各半導体素子接続パッド2の上に確実に形成することができる。これにより、通電性に優れた配線基板Aを提供することができる。
Thus, according to the solder bump forming method of the present invention, the resin mask layer R having the opening Ra surrounding the opening 3 a of the solder resist layer 3 is deposited on the solder resist layer 3. Then, the solder balls H are inserted into the openings 3a and Ra so as to be in contact with the semiconductor element connection pads 2, and the solder balls H are heated and melted by a reflow process with the resin mask layer R still attached. After that, the solder bumps H are formed on the semiconductor element connection pads 2 by cooling and solidifying.
For this reason, the solder ball H does not come out of the openings 3a and Ra of the solder resist layer 3 and the resin mask layer R, and the solder bump H is reliably formed on each semiconductor element connection pad 2. Can do. Thereby, the wiring board A excellent in electroconductivity can be provided.

2 半導体素子接続パッド
3 ソルダーレジスト層
3a (ソルダーレジスト層の)開口部
R 樹脂マスク層
Ra (樹脂マスク層)の開口部
2 Semiconductor Device Connection Pad 3 Solder Resist Layer 3a (Solder Resist Layer) Opening R Resin Mask Layer Ra (Resin Mask Layer) Opening

Claims (1)

ソルダーレジスト層の開口部から露出する半導体素子接続パッド上に半田バンプを形成する半田バンプの形成方法であって、前記ソルダーレジスト層上に前記開口部を囲繞する開口部を有する樹脂マスク層を被着する工程と、前記ソルダーレジスト層および前記樹脂マスク層の前記開口部内に前記半導体素子接続パッドに接触するように半田ボールを挿置する工程と、前記半田ボールを加熱溶融させた後、冷却固化することにより前記半導体素子接続パッドに半田バンプを形成する工程と、前記樹脂マスク層を前記ソルダーレジスト層から剥離除去する工程と、を行うことを特徴とする半田バンプの形成方法。   A solder bump forming method for forming a solder bump on a semiconductor element connection pad exposed from an opening of a solder resist layer, wherein a resin mask layer having an opening surrounding the opening is covered on the solder resist layer. A step of attaching, a step of inserting a solder ball so as to contact the semiconductor element connection pad in the opening of the solder resist layer and the resin mask layer, and heating and melting the solder ball, followed by cooling and solidification And a step of forming a solder bump on the semiconductor element connection pad and a step of peeling and removing the resin mask layer from the solder resist layer.
JP2015249209A 2015-12-22 2015-12-22 Method for forming solder bump Pending JP2017117857A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010114140A (en) * 2008-11-04 2010-05-20 Shinko Electric Ind Co Ltd Semiconductor device and method of manufacturing the same
JP2012074595A (en) * 2010-09-29 2012-04-12 Toppan Printing Co Ltd Method of manufacturing semiconductor package

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010114140A (en) * 2008-11-04 2010-05-20 Shinko Electric Ind Co Ltd Semiconductor device and method of manufacturing the same
JP2012074595A (en) * 2010-09-29 2012-04-12 Toppan Printing Co Ltd Method of manufacturing semiconductor package

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