JP2015099913A - Substrate for mounting semiconductor element and semiconductor element device using the same - Google Patents

Substrate for mounting semiconductor element and semiconductor element device using the same Download PDF

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JP2015099913A
JP2015099913A JP2014199051A JP2014199051A JP2015099913A JP 2015099913 A JP2015099913 A JP 2015099913A JP 2014199051 A JP2014199051 A JP 2014199051A JP 2014199051 A JP2014199051 A JP 2014199051A JP 2015099913 A JP2015099913 A JP 2015099913A
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semiconductor element
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diamond particles
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JP6429108B2 (en
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浩一 高島
Koichi Takashima
浩一 高島
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Abstract

PROBLEM TO BE SOLVED: To provide a substrate for mounting a semiconductor element excellent in processability, capable of forming a connection surface with no irregularities by short-time processing, and further improving the thermal conduction efficiency between the substrate and a semiconductor element or the like, and capable of preventing the semiconductor element from causing a defective operation or the like due to heat generation of the semiconductor element itself, by utilizing high thermal conductivity of a diamond composite material, and to provide a semiconductor element device using the substrate for mounting the semiconductor element.SOLUTION: A substrate for mounting a semiconductor element comprises a diamond composite material which is obtained by binding diamond particles with two metals of (A) at least one kind of a first metal selected from the group consisting of Cu, Ag, Al and Mg, and (B) at least one kind of a second metal selected from the group consisting of Mo, W and Nb. The diamond particles have a volume ratio of 40 to 55 vol.% and the diamond composite material has a thermal expansion coefficient at 25 to 400°C of 5.0×10to 8.5×10K. In a semiconductor device, a semiconductor element is connected to a connection surface of the substrate for mounting the semiconductor element.

Description

本発明は、多数の微小なダイヤモンド粒子を結合材によって結合したダイヤモンド複合材料からなる半導体素子実装用基板、およびこの半導体素子実装用基板を用いた半導体素子装置に関するものである。   The present invention relates to a semiconductor element mounting substrate made of a diamond composite material in which a large number of minute diamond particles are bonded by a bonding material, and a semiconductor element device using the semiconductor element mounting substrate.

半導体レーザー等の半導体素子がそれ自体の発熱によって動作不良を生じるのを防止するために、当該半導体素子と接続される半導体素子実装用基板(ヒートシンク、放熱基板、ハウジング等)には、放熱性に優れることが必要とされる。
そのため従来は、半導体素子実装用基板を、例えばAlN、SiC等の、熱伝導率が高く、かつ良好な放熱性を有するセラミックによって形成するのが一般的であった。ところが近年の、半導体素子の高出力化に伴って、半導体素子実装用基板には、現状よりも高度な放熱性が要求されるようになってきている。
In order to prevent a semiconductor element such as a semiconductor laser from malfunctioning due to its own heat generation, a semiconductor element mounting substrate (heat sink, heat dissipation board, housing, etc.) connected to the semiconductor element has a heat dissipation property. It needs to be excellent.
For this reason, conventionally, it has been common to form a semiconductor element mounting substrate from a ceramic having high thermal conductivity and good heat dissipation, such as AlN or SiC. However, with the recent increase in output of semiconductor elements, semiconductor element mounting substrates are required to have higher heat dissipation than the current situation.

そこでこの要求に対応するため、半導体素子実装用基板を、多数の微小なダイヤモンド粒子が、例えばCu、Ag等の金属や、SiC等のセラミックからなる結合材によって結合された、ダイヤモンド複合材料によって形成することが提案された。
ダイヤモンドは、理論熱伝導率が2000W/m・Kという、物質中で最高の熱伝導率を有することから、かかるダイヤモンドを含む上記のダイヤモンド複合材料を用いて半導体素子実装用基板を形成すれば、その熱伝導率を、従来のセラミック等からなるものに比べて飛躍的に向上できると考えられている。
Therefore, in order to meet this requirement, a semiconductor element mounting substrate is formed of a diamond composite material in which a large number of minute diamond particles are bonded together by a bonding material made of a metal such as Cu or Ag or a ceramic such as SiC. Proposed to do.
Since diamond has the highest thermal conductivity in a substance with a theoretical thermal conductivity of 2000 W / m · K, if a semiconductor element mounting substrate is formed using the diamond composite material containing such diamond, It is considered that the thermal conductivity can be dramatically improved as compared with a conventional ceramic or the like.

ダイヤモンド複合材料からなる半導体素子実装用基板と、この半導体素子実装用基板に接続(実装)される半導体素子との間でできるだけスムースに熱伝導させるためには、半導体素子実装用基板と半導体素子とが、半田やロウ材の層を介して、できるだけ隙間なく密着した状態で接続されていることが必要である。
半導体素子実装用基板に熱的に接続されて、半導体素子からの放熱を補助するための他の放熱部材についても同様である。半導体素子実装用基板と他の放熱部材との間でできるだけスムースに熱伝導させるためには、半導体素子実装用基板と他の放熱部材とが、半田やロウ材の層を介して、できるだけ隙間なく密着した状態で接続されていることが必要である。
In order to conduct heat conduction as smoothly as possible between a semiconductor element mounting substrate made of a diamond composite material and a semiconductor element connected (mounted) to the semiconductor element mounting substrate, the semiconductor element mounting substrate, the semiconductor element, However, it is necessary to be connected in close contact with each other through a layer of solder or brazing material as much as possible.
The same applies to other heat radiating members that are thermally connected to the semiconductor element mounting substrate and assist the heat radiation from the semiconductor elements. In order to conduct heat conduction as smoothly as possible between the semiconductor element mounting substrate and the other heat radiating member, the semiconductor element mounting substrate and the other heat radiating member have as little gap as possible through the solder or brazing material layer. It is necessary to be connected in close contact.

そしてそのためには、ダイヤモンド複合材料からなる半導体素子実装用基板の、半導体素子を接続するための素子実装面や、他の放熱部材(以下、半導体素子を含めて、これらを「他部材」と総称する場合がある。)を熱的に接続するための伝熱面等の、他部材との接続面ができるだけ平滑に仕上げられている必要がある。
そこで半導体素子実装用基板の接続面を平滑に仕上げるために、従来は、かかる接続面を、例えばダイヤモンド砥石等を用いて研磨加工するのが一般的である。また研磨加工した接続面を、金属膜で被覆する場合もある。
For this purpose, the element mounting surface for connecting the semiconductor elements of the semiconductor element mounting substrate made of a diamond composite material and other heat dissipation members (hereinafter including the semiconductor elements are collectively referred to as “other members”). It is necessary that the connection surface with other members such as a heat transfer surface for thermally connecting is finished as smoothly as possible.
Therefore, in order to finish the connecting surface of the semiconductor element mounting substrate smoothly, conventionally, such a connecting surface is generally polished using a diamond grindstone or the like. Also, the polished connection surface may be covered with a metal film.

例えば特許文献1には、半導体素子実装用基板としての半導体レーザー搭載用サブキャリヤをダイヤモンド複合材料によって形成するとともに、その接続面を、日本工業規格JIS B0601:2001「製品の幾何特性仕様(GPS)−表面性状:輪郭曲線方式−用語,定義及び表面性状パラメータ」において規定された、表面粗さを示す粗さ曲線の算術平均粗さRが0.5μm以下となるように研磨加工すること、研磨加工した接続面をNi、Cr、Ti、およびTaからなる群より選ばれた少なくとも1種の金属からなる第一の金属膜と、Mo、Pt、Au、Ag、Sn、Pd、Ge、およびInからなる群より選ばれた少なくとも1種の金属からなる第二の金属膜とでこの順に被覆することが記載されている。 For example, in Patent Document 1, a subcarrier for mounting a semiconductor laser as a substrate for mounting a semiconductor element is formed of a diamond composite material, and its connection surface is defined by Japanese Industrial Standards JIS B0601: 2001 “Geometric Characteristics Specification of Products (GPS)”. - surface texture: profile curve method - terms, definitions and defined in the surface texture parameters ", the arithmetic mean roughness R a of a roughness curve showing a surface roughness is polished so as to 0.5μm or less, The polished connection surface has a first metal film made of at least one metal selected from the group consisting of Ni, Cr, Ti, and Ta, Mo, Pt, Au, Ag, Sn, Pd, Ge, and The coating is described in this order with a second metal film made of at least one metal selected from the group consisting of In.

また特許文献2、3には、それぞれ半導体素子実装用基板としてのヒートシンクをダイヤモンド複合材料によって形成するとともに、その接続面を、算術平均粗さRが、特許文献2では0.2μm以下、特許文献3では0.5μm以下となるように研磨加工することや、研磨加工した接続面を、先に説明したのと同様の第一および第二の金属膜で被覆することが記載されている。 Further, Patent Documents 2 and 3, to form a heat sink as a substrate for mounting a semiconductor element by diamond composite material, respectively, the connection surface, the arithmetic mean roughness R a is, Patent Document 2 0.2μm or less, patent Document 3 describes that polishing is performed to 0.5 μm or less, and that the polished connection surface is covered with the first and second metal films similar to those described above.

しかし、ダイヤモンド粒子と結合材の総量中に占めるダイヤモンド粒子の体積比率が60体積%以上の、一般的なダイヤモンド複合材料からなる半導体素子実装用基板は加工性が低く、例えばダイヤモンド砥石等を使用した研磨加工には長時間を要するため、半導体素子実装用基板の生産性が低下して、製造コストが嵩むという問題がある。
例えば、かかるダイヤモンド複合材料からなる半導体素子実装用基板の接続面を、#100〜#400のダイヤモンド砥石を用いた平面研磨によって、上記所定の表面粗さになるまで研磨加工しようとすると、1つの接続面を仕上げるのにおよそ20時間以上もの時間を要する。
However, a substrate for mounting a semiconductor element made of a general diamond composite material in which the volume ratio of diamond particles to the total amount of the diamond particles and the binder is 60% by volume or more has low workability. For example, a diamond grindstone is used. Since the polishing process takes a long time, there is a problem that the productivity of the substrate for mounting a semiconductor element is lowered and the manufacturing cost is increased.
For example, when the connection surface of the semiconductor element mounting substrate made of such a diamond composite material is polished to a predetermined surface roughness by planar polishing using a diamond grindstone of # 100 to # 400, It takes about 20 hours or more to finish the connection surface.

しかも、たとえ接続面を所定の表面粗さに研磨加工できたとしても、当該接続面には、研磨時に、ダイヤモンド粒子が脱落することで発生した凹部や、研磨されずに残ったダイヤモンド粒子に起因する凸部が多数、存在する。
そのため、かかる凹部や凸部によって接続面に生じる凹凸によって、当該接続面と他部材との間の、半田やロウ材の層を介した密着が妨げられて両者間に隙間を生じやすく、生じた隙間が、半導体素子実装用基板と他部材との間での熱伝導の効率を低下させる原因となる。
Moreover, even if the connection surface can be polished to a predetermined surface roughness, the connection surface is caused by the recesses generated by the falling of diamond particles during polishing or the diamond particles remaining without being polished. There are many convex parts to be
Therefore, the unevenness generated on the connection surface by the concave portion or the convex portion prevents the close contact between the connection surface and the other member via the solder or brazing material layer, and easily causes a gap between the two. The gap causes a reduction in the efficiency of heat conduction between the semiconductor element mounting substrate and the other member.

また接続面と他部材との間をたとえ隙間なく密着させることができたとしても、接続面に存在する凹部が、両者間の界面に、熱伝導を妨げる空隙として残留して、やはり半導体素子実装用基板と他部材との間での熱伝導の効率を低下させる原因となる。
そのためこのいずれの場合にも、ダイヤモンド複合材料の良好な熱伝導性を十分に活かして、半導体素子実装用基板の熱伝導性を十分に向上することができないという問題もある。
Even if the connection surface and the other member can be brought into close contact with each other without any gaps, the recesses present on the connection surface remain as gaps that hinder heat conduction at the interface between them, so that the semiconductor element mounting This causes a reduction in the efficiency of heat conduction between the substrate for use and other members.
Therefore, in any of these cases, there is also a problem that the thermal conductivity of the substrate for mounting a semiconductor element cannot be sufficiently improved by fully utilizing the good thermal conductivity of the diamond composite material.

したがって特許文献1〜3に記載された従来の半導体素子実装用基板では、近年の、半導体レーザー等の半導体素子のさらなる高出力化に十分に対応できず、半導体素子が、それ自体の発熱によって動作不良を生じるのを防止する効果が不十分になりつつあるのが現状である。
また凹部や凸部の大きさは、ダイヤモンド粒子の粒径に依存して、深さまたは高さが5〜300μm程度と大きいのに対し、特許文献1〜3において接続面に形成している金属膜の厚みは、それに比べて著しく小さい。
Therefore, the conventional semiconductor element mounting substrates described in Patent Documents 1 to 3 cannot sufficiently cope with the further increase in output of semiconductor elements such as semiconductor lasers in recent years, and the semiconductor elements operate by their own heat generation. At present, the effect of preventing the occurrence of defects is becoming insufficient.
Further, the size of the recesses and protrusions depends on the particle size of the diamond particles, and the depth or height is as large as about 5 to 300 μm, whereas the metal formed on the connection surface in Patent Documents 1 to 3 The thickness of the film is significantly smaller than that.

例えば特許文献1の実施例3では、第一の金属膜としてのNi膜の、厚みの最大値を2μm、第二の金属膜としてのAu膜の厚みを0.2μmに設定しており、合計の厚みは、最大でも2.2μmに過ぎない。
また特許文献3の実施例3では、第一の金属膜としてのNi膜の厚みを1μm、第二の金属膜としてのPt膜の厚みを0.2μmに設定しており、合計の厚みは1.2μmに過ぎない。
For example, in Example 3 of Patent Document 1, the maximum value of the thickness of the Ni film as the first metal film is set to 2 μm, and the thickness of the Au film as the second metal film is set to 0.2 μm. The maximum thickness is only 2.2 μm.
In Example 3 of Patent Document 3, the thickness of the Ni film as the first metal film is set to 1 μm, the thickness of the Pt film as the second metal film is set to 0.2 μm, and the total thickness is 1 Only 2 μm.

そのため、たとえ接続面を2層の金属膜で被覆したとしても、それによって凹部や凸部を埋める、すなわち凹部を、空隙として残留しないように、金属膜を形成する金属によって満たしたり、凹部や凸部を金属膜中に埋没させたりして接続面を平滑化するのは困難である。
特許文献4には、半導体素子実装用基板としての放熱体をダイヤモンド複合材料によって形成するとともに、当該放熱体の接続面に、先に説明した金属膜よりも厚みの大きいCu材層を形成して凹部や凸部を埋めることで、Cu材層の表面を平滑面とすることが記載されている。
Therefore, even if the connection surface is covered with a two-layer metal film, it fills the recesses and protrusions, that is, fills the metal with the metal forming the metal film so that the recesses do not remain as voids. It is difficult to smooth the connecting surface by burying the part in the metal film.
In Patent Document 4, a radiator as a semiconductor element mounting substrate is formed of a diamond composite material, and a Cu material layer having a thickness larger than that of the metal film described above is formed on the connection surface of the radiator. It is described that the surface of the Cu material layer is made a smooth surface by filling the concave portions and the convex portions.

かかる構成によれば、先に説明した接続面の凹凸によって他部材との密着が妨げられて両者間に隙間を生じたり、凹部が、両者間の界面に熱伝導を妨げる空隙として残留したりするのを防止して、接続面と他部材とを、Cu材層、および半田やロウ材の層を介して隙間なく密着させた状態で互いに接続することが可能となる。   According to such a configuration, the unevenness of the connection surface described above prevents the close contact with the other member and creates a gap between them, or the recess remains as a gap that prevents heat conduction at the interface between the two. Therefore, the connection surface and the other member can be connected to each other with the Cu material layer and the solder or brazing material layer in close contact with each other without any gap.

特開2003−309316号公報JP 2003-309316 A 特開2004−175626号公報JP 2004-175626 A 特開2005−184021号公報JP 2005-184021 A 特開2005−175006号公報JP 2005-175006 A

ところがCuの熱伝導率は、ダイヤモンド複合材料の熱伝導率よりも低い。そのため特許文献4に記載されているような、半導体素子実装用基板の接続面に存在する凹部や凸部を埋めることができる厚みの大きいCu材の層は、たとえその表面が平滑であって、他部材を、半田やロウ材の層を介して隙間なく密着できたとしても、熱伝導の効率を向上する効果が不十分である。   However, the thermal conductivity of Cu is lower than that of the diamond composite material. Therefore, as described in Patent Document 4, a layer of Cu material having a large thickness that can fill in the recesses and protrusions present on the connection surface of the semiconductor element mounting substrate, even if the surface is smooth, Even if the other member can be brought into close contact via the solder or brazing material layer, the effect of improving the efficiency of heat conduction is insufficient.

またCu材の層は、ダイヤモンド複合材料との熱膨張率の差が大きい上、厚みが大きい分だけ内部応力が高い。そのためCu材の層の上に、例えば半田やロウ材の層を介して他部材を接続する際の熱履歴や、半導体素子を駆動させる際の素子自体の発熱による熱履歴等によって、かかるCu材の層自体が接続面からはく離しやすいという問題もある。
本発明の目的は、加工性に優れ、短時間の加工で、できるだけ凹凸のない接続面を形成できる上、それによって半導体素子等の他部材との間での熱伝導の効率をこれまでよりも向上し、ダイヤモンド複合材料の高い熱伝導性を十分に活かして、例えば半導体素子がそれ自体の発熱によって動作不良等を生じるのを防止できる半導体素子実装用基板を提供することにある。
In addition, the Cu material layer has a large difference in thermal expansion coefficient from the diamond composite material, and has a higher internal stress due to the larger thickness. Therefore, the Cu material is formed on the Cu material layer by, for example, a heat history when connecting other members via a solder or brazing material layer, or a heat history due to heat generated by the element itself when driving the semiconductor element. There is also a problem that the layer itself is easily peeled off from the connection surface.
The object of the present invention is excellent in workability, and can form a connection surface with as few irregularities as much as possible in a short time, thereby improving the efficiency of heat conduction with other members such as semiconductor elements. It is an object of the present invention to provide a semiconductor element mounting substrate that can improve and prevent the semiconductor element from malfunctioning due to its own heat generation by fully utilizing the high thermal conductivity of the diamond composite material.

また本発明の目的は、かかる本発明の半導体素子実装用基板の接続面に接続された半導体素子がそれ自体の発熱によって動作不良を生じるのを防止して、当該半導体素子を、これまでよりも長期間に亘って駆動させ続けることができる半導体素子装置を提供することにある。   Another object of the present invention is to prevent the semiconductor element connected to the connection surface of the semiconductor element mounting substrate of the present invention from causing a malfunction due to its own heat generation. An object of the present invention is to provide a semiconductor element device that can be driven for a long period of time.

本発明は、多数のダイヤモンド粒子を結合材によって結合したダイヤモンド複合材料からなり、
他部材との接続面を有し、
前記結合材は、
(A) Cu、Ag、Al、およびMgからなる群より選ばれた少なくとも1種の第一の金属、および
(B) Mo、W、およびNbからなる群より選ばれた少なくとも1種の第二の金属
の2種であり、
前記ダイヤモンド粒子と2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率は、40体積%以上、55体積%以下で、かつ
前記ダイヤモンド複合材料の、25℃から400℃までの熱膨張率は、5.0×10−6/K以上、8.5×10−6K以下である、
半導体素子実装用基板である。
The present invention comprises a diamond composite material in which a large number of diamond particles are bound together by a binding material,
Having a connection surface with other members,
The binder is
(A) at least one first metal selected from the group consisting of Cu, Ag, Al, and Mg, and
(B) two types of at least one second metal selected from the group consisting of Mo, W, and Nb;
The volume ratio of the diamond particles in the total amount of the diamond particles and the two kinds of metals is 40% by volume or more and 55% by volume or less, and the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is 5.0 × 10 −6 / K or more and 8.5 × 10 −6 K or less.
It is a board | substrate for semiconductor element mounting.

また本発明は、かかる本発明の半導体素子実装用基板の接続面に、半導体素子が接続された半導体素子装置である。   Moreover, this invention is a semiconductor element apparatus with which the semiconductor element was connected to the connection surface of this semiconductor element mounting board | substrate of this invention.

本発明によれば、加工性に優れ、短時間の加工で、できるだけ凹凸のない接続面を形成できる上、それによって半導体素子等の他部材との間での熱伝導の効率をこれまでよりも向上し、ダイヤモンド複合材料の高い熱伝導性を十分に活かして、例えば半導体素子がそれ自体の発熱によって動作不良等を生じるのを防止できる半導体素子実装用基板を提供できる。   According to the present invention, it is excellent in workability and can form a connection surface with as little unevenness as possible in a short period of time, thereby improving the efficiency of heat conduction with other members such as semiconductor elements. It is possible to provide a semiconductor element mounting substrate that can be improved and that the high thermal conductivity of the diamond composite material can be fully utilized to prevent the semiconductor element from causing malfunction due to its own heat generation.

また本発明によれば、かかる本発明の半導体素子実装用基板の接続面に接続された半導体素子がそれ自体の発熱によって動作不良を生じるのを防止して、当該半導体素子を、これまでよりも長期間に亘って駆動させ続けることができる半導体素子装置を提供できる。   Further, according to the present invention, it is possible to prevent the semiconductor element connected to the connection surface of the semiconductor element mounting substrate of the present invention from causing a malfunction due to its own heat generation. A semiconductor element device that can be continuously driven for a long period of time can be provided.

本発明のうち第一の金属としてのCuと第二の金属としてのMoとを併用した実施例、比較例における、ダイヤモンドの体積比率と、CuとMoの体積比率との関係を示すグラフである。It is a graph which shows the relationship between the volume ratio of a diamond, and the volume ratio of Cu and Mo in the Example which used together Cu as a 1st metal among this invention, and Mo as a 2nd metal, and a comparative example. . 本発明のうち第一の金属としてのCuと第二の金属としてのWとを併用した実施例、比較例における、ダイヤモンドの体積比率、CuとWの体積比率との関係を示すグラフである。It is a graph which shows the relationship between the volume ratio of a diamond, and the volume ratio of Cu and W in the Example and comparative example which used together Cu as a 1st metal among this invention, and W as a 2nd metal. 本発明のうち第一の金属としてのAgと第二の金属としてのMoとを併用した実施例、比較例における、ダイヤモンドの体積比率と、AgとMoの体積比率との関係を示すグラフである。It is a graph which shows the relationship between the volume ratio of a diamond, and the volume ratio of Ag and Mo in the Example which used together Ag as a 1st metal among this invention, and Mo as a 2nd metal, and a comparative example. . 本発明のうち第一の金属としてのAgと第二の金属としてのWとを併用した実施例、比較例における、ダイヤモンドの体積比率、AgとWの体積比率との関係を示すグラフである。It is a graph which shows the relationship between the volume ratio of a diamond, and the volume ratio of Ag and W in the Example which used together Ag as a 1st metal among this invention, and W as a 2nd metal, and a comparative example.

《半導体素子実装用基板》
本発明は、多数のダイヤモンド粒子を結合材によって結合したダイヤモンド複合材料からなり、
他部材との接続面を有し、
前記結合材は、
(A) Cu、Ag、Al、およびMgからなる群より選ばれた少なくとも1種の第一の金属、および
(B) Mo、W、およびNbからなる群より選ばれた少なくとも1種の第二の金属
の2種であり、
前記ダイヤモンド粒子と2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率は、40体積%以上、55体積%以下で、かつ
前記ダイヤモンド複合材料の、25℃から400℃までの熱膨張率は、5.0×10−6/K以上、8.5×10−6K以下である、
半導体素子実装用基板である。
<Semiconductor element mounting board>
The present invention comprises a diamond composite material in which a large number of diamond particles are bound together by a binding material,
Having a connection surface with other members,
The binder is
(A) at least one first metal selected from the group consisting of Cu, Ag, Al, and Mg, and
(B) two types of at least one second metal selected from the group consisting of Mo, W, and Nb;
The volume ratio of the diamond particles in the total amount of the diamond particles and the two kinds of metals is 40% by volume or more and 55% by volume or less, and the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is 5.0 × 10 −6 / K or more and 8.5 × 10 −6 K or less.
It is a board | substrate for semiconductor element mounting.

ダイヤモンド複合材料からなる半導体素子実装用基板を構成する、例えばCu、Ag、Al、およびMg等の結合材は、金属材料の中でも比較的熱伝導率が高いため、ダイヤモンド粒子による高い熱伝導を補助する効果に優れている上、機械加工性が良いことが知られている。
そのため、ダイヤモンド粒子と結合材の総量中に占める結合材の体積比率を、ダイヤモンド粒子の体積比率が一般的な60体積%以上の範囲より小さくなるように、相対的に増加させると、ダイヤモンド複合材料からなる半導体素子実装用基板の良好な熱伝導性を維持しながら、その加工性を向上できる。
Bonding materials such as Cu, Ag, Al, and Mg, which constitute a semiconductor element mounting substrate made of a diamond composite material, have a relatively high thermal conductivity among metal materials, and thus assist high heat conduction by diamond particles. It is known that it has excellent machinability and good machinability.
Therefore, when the volume ratio of the binder in the total amount of the diamond particles and the binder is relatively increased so that the volume ratio of the diamond particles is smaller than a general range of 60% by volume or more, the diamond composite material The workability can be improved while maintaining good thermal conductivity of the semiconductor element mounting substrate.

すなわち、研磨加工時に発生するダイヤモンド粒子の脱粒や研磨残りによる凹凸を減らして、先に説明した従来の各種被覆層等を形成しなくても平滑性に優れ、他部材を隙間なく密着できる接続面を、できるだけ短時間の研磨加工で形成することが可能となる。
しかし結合材の体積比率が増加することでダイヤモンド複合材料の熱膨張率が増加して、特に半導体素子との熱膨張率の差が大きくなる。
In other words, the connecting surface can reduce the unevenness due to diamond grain detachment and polishing residue generated during polishing processing, and has excellent smoothness without forming the various conventional coating layers described above, and can adhere other members without gaps. Can be formed by polishing as short as possible.
However, when the volume ratio of the binder increases, the thermal expansion coefficient of the diamond composite material increases, and in particular, the difference in the thermal expansion coefficient from the semiconductor element increases.

その結果、接続面に他部材を接続する際や半導体素子を動作させる際の熱履歴による膨張、収縮によって、当該半導体素子等の他部材が破損したり、接続面との接続が外れたりしやすくなるという新たな問題を生じる。
そこで発明者は、結合材についてさらに検討した。その結果、通常の結合材であるCu、Ag、Al、およびMgからなる群より選ばれた少なくとも1種の第一の金属に加えて、当該第一の金属に対して全く、あるいは殆ど固溶しない上、第一の金属よりも熱膨張率が小さい、Mo、W、およびNbからなる群より選ばれた少なくとも1種の第二の金属を、結合材として併用すればよいことを見出した。
As a result, other members such as the semiconductor element are easily damaged or disconnected from the connection surface due to expansion or contraction due to thermal history when connecting other members to the connection surface or operating the semiconductor element. A new problem arises.
Therefore, the inventor further examined the binder. As a result, in addition to at least one first metal selected from the group consisting of Cu, Ag, Al, and Mg, which are ordinary binders, completely or almost completely dissolved in the first metal. In addition, it has been found that at least one second metal selected from the group consisting of Mo, W, and Nb, which has a smaller coefficient of thermal expansion than the first metal, may be used in combination.

すなわち、第二の金属は熱膨張率が小さいため、当該第二の金属を第一の金属と併用することで、ダイヤモンド複合材料の熱膨張率を調整して、特に半導体素子との熱膨張率の差をできるだけ小さくすることができる。
しかも第二の金属は、第一の金属とは全く、あるいは殆ど固溶しないため、第一の金属に固溶して格子のずれやそれに伴う電子伝導の低下等を生じることがなく、したがって第一の金属による良好な熱伝導を維持することができる。
That is, since the second metal has a small coefficient of thermal expansion, the coefficient of thermal expansion of the diamond composite material is adjusted by using the second metal in combination with the first metal, and in particular, the coefficient of thermal expansion with the semiconductor element. Can be made as small as possible.
In addition, since the second metal does not dissolve at all or hardly dissolves with the first metal, the second metal does not cause a lattice displacement or a decrease in electronic conduction associated therewith. Good heat conduction by one metal can be maintained.

そのため第一および第二の2種の金属を結合材として併用することで、結合材の体積比率を増加させることによる、半導体素子実装用基板の良好な熱伝導性を維持しながら加工性を向上する効果を良好に保持しながら、ダイヤモンド複合材料の熱膨張率の増加を抑制して、特に半導体素子の熱膨張率に近づけることができる。
またそのため、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりするのを防止できる。
Therefore, by combining the first and second metals as a binder, the workability is improved while maintaining good thermal conductivity of the substrate for mounting semiconductor elements by increasing the volume ratio of the binder. It is possible to suppress the increase in the coefficient of thermal expansion of the diamond composite material while keeping the effect of the above in good condition, and in particular to approach the coefficient of thermal expansion of the semiconductor element.
For this reason, it is possible to prevent other members such as a semiconductor element from being damaged or disconnected from the connection surface due to expansion and contraction when a thermal history is applied.

かかる本発明の半導体素子実装用基板は、結合材として第1および第2の2種の金属を併用すること以外は、従来同様に製造できる。特に、先に説明した特許文献1〜3に記載の、超高圧発生装置を用いた製造方法によって好適に製造することができる。
すなわちダイヤモンド粒子と、結合材としての第1および第2の2種の金属とを所定の体積比率で混合して、モリブデン等からなるカプセル中に封入し、真空中、不活性ガス雰囲気中、または還元性雰囲気中で、加圧しながら加熱して焼結させたのちカプセルを除去し、次いで所定の形状に加工するとともに、その接続面を放電加工による切断、ダイヤモンド砥石等による研磨、またはブラスト加工等の1種または2種以上の加工によって仕上げることで、本発明の半導体素子実装用基板が製造される。
Such a substrate for mounting a semiconductor element of the present invention can be manufactured in the same manner as in the prior art, except that the first and second kinds of metals are used in combination as the binder. In particular, it can be suitably manufactured by the manufacturing method using the ultrahigh pressure generator described in Patent Documents 1 to 3 described above.
That is, the diamond particles and the first and second metals as the binder are mixed in a predetermined volume ratio and sealed in a capsule made of molybdenum or the like, in a vacuum, in an inert gas atmosphere, or After heating and sintering in a reducing atmosphere, pressurize and sinter, then remove the capsule, then process into a predetermined shape, cut the connecting surface by electric discharge machining, polishing with a diamond grindstone, or blasting, etc. The substrate for mounting a semiconductor element of the present invention is manufactured by finishing by one or more kinds of processing.

焼結時の加圧圧力は1GPa以上、特に4GPa以上であるのが好ましく、6GPa以下であるのが好ましい。また加熱温度は1100℃以上であるのが好ましく、1500℃以下、特に1200℃以下であるのが好ましい。
焼結に際しては、カプセルを上記所定の圧力下、所定の温度に加熱することで、結合材としての2種の金属のうち少なくとも第一の金属を溶融させてダイヤモンド粒子間に浸透させ、次いで圧力を保持した状態で温度を900℃以下(常温も含む)に下げて一定時間、保持することで第一の金属を凝固させたのち常圧、常温に戻してカプセルを回収するのが好ましい。
The pressure applied during sintering is preferably 1 GPa or more, particularly preferably 4 GPa or more, and preferably 6 GPa or less. The heating temperature is preferably 1100 ° C. or higher, preferably 1500 ° C. or lower, particularly preferably 1200 ° C. or lower.
At the time of sintering, the capsule is heated to a predetermined temperature under the predetermined pressure to melt at least the first metal of the two kinds of metals as the binder and to penetrate between the diamond particles. It is preferable to recover the capsule by lowering the temperature to 900 ° C. or lower (including normal temperature) and holding it for a certain period of time by solidifying the first metal and then returning to normal pressure and normal temperature.

〈ダイヤモンド粒子〉
ダイヤモンド粒子としては、理論熱伝導率が2000W/m・Kという、物質中で最高の熱伝導率を有する、天然ないし合成のダイヤモンドの粒子が、いずれも使用可能である。
ダイヤモンド粒子の平均粒径は5μm以上、特に10μm以上であるのが好ましく、100μm以下、特に50μm以下であるのが好ましい。
<Diamond particles>
As the diamond particles, any natural or synthetic diamond particles having a theoretical thermal conductivity of 2000 W / m · K and the highest thermal conductivity among substances can be used.
The average particle diameter of the diamond particles is preferably 5 μm or more, particularly preferably 10 μm or more, and is preferably 100 μm or less, particularly preferably 50 μm or less.

ダイヤモンド粒子の平均粒径がこの範囲未満では、ダイヤモンド粒子と、結合材としての2種の金属との界面面積が増大することでダイヤモンド複合材料の熱抵抗が大きくなり、半導体素子実装用基板の熱伝導性が低下するおそれがある。
一方、ダイヤモンド粒子の平均粒径が上記の範囲を超える場合には、研磨等の加工性が低下して、接続面に生じる凹部や凸部の大きさが大きくなり、接続面の平滑性が低下して半導体素子等の他部材を隙間なく密着できないおそれがある。
If the average particle size of the diamond particles is less than this range, the interface area between the diamond particles and the two kinds of metals as the binder increases, so that the thermal resistance of the diamond composite material increases, and the heat of the substrate for mounting the semiconductor element Conductivity may be reduced.
On the other hand, when the average particle diameter of the diamond particles exceeds the above range, workability such as polishing is reduced, and the size of the concave and convex portions generated on the connection surface is increased, and the smoothness of the connection surface is reduced. Then, there is a possibility that other members such as a semiconductor element cannot be adhered without a gap.

なおダイヤモンド粒子の表面には、例えば特許文献3に記載されているように、結合材と同一材質のコーティング層が形成されていてもよい。
〈結合材〉
結合材としては、先に説明したようにCu、Ag、Al、およびMgからなる群より選ばれた少なくとも1種の第一の金属と、Mo、W、およびNbからなる群より選ばれた少なくとも1種の第二の金属とを併用する。
In addition, as described in Patent Document 3, for example, a coating layer made of the same material as the binder may be formed on the surface of the diamond particles.
<Binder>
As the binder, as described above, at least one first metal selected from the group consisting of Cu, Ag, Al, and Mg, and at least selected from the group consisting of Mo, W, and Nb One type of second metal is used in combination.

この2種の金属は、それぞれダイヤモンド粒子と均一に混合するために、いずれも粒子状であるのが好ましい。
このうち第一の金属の粒子は、平均粒径が0.1μm以上、特に1μm以上であるのが好ましく、100μm以下、特に50μm以下であるのが好ましい。
平均粒径がこの範囲未満である微小な第一の金属の粒子は製造、および取り扱いが容易でないため、半導体素子実装用基板の生産性が低下し、製造コストが高くつくおそれがある。
These two metals are preferably in the form of particles in order to be uniformly mixed with the diamond particles.
Among these, the first metal particles preferably have an average particle size of 0.1 μm or more, particularly 1 μm or more, preferably 100 μm or less, particularly 50 μm or less.
Since the fine first metal particles having an average particle diameter less than this range are not easy to manufacture and handle, the productivity of the substrate for mounting a semiconductor element may be lowered and the manufacturing cost may be high.

一方、第一の金属の粒子の平均粒径が上記の範囲を超える場合には、ダイヤモンド複合材料中で、第一の金属の偏析が生じやすくなるおそれがある。
また第二の金属の粒子は、同様の理由で、平均粒径が0.1μm以上、特に1μm以上であるのが好ましく、100μm以下、特に50μm以下であるのが好ましい。
すなわち、平均粒径がこの範囲未満である微小な第二の金属の粒子は製造、および取り扱いが容易でないため、半導体素子実装用基板の生産性が低下し、製造コストが高くつくおそれがある。
On the other hand, when the average particle diameter of the first metal particles exceeds the above range, segregation of the first metal may easily occur in the diamond composite material.
For the same reason, the second metal particles preferably have an average particle size of 0.1 μm or more, particularly 1 μm or more, and preferably 100 μm or less, particularly 50 μm or less.
That is, since the fine second metal particles having an average particle diameter less than this range are not easy to manufacture and handle, the productivity of the substrate for mounting a semiconductor element may be reduced, and the manufacturing cost may be high.

一方、第二の金属の粒子の平均粒径が上記の範囲を超える場合には、ダイヤモンド複合材料中で、第二の金属の偏析が生じやすくなるおそれがある。
〈体積比率〉
本発明において、ダイヤモンド粒子と2種の金属の総量中に占めるダイヤモンド粒子の体積比率が40体積%以上、55体積%以下に限定されるのは、下記の理由による。
On the other hand, when the average particle size of the second metal particles exceeds the above range, segregation of the second metal is likely to occur in the diamond composite material.
<Volume ratio>
In the present invention, the volume ratio of diamond particles in the total amount of diamond particles and two kinds of metals is limited to 40 volume% or more and 55 volume% or less for the following reason.

すなわちダイヤモンド粒子の体積比率がこの範囲未満では、ダイヤモンド粒子による、半導体素子実装用基板の熱伝導率を、従来のセラミック等からなるものに比べて大幅に向上する効果が得られない。
また、結合材として2種の金属を併用しているにもかかわらずダイヤモンド複合材料の熱膨張率が増加して、特に半導体素子との熱膨張率の差が大きくなってしまう。そのため、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりしやすくなる。
That is, when the volume ratio of the diamond particles is less than this range, the effect of greatly improving the thermal conductivity of the substrate for mounting a semiconductor element due to the diamond particles cannot be obtained as compared with a conventional ceramic or the like.
In addition, the thermal expansion coefficient of the diamond composite material is increased in spite of using two kinds of metals as the binder, and the difference in the thermal expansion coefficient from that of the semiconductor element is particularly increased. Therefore, other members such as semiconductor elements are easily damaged or disconnected from the connection surface due to expansion and contraction when a thermal history is applied.

一方、ダイヤモンド粒子の体積比率が上記の範囲を超える場合には、相対的に結合材としての2種の金属の合計の体積比率が少なくなって、先に説明した、結合材の体積比率を増加させることによる、加工性を向上して、できるだけ短時間の研磨加工で、平滑性に優れ、他部材を隙間なく密着できる接続面を形成する効果が得られない。
これに対し、ダイヤモンド粒子の体積比率を上記の範囲とすることにより、ダイヤモンド複合材料の熱膨張率の増加を抑えて、特に半導体素子との熱膨張率の差をできるだけ小さくすることが可能となる。また熱伝導率をできるだけ高いレベルに維持しながらその加工性を向上して、できるだけ短時間の研磨加工で、平滑性に優れ、半導体素子等の他部材を隙間なく密着できる接続面を形成することが可能となる。
On the other hand, when the volume ratio of the diamond particles exceeds the above range, the total volume ratio of the two kinds of metals as the binder is relatively decreased, and the volume ratio of the binder described above is increased. By improving the workability, it is not possible to obtain an effect of forming a connection surface that is excellent in smoothness and allows other members to be in close contact with each other without gaps by polishing in as short a time as possible.
On the other hand, by setting the volume ratio of the diamond particles in the above range, it is possible to suppress the increase in the thermal expansion coefficient of the diamond composite material and to reduce the difference in the thermal expansion coefficient from the semiconductor element as much as possible. . Also, improve the workability while maintaining the thermal conductivity as high as possible, and form a connection surface that is excellent in smoothness and can adhere to other members such as semiconductor elements without gaps by polishing as short as possible Is possible.

なお、かかる効果をより一層向上することを考慮すると、ダイヤモンド粒子の体積比率は、上記の範囲でも43体積%以上であるのが好ましく、53体積%以下であるのが好ましい。
〈熱特性〉
(熱膨張率)
また本発明において、ダイヤモンド複合材料の25℃から400℃までの熱膨張率が5.5×10−6/K以上、8.5×10−6/K以下に限定されるのは、下記の理由による。
In consideration of further improving this effect, the volume ratio of the diamond particles is preferably 43% by volume or more, and more preferably 53% by volume or less even in the above range.
<Thermal characteristics>
(Coefficient of thermal expansion)
In the present invention, the thermal expansion coefficient from 25 ° C. to 400 ° C. of the diamond composite material is limited to 5.5 × 10 −6 / K or more and 8.5 × 10 −6 / K or less. Depending on the reason.

すなわち、ダイヤモンド複合材料の熱膨張率がこの範囲未満、または範囲を超える場合には、そのいずれにおいても、特に接続面に接続する半導体素子との熱膨張率の差が大きくなる。そのため、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、あるいは接続が外れたりしやすくなる。
これに対し、ダイヤモンド複合材料の熱膨張率を上記の範囲とすることにより、特に接続面に接続する半導体素子との熱膨張率の差をできるだけ小さくできる。したがって熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続が外れたりするのを防止できる。
That is, when the thermal expansion coefficient of the diamond composite material is less than or exceeds this range, the difference in thermal expansion coefficient between the semiconductor element and the semiconductor element connected to the connection surface increases. Therefore, other members such as semiconductor elements are easily damaged or disconnected due to expansion and contraction when a thermal history is applied.
On the other hand, by setting the thermal expansion coefficient of the diamond composite material in the above range, the difference in thermal expansion coefficient between the semiconductor element connected to the connection surface can be made as small as possible. Accordingly, it is possible to prevent other members such as a semiconductor element from being damaged or disconnected from being expanded or contracted when a thermal history is applied.

ダイヤモンド複合材料の熱膨張率を調整するためには、ダイヤモンド粒子の体積比率を、先に説明した範囲で変更したり、第一の金属と第二の金属の体積比率を変更したりすればよい。
かかるダイヤモンド粒子の体積比率、および2種の金属の体積比率と、熱膨張率との関係は、組み合わせる2種の金属の種類によって異なる。
In order to adjust the thermal expansion coefficient of the diamond composite material, the volume ratio of the diamond particles may be changed within the range described above, or the volume ratio of the first metal and the second metal may be changed. .
The relationship between the volume ratio of the diamond particles and the volume ratio of the two metals and the coefficient of thermal expansion varies depending on the types of the two metals to be combined.

例えば第一の金属がCu、第二の金属がMoである組み合わせにおいては、図1中に実線で囲んだ範囲、すなわちダイヤモンド粒子の体積比率yが40体積%以上、55体積%以下あるとともに、かかるダイヤモンド粒子の体積比率y、およびCuとMoの総量中に占めるMoの体積比率x=B/(A+B)×100〔体積%、AはCuの体積%、BはMoの体積%〕が、式(1)(2):
y≧−5.37x+100 (1)
y≦−0.72x+91 (2)
を満足する範囲とすることにより、ダイヤモンド複合材料の25℃から400℃までの熱膨張率を、5.5×10−6/K以上、8.5×10−6/K以下の範囲とすることができる。
For example, in the combination in which the first metal is Cu and the second metal is Mo, the range surrounded by the solid line in FIG. 1, that is, the volume ratio y of the diamond particles is 40% by volume or more and 55% by volume or less, The volume ratio y of the diamond particles and the volume ratio x of Mo in the total amount of Cu and Mo x = B / (A + B) × 100 [volume%, A is the volume% of Cu, and B is the volume% of Mo] Formula (1) (2):
y ≧ −5.37x + 100 (1)
y ≦ −0.72x + 91 (2)
By making the range satisfying the above, the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is in the range of 5.5 × 10 −6 / K or more and 8.5 × 10 −6 / K or less. be able to.

同様に第一の金属がCu、第二の金属がWである組み合わせにおいては、図2中に実線で囲んだ範囲、すなわちダイヤモンド粒子の体積比率yが40体積%以上、55体積%以下あるとともに、かかるダイヤモンド粒子の体積比率y、およびCuとWの総量中に占めるWの体積比率x=B/(A+B)×100〔体積%、AはCuの体積%、BはWの体積%〕が、式(3)(4):
y≧−5.37x+100 (3)
y≦−0.92x+101 (4)
を満足する範囲とすることにより、ダイヤモンド複合材料の25℃から400℃までの熱膨張率を、5.5×10−6/K以上、8.5×10−6/K以下の範囲とすることができる。
Similarly, in the combination in which the first metal is Cu and the second metal is W, the range surrounded by the solid line in FIG. 2, that is, the volume ratio y of the diamond particles is 40 volume% or more and 55 volume% or less. The volume ratio y of the diamond particles, and the volume ratio of W in the total amount of Cu and W x = B / (A + B) × 100 [volume%, A is the volume% of Cu, and B is the volume% of W] Equations (3) and (4):
y ≧ −5.37x + 100 (3)
y ≦ −0.92x + 101 (4)
By making the range satisfying the above, the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is in the range of 5.5 × 10 −6 / K or more and 8.5 × 10 −6 / K or less. be able to.

第一の金属がAg、第二の金属がMoである組み合わせにおいては、図3中に実線で囲んだ範囲、すなわちダイヤモンド粒子の体積比率yが40体積%以上、55体積%以下あるとともに、かかるダイヤモンド粒子の体積比率y、およびAgとMoの総量中に占めるMoの体積比率x=B/(A+B)×100〔体積%、AはAgの体積%、BはMoの体積%〕が、式(5)(6):
y≧−0.74x+49 (5)
y≦−1.33x+127 (6)
を満足する範囲とすることにより、ダイヤモンド複合材料の25℃から400℃までの熱膨張率を、5.5×10−6/K以上、8.5×10−6/K以下の範囲とすることができる。
In the combination in which the first metal is Ag and the second metal is Mo, the range surrounded by the solid line in FIG. 3, that is, the volume ratio y of the diamond particles is 40 volume% or more and 55 volume% or less. The volume ratio y of the diamond particles, and the volume ratio of Mo in the total amount of Ag and Mo x = B / (A + B) × 100 [volume%, A is the volume% of Ag, and B is the volume% of Mo] (5) (6):
y ≧ −0.74x + 49 (5)
y ≦ −1.33x + 127 (6)
By making the range satisfying the above, the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is in the range of 5.5 × 10 −6 / K or more and 8.5 × 10 −6 / K or less. be able to.

さらに第一の金属がAg、第二の金属がWである組み合わせにおいては、図4中に実線で囲んだ範囲、すなわちダイヤモンド粒子の体積比率yが40体積%以上、55体積%以下あるとともに、かかるダイヤモンド粒子の体積比率y、およびAgとWの総量中に占めるWの体積比率x=B/(A+B)×100〔体積%、AはAgの体積%、BはWの体積%〕が、式(7)(8):
y≧−0.74x+49 (7)
y≦−0.83x+102 (8)
を満足する範囲とすることにより、ダイヤモンド複合材料の25℃から400℃までの熱膨張率を、5.5×10−6/K以上、8.5×10−6/K以下の範囲とすることができる。
Further, in the combination in which the first metal is Ag and the second metal is W, the range surrounded by the solid line in FIG. 4, that is, the volume ratio y of the diamond particles is 40% by volume or more and 55% by volume or less, The volume ratio y of the diamond particles, and the volume ratio of W in the total amount of Ag and W x = B / (A + B) × 100 [volume%, A is volume% of Ag, B is volume% of W], Equations (7) and (8):
y ≧ −0.74x + 49 (7)
y ≦ −0.83x + 102 (8)
By making the range satisfying the above, the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is in the range of 5.5 × 10 −6 / K or more and 8.5 × 10 −6 / K or less. be able to.

なおダイヤモンド複合材料の熱膨張率を、本発明では、示差熱膨張計を用いて測定した値でもって表すこととする。
(熱伝導率)
本発明の構成により、半導体素子実装用基板の熱伝導率をどの程度としうるかは特に限定されないが、かかる熱伝導率は300W/mK以上、450W/mK以下であるのが好ましい。
In the present invention, the coefficient of thermal expansion of the diamond composite material is represented by a value measured using a differential thermal dilatometer.
(Thermal conductivity)
The degree of the thermal conductivity of the substrate for mounting a semiconductor element can be made not particularly limited by the configuration of the present invention, but the thermal conductivity is preferably 300 W / mK or more and 450 W / mK or less.

半導体素子実装用基板の熱伝導率がこの範囲未満では放熱性が不十分で、接続面に接続した半導体素子からの発熱を、半導体素子実装用基板を通して速やかに放熱させることができず、半導体素子がそれ自体の発熱によって動作不良を生じるのを防止できないおそれがある。
一方、熱伝導率が上記の範囲を超える高い放熱性を半導体素子実装用基板に付与することは、たとえ本発明の構成であっても困難である。
If the thermal conductivity of the semiconductor element mounting substrate is less than this range, the heat dissipation is insufficient, and the heat generated from the semiconductor element connected to the connection surface cannot be quickly dissipated through the semiconductor element mounting substrate. However, it may not be possible to prevent malfunction due to heat generation of itself.
On the other hand, even if it is the structure of this invention, it is difficult to provide high heat dissipation with the heat conductivity exceeding said range to the board | substrate for semiconductor element mounting.

これに対し、半導体素子実装用基板の熱伝導率を上記の範囲とすることで、当該半導体素子実装用基板により高度な放熱性を付与して、接続面に接続した半導体素子が、それ自体の発熱によって動作不良を生じるのをより一層防止できる。
熱伝導率を調整するためには、ダイヤモンド粒子の体積比率、および第一の金属と第二の金属の体積比率を、先に説明した範囲で変更すればよい。
On the other hand, by setting the thermal conductivity of the semiconductor element mounting substrate in the above range, the semiconductor element mounting substrate provides a high heat dissipation property, and the semiconductor element connected to the connection surface has its own. It is possible to further prevent operation failure due to heat generation.
In order to adjust the thermal conductivity, the volume ratio of the diamond particles and the volume ratio of the first metal and the second metal may be changed within the ranges described above.

なお半導体素子実装用基板の熱伝導率を、本発明では、レーザーフラッシュ法によって測定した値でもって表すこととする。
〈接続面〉
本発明の半導体素子実装用基板は、先に説明したように従来のものに比べて結合材が多く、加工性の良いダイヤモンド複合材料からなるため、当該半導体素子実装用基板の、半導体素子を接続するための素子実装面や、他の放熱部材を熱的に接続するための伝熱面等の、他部材との接続面は、これまでに比べて短時間の研磨加工で、凹凸のない平滑性に優れた面とすることができる。
In the present invention, the thermal conductivity of the substrate for mounting a semiconductor element is represented by a value measured by a laser flash method.
<Connection surface>
As described above, the substrate for mounting a semiconductor element according to the present invention has a larger amount of binder than the conventional one and is made of a diamond composite material with good workability. Therefore, the semiconductor element mounting substrate is connected to the substrate for mounting the semiconductor element. The connection surface with other members, such as the element mounting surface for heat treatment and the heat transfer surface for thermally connecting other heat dissipation members, is smooth and smooth with less time than before. It can be set as the surface excellent in property.

例えば#100〜#400のダイヤモンド砥石を用いた平面研磨では、従来は20時間程度を要しても、もっと粗い面しか形成できなかったものを、1〜5時間程度の処理によって、深さまたは高さが10〜40μm、面方向の最大径が10μm以上、3mm以下である凹部および凸部を有しないか、または、かかる大きさの凹部および凸部の、接続面の単位面積当たりの存在個数が10個/cm以下という平滑性に優れた接続面とすることができる。 For example, in the surface polishing using a diamond grindstone of # 100 to # 400, the conventional method, which required only a rougher surface even if it takes about 20 hours, can be processed by processing for about 1 to 5 hours. There are no recesses and projections having a height of 10 to 40 μm and a maximum diameter in the surface direction of 10 μm or more and 3 mm or less, or the number of such recesses and projections per unit area of the connection surface. Can be a connection surface excellent in smoothness of 10 pieces / cm 2 or less.

凹部および凸部の存在個数が上記の範囲を超える場合には、接続面に、半導体素子等の他部材を隙間なく密着できないおそれがある。
これに対し、凹部および凸部の存在個数を上記の範囲とすることにより、半導体素子等の他部材を接続面に隙間なく密着させた状態で接続して、熱伝導の効率を向上することが可能となる。
When the number of the concave portions and the convex portions exceeds the above range, there is a possibility that other members such as a semiconductor element cannot be adhered to the connection surface without a gap.
On the other hand, by setting the number of concave portions and convex portions in the above range, it is possible to improve the efficiency of heat conduction by connecting other members such as semiconductor elements in close contact with the connection surface without gaps. It becomes possible.

なお、凹部および凸部の存在個数の下限値は、いうまでもなく0個/cmである。つまり凹部および凸部を全く有しないのが、他部材を隙間なく密着させて熱伝導の効率を向上する上で最も好ましいが、存在個数が10個/cm以下であれば、0個/cmの場合と同等の効果を奏することができる。
かかる凹部および凸部の存在個数を、本発明では、当該個数を規定する接続面内の任意の10個所で、倍率20倍の顕微鏡を用いて、そのφ11mmの視野中に確認された、先に説明した深さまたは高さと、面方向の最大径とを有する凹部および凸部の個数を計数し、それを1cmあたりの個数に換算した結果の平均値でもって表すこととする。
Needless to say, the lower limit of the number of concave and convex portions is 0 / cm 2 . In other words, it is most preferable to have no concave portions and convex portions at all in order to improve the efficiency of heat conduction by bringing other members into close contact with each other without any gap. However, if the number of existing members is 10 pieces / cm 2 or less, 0 pieces / cm. The same effect as in the case of 2 can be achieved.
In the present invention, the number of such concave portions and convex portions was confirmed in the φ11 mm field of view using a microscope with a magnification of 20 at any 10 locations in the connection surface that define the number. The number of recesses and projections having the described depth or height and the maximum diameter in the surface direction is counted and expressed as an average value obtained by converting the number to the number per 1 cm 2 .

また本発明の半導体素子実装用基板によれば、上述した短時間の平面研磨により、接続面の、凹部および凸部以外の領域を、JIS B0601:2001において規定された、粗さ曲線の算術平均粗さRが0.1μm以上、0.5μm以下、最大高さ粗さRが1μm以上、5μm以下という、平滑性に優れた面とすることもできる。
算術平均粗さR、および/または最大高さ粗さRがこの範囲を超える場合には、接続面に、半導体素子等の他部材を隙間なく密着できないおそれがある。
According to the substrate for mounting a semiconductor element of the present invention, the arithmetic mean of the roughness curve defined in JIS B0601: 2001 is obtained by removing the region other than the concave portion and the convex portion of the connection surface by the above-described short-time planar polishing. A surface with excellent smoothness can also be obtained in which the roughness Ra is 0.1 μm or more and 0.5 μm or less, and the maximum height roughness Rz is 1 μm or more and 5 μm or less.
When the arithmetic average roughness R a and / or the maximum height roughness R z exceed this range, there is a possibility that other members such as a semiconductor element cannot be closely adhered to the connection surface.

一方、算術平均粗さR、および/または最大高さ粗さRを上記の範囲未満とすることは、たとえ本発明の構成であっても困難であり、研磨に長時間を要する上、製造の歩留まりが低下する等して半導体素子実装用基板の生産性が低下するとともに、製造コストが高くつくおそれがある。
これ対し、算術平均粗さR、および最大高さ粗さRを上述した範囲とすることにより、半導体素子実装用基板の生産性を向上し、製造コストを低減しながら、なおかつ半導体素子等の他部材をより一層隙間なく密着させて、熱伝導の効率をさらに向上できる。
On the other hand, it is difficult to make the arithmetic average roughness R a and / or the maximum height roughness R z less than the above range, even in the configuration of the present invention, and it takes a long time for polishing. There is a possibility that the productivity of the substrate for mounting semiconductor elements decreases due to a decrease in manufacturing yield and the manufacturing cost increases.
On the other hand, by setting the arithmetic average roughness R a and the maximum height roughness R z in the above-described ranges, the productivity of the substrate for mounting the semiconductor element is improved, the manufacturing cost is reduced, and the semiconductor element, etc. It is possible to further improve the efficiency of heat conduction by bringing other members into close contact with each other without any gaps.

〈接合層〉
接続面は、Au−Sn系、In−Sn系、またはAu-Ge系で、かつ鉛フリーの半田またはロウ材からなる接合層によって被覆されているのが好ましい。
かかる半田またはロウ材からなる接合層は、接続面、すなわち素子実装面や伝熱面に半導体素子や他の放熱部材等の他部材を接続する際の加熱によって速やかに溶融し、しかも半導体素子を動作させる際の熱履歴によって接続の強度が大きく低下したり溶融したりしない上、熱伝導性や接続の耐久性を向上する点で優れている。
<Joint layer>
The connection surface is preferably covered with a bonding layer made of Au-Sn, In-Sn, or Au-Ge and made of lead-free solder or brazing material.
Such a bonding layer made of solder or brazing material is quickly melted by heating when connecting other members such as a semiconductor element or other heat radiating member to the connection surface, that is, the element mounting surface or the heat transfer surface, and the semiconductor element is It is excellent in that the strength of the connection is not greatly reduced or melted due to the thermal history during operation, and the thermal conductivity and the durability of the connection are improved.

接合層は、接続面のうち凹部および凸部以外の領域での厚みが1μm以上、特に3μm以上であるのが好ましく、10μm以下、特に7μm以下であるのが好ましい。
接合層の厚みがこの範囲未満では、接続面上に接続される半導体素子等の他部材の、接続の強度が不十分になるおそれがある。
一方、接合層の厚みが上記の範囲を超える場合には、接続した半導体素子実装用基板と他部材との間に多量の半田またはロウ材が介在することになるため、両者間の熱伝導性が低下するおそれがある。
The bonding layer preferably has a thickness of 1 μm or more, particularly 3 μm or more, preferably 10 μm or less, particularly preferably 7 μm or less, in the region other than the concave and convex portions on the connection surface.
If the thickness of the bonding layer is less than this range, the connection strength of other members such as a semiconductor element connected on the connection surface may be insufficient.
On the other hand, when the thickness of the bonding layer exceeds the above range, a large amount of solder or brazing material is interposed between the connected semiconductor element mounting substrate and other members, so that the thermal conductivity between the two May decrease.

接合層は、例えば真空蒸着法、スパッタリング法、イオンプレーティング法、化学めっき法、電気めっき法等の、従来公知の種々の成膜方法によって形成することができる。また接合層は、例えば半田またはロウ材からなる箔状のプリフォームを接続面に積層した状態で加熱、溶融させて形成してもよい。
〈密着層〉
接続面と接合層との間には、Ni、Au、Ti、およびCrからなる群より選ばれた少なくとも1種の金属からなる密着層を設けるのが好ましい。
The bonding layer can be formed by various conventionally known film forming methods such as vacuum deposition, sputtering, ion plating, chemical plating, and electroplating. In addition, the bonding layer may be formed by heating and melting a foil-shaped preform made of, for example, solder or brazing material on the connection surface.
<Adhesion layer>
It is preferable to provide an adhesion layer made of at least one metal selected from the group consisting of Ni, Au, Ti, and Cr between the connection surface and the bonding layer.

かかる密着層の機能により、接合層の、接続面への密着性を向上して、接合層上に接続される他部材の、半導体素子実装用基板に対する接続の強度を高めることができる。
密着層は、接続面のうち凹部および凸部以外の領域での厚みが0.01μm以上であるのが好ましく、10μm以下であるのが好ましい。
密着層の厚みがこの範囲未満では、密着層を形成することによる効果が得られないおそれがある。
With the function of the adhesion layer, the adhesion of the bonding layer to the connection surface can be improved, and the strength of the connection of the other member connected on the bonding layer to the semiconductor element mounting substrate can be increased.
The adhesion layer preferably has a thickness of 0.01 μm or more in the region other than the concave and convex portions of the connection surface, and preferably 10 μm or less.
If the thickness of the adhesion layer is less than this range, the effect of forming the adhesion layer may not be obtained.

一方、密着層の厚みが上記の範囲を超える場合には、接続面と他部材との間の熱伝導性が低下するおそれがある。
密着層は、例えば真空蒸着法、スパッタリング法、イオンプレーティング法、化学めっき法、電気めっき法等の、従来公知の種々の成膜方法によって形成することができる。
〈拡散防止層〉
密着層と接合層との間には、Pt、Mo、およびPdからなる群より選ばれた少なくとも1種の金属からなる拡散防止層を設けるのが好ましい。
On the other hand, when the thickness of the adhesion layer exceeds the above range, the thermal conductivity between the connection surface and the other member may be reduced.
The adhesion layer can be formed by various conventionally known film forming methods such as vacuum deposition, sputtering, ion plating, chemical plating, and electroplating.
<Diffusion prevention layer>
It is preferable to provide a diffusion prevention layer made of at least one metal selected from the group consisting of Pt, Mo, and Pd between the adhesion layer and the bonding layer.

上記両層の間に拡散防止層を介在させると、素子実装面に半導体素子を接続したり伝熱面に他の放熱部材を接続したりする際の加熱によって接合層を溶融させた際に、当該拡散防止層の機能によって、密着層から接合層へ金属が拡散するのを防いで、当該接合層を形成する半田またはロウ材の組成が変質するのを防止することができる。
拡散防止層は、接続面のうち凹部および凸部以外の領域での厚みが0.01μm以上であるのが好ましく、1μm以下であるのが好ましい。
When a diffusion prevention layer is interposed between the two layers, when the bonding layer is melted by heating when connecting the semiconductor element to the element mounting surface or connecting another heat dissipation member to the heat transfer surface, By the function of the diffusion preventing layer, it is possible to prevent the metal from diffusing from the adhesion layer to the bonding layer and to prevent the composition of the solder or brazing material forming the bonding layer from being altered.
The diffusion preventing layer preferably has a thickness of 0.01 μm or more in the region other than the concave and convex portions in the connection surface, and preferably 1 μm or less.

拡散防止層の厚みがこの範囲未満では、拡散防止層を形成することによる効果が得られないおそれがある。
一方、拡散防止層の厚みが上記の範囲を超える場合には、接続面と他部材との間の熱伝導性が低下するおそれがある。
拡散防止層は、例えば真空蒸着法、スパッタリング法、イオンプレーティング法、化学めっき法、電気めっき法等の、従来公知の種々の成膜方法によって形成することができる。
If the thickness of the diffusion preventing layer is less than this range, the effect of forming the diffusion preventing layer may not be obtained.
On the other hand, when the thickness of the diffusion preventing layer exceeds the above range, the thermal conductivity between the connection surface and the other member may be reduced.
The diffusion preventing layer can be formed by various conventionally known film forming methods such as vacuum deposition, sputtering, ion plating, chemical plating, and electroplating.

《半導体装置》
本発明は、以上で説明した本発明の半導体素子実装用基板を、必要に応じて、レーザー加工等によって所定の平面形状に切り出した後、接続面としての素子実装面に半導体素子が接続された半導体装置である。
かかる本発明の半導体装置においては、半導体素子を、先に説明したように素子実装面に、例えば接合層を介して隙間なく密着させた状態で接続できる。そのため半導体素子からの発熱を、半導体素子実装用基板を通して速やかに放熱することができ、半導体素子が、それ自体の発熱によって動作不良を生じるのを防止して、これまでよりも長期間に亘って駆動させ続けることが可能となる。
<Semiconductor device>
In the present invention, the semiconductor element mounting substrate of the present invention described above is cut into a predetermined planar shape by laser processing or the like, if necessary, and then the semiconductor element is connected to the element mounting surface as a connection surface It is a semiconductor device.
In such a semiconductor device of the present invention, as described above, the semiconductor element can be connected to the element mounting surface in a state in which the semiconductor element is in close contact with, for example, a bonding layer. Therefore, the heat generated from the semiconductor element can be quickly radiated through the substrate for mounting the semiconductor element, and the semiconductor element is prevented from malfunctioning due to the heat generated by itself, for a longer period than before. It is possible to continue driving.

また半導体素子実装用基板が、例えば素子実装面とともに伝熱面を有する場合には、かかる伝熱面に、例えば金属基板等の他の放熱部材を、やはり接合層を介して隙間なく密着させた状態で接続できるため、半導体素子からの発熱を、半導体素子実装用基板と他の放熱部材とを通してより一層、速やかに放熱することができる。そのため半導体素子を、さらに長期間に亘って駆動させ続けることが可能となる。   Further, when the semiconductor element mounting substrate has a heat transfer surface together with the element mounting surface, for example, another heat radiating member such as a metal substrate is closely adhered to the heat transfer surface through the bonding layer. Since the connection can be made in a state, the heat generated from the semiconductor element can be radiated more quickly through the semiconductor element mounting substrate and the other heat radiating member. Therefore, the semiconductor element can be continuously driven for a longer period.

〈実施例1−1〉
平均粒径40μmのダイヤモンド粒子、平均粒径3μmのCu粉(純度99%以上、第一の金属)、および平均粒径3μmのMo粉(純度99%以上、第二の金属)を、この3成分の総量中に占めるダイヤモンド粒子の体積比率が40.0体積%、Cu粉の体積比率が52.8体積%、Mo粉の体積比率が7.2体積%となるように配合した混合物を、プレス圧:196MPaの条件で予備成形後、真空中でモリブデンからなるカプセル中に封入した。
<Example 1-1>
Diamond particles having an average particle diameter of 40 μm, Cu powder having an average particle diameter of 3 μm (purity 99% or more, first metal), and Mo powder having an average particle diameter of 3 μm (purity 99% or more, second metal) A mixture in which the volume ratio of diamond particles in the total amount of components is 40.0% by volume, the volume ratio of Cu powder is 52.8% by volume, and the volume ratio of Mo powder is 7.2% by volume, After pre-molding under a press pressure of 196 MPa, it was sealed in a capsule made of molybdenum in a vacuum.

3成分の総量中に占めるダイヤモンド粒子の体積比率yは40体積%、CuとMoの総量中に占めるMoの体積比率xは12体積%であった。
次いでこのカプセルを加圧圧力:5GPa、加熱温度:1100℃の条件で5分間、加圧しながら加熱し、引き続いて圧力を保持した状態で温度を常温に下げて30分間保持した後、常圧に戻してカプセルを回収した。
The volume ratio y of the diamond particles in the total amount of the three components was 40% by volume, and the volume ratio x of Mo in the total amount of Cu and Mo was 12% by volume.
Next, the capsule was heated under pressure for 5 minutes under the conditions of pressurization pressure: 5 GPa and heating temperature: 1100 ° C. Subsequently, the pressure was maintained, the temperature was lowered to room temperature and maintained for 30 minutes, and then returned to normal pressure. The capsule was recovered by returning.

回収したカプセルの表面を研削することでモリブデンを除去して焼結体を取り出し、取り出した焼結体を放電加工して板状に切り出した後、板の一面を#140のダイヤモンド砥石を用いて2時間、平面研磨して素子搭載面として、厚み0.3mmの半導体素子実装用基板を作製した。
〈実施例1−2〜1−21〉
ダイヤモンド粒子、Cu粉、およびMo粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびCuとMoの総量中に占めるMoの体積比率x(体積%)を表1〜表3に示す値としたこと以外は実施例1−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
The surface of the collected capsule is ground to remove molybdenum and take out the sintered body. After the taken-out sintered body is cut into a plate by electric discharge machining, one side of the plate is used with a # 140 diamond grindstone. Surface polishing was performed for 2 hours to prepare a semiconductor element mounting substrate having a thickness of 0.3 mm as an element mounting surface.
<Examples 1-2 to 1-21>
Adjusting the volume ratio of diamond particles, Cu powder, and Mo powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of Mo in the total amount of Cu and Mo x ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 1-1 except that the volume%) was changed to the values shown in Tables 1 to 3.

〈比較例1−1〜1−3〉
平均粒径40μmのダイヤモンド粒子、および平均粒径3μmのCu粉(純度99%以上)を表4に示す値で配合し、Mo粉を配合しなかったこと以外は実施例1−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
〈比較例1−4〜1−22〉
ダイヤモンド粒子、Cu粉、およびMo粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびCuとMoの総量中に占めるMoの体積比率x(体積%)を表4〜表7に示す値としたこと以外は実施例1−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
<Comparative Examples 1-1 to 1-3>
Diamond particles having an average particle diameter of 40 μm and Cu powder having an average particle diameter of 3 μm (purity 99% or more) were blended at the values shown in Table 4 and the same as in Example 1-1 except that no Mo powder was blended. Thus, a semiconductor element mounting substrate having the same shape and the same dimensions was produced.
<Comparative Examples 1-4 to 1-22>
Adjusting the volume ratio of diamond particles, Cu powder, and Mo powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of Mo in the total amount of Cu and Mo x ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 1-1 except that (volume%) was set to the values shown in Tables 4 to 7.

実施例、比較例で作製した半導体素子実装用基板の熱膨張率、熱伝導率、素子搭載面における、深さまたは高さが10〜40μm、面方向の最大径が10μm〜3mmである凹部および凸部の、単位面積あたりの個数、ならびに凹部および凸部外の領域での表面粗さを示す粗さ曲線の算術平均粗さR、最大高さ粗さRを表1〜表7にまとめた。
また実施例、比較例におけるダイヤモンドの体積比率と、CuとMoの体積比率との関係を図1に示した。図中の○は実施例、●は比較例を示している。
The thermal expansion coefficient, thermal conductivity, depth or height of the element mounting surface of the semiconductor element mounting substrate produced in the examples and comparative examples is 10 to 40 μm, and the concave portion having a maximum surface direction diameter of 10 μm to 3 mm and Tables 1 to 7 show the arithmetic average roughness R a and the maximum height roughness R z of the roughness curve indicating the number of protrusions per unit area and the surface roughness in the regions outside the recesses and protrusions. Summarized.
The relationship between the volume ratio of diamond and the volume ratio of Cu and Mo in Examples and Comparative Examples is shown in FIG. In the figure, ○ indicates an example, and ● indicates a comparative example.

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

比較例1−3の結果より、従来の、結合材としてCuのみを用いた系では、ダイヤモンド粒子の体積比率が大きいと加工性が悪く、2時間程度の短時間の研磨では平滑性に優れた接続面を形成できないことが判った。
また比較例1−1、1−2の結果より、ダイヤモンド粒子の体積比率を小さくすると加工性が向上して、短時間の研磨によって平滑性に優れた接触面を形成できるものの、25℃から400℃までの熱膨張率が5.0×10−6/K以上、8.5×10−6K以下の範囲を外れて大きくなってしまうため、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりしやすくなることが判った。
From the result of Comparative Example 1-3, in the conventional system using only Cu as the binder, workability is poor when the volume ratio of diamond particles is large, and smoothness is excellent in short-time polishing of about 2 hours. It was found that the connection surface could not be formed.
Further, from the results of Comparative Examples 1-1 and 1-2, when the volume ratio of the diamond particles is decreased, the workability is improved, and a contact surface having excellent smoothness can be formed by short-time polishing, but from 25 ° C. to 400 ° C. The coefficient of thermal expansion up to 5 ° C. is larger than 5.0 × 10 −6 / K and not more than 8.5 × 10 −6 K. Therefore , the thermal expansion is caused by expansion and contraction when a thermal history is applied. It has been found that other members such as semiconductor elements are easily damaged or disconnected from the connection surface.

これに対し実施例1−1〜1−21、比較例1−4〜1−22の結果より、ダイヤモンド粒子の体積比率を40体積%以上、55体積%以下とし、なおかつ結合材として、第一の金属であるCuと第二の金属であるMoとを、熱膨張率が上記の範囲となるように、つまり図1中に実線で囲んだ範囲に入るように併用することで、良好な加工性を維持しながら、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりするのを防止できることが判った。   On the other hand, from the results of Examples 1-1 to 1-21 and Comparative Examples 1-4 to 1-22, the volume ratio of diamond particles is set to 40% by volume or more and 55% by volume or less, and the binder is first. Good processing is achieved by using both the metal Cu and the second metal Mo so that the coefficient of thermal expansion is in the above range, that is, the range surrounded by the solid line in FIG. It has been found that other members such as a semiconductor element can be prevented from being damaged or disconnected from the connection surface due to expansion and contraction when a heat history is applied while maintaining the heat characteristics.

〈実施例2−1〉
平均粒径40μmのダイヤモンド粒子、平均粒径3μmのCu粉(純度99%以上、第一の金属)、および平均粒径3μmのW粉(純度99%以上、第二の金属)を、この3成分の総量中に占めるダイヤモンド粒子の体積比率が40.0体積%、Cu粉の体積比率が52.8体積%、W粉の体積比率が7.2体積%となるように配合した混合物を、プレス圧:196MPaの条件で予備成形後、真空中でモリブデンからなるカプセル中に封入した。
<Example 2-1>
Diamond particles having an average particle diameter of 40 μm, Cu powder having an average particle diameter of 3 μm (purity 99% or more, first metal), and W powder having an average particle diameter of 3 μm (purity 99% or more, second metal) A mixture in which the volume ratio of diamond particles in the total amount of components is 40.0% by volume, the volume ratio of Cu powder is 52.8% by volume, and the volume ratio of W powder is 7.2% by volume, After pre-molding under a press pressure of 196 MPa, it was sealed in a capsule made of molybdenum in a vacuum.

3成分の総量中に占めるダイヤモンド粒子の体積比率yは40体積%、CuとWの総量中に占めるWの体積比率xは12体積%であった。
次いでこのカプセルを加圧圧力:5GPa、加熱温度:1100℃の条件で5分間、加圧しながら加熱し、引き続いて圧力を保持した状態で温度を常温に下げて30分間保持した後、常圧に戻してカプセルを回収した。
The volume ratio y of diamond particles in the total amount of the three components was 40% by volume, and the volume ratio x of W in the total amount of Cu and W was 12% by volume.
Next, the capsule was heated under pressure for 5 minutes under the conditions of pressurization pressure: 5 GPa and heating temperature: 1100 ° C. Subsequently, the pressure was maintained, the temperature was lowered to room temperature and maintained for 30 minutes, and then returned to normal pressure. The capsule was recovered by returning.

回収したカプセルの表面を研削することでモリブデンを除去して焼結体を取り出し、取り出した焼結体を放電加工して板状に切り出した後、板の一面を#140のダイヤモンド砥石を用いて2時間、平面研磨して素子搭載面として、厚み0.3mmの半導体素子実装用基板を作製した。
〈実施例2−2〜2−21〉
ダイヤモンド粒子、Cu粉、およびW粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびCuとWの総量中に占めるWの体積比率x(体積%)を表8〜表10に示す値としたこと以外は実施例2−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
The recovered capsule is ground to remove the molybdenum by removing the sintered body, and the taken-out sintered body is electrodischarge processed and cut into a plate shape. Then, one side of the plate is used with a # 140 diamond grindstone Surface polishing was performed for 2 hours to prepare a semiconductor element mounting substrate having a thickness of 0.3 mm as an element mounting surface.
<Examples 2-2 to 2-21>
By adjusting the volume ratio of diamond particles, Cu powder, and W powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of W in the total amount of Cu and W ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 2-1, except that (volume%) was set to the values shown in Tables 8 to 10.

〈比較例2−1〜2−19〉
ダイヤモンド粒子、Cu粉、およびW粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびCuとWの総量中に占めるWの体積比率x(体積%)を表11〜表13に示す値としたこと以外は実施例2−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
<Comparative Examples 2-1 to 2-19>
By adjusting the volume ratio of diamond particles, Cu powder, and W powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of W in the total amount of Cu and W ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 2-1, except that (volume%) was set to the values shown in Tables 11 to 13.

実施例、比較例で作製した半導体素子実装用基板の熱膨張率、熱伝導率、素子搭載面における、深さまたは高さが10〜40μm、面方向の最大径が10μm〜3mmである凹部および凸部の、単位面積あたりの個数、ならびに凹部および凸部外の領域での表面粗さを示す粗さ曲線の算術平均粗さR、最大高さ粗さRを表8〜表13にまとめた。
また実施例、比較例におけるダイヤモンドの体積比率と、CuとWの体積比率との関係を図2に示した。図中の○は実施例、●は比較例を示している。
The thermal expansion coefficient, thermal conductivity, depth or height of the element mounting surface of the semiconductor element mounting substrate produced in the examples and comparative examples is 10 to 40 μm, and the concave portion having a maximum surface direction diameter of 10 μm to 3 mm and Tables 8 to 13 show the arithmetic average roughness R a and the maximum height roughness R z of the roughness curves indicating the number of protrusions per unit area and the surface roughness in the regions outside the recesses and protrusions. Summarized.
The relationship between the volume ratio of diamond and the volume ratio of Cu and W in the examples and comparative examples is shown in FIG. In the figure, ○ indicates an example, and ● indicates a comparative example.

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

Figure 2015099913
Figure 2015099913

実施例2−1〜2−21、比較例2−1〜2−19の結果より、ダイヤモンド粒子の体積比率を40体積%以上、55体積%以下とし、なおかつ結合材として、第一の金属であるCuと第二の金属であるWとを、熱膨張率が5.0×10−6/K以上、8.5×10−6K以下の範囲となるように、つまり図2中に実線で囲んだ範囲に入るように併用することで、良好な加工性を維持しながら、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりするのを防止できることが判った。 From the results of Examples 2-1 to 2-21 and Comparative Examples 2-1 to 2-19, the volume ratio of the diamond particles is set to 40% by volume or more and 55% by volume or less, and the binder is the first metal. A certain Cu and W, which is the second metal, have a thermal expansion coefficient in the range of 5.0 × 10 −6 / K or more and 8.5 × 10 −6 K or less, that is, a solid line in FIG. By using together so that it falls within the range surrounded by, other members such as semiconductor elements may be damaged or connected to the connection surface due to expansion and contraction when heat history is applied while maintaining good workability It has been found that it is possible to prevent from falling off.

〈実施例3−1〉
平均粒径40μmのダイヤモンド粒子、平均粒径3μmのAg粉(純度99%以上、第一の金属)、および平均粒径3μmのMo粉(純度99%以上、第二の金属)を、この3成分の総量中に占めるダイヤモンド粒子の体積比率が40.0体積%、Ag粉の体積比率が47.5体積%、Mo粉の体積比率が12.5体積%となるように配合した混合物を、プレス圧:196MPaの条件で予備成形後、真空中でモリブデンからなるカプセル中に封入した。
<Example 3-1>
Diamond powder having an average particle size of 40 μm, Ag powder having an average particle size of 3 μm (purity 99% or more, first metal), and Mo powder having an average particle size of 3 μm (purity 99% or more, second metal) A mixture in which the volume ratio of diamond particles in the total amount of components is 40.0% by volume, the volume ratio of Ag powder is 47.5% by volume, and the volume ratio of Mo powder is 12.5% by volume, After pre-molding under a press pressure of 196 MPa, it was sealed in a capsule made of molybdenum in a vacuum.

3成分の総量中に占めるダイヤモンド粒子の体積比率yは40体積%、AgとMoの総量中に占めるMoの体積比率xは21体積%であった。
次いでこのカプセルを加圧圧力:5GPa、加熱温度:1100℃の条件で5分間、加圧しながら加熱し、引き続いて圧力を保持した状態で温度を常温に下げて30分間保持した後、常圧に戻してカプセルを回収した。
The volume ratio y of the diamond particles in the total amount of the three components was 40% by volume, and the volume ratio x of Mo in the total amount of Ag and Mo was 21% by volume.
Next, the capsule was heated under pressure for 5 minutes under the conditions of pressurization pressure: 5 GPa and heating temperature: 1100 ° C. Subsequently, the pressure was maintained, the temperature was lowered to room temperature and maintained for 30 minutes, and then returned to normal pressure. The capsule was recovered by returning.

回収したカプセルの表面を研削することでモリブデンを除去して焼結体を取り出し、取り出した焼結体を放電加工して板状に切り出した後、板の一面を#140のダイヤモンド砥石を用いて2時間、平面研磨して素子搭載面として、厚み0.3mmの半導体素子実装用基板を作製した。
〈実施例3−2〜3−23〉
ダイヤモンド粒子、Ag粉、およびMo粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびAgとMoの総量中に占めるMoの体積比率x(体積%)を表14〜表17に示す値としたこと以外は実施例3−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
The recovered capsule is ground to remove the molybdenum by removing the sintered body, and the taken-out sintered body is electrodischarge processed and cut into a plate shape. Then, one side of the plate is used with a # 140 diamond grindstone Surface polishing was performed for 2 hours to prepare a semiconductor element mounting substrate having a thickness of 0.3 mm as an element mounting surface.
<Examples 3-2 to 3-23>
Adjusting the volume ratio of diamond particles, Ag powder, and Mo powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of Mo in the total amount of Ag and Mo x ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 3-1, except that (volume%) was set to the values shown in Tables 14 to 17.

〈比較例3−1〜3−3〉
平均粒径40μmのダイヤモンド粒子、および平均粒径3μmのAg粉(純度99%以上)を表18に示す値で配合し、Mo粉を配合しなかったこと以外は実施例3−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
〈比較例3−4〜3−22〉
ダイヤモンド粒子、Ag粉、およびMo粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびAgとMoの総量中に占めるMoの体積比率x(体積%)を表18〜表21に示す値としたこと以外は実施例3−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
<Comparative Examples 3-1 to 3-3>
Diamond particles having an average particle diameter of 40 μm and Ag powder having an average particle diameter of 3 μm (purity 99% or more) were blended at the values shown in Table 18, and the same procedure as in Example 3-1 except that no Mo powder was blended. Thus, a semiconductor element mounting substrate having the same shape and the same dimensions was produced.
<Comparative Examples 3-4 to 3-22>
Adjusting the volume ratio of diamond particles, Ag powder, and Mo powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of Mo in the total amount of Ag and Mo x ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 3-1, except that (volume%) was set to the values shown in Table 18 to Table 21.

実施例、比較例で作製した半導体素子実装用基板の熱膨張率、熱伝導率、素子搭載面における、深さまたは高さが10〜40μm、面方向の最大径が10μm〜3mmである凹部および凸部の、単位面積あたりの個数、ならびに凹部および凸部外の領域での表面粗さを示す粗さ曲線の算術平均粗さR、最大高さ粗さRを表14〜表21にまとめた。
また実施例、比較例におけるダイヤモンドの体積比率と、AgとMoの体積比率との関係を図3に示した。図中の○は実施例、●は比較例を示している。
The thermal expansion coefficient, thermal conductivity, depth or height of the element mounting surface of the semiconductor element mounting substrate produced in the examples and comparative examples is 10 to 40 μm, and the concave portion having a maximum surface direction diameter of 10 μm to 3 mm and Tables 14 to 21 show the arithmetic average roughness R a and the maximum height roughness R z of the roughness curves indicating the number of protrusions per unit area and the surface roughness in the regions outside the recesses and protrusions. Summarized.
The relationship between the volume ratio of diamond and the volume ratio of Ag and Mo in Examples and Comparative Examples is shown in FIG. In the figure, ○ indicates an example, and ● indicates a comparative example.

Figure 2015099913
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Figure 2015099913
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Figure 2015099913
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Figure 2015099913
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比較例3−3の結果より、従来の、結合材としてAgのみを用いた系では、ダイヤモンド粒子の体積比率が大きいと加工性が悪く、2時間程度の短時間の研磨では平滑性に優れた接続面を形成できないことが判った。
また比較例3−1、3−2の結果より、ダイヤモンド粒子の体積比率を小さくすると加工性が向上して、短時間の研磨によって平滑性に優れた接触面を形成できるものの、25℃から400℃までの熱膨張率が5.0×10−6/K以上、8.5×10−6K以下の範囲を外れて大きくなってしまうため、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりするのを防止できないことが判った。
From the result of Comparative Example 3-3, in a conventional system using only Ag as a binder, workability is poor when the volume ratio of diamond particles is large, and smoothness is excellent in short-time polishing of about 2 hours. It was found that the connection surface could not be formed.
Further, from the results of Comparative Examples 3-1 and 3-2, when the volume ratio of the diamond particles is reduced, the workability is improved, and a contact surface with excellent smoothness can be formed by short-time polishing, but from 25 ° C. to 400 ° C. The coefficient of thermal expansion up to 5 ° C. is larger than 5.0 × 10 −6 / K and not more than 8.5 × 10 −6 K. Therefore , the thermal expansion is caused by expansion and contraction when a thermal history is applied. It has been found that it is impossible to prevent other members such as semiconductor elements from being damaged or from being disconnected from the connection surface.

これに対し実施例3−1〜3−23、比較例3−4〜3−22の結果より、ダイヤモンド粒子の体積比率を40体積%以上、55体積%以下とし、なおかつ結合材として、第一の金属であるAgと第二の金属であるMoとを、熱膨張率が上記の範囲となるように、つまり図3中に実線で囲んだ範囲に入るように併用することで、良好な加工性を維持しながら、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりするのを防止できることが判った。   On the other hand, from the results of Examples 3-1 to 3-23 and Comparative examples 3-4 to 3-22, the volume ratio of the diamond particles is set to 40% by volume or more and 55% by volume or less, and the binder is first. By using together Ag, which is the metal of the second metal, and Mo, which is the second metal, so that the thermal expansion coefficient is in the above range, that is, within the range surrounded by the solid line in FIG. It has been found that other members such as a semiconductor element can be prevented from being damaged or disconnected from the connection surface due to expansion and contraction when a heat history is applied while maintaining the heat characteristics.

〈実施例4−1〉
平均粒径40μmのダイヤモンド粒子、平均粒径3μmのAg粉(純度99%以上、第一の金属)、および平均粒径3μmのW粉(純度99%以上、第二の金属)を、この3成分の総量中に占めるダイヤモンド粒子の体積比率が40.0体積%、Ag粉の体積比率が47.5体積%、W粉の体積比率が12.5体積%となるように配合した混合物を、プレス圧:196MPaの条件で予備成形後、真空中でモリブデンからなるカプセル中に封入した。
<Example 4-1>
Diamond powder having an average particle diameter of 40 μm, Ag powder having an average particle diameter of 3 μm (purity 99% or more, first metal), and W powder having an average particle diameter of 3 μm (purity 99% or more, second metal) A mixture in which the volume ratio of diamond particles in the total amount of the components is 40.0% by volume, the volume ratio of Ag powder is 47.5% by volume, and the volume ratio of W powder is 12.5% by volume, After pre-molding under a press pressure of 196 MPa, it was sealed in a capsule made of molybdenum in a vacuum.

3成分の総量中に占めるダイヤモンド粒子の体積比率yは40体積%、AgとWの総量中に占めるWの体積比率xは21体積%であった。
次いでこのカプセルを加圧圧力:5GPa、加熱温度:1100℃の条件で5分間、加圧しながら加熱し、引き続いて圧力を保持した状態で温度を常温に下げて30分間保持した後、常圧に戻してカプセルを回収した。
The volume ratio y of diamond particles in the total amount of the three components was 40% by volume, and the volume ratio x of W in the total amount of Ag and W was 21% by volume.
Next, the capsule was heated under pressure for 5 minutes under the conditions of pressurization pressure: 5 GPa and heating temperature: 1100 ° C. Subsequently, the pressure was maintained, the temperature was lowered to room temperature and maintained for 30 minutes, and then returned to normal pressure. The capsule was recovered by returning.

回収したカプセルの表面を研削することでモリブデンを除去して焼結体を取り出し、取り出した焼結体を放電加工して板状に切り出した後、板の一面を#140のダイヤモンド砥石を用いて2時間、平面研磨して素子搭載面として、厚み0.3mmの半導体素子実装用基板を作製した。
〈実施例4−2〜4−23〉
ダイヤモンド粒子、Ag粉、およびW粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびAgとWの総量中に占めるWの体積比率x(体積%)を表22〜表25に示す値としたこと以外は実施例4−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
The recovered capsule is ground to remove the molybdenum by removing the sintered body, and the taken-out sintered body is electrodischarge processed and cut into a plate shape. Then, one side of the plate is used with a # 140 diamond grindstone Surface polishing was performed for 2 hours to prepare a semiconductor element mounting substrate having a thickness of 0.3 mm as an element mounting surface.
<Examples 4-2 to 4-23>
By adjusting the volume ratio of diamond particles, Ag powder, and W powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of W in the total amount of Ag and W x ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 4-1, except that (volume%) was set to the values shown in Tables 22 to 25.

〈比較例4−1〜4−19〉
ダイヤモンド粒子、Ag粉、およびW粉の体積比率を調整して、3成分の総量中に占めるダイヤモンド粒子の体積比率y(体積%)、およびAgとWの総量中に占めるWの体積比率x(体積%)を表26〜表28に示す値としたこと以外は実施例4−1と同様にして、同形状、同寸法の半導体素子実装用基板を作製した。
<Comparative Examples 4-1 to 4-19>
By adjusting the volume ratio of diamond particles, Ag powder, and W powder, the volume ratio y (volume%) of diamond particles in the total amount of the three components, and the volume ratio x of W in the total amount of Ag and W x ( A substrate for mounting a semiconductor element having the same shape and the same dimensions was produced in the same manner as in Example 4-1, except that (volume%) was set to the values shown in Tables 26 to 28.

実施例、比較例で作製した半導体素子実装用基板の熱膨張率、熱伝導率、素子搭載面における、深さまたは高さが10〜40μm、面方向の最大径が10μm〜3mmである凹部および凸部の、単位面積あたりの個数、ならびに凹部および凸部外の領域での表面粗さを示す粗さ曲線の算術平均粗さR、最大高さ粗さRを表22〜表28にまとめた。
また実施例、比較例におけるダイヤモンドの体積比率と、AgとWの体積比率との関係を図4に示した。図中の○は実施例、●は比較例を示している。
The thermal expansion coefficient, thermal conductivity, depth or height of the element mounting surface of the semiconductor element mounting substrate produced in the examples and comparative examples is 10 to 40 μm, and the concave portion having a maximum surface direction diameter of 10 μm to 3 mm and Tables 22 to 28 show the arithmetic average roughness R a and the maximum height roughness R z of the roughness curve indicating the number of protrusions per unit area and the surface roughness in the regions outside the recesses and protrusions. Summarized.
The relationship between the volume ratio of diamond and the volume ratio of Ag and W in the examples and comparative examples is shown in FIG. In the figure, ○ indicates an example, and ● indicates a comparative example.

Figure 2015099913
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実施例4−1〜4−23、比較例4−1〜4−19の結果より、ダイヤモンド粒子の体積比率を40体積%以上、55体積%以下とし、なおかつ結合材として、第一の金属であるAgと第二の金属であるWとを、熱膨張率が5.0×10−6/K以上、8.5×10−6K以下の範囲となるように、つまり図4中に実線で囲んだ範囲に入るように併用することで、良好な加工性を維持しながら、熱履歴が加えられた際の膨張、収縮によって半導体素子等の他部材が破損したり、接続面との接続が外れたりするのを防止できることが判った。 From the results of Examples 4-1 to 4-23 and Comparative Examples 4-1 to 4-19, the volume ratio of the diamond particles is set to 40% by volume or more and 55% by volume or less, and as the binder, the first metal is used. A certain Ag and W, which is the second metal, have a coefficient of thermal expansion in the range of 5.0 × 10 −6 / K or more and 8.5 × 10 −6 K or less, that is, a solid line in FIG. By using together so that it falls within the range surrounded by, other members such as semiconductor elements may be damaged or connected to the connection surface due to expansion and contraction when heat history is applied while maintaining good workability It has been found that it is possible to prevent from falling off.

Claims (12)

多数のダイヤモンド粒子を結合材によって結合したダイヤモンド複合材料からなり、
他部材との接続面を有し、
前記結合材は、
(A) Cu、Ag、Al、およびMgからなる群より選ばれた少なくとも1種の第一の金属、および
(B) Mo、W、およびNbからなる群より選ばれた少なくとも1種の第二の金属
の2種であり、
前記ダイヤモンド粒子と2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率は、40体積%以上、55体積%以下で、かつ
前記ダイヤモンド複合材料の、25℃から400℃までの熱膨張率は、5.0×10−6/K以上、8.5×10−6K以下である、
半導体素子実装用基板。
It consists of a diamond composite material in which a large number of diamond particles are bound together by a binder,
Having a connection surface with other members,
The binder is
(A) at least one first metal selected from the group consisting of Cu, Ag, Al, and Mg, and
(B) two types of at least one second metal selected from the group consisting of Mo, W, and Nb;
The volume ratio of the diamond particles in the total amount of the diamond particles and the two kinds of metals is 40% by volume or more and 55% by volume or less, and the thermal expansion coefficient of the diamond composite material from 25 ° C. to 400 ° C. is 5.0 × 10 −6 / K or more and 8.5 × 10 −6 K or less.
A substrate for mounting semiconductor elements.
前記接続面は、深さまたは高さが10〜40μm、面方向の最大径が10μm以上、3mm以下である凹部および凸部を有しないか、または前記凹部および凸部の、前記接続面の単位面積当たりの存在個数が10個/cm以下である請求項1に記載の半導体素子実装用基板。 The connection surface does not have a recess or a protrusion having a depth or height of 10 to 40 μm and a maximum diameter in the surface direction of 10 μm or more and 3 mm or less, or the unit of the connection surface of the recess and the protrusion The substrate for mounting a semiconductor element according to claim 1, wherein the number of existence per area is 10 / cm 2 or less. 前記接続面の、前記凹部および凸部以外の領域での表面粗さを示す粗さ曲線の算術平均粗さRは、0.1μm以上、0.5μm以下、最大高さ粗さRは、1μm以上、5μm以下である請求項2に記載の半導体素子実装用基板。 The arithmetic mean roughness R a of the roughness curve indicating the surface roughness of the connection surface in the region other than the concave and convex portions is 0.1 μm or more and 0.5 μm or less, and the maximum height roughness R z is The substrate for mounting a semiconductor element according to claim 2, wherein the substrate is 1 μm or more and 5 μm or less. 熱伝導率は、300W/mK以上、450W/mK以下である請求項1〜請求項3のいずれか1項に記載の半導体素子実装用基板。   The substrate for mounting a semiconductor element according to any one of claims 1 to 3, wherein the thermal conductivity is 300 W / mK or more and 450 W / mK or less. 前記第一の金属はCu、第二の金属はMoであり、前記ダイヤモンド粒子と前記2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率をy、前記CuとMoの総量中に占めるMoの体積比率をx=B/(A+B)×100〔体積%、AはCuの体積%、BはMoの体積%〕としたとき、前記xおよびyは式(1)(2):
y≧−5.37x+100 (1)
y≦−0.72x+91 (2)
を満足する範囲である請求項1〜請求項4のいずれか1項に記載の半導体素子実装用基板。
The first metal is Cu, the second metal is Mo, the volume ratio of the diamond particles in the total amount of the diamond particles and the two kinds of metals is y, and Mo is the total amount of the Cu and Mo. Where x = B / (A + B) × 100 [volume%, A is Cu volume%, B is Mo volume%], the x and y are represented by the formulas (1) and (2):
y ≧ −5.37x + 100 (1)
y ≦ −0.72x + 91 (2)
5. The semiconductor element mounting substrate according to claim 1, wherein the semiconductor element mounting substrate is in a range satisfying the above.
前記第一の金属はCu、第二の金属はWであり、前記ダイヤモンド粒子と2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率をy、前記CuとWの総量中に占めるWの体積比率をx=B/(A+B)×100〔体積%、AはCuの体積%、BはWの体積%〕としたとき、前記xおよびyは式(3)(4):
y≧−5.37x+100 (3)
y≦−0.92x+101 (4)
を満足する範囲である請求項1〜請求項4のいずれか1項に記載の半導体素子実装用基板。
The first metal is Cu, the second metal is W, the volume ratio of the diamond particles in the total amount of the diamond particles and the two metals is y, and the W of the total amount of Cu and W is W When the volume ratio is x = B / (A + B) × 100 [volume%, A is volume% of Cu, and B is volume% of W], the x and y are expressed by the formulas (3) and (4):
y ≧ −5.37x + 100 (3)
y ≦ −0.92x + 101 (4)
5. The semiconductor element mounting substrate according to claim 1, wherein the semiconductor element mounting substrate is in a range satisfying the above.
前記第一の金属はAg、第二の金属はMoであり、前記ダイヤモンド粒子と前記2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率をy、前記AgとMoの総量中に占めるMoの体積比率をx=B/(A+B)×100〔体積%、AはAgの体積%、BはMoの体積%〕としたとき、前記xおよびyは式(5)(6):
y≧−0.74x+49 (5)
y≦−1.33x+127 (6)
を満足する範囲である請求項1〜請求項4のいずれか1項に記載の半導体素子実装用基板。
The first metal is Ag, the second metal is Mo, the volume ratio of the diamond particles in the total amount of the diamond particles and the two kinds of metals is y, and Mo is the total amount of the Ag and Mo. Where x = B / (A + B) × 100 [volume%, A is volume% of Ag, and B is volume% of Mo], the x and y are expressed by the formulas (5) and (6):
y ≧ −0.74x + 49 (5)
y ≦ −1.33x + 127 (6)
5. The semiconductor element mounting substrate according to claim 1, wherein the semiconductor element mounting substrate is in a range satisfying the above.
前記第一の金属はAg、第二の金属はWであり、前記ダイヤモンド粒子と2種の金属の総量中に占める前記ダイヤモンド粒子の体積比率をy、前記AgとWの総量中に占めるWの体積比率をx=B/(A+B)×100〔体積%、AはAgの体積%、BはWの体積%〕としたとき、前記xおよびyは式(7)(8):
y≧−0.74x+49 (7)
y≦−0.83x+102 (8)
を満足する範囲である請求項1〜請求項4のいずれか1項に記載の半導体素子実装用基板。
The first metal is Ag, the second metal is W, the volume ratio of the diamond particles in the total amount of the diamond particles and the two kinds of metals is y, and the W of the total amount of Ag and W is W When the volume ratio is x = B / (A + B) × 100 [volume%, A is volume% of Ag, and B is volume% of W], the x and y are expressed by the formulas (7) and (8):
y ≧ −0.74x + 49 (7)
y ≦ −0.83x + 102 (8)
5. The semiconductor element mounting substrate according to claim 1, wherein the semiconductor element mounting substrate is in a range satisfying the above.
前記接続面は、Au−Sn系、In−Sn系、またはAu-Ge系の半田またはロウ材からなる接合層によって被覆されている請求項1〜請求項8のいずれか1項に記載の半導体素子実装用基板。   9. The semiconductor according to claim 1, wherein the connection surface is covered with a bonding layer made of Au—Sn, In—Sn, or Au—Ge solder or brazing material. Device mounting board. 前記接続面と接合層との間には、Ni、Au、Ti、およびCrからなる群より選ばれた少なくとも1種の金属からなる密着層が設けられている請求項9に記載の半導体素子実装用基板。   The semiconductor element mounting according to claim 9, wherein an adhesion layer made of at least one metal selected from the group consisting of Ni, Au, Ti, and Cr is provided between the connection surface and the bonding layer. Substrate. 前記密着層と接合層との間には、Pt、Mo、およびPdからなる群より選ばれた少なくとも1種の金属からなる拡散防止層が設けられている請求項10に記載の半導体素子実装用基板。   11. The semiconductor element mounting device according to claim 10, wherein a diffusion prevention layer made of at least one metal selected from the group consisting of Pt, Mo, and Pd is provided between the adhesion layer and the bonding layer. substrate. 前記請求項1〜請求項11のいずれか1項に記載の半導体素子実装用基板の接続面に、半導体素子が接続された半導体素子装置。   The semiconductor element apparatus with which the semiconductor element was connected to the connection surface of the board | substrate for semiconductor element mounting of any one of the said Claims 1-11.
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