JP2014135682A - High frequency amplifier - Google Patents

High frequency amplifier Download PDF

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JP2014135682A
JP2014135682A JP2013003615A JP2013003615A JP2014135682A JP 2014135682 A JP2014135682 A JP 2014135682A JP 2013003615 A JP2013003615 A JP 2013003615A JP 2013003615 A JP2013003615 A JP 2013003615A JP 2014135682 A JP2014135682 A JP 2014135682A
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connection pad
harmonic
output
circuit
frequency amplifier
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JP6291710B2 (en
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Atsushi Tsumita
淳史 積田
Atsushi Ajioka
厚 味岡
Tomohiko Shibuya
朝彦 澁谷
Sadaharu Yoneda
貞春 米田
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TDK Corp
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TDK Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires

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Abstract

PROBLEM TO BE SOLVED: To provide a high frequency amplifier with a detection circuit which reduces a detection voltage error by attenuating a harmonic and implements a compact size.SOLUTION: The high frequency amplifier is so constructed that a semiconductor integrated circuit board including a power amplification section, a first connection pad disposed on an output side of the power amplification section, the detection circuit for detecting an output signal of the power amplification section and a third connection pad disposed on an input side of the detection circuit via a capacitor, and a semiconductor mounting board including an output matching circuit and a second connection pad disposed on an input side of the output matching circuit are electrically connected at the first connection pad of the semiconductor integrated circuit board and the second connection pad of the semiconductor mounting board by means of a first connection member, and are electrically connected at the third connection pad of the semiconductor integrated circuit board and the second connection pad of the semiconductor mounting board by means of a second connection member.

Description

本発明は増幅器に関し、特に高調波を減衰して高周波信号を精度良く検波する検波回路を備えた高周波増幅器に関するものである。   The present invention relates to an amplifier, and more particularly to a high-frequency amplifier including a detection circuit that attenuates higher harmonics and accurately detects a high-frequency signal.

近年、無線ＬＡＮによるデータ通信が一般化しており、無線通信装置の重要性がでてきている。高周波増幅器は入力信号をトランジスタで増幅して外部へ送信する機能を有しており携帯電話等の移動体通信機器にも組み込まれており、無線通信装置で広く用いられている。   In recent years, data communication using a wireless LAN has been generalized, and the importance of wireless communication devices has been increasing. A high-frequency amplifier has a function of amplifying an input signal with a transistor and transmitting the amplified signal to the outside. The high-frequency amplifier is also incorporated in a mobile communication device such as a mobile phone and is widely used in a wireless communication device.

ここで、無線通信装置における検波回路は、アンテナから入力された受信信号の強度に応じて受信系の増幅器やミキサの利得を自動制御するためや、高周波増幅器の出力信号レベルを検出して送信系の高周波増幅器の利得を自動制御するために用いられており、高周波増幅器にとっては重要な回路の一つとなっている。   Here, the detection circuit in the wireless communication apparatus is used to automatically control the gain of the amplifier and mixer of the reception system according to the intensity of the reception signal input from the antenna, or to detect the output signal level of the high-frequency amplifier to transmit the signal. It is used to automatically control the gain of the high frequency amplifier, and is an important circuit for the high frequency amplifier.

例えば、下記特許文献１では、増幅用トランジスタよりも小さいトランジスタを用いて二乗平均回路と合わせて構成された検波回路が開示されている。   For example, Patent Document 1 below discloses a detection circuit configured with a mean-square circuit using a transistor smaller than an amplifying transistor.

なお、無線通信装置の送信機において、高周波増幅器の出力整合回路を半導体集積回路基板上に構成した場合、出力整合回路を調整させることができず、Ｑ値の高いチップインダクタやチップコンデンサなどを使用することが出来ないことから、伝送損失を少なくすることができない。このことから、高出力増幅器の出力整合回路は、半導体集積回路基板上ではなく半導体実装基板上に構成している。また、近年小型化が進んでいることから検波回路は半導体集積回路基板上に構成することが主流となっている。   When the output matching circuit of a high frequency amplifier is configured on a semiconductor integrated circuit board in a transmitter of a wireless communication device, the output matching circuit cannot be adjusted and a chip inductor or chip capacitor having a high Q value is used. It is impossible to reduce transmission loss. For this reason, the output matching circuit of the high-power amplifier is configured on the semiconductor mounting substrate, not on the semiconductor integrated circuit substrate. In recent years, since the miniaturization has progressed, it is the mainstream to configure the detection circuit on a semiconductor integrated circuit substrate.

また、高速無線通信規格であるＷｉＭＡＸでは、ＯＦＤＭ（Ｏｒｔｈｏｇｏｎａｌ Ｆｒｅｑｕｅｎｃｙ Ｄｉｖｉｓｉｏｎ Ｍｕｌｔｉｐｌｅｘｉｎｇ：直交周波数分割多重）方式を用いており、子機での送信電力は２００ｍＷと高出力であるため、送信機の消費電力を低減させた増幅器からは高調波が発生する。   In addition, WiMAX, which is a high-speed wireless communication standard, uses an OFDM (Orthogonal Frequency Division Multiplexing) system, and the transmission power of the slave unit is as high as 200 mW, so the power consumption of the transmitter is reduced. Harmonics are generated from the reduced amplifier.

従来例として図１０を説明する。半導体集積回路基板１０７上には電力増幅部１０１と検波回路１０２と高調波減衰回路１０５とコンデンサ１０６とを構成し、電力増幅部１０１の出力側と出力整合回路１０３の入力側は、接続部材１０４を介して電気的に接続されており、電力増幅部１０１の出力側はコンデンサ１０６を介して高調波減衰回路１０５の入力側に接続され、高調波減衰回路１０５の出力側は検波回路１０２の入力側に接続されている。   FIG. 10 will be described as a conventional example. A power amplifier 101, a detector circuit 102, a harmonic attenuator circuit 105, and a capacitor 106 are formed on the semiconductor integrated circuit board 107. The output side of the power amplifier 101 and the input side of the output matching circuit 103 are connected to the connecting member 104. The output side of the power amplifying unit 101 is connected to the input side of the harmonic attenuation circuit 105 via the capacitor 106, and the output side of the harmonic attenuation circuit 105 is the input of the detection circuit 102. Connected to the side.

電力増幅部１０１で発生した高調波を含む高周波信号は、接続部材１０４とコンデンサ１０６とに分岐される。その分岐された一方の高調波を含む高周波信号は、接続部材１０４を介して出力整合回路１０３の入力側に入力され、高調波を減衰させる機能を有した出力整合回路１０３により高調波は減衰され、基本波はインピーダンスを変えて出力整合回路の出力側に出力される。   A high-frequency signal including harmonics generated in the power amplification unit 101 is branched to the connection member 104 and the capacitor 106. The high-frequency signal including one of the branched harmonics is input to the input side of the output matching circuit 103 via the connecting member 104, and the harmonics are attenuated by the output matching circuit 103 having a function of attenuating the harmonics. The fundamental wave is output to the output side of the output matching circuit while changing the impedance.

よって、出力整合回路１０３から出力される高周波信号は、高調波が減衰された高周波信号となる。   Therefore, the high frequency signal output from the output matching circuit 103 is a high frequency signal with the harmonics attenuated.

また、分岐されたもう一方の高調波を含む高周波信号は、コンデンサ１０６を介して高調波減衰回路１０５の入力側に入力され、高調波減衰回路１０５にて高調波が減衰された高周波信号となる。   The high-frequency signal including the other branched harmonic is input to the input side of the harmonic attenuation circuit 105 via the capacitor 106, and becomes a high-frequency signal in which the harmonic is attenuated by the harmonic attenuation circuit 105. .

このように検波回路１０２は、出力整合回路１０３から出力される高周波信号と同等の高調波が減衰された高周波信号を検波するため、高調波による検波電圧誤差を低減している。なお、本発明でいう高調波とは、基本波の整数倍である高次の周波数成分のことである。   As described above, the detection circuit 102 detects a high-frequency signal in which a harmonic equivalent to the high-frequency signal output from the output matching circuit 103 is attenuated, so that a detection voltage error due to the harmonic is reduced. The harmonics referred to in the present invention are high-order frequency components that are integer multiples of the fundamental wave.

特開２０１０−４１２３３号公報JP 2010-41233 A

しかしながら、小型化のために半導体集積回路基板上に構成する高調波減衰回路を削減した場合、検波回路には高調波を含む高周波信号が入力され、検波電圧は高調波を含んだ電圧となる。したがって、出力整合回路から出力される高周波信号は、高調波を含んでいない高周波信号のため、検波電圧に誤差が生じてしまう。さらに、高調波減衰回路を半導体集積回路基板上に構成することが必要となり、小型化することが難しい。   However, when the harmonic attenuation circuit configured on the semiconductor integrated circuit substrate is reduced for miniaturization, a high-frequency signal including harmonics is input to the detection circuit, and the detection voltage becomes a voltage including harmonics. Therefore, since the high-frequency signal output from the output matching circuit is a high-frequency signal that does not include harmonics, an error occurs in the detection voltage. Furthermore, it is necessary to configure the harmonic attenuation circuit on the semiconductor integrated circuit substrate, and it is difficult to reduce the size.

本発明は上記の問題に鑑みてなされたものであり、高調波の減衰によって検波電圧誤差を低減させると共に小型化ができる検波回路を備えた高周波増幅器を提供することを目的とする。   The present invention has been made in view of the above problems, and an object of the present invention is to provide a high-frequency amplifier including a detection circuit that can reduce the detection voltage error and reduce the size by harmonic attenuation.

上記目的を達成するための本発明に係る高周波増幅器は、電力増幅部と電力増幅部の出力側に設けた第一の接続パッドと、電力増幅部の出力信号を検出する検波回路と、検波回路の入力側にコンデンサを介して設けた第三の接続パッドとを具備した半導体集積回路基板と、出力整合回路と出力整合回路の入力側に設けた第二の接続パッドを具備した半導体実装基板とが、第一の接続部材によって半導体集積回路基板の第一の接続パッドと半導体集積回路基板の第二の接続パッドとで電気的に接続されるとともに、第二の接続部材によって半導体集積回路基板の第三の接続パッドと半導体実装基板の第二の接続パッドとが電気的に接続されていることを第１の特徴とする。   In order to achieve the above object, a high-frequency amplifier according to the present invention includes a power amplifying unit, a first connection pad provided on the output side of the power amplifying unit, a detection circuit that detects an output signal of the power amplifying unit, and a detection circuit A semiconductor integrated circuit board having a third connection pad provided via a capacitor on the input side, and a semiconductor mounting board having a second connection pad provided on the input side of the output matching circuit and the output matching circuit; Are electrically connected by the first connection member between the first connection pad of the semiconductor integrated circuit substrate and the second connection pad of the semiconductor integrated circuit substrate, and the second connection member of the semiconductor integrated circuit substrate. The first feature is that the third connection pad and the second connection pad of the semiconductor mounting substrate are electrically connected.

上記特徴の高周波増幅器によれば、半導体集積回路基板上に高調波を反射させる高調波減衰回路を構成することなく、高調波信号を減衰させた信号を検波回路に入力することができ、整合回路から出力される高周波信号と同等の信号を検波することで検波電圧の誤差を低減することができる。   According to the high frequency amplifier having the above characteristics, it is possible to input a signal obtained by attenuating the harmonic signal to the detection circuit without forming a harmonic attenuation circuit that reflects the harmonic on the semiconductor integrated circuit substrate, and to match the matching circuit. By detecting a signal equivalent to the high-frequency signal output from, an error in the detection voltage can be reduced.

また、半導体集積回路基板上に高調波を反射させる高調波減衰回路を必要としないため、半導体集積回路基板のサイズを小型化することが可能である。   Further, since a harmonic attenuation circuit that reflects harmonics is not required on the semiconductor integrated circuit substrate, the size of the semiconductor integrated circuit substrate can be reduced.

さらに本発明に係る高周波増幅器は、第一および第二の接続部材がボンディングワイヤであることを第２の特徴とする。   Furthermore, the high-frequency amplifier according to the present invention has a second feature that the first and second connecting members are bonding wires.

上記特徴の高周波増幅器によれば、ボンディングワイヤで接続することで、ボンディングワイヤのインダクタンス成分と第三の接続パッドと検波回路の間のコンデンサによるキャパシタンス成分とが基本周波数で共振するように調整した場合、共振の効果により基本波信号のみが通過し高調波を反射することが可能となる。   According to the high frequency amplifier having the above characteristics, when the bonding wire is connected so that the inductance component of the bonding wire and the capacitance component of the capacitor between the third connection pad and the detection circuit resonate at the fundamental frequency. Due to the resonance effect, only the fundamental wave signal can pass and the harmonics can be reflected.

さらに本発明に係る高周波増幅器は、第一および第二の接続部材がバンプであるフリップチップ実装であることを第３の特徴とする。   The third feature of the high-frequency amplifier according to the present invention is that the first and second connecting members are flip-chip mounting in which bumps are used.

上記特徴の高周波増幅器によれば、フリップチップ実装することにより接続部材にボンディングワイヤを使ったときより実装面積を削減することが可能になる。   According to the high-frequency amplifier having the above characteristics, the mounting area can be reduced by flip-chip mounting than when a bonding wire is used for the connection member.

さらに本発明に係る高周波増幅器は、半導体実装基板上に設けた出力整合回路内に２倍波の周波数で短絡となる直列共振回路を具備し、直列共振回路の片側が第二の接続パッドに接続されるとともに、直列共振回路のもう一方がＧＮＤに接続され、半導体実装基板上に設けた第二の接続パッドにおける出力整合回路側の２倍波の位相が−３０〜＋６０度にあることを第４の特徴とする。   The high-frequency amplifier according to the present invention further includes a series resonant circuit that is short-circuited at a frequency of the second harmonic in the output matching circuit provided on the semiconductor mounting substrate, and one side of the series resonant circuit is connected to the second connection pad. In addition, it is confirmed that the other side of the series resonant circuit is connected to GND, and the phase of the second harmonic on the output matching circuit side in the second connection pad provided on the semiconductor mounting substrate is -30 to +60 degrees. 4 features.

上記特徴の高周波増幅器によれば、出力整合回路内に直列共振回路を設けて２倍波の位相を−３０〜＋６０度にすることによって、基本周波数の出力電力に対して、２倍波高調波の出力電力が−５ｄＢｃ発生した際に、２倍波の影響による検波電圧の誤差を０．２Ｖ以下とすることができる。   According to the high frequency amplifier having the above characteristics, by providing a series resonance circuit in the output matching circuit and setting the phase of the second harmonic to -30 to +60 degrees, the second harmonic is higher than the output power of the fundamental frequency. When the output power of −5 dBc is generated, the error of the detection voltage due to the influence of the second harmonic can be set to 0.2 V or less.

さらに本発明に係る高周波増幅器は、出力整合回路内にローパスフィルタが接続され、半導体実装基板上に設けた第二の接続パッドにおける出力整合回路側の２倍波の位相が−２０〜＋３０度にあることを第５の特徴とする。   Furthermore, in the high frequency amplifier according to the present invention, a low pass filter is connected in the output matching circuit, and the second harmonic phase on the output matching circuit side in the second connection pad provided on the semiconductor mounting substrate is -20 to +30 degrees. It is a fifth feature.

上記特徴の高周波増幅器によれば、出力整合回路内にローパスフィルタを形成し２倍波以上の高調波を減衰させ、接続パッドにおける２倍波の位相を−２０〜＋３０度にすることによって、基本周波数の出力電力に対して、２倍波高調波の出力電力が−５ｄＢｃ発生しても、２倍波の影響による検波電圧の誤差を±０．２Ｖ以内に抑えることができる。   According to the high frequency amplifier having the above characteristics, a low-pass filter is formed in the output matching circuit to attenuate higher harmonics of the second harmonic and higher, and the phase of the second harmonic in the connection pad is set to -20 to +30 degrees. Even if the output power of the second harmonic wave is -5 dBc with respect to the output power of the frequency, the error of the detection voltage due to the influence of the second harmonic can be suppressed to within ± 0.2V.

本発明によれば、高調波の減衰によって検波電圧誤差を低減させると共に小型化ができる検波回路を備えた高周波増幅器を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the high frequency amplifier provided with the detection circuit which can reduce a detection voltage error and can be reduced in size by attenuation | damping of a harmonic can be provided.

第１の実施形態による高周波増幅器のブロック図である。1 is a block diagram of a high-frequency amplifier according to a first embodiment. 第２の実施形態による高周波増幅器の模式図である。It is a schematic diagram of the high frequency amplifier by 2nd Embodiment. 第３の実施形態による高周波増幅器の模式図である。It is a schematic diagram of the high frequency amplifier by 3rd Embodiment. 第４の実施形態による高周波増幅器のブロック図である。It is a block diagram of the high frequency amplifier by 4th Embodiment. 第４の実施形態による高周波増幅器の通過特性を示す特性図である。It is a characteristic view which shows the passage characteristic of the high frequency amplifier by 4th Embodiment. 第４の実施形態による２倍波の位相を変化させたときの検波電圧を示す特性図である。It is a characteristic view which shows a detection voltage when changing the phase of the 2nd harmonic by 4th Embodiment. 第５の実施形態による高周波増幅器のブロック図である。It is a block diagram of the high frequency amplifier by 5th Embodiment. 第５の実施形態による高周波増幅器の通過特性を示す特性図である。It is a characteristic view which shows the passage characteristic of the high frequency amplifier by 5th Embodiment. 第５の実施形態による２倍波の位相を変化させたときの検波電圧を示す特性図である。It is a characteristic view which shows a detection voltage when changing the phase of the 2nd harmonic by 5th Embodiment. 従来の回路構成を示すブロック図である。It is a block diagram which shows the conventional circuit structure. 本発明で設けられた検波回路の回路図の一例である。It is an example of the circuit diagram of the detection circuit provided by this invention.

本発明を実施するための好適な形態につき、図面を参照しつつ詳細に説明する。以下の実施形態に記載した内容により本発明が限定されるものではない。また、以下に記載した構成要素には、当業者が容易に想定できるもの、実質的に同一のもの、均等の範囲のものが含まれる。さらに、以下に記載した構成要素は適宜組み合わせることが可能である。また、本発明の要旨を逸脱しない範囲で構成要素の種々の省略、置換又は変更を行うことができる。   Preferred embodiments for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the following embodiments. The constituent elements described below include those that can be easily assumed by those skilled in the art, those that are substantially the same, and those that are equivalent. Furthermore, the constituent elements described below can be appropriately combined. In addition, various omissions, substitutions, or changes of components can be made without departing from the scope of the present invention.

（第１の実施形態）
図１は第１の実施形態に係る高周波増幅器の全体構成を示すブロック図である。半導体集積回路基板７上に電力増幅部１と第一の接続パッド９と第三の接続パッド１１とコンデンサ６と検波回路２とが構成されており、半導体実装基板８上に出力整合回路３と第二の接続パッド１０とが構成されている。 (First embodiment)
FIG. 1 is a block diagram showing the overall configuration of the high-frequency amplifier according to the first embodiment. A power amplifier 1, a first connection pad 9, a third connection pad 11, a capacitor 6, and a detection circuit 2 are configured on a semiconductor integrated circuit substrate 7, and an output matching circuit 3 is formed on the semiconductor mounting substrate 8. A second connection pad 10 is configured.

電力増幅器１の出力側に第一の接続パッド９が接続されており、第一の接続パッド９は第一の接続部材４を介して第二の接続パッド１０に接続されている。第二の接続パッド１０は出力整合回路３の入力側に接続され、第二の接続パッド１０は第二の接続部材５を介して第三の接続パッド１１にも接続されている。第三の接続パッド１１はコンデンサ６を介して検波回路２の入力側に接続されている。   The first connection pad 9 is connected to the output side of the power amplifier 1, and the first connection pad 9 is connected to the second connection pad 10 via the first connection member 4. The second connection pad 10 is connected to the input side of the output matching circuit 3, and the second connection pad 10 is also connected to the third connection pad 11 via the second connection member 5. The third connection pad 11 is connected to the input side of the detection circuit 2 via the capacitor 6.

本実施形態では、電力増幅部１は高調波を含む高周波信号を出力し、第一の接続部材４を通して、高周波信号は出力整合回路３と第二の接続部材５に入力される。出力整合回路３は高調波を反射させる回路と基本波を整合する整合回路で構成されており、接続パッド１０から出力整合回路３側を見た高調波周波数のインピーダンスが短絡もしくは低インピーダンスの場合、高調波は第二の接続部材５に伝わることなく、電力増幅部１に反射される。   In the present embodiment, the power amplifying unit 1 outputs a high-frequency signal including harmonics, and the high-frequency signal is input to the output matching circuit 3 and the second connection member 5 through the first connection member 4. The output matching circuit 3 is composed of a circuit that reflects harmonics and a matching circuit that matches fundamental waves. When the impedance of the harmonic frequency viewed from the connection pad 10 on the output matching circuit 3 side is short-circuited or low impedance, Harmonics are reflected to the power amplifier 1 without being transmitted to the second connecting member 5.

ここで、高調波を２倍波に限定した場合を説明する。第二の接続パッド１０から出力整合回路３を見た時の２倍波周波数におけるインピーダンスをＺｍ、第二の接続パッド１０から第二の接続部材５を通して検波回路２側を見た時の２倍波周波数におけるインピーダンスをＺｄとする。   Here, the case where a harmonic is limited to a 2nd harmonic is demonstrated. The impedance at the second harmonic frequency when the output matching circuit 3 is viewed from the second connection pad 10 is Zm, and is twice that when the detection circuit 2 side is viewed from the second connection pad 10 through the second connection member 5. The impedance at the wave frequency is Zd.

第一の接続部材４の出力側から第二の接続パッド１０の２倍波周波数の合成インピーダンスは式（１）となる。
（Ｚｍ＊Ｚｄ）／（Ｚｍ＋Ｚｄ） （１） The combined impedance of the second harmonic frequency of the second connection pad 10 from the output side of the first connection member 4 is expressed by Equation (1).
(Zm * Zd) / (Zm + Zd) (1)

Ｚｄに対してＺｍが十分に小さい場合は、合成インピーダンスはＺｍに近似されることとなる。   When Zm is sufficiently smaller than Zd, the combined impedance is approximated to Zm.

そのことから、電力増幅部１で発生した２倍波信号は、第二の接続パッド１０でＺｍのインピーダンスで反射され、検波回路２には伝わらず、電力増幅部１に反射されることになる。   Therefore, the second harmonic signal generated in the power amplifying unit 1 is reflected by the impedance of Zm at the second connection pad 10 and is not transmitted to the detection circuit 2 but reflected by the power amplifying unit 1. .

ここでは、高調波を２倍波に限定したが、２倍波に限定するものではなく、ｎ次の高調波にも適用でき同様な結果となる。よって、半導体集積回路基板上に高調波を反射させる高調波減衰回路を構成することなく、高調波信号を減衰させた信号を検波回路に入力することができ、整合回路から出力される高周波信号と同等の信号を検波することで検波電圧の誤差を低減することができる。   Here, the harmonic is limited to the second harmonic, but is not limited to the second harmonic, and the present invention can be applied to the n-th harmonic and gives the same result. Therefore, without configuring a harmonic attenuation circuit that reflects harmonics on the semiconductor integrated circuit substrate, a signal obtained by attenuating the harmonic signal can be input to the detection circuit, and the high-frequency signal output from the matching circuit and By detecting an equivalent signal, an error in the detection voltage can be reduced.

電力増幅部１が１つの高周波増幅器になっているが本発明においては多段構成の高周波増幅器でもよい。また第一の接続部材４と第二の接続部材５は高周波増幅器を構成する半導体集積回路基板７と、出力整合回路３が電気的に接続するものであり、例えばボンディングワイヤなどでもよい。出力整合回路３内に構成される高調波を減衰させる回路は高調波を減衰できる回路ならよく、例えば直列共振回路などでもよい。   Although the power amplifying unit 1 is a single high-frequency amplifier, a multi-stage high-frequency amplifier may be used in the present invention. The first connecting member 4 and the second connecting member 5 are for electrically connecting the semiconductor integrated circuit substrate 7 constituting the high-frequency amplifier and the output matching circuit 3, and may be, for example, a bonding wire. The circuit for attenuating harmonics configured in the output matching circuit 3 may be any circuit that can attenuate harmonics, and may be, for example, a series resonance circuit.

本発明の実施形態において半導体実装基板８とは半導体集積回路基板７が搭載することができる少なくとも１つ以上の導体層で構成されている基板である。材料としては例えばＦＲ−４やＬＴＣＣ、アルミナなどでもよい。   In the embodiment of the present invention, the semiconductor mounting substrate 8 is a substrate composed of at least one conductor layer on which the semiconductor integrated circuit substrate 7 can be mounted. As a material, for example, FR-4, LTCC, alumina or the like may be used.

（第２の実施形態）
図２は本発明に係る第２の実施形態による高周波増幅器の模式図である。図１に示す第１の実施形態に係る高周波増幅器との異なる点は、接続部材として第一のボンディングワイヤ１２と第二のボンディングワイヤ１３を使用している点である。入力された高周波信号を増幅する半導体集積回路基板７上に構成された電力増幅部１と半導体実装基板８上に構成された出力整合回路３が第一のボンディングワイヤ１２によって半導体集積回路基板７上に構成された第一の接続パッド９と半導体実装基板８上に構成された第二の接続パッド１０とが接続され、コンデンサ６を介して接続されている半導体集積回路基板７上に構成された検波回路２と半導体実装基板８上に構成された出力整合回路３が第二のボンディングワイヤ１３によって半導体実装基板８上に構成された第二の接続パッド１０と半導体集積回路基板７上に構成された第三の接続パッド１１とが接続されることで構成されている。 (Second Embodiment)
FIG. 2 is a schematic diagram of a high-frequency amplifier according to a second embodiment of the present invention. The difference from the high-frequency amplifier according to the first embodiment shown in FIG. 1 is that a first bonding wire 12 and a second bonding wire 13 are used as connection members. The power amplifying unit 1 configured on the semiconductor integrated circuit board 7 that amplifies the input high frequency signal and the output matching circuit 3 configured on the semiconductor mounting board 8 are connected to the semiconductor integrated circuit board 7 by the first bonding wires 12. The first connection pad 9 configured in the above and the second connection pad 10 configured on the semiconductor mounting substrate 8 are connected to each other and configured on the semiconductor integrated circuit substrate 7 connected through the capacitor 6. The output matching circuit 3 configured on the detection circuit 2 and the semiconductor mounting substrate 8 is configured on the second connection pads 10 and the semiconductor integrated circuit substrate 7 configured on the semiconductor mounting substrate 8 by the second bonding wires 13. The third connection pad 11 is connected.

本実施形態ではボンディングワイヤで接続することで、ボンディングワイヤのインダクタンス成分と第三の接続パッド１１と検波回路２の間のコンデンサによるキャパシタンス成分とが基本周波数で共振するように調整した場合ＬＣ直列共振回路となり、検波回路２には基本波周波数のみが通過し高調波を反射することが可能となる。   In this embodiment, when the connection is made with a bonding wire, the inductance component of the bonding wire and the capacitance component due to the capacitor between the third connection pad 11 and the detection circuit 2 are adjusted so as to resonate at the fundamental frequency. It becomes a circuit, and only the fundamental frequency passes through the detection circuit 2 and it becomes possible to reflect harmonics.

また、ボンディングワイヤの長さを変えることでインダクタンス成分を調節できるため、製造における半導体集積回路基板のばらつきなどにおいて整合の調整も可能となる。   In addition, since the inductance component can be adjusted by changing the length of the bonding wire, matching can be adjusted in the case of variations in the semiconductor integrated circuit substrate during manufacture.

（第３の実施形態）
図３は本発明に係る第３の実施形態による高周波増幅器の模式図である。図１に示す第１の実施形態に係る高周波増幅器との異なる点は、接続部材としてバンプを用いており、第一のバンプ１４と第二のバンプ１５を使用したフリップチップ実装によって構成している点である。入力された高周波信号を増幅する半導体集積回路基板７上に構成された電力増幅部１と半導体実装基板８上に構成された出力整合回路３が第一のバンプ１４によって接続され、コンデンサ６を介して接続されている半導体集積回路基板７上に構成された検波回路２と出力整合回路３が第二のバンプ１５で接続されることで構成されている。フリップチップ実装であるため半導体集積回路基板７上に設けられた第一の接続パッド９と第三の接続パッド１１と半導体実装基板８上に構成された第二の接続パッド１０が向かい合うようにし、第一のバンプ１４で第一の接続パッド９と第二の接続パッド１０を電気的に接続し、第二のバンプ１５で第三の接続パッド１１と第二の接続パッド１０を電気的に接続する。 (Third embodiment)
FIG. 3 is a schematic diagram of a high-frequency amplifier according to a third embodiment of the present invention. The difference from the high-frequency amplifier according to the first embodiment shown in FIG. 1 is that bumps are used as connecting members, and the first bump 14 and the second bump 15 are used for flip chip mounting. Is a point. The power amplifying unit 1 configured on the semiconductor integrated circuit substrate 7 that amplifies the input high-frequency signal and the output matching circuit 3 configured on the semiconductor mounting substrate 8 are connected by the first bump 14 and are connected via the capacitor 6. The detection circuit 2 and the output matching circuit 3 configured on the semiconductor integrated circuit substrate 7 connected to each other are connected by the second bump 15. Since it is flip chip mounting, the first connection pad 9, the third connection pad 11 provided on the semiconductor integrated circuit substrate 7, and the second connection pad 10 configured on the semiconductor mounting substrate 8 face each other, The first connection pad 9 and the second connection pad 10 are electrically connected by the first bump 14, and the third connection pad 11 and the second connection pad 10 are electrically connected by the second bump 15. To do.

本実施形態ではバンプ電極で接続するとパッドを重ねるのでボンディングワイヤによって接続するときのようなパッド間の距離が必要なく、実装面積を削減することが可能になる。   In this embodiment, since the pads are overlapped when connected by the bump electrodes, the distance between the pads as in the case of connecting by the bonding wires is not required, and the mounting area can be reduced.

（第４の実施形態）
図４は本発明に係る第４の実施形態による高周波増幅器のブロック図である。図１に示す第１の実施形態に係る高周波増幅器との異なる点は、半導体実装基板８上に構成された出力整合回路３が２倍波の周波数で短絡となる直列共振回路１７と整合回路１６で構成され、直列共振回路１７の片側を整合回路１６の入力側に接続され、直列共振回路のもう一方をＧＮＤに接続する構成している点である。このことより、検波電圧の誤差を更に低減することができる。 (Fourth embodiment)
FIG. 4 is a block diagram of a high frequency amplifier according to a fourth embodiment of the present invention. The difference from the high-frequency amplifier according to the first embodiment shown in FIG. 1 is that the output matching circuit 3 configured on the semiconductor mounting substrate 8 is short-circuited at a frequency of the second harmonic, and the matching circuit 16 and the series resonance circuit 17. In this configuration, one side of the series resonant circuit 17 is connected to the input side of the matching circuit 16, and the other side of the series resonant circuit is connected to GND. As a result, the error in the detection voltage can be further reduced.

以下、本発明の具体的な特性結果を図５に示す特性図を参照して説明する。図５は本発明に係る図４による高周波増幅器の通過特性を示す特性図である。一例としてＷｉＭＡＸの場合を想定する。ＷｉＭＡＸでの周波数帯域は、２．３〜２．４ＧＨｚ、および２．４９６〜２．６９ＧＨｚである。そこで基本波を２．５ＧＨｚ、高調波である２倍波を５ＧＨｚとした場合を説明する。電力増幅部１の出力から接続部材４を通って、出力整合回路３の出力までの通過特性を出力整合回路側減衰量２０１とし、電力増幅部１の出力から接続部材４を通って、接続部材５よりコンデンサ６と検波回路２の入力までの通過特性を検波回路側減衰量２０２とした。２倍波の周波数にて短絡となる直列共振回路１７を備えていない場合の減衰量を破線で示し、２倍波の周波数にて短絡となる直列共振回路１７を備えている場合の減衰量を実線で示している。   Hereinafter, specific characteristic results of the present invention will be described with reference to a characteristic diagram shown in FIG. FIG. 5 is a characteristic diagram showing pass characteristics of the high-frequency amplifier according to FIG. 4 according to the present invention. As an example, the case of WiMAX is assumed. The frequency bands in WiMAX are 2.3 to 2.4 GHz and 2.496 to 2.69 GHz. Therefore, a case where the fundamental wave is 2.5 GHz and the second harmonic wave is 5 GHz will be described. The passing characteristic from the output of the power amplifying unit 1 through the connecting member 4 to the output of the output matching circuit 3 is defined as an output matching circuit side attenuation 201, and the connecting member 4 passes from the output of the power amplifying unit 1 through the connecting member 4. The pass characteristic from 5 to the input of the capacitor 6 and the detection circuit 2 is defined as a detection circuit side attenuation 202. The amount of attenuation when the series resonance circuit 17 that is short-circuited at the frequency of the second harmonic is not provided is indicated by a broken line, and the amount of attenuation when the series resonance circuit 17 that is short-circuited at the frequency of the second harmonic is provided. It is shown with a solid line.

また、検波回路側減衰量２０２の実線と破線の比較により、図４において、半導体集積回路基板７上に高調波信号を反射させる共振回路が無いにもかかわらず、２倍波である５ＧＨｚの高調波信号が減衰されていることがわかる。一例として、ＷｉＭＡＸの場合を検討したが、ＷｉＭＡＸに特化するものではない。別の通信規格であるＷ−ＣＤＭＡ（Ｗｉｄｅｂａｎｄ Ｃｏｄｅ Ｄｉｖｉｓｉｏｎ Ｍｕｌｔｉｐｌｅ Ａｃｃｅｓｓ：広帯域富豪分割多元接続）の場合では、周波数帯域は１．９２０〜１．９８０ＧＨｚであり、基本波を１．９５ＧＨｚ、高調波である２倍波を３．９ＧＨｚとした場合も、図５における横軸周波数の値を２．５ＧＨｚから１．９５ＧＨｚに置き換え、５ＧＨｚから３．９ＧＨｚに置き換えた場合には同様の結果が得られる。   Further, by comparing the solid line and the broken line of the detection circuit side attenuation amount 202 in FIG. 4, although there is no resonance circuit that reflects the harmonic signal on the semiconductor integrated circuit substrate 7, the harmonic of 5 GHz which is a second harmonic is obtained. It can be seen that the wave signal is attenuated. As an example, the case of WiMAX was examined, but it is not specialized for WiMAX. In the case of W-CDMA (Wideband Code Division Multiple Access), which is another communication standard, the frequency band is 1.920 to 1.980 GHz, and the fundamental wave is 1.95 GHz and harmonics. Even when the second harmonic is set to 3.9 GHz, the same result is obtained when the value of the horizontal axis in FIG. 5 is replaced from 2.5 GHz to 1.95 GHz and from 5 GHz to 3.9 GHz.

さらに、図６は本発明に係る図４による２倍波の電力と検波電圧との関係を示す特性図である。電力増幅部１から出力される高周波信号は、基本波を２．５ＧＨｚ、高調波である２倍波を５ＧＨｚとし、基本波の電力を２３ｄＢｍとした。横軸は電力増幅部１から出力される２倍波の電力である。縦軸は、電力増幅部１から基本波のみが２３ｄＢｍの電力で出力されたときの検波電圧を基準電圧とし、基本波と２倍波が出力されたときの検波電圧と基準電圧の差分を計算した値（△Ｖｄｅｔ［Ｖ］）である。言い換えれば、縦軸は２倍波のみの影響による検波電圧を示した値である。   Further, FIG. 6 is a characteristic diagram showing the relationship between the power of the second harmonic wave and the detection voltage in FIG. 4 according to the present invention. The high frequency signal output from the power amplifying unit 1 has a fundamental wave of 2.5 GHz, a second harmonic wave of 5 GHz, and a fundamental wave power of 23 dBm. The horizontal axis represents the double wave power output from the power amplifier 1. The vertical axis indicates the difference between the detection voltage and the reference voltage when the fundamental wave and the second harmonic wave are output, with the detection voltage when only the fundamental wave is output from the power amplifier 1 with the power of 23 dBm. (ΔVdet [V]). In other words, the vertical axis represents a detection voltage due to the influence of only the second harmonic.

ここで、基本波の電力を２３ｄＢｍとしたが、ＷｉＭＡＸの通信規格では、送信機の最大送信出力を２３ｄＢｍ、アンテナ利得を最大２ｄＢｉ、アンテナからの最終出力の最大を２５ｄＢｍと規定している。このことから、電力増幅部１からアンテナまでの伝送ロスを考慮し、電力増幅部１での基本波の電力を２３ｄＢｍとした。   Here, although the power of the fundamental wave is 23 dBm, the WiMAX communication standard defines the maximum transmission output of the transmitter as 23 dBm, the antenna gain as a maximum of 2 dBi, and the maximum final output from the antenna as 25 dBm. From this, the transmission power from the power amplifying unit 1 to the antenna is considered, and the power of the fundamental wave in the power amplifying unit 1 is set to 23 dBm.

これに対してＷ−ＣＤＭＡの通信規格では、Ｐｏｗｅｒ Ｃｌａｓｓ３における送信機の最大送信出力を２４ｄＢｍとし、許容範囲を＋１ｄＢ〜−３ｄＢと規定している。Ｗ−ＣＤＭＡの場合は、電力増幅部１からアンテナまでの伝送ロスを考慮し、電力増幅部１での基本波の電力を２２ｄＢｍとして計算すれば、同様の結果を得ることができる。   On the other hand, in the W-CDMA communication standard, the maximum transmission output of the transmitter in Power Class 3 is 24 dBm, and the allowable range is defined as +1 dB to -3 dB. In the case of W-CDMA, the same result can be obtained by calculating the power of the fundamental wave in the power amplifier 1 as 22 dBm in consideration of the transmission loss from the power amplifier 1 to the antenna.

ここで、第一の続部材４からの第二の接続パッド１０側のインピーダンス特性の２倍波が短絡である場合、スミスチャート（図示せず）にて２倍波の位相が０度となり、２倍波の位相が９０度または−９０度の時を開放となる２倍波の位相における検波電圧値を計算した結果を図６に示す。   Here, when the second harmonic of the impedance characteristic on the second connection pad 10 side from the first connecting member 4 is a short circuit, the phase of the second harmonic is 0 degree on the Smith chart (not shown), FIG. 6 shows the result of calculating the detection voltage value at the second harmonic phase that is open when the second harmonic phase is 90 degrees or −90 degrees.

したがって、図６の特性図より、第一の接続部材４から第二の接続パッド１０を見た２倍波の位相が０度からずれた場合、検波電圧に誤差が生じてしまうことがわかる。さらに、２倍波の信号の電力が大きくなるにしたがって検波電圧誤差も大きくなることがわかる。   Therefore, it can be seen from the characteristic diagram of FIG. 6 that an error occurs in the detection voltage when the phase of the second harmonic wave when the second connection pad 10 is viewed from the first connection member 4 deviates from 0 degrees. It can also be seen that the detection voltage error increases as the power of the second harmonic signal increases.

一般的には、ＯＦＤＭ信号を増幅するとき、基本波に対して２倍波の電力は−５ｄＢｃ程度発生してしまう。つまり、基本波の電力を２３ｄＢｍとしたときは２倍波の電力は１８ｄＢｍが出力される。   In general, when an OFDM signal is amplified, the power of the second harmonic wave is generated about -5 dBc with respect to the fundamental wave. That is, when the fundamental wave power is 23 dBm, 18 dBm is output as the double wave power.

また、電力増幅部１の出力電力を２３ｄＢｍ±２ｄＢの範囲とした場合、一般的に用いられる倍電圧検波回路の検波電圧の範囲は±０．２Ｖ以内となる。ここで、出力電力の許容範囲を±２ｄＢとしたが、ＷｉＭＡＸの通信規格では、送信機の最大送信出力を２３ｄＢｍ、アンテナ利得を最大２ｄＢｉ、アンテナからの最終出力の最大を２５ｄＢｍと規定しており、アンテナ利得が最大２ｄＢｉであることから、送信機の送信出力の許容上限を＋２ｄＢとした。そして、送信機の送信出力が低下すると通信距離が短くなるため、送信機の送信出力の許容下限は−２ｄＢが要求されている。   Further, when the output power of the power amplifying unit 1 is set to a range of 23 dBm ± 2 dB, the detection voltage range of a commonly used voltage doubler detection circuit is within ± 0.2V. Here, the allowable range of output power is set to ± 2 dB. However, the WiMAX communication standard defines the maximum transmission output of the transmitter as 23 dBm, the antenna gain as a maximum of 2 dBi, and the maximum final output from the antenna as 25 dBm. Since the maximum antenna gain is 2 dBi, the allowable upper limit of the transmission output of the transmitter is set to +2 dB. When the transmission output of the transmitter is reduced, the communication distance is shortened. Therefore, the allowable lower limit of the transmission output of the transmitter is required to be −2 dB.

さらに、Ｗ−ＣＤＭＡの通信規格では、Ｐｏｗｅｒ Ｃｌａｓｓ３における送信機の最大送信出力を２４ｄＢｍとし、許容範囲を＋１ｄＢ〜−３ｄＢと規定している。このことから送信出力の許容範囲を±２ｄＢとした場合、同様に検波電圧の範囲は±０．２Ｖ以内となる。   Furthermore, in the W-CDMA communication standard, the maximum transmission output of the transmitter in Power Class 3 is 24 dBm, and the allowable range is defined as +1 dB to -3 dB. Therefore, when the allowable range of the transmission output is ± 2 dB, the range of the detection voltage is similarly within ± 0.2V.

本実施形態によれば、２倍波の位相を−３０〜＋６０度にすることによって基本周波数の出力電力に対して、２倍波高調波の出力電力が−５ｄＢｃ発生した際に、位相２０度のときの検波電圧、位相６０度のときの検波電圧、位相−３０度のときの検波電圧に示すように２倍波の影響による検波電圧の誤差を０．２Ｖ以下とすることができる。   According to the present embodiment, when the second harmonic output power is -5 dBc relative to the output power of the fundamental frequency by setting the phase of the second harmonic to -30 to +60 degrees, the phase is 20 degrees. As shown in the detection voltage at the time of, the detection voltage at the phase of 60 degrees, and the detection voltage at the phase of -30 degrees, the error of the detection voltage due to the influence of the double wave can be 0.2 V or less.

（第５の実施形態）
図７は本発明に係る第５の実施形態による高周波増幅器のブロック図である。図１に示す第１の実施形態に係る高周波増幅器との異なる点は、半導体実装基板８上に構成された出力整合回路３がローパスフィルタ１８と整合回路１６によって構成している点である。なおローパスフィルタ１８は基本波を通過し、２倍波の周波数で低インピーダンスであり、高調波を減衰させる機能を持つことが好ましい。このことより、検波電圧の誤差を更に低減することができる。 (Fifth embodiment)
FIG. 7 is a block diagram of a high-frequency amplifier according to a fifth embodiment of the present invention. The difference from the high-frequency amplifier according to the first embodiment shown in FIG. 1 is that the output matching circuit 3 configured on the semiconductor mounting substrate 8 includes a low-pass filter 18 and a matching circuit 16. The low-pass filter 18 preferably passes the fundamental wave, has a low impedance at a frequency of the second harmonic, and has a function of attenuating harmonics. As a result, the error in the detection voltage can be further reduced.

以下、本発明の具体的な特性結果を図８に示す特性図を参照して説明する。図８は本発明に係る図７による高周波増幅器の通過特性を示す特性図である。一例として基本波を２．５ＧＨｚ、高調波である２倍波を５ＧＨｚとした場合を説明する。電力増幅部１の出力から接続部材４を通って、出力整合回路３の出力までの通過特性を出力整合回路側減衰量２０３とし、電力増幅部１の出力から接続部材４を通って、接続部材５よりコンデンサ６と検波回路２の入力までの通過特性を検波回路側減衰量２０４とした。２倍波の周波数にて低インピーダンスとなるローパスフィルタ１８を備えていない場合の減衰量を破線で示し、２倍波の周波数にて低インピーダンスとなるローパスフィルタ１８を備えている場合の減衰量を実線で示している。   Hereinafter, specific characteristic results of the present invention will be described with reference to a characteristic diagram shown in FIG. FIG. 8 is a characteristic diagram showing pass characteristics of the high-frequency amplifier according to FIG. 7 according to the present invention. As an example, a case where the fundamental wave is 2.5 GHz and the second harmonic wave is 5 GHz will be described. The passing characteristic from the output of the power amplifying unit 1 through the connecting member 4 to the output of the output matching circuit 3 is defined as the output matching circuit side attenuation 203, and the connecting member is connected from the output of the power amplifying unit 1 through the connecting member 4. The pass characteristic from 5 to the input of the capacitor 6 and the detection circuit 2 is defined as the attenuation amount 204 on the detection circuit side. The amount of attenuation when the low-pass filter 18 having low impedance at the second harmonic frequency is not provided is indicated by a broken line, and the amount of attenuation when the low-pass filter 18 having low impedance at the second harmonic frequency is provided. It is shown with a solid line.

また、検波回路側減衰量２０４の実線と破線の比較により、図７において、半導体集積回路基板７上に高調波信号を反射させる共振回路が無いにもかかわらず、ローパスフィルタ１８を備えることにより２倍波以上の高調波信号が減衰されていることがわかる。   Further, by comparing the solid line and the broken line of the detection circuit-side attenuation amount 204, the low-pass filter 18 is provided by providing the low-pass filter 18 even though there is no resonance circuit that reflects the harmonic signal on the semiconductor integrated circuit substrate 7 in FIG. It can be seen that the harmonic signal higher than the harmonic wave is attenuated.

さらに、図９は本発明に係る図７による２倍波の電力と検波電圧との関係を示す特性図である。電力増幅部１から出力される高周波信号は、基本波を２．５ＧＨｚ、高調波である２倍波を５ＧＨｚとし、基本波の電力を２３ｄＢｍとした。横軸は電力増幅部１から出力される２倍波の電力である。縦軸は、電力増幅部１から基本波のみが２３ｄＢｍの電力で出力されたときの検波電圧を基準電圧とし、基本波と２倍波が出力されたときの検波電圧と基準電圧の差分を計算した値（△Ｖｄｅｔ［Ｖ］）である。言い換えれば、縦軸は２倍波のみの影響による検波電圧を示した値である。   Further, FIG. 9 is a characteristic diagram showing the relationship between the power of the second harmonic wave and the detection voltage according to FIG. 7 according to the present invention. The high frequency signal output from the power amplifying unit 1 has a fundamental wave of 2.5 GHz, a second harmonic wave of 5 GHz, and a fundamental wave power of 23 dBm. The horizontal axis represents the double wave power output from the power amplifier 1. The vertical axis indicates the difference between the detection voltage and the reference voltage when the fundamental wave and the second harmonic wave are output, with the detection voltage when only the fundamental wave is output from the power amplifier 1 with the power of 23 dBm. (ΔVdet [V]). In other words, the vertical axis represents a detection voltage due to the influence of only the second harmonic.

ここで、第一の接続部材４からの第二の接続パッド１０側のインピーダンス特性の２倍波が短絡である場合、スミスチャート（図示せず）にて２倍波の位相が０度となり、２倍波の位相が９０度または−９０度の時が開放となる２倍波の位相における検波電圧値を計算した結果を図９に示す。   Here, when the second harmonic of the impedance characteristic on the second connection pad 10 side from the first connection member 4 is a short circuit, the phase of the second harmonic is 0 degree on the Smith chart (not shown), FIG. 9 shows the result of calculating the detection voltage value in the second harmonic phase that is open when the second harmonic phase is 90 degrees or −90 degrees.

したがって、図９の特性図より、第一の接続部材４から第二の接続パッド１０を見た２倍波の位相が０度からずれた場合、検波電圧に誤差が生じてしまうことがわかる。さらに、２倍波の信号の電力が大きくなるにしたがって検波電圧誤差も大きくなることがわかる。   Therefore, it can be seen from the characteristic diagram of FIG. 9 that an error occurs in the detected voltage when the phase of the second harmonic wave when the second connection pad 10 is viewed from the first connection member 4 is shifted from 0 degrees. It can also be seen that the detection voltage error increases as the power of the second harmonic signal increases.

一般的には、ＯＦＤＭ信号を増幅するとき、基本波に対して２倍波の電力は−５ｄＢｃ程度発生してしまう。つまり、基本波の電力を２３ｄＢｍとしたときは２倍波の電力は１８ｄＢｍが出力される。   In general, when an OFDM signal is amplified, the power of the second harmonic wave is generated about -5 dBc with respect to the fundamental wave. That is, when the fundamental wave power is 23 dBm, 18 dBm is output as the double wave power.

また、増幅器の出力電力を２３ｄＢｍ±２ｄＢの範囲とした場合、一般的に用いられる倍電圧検波回路の検波電圧の範囲は±０．２Ｖ以内となる。本実施形態によれば、出力整合回路３内にローパスフィルタ１８を形成し２倍波以上の高調波を減衰させ、接続パッドにおける２倍波の位相を−２０〜＋３０度にすることによって基本周波数の出力電力に対して、２倍波高調波の出力電力が−５ｄＢｃ発生した際に、位相−２０度のときの検波電圧、位相０度のときの検波電圧、位相３０度のときの検波電圧に示すように２倍波の影響による検波電圧の誤差を±０．２Ｖ以内とすることができる。   When the output power of the amplifier is in the range of 23 dBm ± 2 dB, the detection voltage range of the commonly used voltage doubler detection circuit is within ± 0.2V. According to the present embodiment, the low-pass filter 18 is formed in the output matching circuit 3 to attenuate the harmonics higher than the second harmonic and the phase of the second harmonic in the connection pad is set to -20 to +30 degrees to thereby increase the fundamental frequency. When the output power of the second harmonic is -5 dBc with respect to the output power of, the detection voltage when the phase is -20 degrees, the detection voltage when the phase is 0 degrees, and the detection voltage when the phase is 30 degrees As shown in FIG. 5, the error of the detection voltage due to the influence of the second harmonic can be within ± 0.2V.

なお、図１１は本発明に係る本発明で設けられた検波回路の回路図の一例である。電源端子１１１の出力側に抵抗１１２を設け、第二のダイオード１１０の入力側に抵抗１１３を設け、第一のダイオード１０９の入力側に接続し、第一のダイオード１０９の出力側には抵抗１１４とコンデンサ１１５が並列に接続されている。   FIG. 11 is an example of a circuit diagram of a detection circuit provided in the present invention according to the present invention. A resistor 112 is provided on the output side of the power supply terminal 111, a resistor 113 is provided on the input side of the second diode 110, connected to the input side of the first diode 109, and a resistor 114 is provided on the output side of the first diode 109. And a capacitor 115 are connected in parallel.

以上のように、本発明の高周波増幅器は高周波信号の送受信を行う増幅素子を用いた装置（例えば、携帯電話端末）等に利用可能であり、特に、ＯＦＤＭ方式のような高出力で検波するときに高調波の影響を受けやすい場合等に適している。   As described above, the high-frequency amplifier according to the present invention can be used for a device (for example, a mobile phone terminal) using an amplifying element for transmitting and receiving a high-frequency signal, and particularly when detecting at a high output as in the OFDM method. It is suitable for cases that are susceptible to harmonics.

１、１０１ 電力増幅部
２、１０２ 検波回路
３、１０３ 出力整合回路
４ 第一の接続部材
５ 第二の接続部材
６、１０６、１１５ コンデンサ
７、１０７ 半導体集積回路基板
８、１０８ 半導体実装基板
９ 第一の接続パッド
１０ 第二の接続パッド
１１ 第三の接続パッド
１２ 第一のボンディングワイヤ
１３ 第二のボンディングワイヤ
１４ 第一のバンプ
１５ 第二のバンプ
１６ 整合回路
１７ 直列共振回路
１８ ローパスフィルタ
１０４ 接続部材
１０５ 高調波減衰回路
１０９ 第一のダイオード
１１０ 第二のダイオード
１１１ 電源端子
１１２、１１３、１１４ 抵抗
２０１、２０３ 出力整合回路側減衰量
２０２、２０４ 検波回路側減衰量 DESCRIPTION OF SYMBOLS 1,101 Power amplification part 2,102 Detection circuit 3,103 Output matching circuit 4 1st connection member 5 2nd connection member 6,106,115 Capacitor 7,107 Semiconductor integrated circuit board 8,108 Semiconductor mounting board 9 1st One connection pad 10 Second connection pad 11 Third connection pad 12 First bonding wire 13 Second bonding wire 14 First bump 15 Second bump 16 Matching circuit 17 Series resonance circuit 18 Low-pass filter 104 Connection Member 105 Harmonic attenuation circuit 109 First diode 110 Second diode 111 Power supply terminal 112, 113, 114 Resistance 201, 203 Output matching circuit side attenuation 202, 204 Detection circuit side attenuation

Claims (5)

電力増幅部と前記電力増幅部の出力側に設けた第一の接続パッドと、前記電力増幅部の出力信号を検出する検波回路と、前記検波回路の入力側にコンデンサを介して設けた第三の接続パッドとを具備した半導体集積回路基板と、
出力整合回路と前記出力整合回路の入力側に設けた第二の接続パッドを具備した半導体実装基板とが、
第一の接続部材によって前記半導体集積回路基板の前記第一の接続パッドと前記半導体集積回路基板の前記第二の接続パッドとで電気的に接続されるとともに、
第二の接続部材によって前記半導体集積回路基板の前記第三の接続パッドと前記半導体実装基板の前記第二の接続パッドとが電気的に接続されていることを特徴とする高周波増幅器。 A power amplifying unit; a first connection pad provided on the output side of the power amplifying unit; a detection circuit for detecting an output signal of the power amplifying unit; and a third provided on the input side of the detection circuit via a capacitor. A semiconductor integrated circuit board having a connection pad of
An output matching circuit and a semiconductor mounting board provided with a second connection pad provided on the input side of the output matching circuit;
The first connection member is electrically connected between the first connection pad of the semiconductor integrated circuit board and the second connection pad of the semiconductor integrated circuit board, and
A high-frequency amplifier, wherein the third connection pad of the semiconductor integrated circuit board and the second connection pad of the semiconductor mounting board are electrically connected by a second connection member. 前記第一および第二の接続部材がボンディングワイヤであることを特徴とする請求項１に記載された高周波増幅器。   2. The high frequency amplifier according to claim 1, wherein the first and second connecting members are bonding wires. 前記第一および第二の接続部材がバンプであるフリップチップ実装であることを特徴とする請求項１に記載された高周波増幅器。   2. The high-frequency amplifier according to claim 1, wherein the first and second connecting members are flip chip mounting in which bumps are formed. 前記半導体実装基板上に設けた前記出力整合回路内に２倍波の周波数で短絡となる直列共振回路を具備し、前記直列共振回路の片側が前記第二の接続パッドに接続されるとともに、
前記直列共振回路のもう一方がＧＮＤに接続され、前記半導体実装基板上に設けた前記第二の接続パッドにおける前記出力整合回路側の２倍波の位相が−３０〜＋６０度にあることを特徴とする請求項１から請求項３に記載された高周波増幅器。 The output matching circuit provided on the semiconductor mounting substrate includes a series resonance circuit that is short-circuited at a frequency of a second harmonic, and one side of the series resonance circuit is connected to the second connection pad,
The other of the series resonant circuits is connected to GND, and the phase of the second harmonic on the output matching circuit side in the second connection pad provided on the semiconductor mounting substrate is -30 to +60 degrees. The high-frequency amplifier according to any one of claims 1 to 3. 前記出力整合回路内にローパスフィルタが接続され、半導体実装基板上に設けた前記第二の接続パッドにおける前記出力整合回路側の２倍波の位相が−２０〜＋３０度にあることを特徴とする請求項１から請求項３に記載された高周波増幅器。   A low pass filter is connected in the output matching circuit, and the phase of the second harmonic wave on the output matching circuit side in the second connection pad provided on the semiconductor mounting substrate is -20 to +30 degrees. The high-frequency amplifier according to claim 1.
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