JP2013504811A - デバイスを無効にするための方法及び装置 - Google Patents
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Abstract
デバイスを動作させる方法が提供される。方法は、第1の受信された信号に応答してGPUを実質的に無効な状態に移行させることと、GPUが実質的に無効な状態にある間に第2の受信された信号に応答して応答信号を生成することと、を含む。応答信号は、電力供給状態において第2の受信された信号に応答してGPUによって生成されるはずの第2の応答信号と実質的に同様である。
【選択図】図2
Description
特定の機能の実装及びそれらの関係性を示す機能構築ブロックを補助として、本発明が上述のように説明されてきた。これらの機能構築ブロックの境界は、説明の便宜上ここでは適宜画定されてきた。特定の機能及びそれらの関係性が適切に実施される限りにおいて、代替的な境界が画定され得る。
Claims (20)
- デバイスを動作させる方法であって、
第1の受信された信号に応答して前記デバイスを実質的に無効な状態に移行させることと、
前記デバイスが前記実質的に無効な状態にある間に第2の受信された信号に応答して応答信号を生成することと、を備え、
前記応答信号は、電力供給状態において前記第2の受信された信号に応答して前記デバイスによって生成されるはずの第2の応答信号と実質的に同様である方法。 - 前記第1及び第2の受信された信号の少なくとも1つは中央処理ユニット(CPU)によって生成される請求項1の方法。
- 前記第2の受信された信号はバス構成サイクルを備える請求項1の方法。
- 移行させることは、プロセッサに結合される電力デバイスの出力電圧を無効にすることを備える請求項1の方法。
- 前記電力デバイスは前記プロセッサのレンダリングエンジン又はディスプレイ制御器の少なくとも1つに結合される請求項4の方法。
- 前記デバイスに関連するメモリの少なくとも一部分を無効にすることを更に備える請求項1の方法。
- メモリを無効にすることは、前記メモリに結合される電力デバイスの出力電圧を無効にすることを備える請求項6の方法。
- 前記デバイスは複数の電力デバイスに結合され、
前記第1の受信された信号に基づき前記複数の電力デバイスの1つの電力デバイスを識別することを更に備え、
移行させることは、前記識別された電力デバイスの出力を無効にすることを備える請求項1の方法。 - バスインタフェースモジュールを備えるデバイスであって、
前記バスインタフェースモジュールは、
プロセッサの電力状態を制御するように構成される状態管理モジュールと、
受信された信号に応答して応答信号を生成するように構成される応答モジュールと、を備え、
前記バスインタフェースモジュールは、前記プロセッサが低電力状態にある場合に前記バスインタフェースモジュールに電力を供給するように構成される電力システムに結合され、それにより前記応答モジュールは前記プロセッサが前記低電力状態にある場合に前記応答信号を生成することが可能であるデバイス。 - 前記バスインタフェースモジュールは、前記プロセッサに結合される電力デバイスに結合され、前記状態管理モジュールは、前記電力デバイスの出力を制御して前記プロセッサの前記電力状態を制御するように構成される請求項9のデバイス。
- 前記デバイスはレンダリングエンジンを含むデバイスを更に備え、前記電力デバイスは前記レンダリングエンジンに結合される請求項10のデバイス。
- 前記バスインタフェースモジュールは、前記プロセッサに関連するメモリに結合される電力デバイスに結合され、前記状態管理モジュールは、前記電力デバイスの出力を制御することによって前記メモリの電力状態を制御するように構成される請求項9のデバイス。
- 前記プロセッサはバスを介して中央処理ユニット(CPU)に結合され、前記受信される信号はバス構成サイクルである請求項9のデバイス。
- デバイスを動作させるための方法を行うために1つ以上のプロセッサによる実行のための1つ以上の命令の1つ以上のシーケンスを伝えるコンピュータ可読媒体であって、前記命令は、前記1つ以上のプロセッサによって実行されるときに、前記1つ以上のプロセッサに、
第1の受信された信号に応答して前記デバイスを実質的に無効な状態に移行させることと、
前記プロセッサが前記実質的に無効な状態にある間に第2の受信された信号に応答して応答信号を生成することと、をさせ、
前記応答信号は、電力供給状態において前記第2の受信された信号に応答して前記プロセッサによって生成されるはずの第2の応答信号と実質的に同様であるコンピュータ可読媒体。 - 前記第1及び第2の受信された信号の少なくとも1つは中央処理ユニット(CPU)によって生成される請求項14のコンピュータ可読媒体。
- 前記第2の受信された信号はバス構成サイクルを備える請求項14のコンピュータ可読媒体。
- 電力デバイスが前記デバイスのレンダリングエンジン又はディスプレイ制御器の少なくとも1つに結合される請求項14のコンピュータ可読媒体。
- 移行させることは、前記デバイスに結合される電力デバイスの出力電圧を無効にすることを備える請求項14のコンピュータ可読媒体。
- 前記デバイスに関連するメモリの少なくとも一部分を無効にすることを更に備える請求項14のコンピュータ可読媒体。
- 前記デバイスは複数の電力デバイスに結合され、
前記第1の受信された信号に基づき前記複数の電力デバイスの1つの電力デバイスを識別することを更に備え、
移行させることは、前記識別された電力デバイスの出力を無効にすることを備える請求項14のコンピュータ可読媒体。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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US24087609P | 2009-09-09 | 2009-09-09 | |
US61/240,876 | 2009-09-09 | ||
US12/713,935 US8316255B2 (en) | 2009-09-09 | 2010-02-26 | Method and apparatus for responding to signals from a disabling device while in a disabled state |
US12/713,935 | 2010-02-26 | ||
PCT/US2010/048096 WO2011031734A1 (en) | 2009-09-09 | 2010-09-08 | Method and apparatus for disabling a device |
Publications (3)
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JP2013504811A true JP2013504811A (ja) | 2013-02-07 |
JP2013504811A5 JP2013504811A5 (ja) | 2013-10-31 |
JP5661774B2 JP5661774B2 (ja) | 2015-01-28 |
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JP2012528876A Active JP5661774B2 (ja) | 2009-09-09 | 2010-09-08 | デバイスを無効にするための方法及び装置 |
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US (1) | US8316255B2 (ja) |
EP (1) | EP2476038B1 (ja) |
JP (1) | JP5661774B2 (ja) |
KR (1) | KR101627303B1 (ja) |
CN (1) | CN102597908B (ja) |
IN (1) | IN2012DN02971A (ja) |
WO (1) | WO2011031734A1 (ja) |
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US20110060928A1 (en) | 2011-03-10 |
CN102597908A (zh) | 2012-07-18 |
CN102597908B (zh) | 2015-11-25 |
KR101627303B1 (ko) | 2016-06-03 |
WO2011031734A1 (en) | 2011-03-17 |
EP2476038B1 (en) | 2018-07-04 |
IN2012DN02971A (ja) | 2015-07-31 |
KR20120083365A (ko) | 2012-07-25 |
EP2476038A1 (en) | 2012-07-18 |
US8316255B2 (en) | 2012-11-20 |
JP5661774B2 (ja) | 2015-01-28 |
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