JP2012204476A - Wiring board and manufacturing method therefor - Google Patents
Wiring board and manufacturing method therefor Download PDFInfo
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本発明は、はんだ接合信頼性の高い表面処理を施したＣｕからなる電極を有する配線基板およびその製造方法に関する。 The present invention relates to a wiring board having an electrode made of Cu subjected to surface treatment with high solder joint reliability and a method for manufacturing the same.
Ｃｕからなる電極を備えた半導体チップ搭載基板やプリント配線板は、高周波化、高密度配線化、高機能化に対応するために、ビルドアップ方式の多層配線基板が使用されるようになった。電子機器メーカー各社は、製品の小型・薄型・軽量化を実現するために競って高密度実装に取り組み、パッケージの多ピン、狭ピッチ化の急速な技術進歩がなされ、プリント配線板への実装は従来のＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐａｃｋａｇｅ）からエリア表面実装のＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）／ＣＳＰ（ＣｈｉＰ Ｓｉｚｅ Ｐａｃｋａｇｅ）実装へと発展した。 A semiconductor chip mounting board or printed wiring board provided with an electrode made of Cu has come to use a build-up type multilayer wiring board in order to cope with high frequency, high density wiring and high functionality. Electronic device manufacturers have been competing in high-density packaging to achieve smaller, thinner, and lighter products, and rapid technological progress has been made in reducing the number of pins and narrowing of packages. The conventional QFP (Quad Flat Package) has evolved to BGA (Ball Grid Array) / CSP (ChiP Size Package) mounting with area surface mounting.
中でも半導体チップをインターポーザーを介して、プリント配線板に実装し、かつ各層間がはんだボールによって接続されるＦＣ‐ＢＧＡ（ＦｌｉｐＣｈｉｐ - Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ)技術は、Ａｕ線を用いたワイヤーボンディングによる実装と比較して、低コスト化が可能であるため注目されている。ここで、前記インターポーザーとプリント配線板上に具備されたＣｕからなる電極には、インターポーザーとプリント配線板間をはんだボールで接続するための表面処理が施される。 In particular, FC-BGA (FlipChip-Ball Grid Array) technology, in which a semiconductor chip is mounted on a printed wiring board via an interposer and each layer is connected by solder balls, is implemented by wire bonding using Au wires. In comparison, it is drawing attention because it enables cost reduction. Here, the electrode made of Cu provided on the interposer and the printed wiring board is subjected to a surface treatment for connecting the interposer and the printed wiring board with solder balls.
インターポーザーあるいはプリント配線板への前記表面処理としては、例えば、ニッケル／金（Ｎｉ／Ａｕ）めっきが施されるが、近年は、特にはんだボールとの接合信頼性が良好なニッケル／パラジウム／金（Ｎｉ／Ｐｄ／Ａｕ）めっきが普及しつつある。また、配線の高密度化により、電解めっきに代わり、配線の引き回しが不要な無電解めっき法が注目されており、特に、無電解Ｎｉ／Ａｕめっき、無電解Ｎｉ／Ｐｄ／Ａｕめっき処理が注目を集めている。 As the surface treatment on the interposer or the printed wiring board, for example, nickel / gold (Ni / Au) plating is performed, but in recent years, nickel / palladium / gold having particularly good bonding reliability with solder balls. (Ni / Pd / Au) plating is becoming widespread. In addition, due to higher wiring density, electroless plating methods that do not require wiring are attracting attention instead of electrolytic plating, especially electroless Ni / Au plating and electroless Ni / Pd / Au plating treatment. Collecting.
一方、はんだボールは、ＲｏＨＳ（Ｒｅｓｔｒｉｃｔｉｏｎ ｏｆ Ｈａｚａｒｄｏｕ
Ｓｕｂｓｔａｎｃｅｓ）規制により従来のスズ−鉛（Ｓｎ−Ｐｂ）系はんだから、Ｐｂを含有しないはんだへの移行が進み、その代表としてスズ−銀−胴（Ｓｎ−Ａｇ−Ｃｕ）系のはんだが主に普及している。
On the other hand, solder balls are made of RoHS (Restriction of Hazardou).
The transition from conventional tin-lead (Sn-Pb) solder to Pb-free solder has progressed due to regulations (Substances), and tin-silver-cylinder (Sn-Ag-Cu) solder is mainly used as the representative. It is popular.
しかし、Ｓｎ−Ａｇ−Ｃｕ系はんだの融点は、約２２０℃であり、Ｓｎ−Ｐｂ系はんだよりも約４０℃高く、その結果、Ｓｎ−Ｐｂ系はんだと比較して、リフロー時に基板にかかる熱負荷が強くなり、この熱負荷による半導体チップなどへの影響が懸念されている。そのため、近年は、融点が低く、Ｐｂフリーであることを条件としたはんだへの要求が高まっている。 However, the melting point of the Sn—Ag—Cu solder is about 220 ° C., which is about 40 ° C. higher than that of the Sn—Pb solder, and as a result, the heat applied to the substrate during reflow compared to the Sn—Pb solder. There is a concern about the impact on semiconductor chips and the like due to the increased load. Therefore, in recent years, there is an increasing demand for solder on the condition that the melting point is low and Pb is free.
前記、融点が低く、Ｐｂフリーであることを条件とするはんだとしては、スズ−亜鉛（Ｓｎ−Ｚｎ）系はんだ（融点：約１９０℃）、スズ−ビスマス（Ｓｎ−Ｂｉ）系はんだ（約１３９℃）などが提案されている。 Examples of the solder that is low in melting point and free of Pb include tin-zinc (Sn—Zn) solder (melting point: about 190 ° C.), tin-bismuth (Sn—Bi) solder (about 139). ° C) etc. have been proposed.
しかしながら、配線基板上のＣｕからなる電極の表面処理がＮｉ／Ａｕ、あるいはＮｉ／Ｐｄ／Ａｕめっきの場合、上記のＳｎ−Ｚｎ系はんだ、あるいは、Ｓｎ−Ｂｉ系はんだを用いると、前記めっき／はんだ接合界面には、針状のＮｉ３Ｓｎ４を成分とする脆い金属間化合物層が形成され、はんだ接合信頼性が低下する。更に、前記Ｎｉが無電解Ｎｉめっきであって、且つリン（Ｐ）を含有する場合（以下無電解Ｎｉ−Ｐめっきという）、Ｎｉのはんだ中への一方的な溶出に伴って、Ｎｉめっき皮膜中のＰが、前記Ｃｕからなる電極上に施した無電解Ｎｉ−Ｐめっき／はんだ接合界面に残存して形成されるＰリッチ層によって、はんだ接合信頼性が低下することが非特許文献１で報告されている。 However, when the surface treatment of the electrode made of Cu on the wiring board is Ni / Au or Ni / Pd / Au plating, if the above Sn—Zn solder or Sn—Bi solder is used, the plating / A brittle intermetallic compound layer containing needle-like Ni 3 Sn 4 as a component is formed at the solder joint interface, and the solder joint reliability is lowered. Further, when the Ni is electroless Ni plating and contains phosphorus (P) (hereinafter referred to as electroless Ni-P plating), the Ni plating film is accompanied by unidirectional elution of Ni into the solder. Non-Patent Document 1 shows that the P-rich layer formed by remaining P at the electroless Ni-P plating / solder joint interface formed on the electrode made of Cu reduces the solder joint reliability. It has been reported.
前記Ｎｉ３Ｓｎ４を成分とする脆い金属間化合物層とＰリッチ層の成長を制御する方法としては、はんだ中にＣｕを含有させることによって、前記無電解Ｎｉ−Ｐめっき／はんだ接合界面において、例えば、（Ｃｕ、Ｎｉ）６Ｓｎ５などのＮｉ−Ｃｕ−Ｓｎ系合金を形成させることで、Ｎｉのはんだ側への過剰な溶出を抑制する方法が非特許文献２で報告されている。 As a method for controlling the growth of the brittle intermetallic compound layer containing Ni 3 Sn 4 and the P-rich layer, by including Cu in the solder, at the electroless Ni-P plating / solder joint interface, For example, Non-Patent Document 2 reports a method for suppressing excessive elution of Ni to the solder side by forming a Ni—Cu—Sn alloy such as (Cu, Ni) 6 Sn 5 .
ここで、前記無電解Ｎｉ／Ａｕめっき皮膜、無電解Ｎｉ／Ｐｄ／Ａｕめっき皮膜中のＮｉめっき皮膜が、例えば、無電解Ｎｉ−Ｂめっき、あるいは無電解純Ｎｉめっき皮膜のいずれの場合においても、Ｃｕを含有したはんだを加熱接合することで、前記めっきとはんだ接合界面では、Ｎｉ３Ｓｎ４を成分とする脆い金属間化合物層の形成が阻害されて、（Ｃｕ，Ｎｉ）６Ｓｎ５が形成されるため、安定したはんだ接合信頼性を得ることが可能になる。 Here, in the case where the Ni plating film in the electroless Ni / Au plating film and the electroless Ni / Pd / Au plating film is, for example, an electroless Ni-B plating or an electroless pure Ni plating film. By soldering the solder containing Cu, formation of a brittle intermetallic compound layer containing Ni 3 Sn 4 as a component is inhibited at the plating and solder joint interface, and (Cu, Ni) 6 Sn 5 is formed. Therefore, stable solder joint reliability can be obtained.
本発明は、上記事情に鑑みてなされたものであり、Ｃｕからなる電極を備えた配線基板において、はんだを構成する金属成分によらず、前記電極上に本発明にかかる表面処理を施すことで、前記電極とはんだ接合界面において、はんだ接合信頼性の高い電極を具備した配線基板及びその製造方法を提供することにある。 The present invention has been made in view of the above circumstances. In a wiring board having an electrode made of Cu, the surface treatment according to the present invention is performed on the electrode regardless of the metal component constituting the solder. Another object of the present invention is to provide a wiring board having an electrode with high solder joint reliability at the interface between the electrode and the solder joint, and a method for manufacturing the wiring board.
本発明は、かかる課題を解決するものであり、請求項１の発明は、
Ｃｕからなる電極を有する配線基板の電極上へはんだが加熱接合され、電極とはんだとの接合界面が、電極上の表面処理によりＣｕ、Ｎｉ、Ｓｎ、Ｐｄを含む金属間化合物層が形成されてなり、表面処理が、ピンホールを有する置換Ｓｎめっき皮膜と、無電解Ｎｉめっき皮膜と、無電解Ｐｄめっき皮膜と、無電解Ａｕめっき皮膜とをＣｕからなる電極上に順次積層したことを特徴とした配線基板としたものである。
The present invention solves this problem, and the invention of claim 1
Solder is heated and bonded onto an electrode of a wiring board having an electrode made of Cu, and an intermetallic compound layer containing Cu, Ni, Sn, and Pd is formed at the bonding interface between the electrode and the solder by surface treatment on the electrode. The surface treatment is characterized in that a substituted Sn plating film having a pinhole, an electroless Ni plating film, an electroless Pd plating film, and an electroless Au plating film are sequentially laminated on an electrode made of Cu. This is a wiring board.
請求項２の発明は、
請求項１記載の置換Ｓｎめっき皮膜のピンホールが、置換Ｓｎめっき浴中への塩化物、次亜りん酸塩、臭化物、硝酸塩から選ばれる添加剤の少なくとも一種類以上の添加によって形成されることを特徴とする請求項１記載の配線基板としたものである。
The invention of claim 2
The pinhole of the substituted Sn plating film according to claim 1 is formed by adding at least one additive selected from chloride, hypophosphite, bromide, and nitrate into the substituted Sn plating bath. The wiring board according to claim 1, wherein:
請求項３の発明は、
請求項１記載のＣｕからなる電極上に順次めっき皮膜を積層した配線基板において、Ｃｕ電極と置換Ｓｎめっき界面にＰｄ触媒化処理が行われることを特徴とする請求項１または２記載の配線基板としたものである。
The invention of claim 3
3. The wiring board according to claim 1, wherein a Pd-catalyzed treatment is performed at the interface between the Cu electrode and the substituted Sn plating in the wiring board in which a plating film is sequentially laminated on the electrode made of Cu according to claim 1. It is what.
請求項４の発明は、
置換Ｓｎめっき厚が０．０１〜２．０μｍ、無電解Ｎｉめっき厚が０．０１〜１．０μｍ、無電解Ｐｄめっき皮膜の厚みが０．０５〜０．２μｍ、無電解Ａｕめっき皮膜の厚みが０．０２〜０．１μｍであることを特徴とする請求項１から３のいずれかに記載の配線基板としたものである。
The invention of claim 4
Substitution Sn plating thickness is 0.01-2.0 μm, electroless Ni plating thickness is 0.01-1.0 μm, electroless Pd plating film thickness is 0.05-0.2 μm, electroless Au plating film thickness The wiring board according to claim 1, wherein the wiring board is 0.02 to 0.1 μm.
請求項５の発明は、
Ｃｕからなる電極を有する基板を用意する工程と、
電極上に、ピンホールを有する置換Ｓｎめっき皮膜と、無電解Ｎｉめっき皮膜と、無電解Ｐｄめっき皮膜と、無電解Ａｕめっき皮膜とを順次積層する工程と、
積層した表面にはんだを加熱接合し、Ｃｕ、Ｎｉ、Ｓｎ、Ｐｄを含む金属間化合物層を形成してはんだと電極を接続する工程と、
を含むことを特徴とする配線基板の製造方法としたものである。
The invention of claim 5
Preparing a substrate having an electrode made of Cu;
A step of sequentially laminating a substituted Sn plating film having pinholes, an electroless Ni plating film, an electroless Pd plating film, and an electroless Au plating film on the electrode;
Soldering solder to the laminated surface, forming an intermetallic compound layer containing Cu, Ni, Sn, Pd and connecting the solder and the electrode;
A method for manufacturing a wiring board characterized by comprising:
本発明にかかる配線基板は、ピンホールを有する置換Ｓｎめっき皮膜と、無電解Ｎｉめっき皮膜と、無電解Ｐｄめっき皮膜と、無電解Ａｕめっき皮膜を、Ｃｕからなる電極上に順次積層した配線基板であって、はんだを加熱接合した場合において、はんだ中の金属成分によらず、前記Ｃｕからなる電極／はんだ接合界面でＣｕ、Ｎｉ、Ｓｎ、Ｐｄを含む金属間化合物層を形成することができる。 A wiring board according to the present invention is a wiring board in which a substituted Sn plating film having pinholes, an electroless Ni plating film, an electroless Pd plating film, and an electroless Au plating film are sequentially laminated on an electrode made of Cu. When solder is joined by heating, an intermetallic compound layer containing Cu, Ni, Sn, and Pd can be formed at the electrode / solder joint interface made of Cu regardless of the metal component in the solder. .
Ｃｕを含有しないはんだと、本発明にかかるめっき皮膜とを接合する場合において、Ｃｕ成分の合金層への関与は、配線基板上のＣｕからなる電極側から行われ、これは、ピンホールを有する置換Ｓｎめっき皮膜と無電解Ｎｉめっき皮膜と、更にはんだ中への溶解速度が速く、めっき／はんだ接合界面での金属間化合物層形成において触媒核として機能する無電解Ｐｄめっき皮膜と、はんだ中への拡散速度が速く電極の濡れ性を向上させる無電解Ａｕめっき皮膜を、前記Ｃｕからなる電極上に順次積層することで達成することができる。 In the case of joining the solder not containing Cu and the plating film according to the present invention, the Cu component is involved in the alloy layer from the electrode side made of Cu on the wiring board, which has a pinhole. Substituted Sn plating film and electroless Ni plating film, electroless Pd plating film that has a high dissolution rate in solder and functions as a catalyst nucleus in the formation of an intermetallic compound layer at the plating / solder joint interface, and into the solder This can be achieved by sequentially laminating an electroless Au plating film that has a high diffusion rate and improves the wettability of the electrode on the electrode made of Cu.
以下、Ｃｕからなる電極上に形成させる置換Ｓｎめっき、無電解Ｎｉめっき、無電解Ｐｄめっき、無電解Ａｕめっき処理について詳細に述べる。 Hereinafter, the substitution Sn plating, electroless Ni plating, electroless Pd plating, and electroless Au plating treatment formed on the electrode made of Cu will be described in detail.
本発明にかかる置換Ｓｎめっき浴は、メタンスルホン酸Ｓｎ、メタンスルホン酸、チオ尿素などで構成された一般的なものを用いてもよいが、例えば、前記Ｓｎめっき皮膜がＣｕ、あるいはＡｇなどと合金めっき皮膜を形成するような浴を用いても良い。ただし、前記置換Ｓｎめっき皮膜上に無電解Ｎｉめっき皮膜を施すために、置換Ｓｎめっき皮膜中に、ピンホールを設ける必要がある。置換Ｓｎめっき皮膜上にピンホールを設けない場合、前記置換Ｓｎめっき皮膜上に無電解Ｎｉめっき皮膜を形成しにくくなり、適当な無電解Ｎｉめっき皮膜の厚みを得られなくなる。 As the substitutional Sn plating bath according to the present invention, a general bath composed of methanesulfonic acid Sn, methanesulfonic acid, thiourea, or the like may be used. For example, the Sn plating film may be Cu, Ag, or the like. You may use the bath which forms an alloy plating film. However, in order to apply an electroless Ni plating film on the substituted Sn plating film, it is necessary to provide a pinhole in the replacement Sn plating film. When no pinhole is provided on the substituted Sn plating film, it becomes difficult to form an electroless Ni plating film on the substituted Sn plating film, and an appropriate thickness of the electroless Ni plating film cannot be obtained.
置換Ｓｎめっき厚は、０．０１から２．０μｍであることが望ましく、はんだ接合時において、Ｃｕからなる電極上に施した置換Ｓｎめっき層は、前記順次積層しためっき皮膜とはんだ接合界面でのＣｕ、Ｎｉ、Ｓｎ、Ｐｄを含む合金層の形成時に消費され、はんだ接合後は、皮膜状に残存しない。 The thickness of the substituted Sn plating is preferably 0.01 to 2.0 μm. At the time of solder joining, the substituted Sn plating layer applied on the electrode made of Cu is formed at the interface between the sequentially laminated plating film and the solder joint. It is consumed when forming an alloy layer containing Cu, Ni, Sn, and Pd, and does not remain in the form of a film after soldering.
前記置換Ｓｎめっき厚は、２．０μｍより厚くなると、金属間化合物層の厚みが厚くなり、はんだ接合信頼性が低下するため望ましくない。一方、前記置換Ｓｎめっき皮膜の膜厚が０．０１μｍより薄い場合は、めっき厚のばらつきが生じやすくなり、部分的に膜厚が０．０１μｍより薄い箇所が発現して、同一電極上で均等な厚みのＣｕ、Ｎｉ、Ｓｎ、Ｐｄを含む金属間化合物を形成することが出来ず、安定したはんだ接合信頼性を得るのが
難しくなるため望ましくない。
When the thickness of the substituted Sn plating is greater than 2.0 μm, the thickness of the intermetallic compound layer is increased, and the solder joint reliability is lowered, which is not desirable. On the other hand, when the film thickness of the substituted Sn plating film is thinner than 0.01 μm, the plating thickness is likely to vary, and a portion where the film thickness is thinner than 0.01 μm appears partially, and is uniform on the same electrode. It is not desirable because an intermetallic compound containing Cu, Ni, Sn, and Pd having a large thickness cannot be formed, and it becomes difficult to obtain stable solder joint reliability.
前記置換Ｓｎめっき皮膜中のピンホールは、置換Ｓｎめっき浴中への塩化物、あるいは次亜りん酸塩、臭化物、硝酸塩から選ばれる添加剤の少なくとも一種類以上の添加によって形成され、ピンホール量は、前記添加剤の添加量に応じて増加する。ピンホール量は、前記置換Ｓｎめっき皮膜上での無電解Ｎｉめっき皮膜の析出速度をコントロールするために行われ、その添加量が多いほど無電解Ｎｉめっきの析出速度を速めることができ、タクトを短くすることができる。 The pinhole in the substituted Sn plating film is formed by adding at least one or more kinds of additives selected from chloride, hypophosphite, bromide, and nitrate into the substituted Sn plating bath. Increases according to the amount of the additive. The amount of pinholes is controlled in order to control the deposition rate of the electroless Ni plating film on the substituted Sn plating film, and as the amount added increases, the deposition rate of the electroless Ni plating can be increased. Can be shortened.
Ｃｕからなる電極上に対する置換Ｓｎめっき後の無電解Ｎｉめっき処理は、前記Ｃｕからなる電極と前記順次積層してなるめっき皮膜接合界面において、高い強度を示すＮｉ、Ｃｕ、Ｓｎ、Ｐｄを含む金属間化合物層を形成する目的で行われる。 The electroless Ni plating treatment after substitution Sn plating on the electrode made of Cu is a metal containing Ni, Cu, Sn, and Pd that exhibits high strength at the plating film bonding interface formed by sequentially laminating the electrode made of Cu. This is performed for the purpose of forming an intermetallic compound layer.
前記無電解Ｎｉめっき皮膜は、無電解Ｎｉ−Ｐめっき、無電解ニッケル−ホウ素（Ｎｉ−Ｂ）めっき、無電解純Ｎｉめっきのいずれの処理でも構わない。無電解Ｎｉ−Ｐめっき処理を施す場合、Ｎｉめっき皮膜中のＰ濃度に対する制限はないが、Ｐ濃度が６〜９ｗｔ％程度の中Ｐタイプが望ましい。これは、Ｐ濃度が６ｗｔ％より低い場合、無電解Ｎｉめっき皮膜の耐食性が低下し、置換Ａｕめっき時において、無電解Ｎｉめっき皮膜が腐食されてブラックパッドを形成し、はんだ接合性が低下するためである。また、Ｐ濃度が９ｗｔ％より高い場合は、はんだとめっき皮膜界面において、はんだ接合性を低下させる要因となるＰリッチ層が形成されやすくなるため望ましくない。 The electroless Ni plating film may be any treatment of electroless Ni—P plating, electroless nickel-boron (Ni—B) plating, and electroless pure Ni plating. When performing electroless Ni-P plating, there is no restriction on the P concentration in the Ni plating film, but a medium P type with a P concentration of about 6 to 9 wt% is desirable. This is because when the P concentration is lower than 6 wt%, the corrosion resistance of the electroless Ni plating film is lowered, and during substitutional Au plating, the electroless Ni plating film is corroded to form a black pad, and the solderability is lowered. Because. On the other hand, when the P concentration is higher than 9 wt%, it is not desirable because a P-rich layer that causes a decrease in solderability is easily formed at the interface between the solder and the plating film.
前記無電解Ｎｉめっき皮膜は、めっき厚が１．０μｍ以下であることが望ましい。これは、前記無電解Ｎｉめっき厚が１．０μｍよりも厚く形成されると、該無電解Ｎｉめっき皮膜がはんだの加熱接合時において、前記順次積層してなるめっき皮膜／はんだ接合界面に、皮膜状に残存して、はんだ接合信頼性を低下させるためである。 The electroless Ni plating film preferably has a plating thickness of 1.0 μm or less. This is because when the electroless Ni plating thickness is formed to be greater than 1.0 μm, the electroless Ni plating film is formed on the plating film / solder joint interface formed by sequentially laminating at the time of soldering the solder. This is because it remains in the shape and lowers the solder joint reliability.
無電解Ｐｄめっき皮膜は、無電解Ｐｄ−Ｐめっき、無電解純Ｐｄめっきのいずれでも構わないが、本発明にかかる無電解Ｐｄめっき皮膜は、めっき厚が、０．０５から０．２μｍであることが望ましい。該膜厚が０．２μｍ以上の場合、Ｐｄがはんだ中に溶解することなく、前記順次積層してなるめっき／はんだ接合界面に皮膜状に残存し、はんだ接合信頼性を低下させる恐れがある。また、該膜厚が０．０５μｍよりも薄い場合、ほとんどのＰｄがはんだバルク中に溶解してしまうため、接合界面において金属間化合物層形成時の触媒核として振舞うＰｄが減少し、その結果、Ｃｕ、Ｎｉ、Ｓｎ、Ｐｄを含む合金層の形成が前記Ｃｕからなる電極とはんだ接合界面で不連続となり、はんだ接合性にばらつきが生じる恐れがある。 The electroless Pd plating film may be either electroless Pd—P plating or electroless pure Pd plating, but the electroless Pd plating film according to the present invention has a plating thickness of 0.05 to 0.2 μm. It is desirable. When the film thickness is 0.2 μm or more, Pd does not dissolve in the solder, but remains in the form of a film at the sequentially laminated plating / solder joint interface, which may reduce solder joint reliability. Further, when the film thickness is less than 0.05 μm, most of Pd is dissolved in the solder bulk, so that Pd acting as a catalyst nucleus at the time of forming the intermetallic compound layer at the bonding interface is reduced. Formation of an alloy layer containing Cu, Ni, Sn, and Pd becomes discontinuous at the interface between the electrode made of Cu and the solder joint, and there is a risk that the solder jointability may vary.
無電解Ａｕめっき皮膜は、置換めっき、置換還元、還元めっきのいずれの方法を用いて形成してもよく、該膜厚は、十分なはんだ濡れ性を確保するために０．０２〜０．１μｍであることが望ましい。前記Ａｕめっき厚が０．１μｍより厚い場合、はんだ中に多量のＡｕが溶け込み、はんだ接合性が低下するため望ましくない。 The electroless Au plating film may be formed using any method of displacement plating, displacement reduction, and reduction plating, and the film thickness is 0.02 to 0.1 μm to ensure sufficient solder wettability. It is desirable that If the Au plating thickness is thicker than 0.1 μm, a large amount of Au is dissolved in the solder, which is not desirable because the solderability deteriorates.
Ｃｕからなる電極上に置換Ｓｎめっき皮膜形成時の前処理として、Ｐｄ触媒化処理を施しても良い。これは、はんだを加熱接合した際において、前記順次積層してなるめっき皮膜とはんだ接合界面のみならず、前記Ｃｕからなる電極と置換Ｓｎめっき皮膜界面においても、該Ｐｄを付与することにより、Ｐｄを核とした合金層の形成を促進させて、Ｎｉ、Ｃｕ、Ｓｎ、Ｐｄを含む合金層を形成させることができるためであり、置換Ｓｎめっき皮膜に対し、Ｃｕからなる電極側及びはんだ側から金属間化合物層を形成することができる。 A Pd-catalyzed treatment may be performed on the electrode made of Cu as a pretreatment when forming the substituted Sn plating film. This is because, when solder is heat-bonded, the Pd is applied not only to the sequentially laminated plating film and the solder bonding interface, but also to the Cu electrode and the substituted Sn plating film interface. This is because the formation of an alloy layer having Ni as a core can be promoted to form an alloy layer containing Ni, Cu, Sn, and Pd. From the electrode side made of Cu and the solder side to the substituted Sn plating film An intermetallic compound layer can be formed.
前記置換Ｓｎめっき皮膜に対し、Ｃｕからなる電極側及びはんだ側に形成された金属間化合物層は、リフロー時において、一体化し、同一の金属間化合物層となる。置換Ｓｎめっき皮膜に対して、はんだ側のみから金属間化合物層を形成させた場合よりも、置換Ｓｎめっき皮膜に対して、はんだと電極の両側から金属間化合物層を形成させた方が、金属間化合物層中のＣｕ、Ｎｉ、Ｓｎ、Ｐｄの成分比に偏りが生じにくく、安定したはんだ接合性を得ることができる。また、脆い金属間化合物層であるＮｉ３Ｓｎ４層の成長を制御することで、はんだ接合信頼性を向上させることができる。 With respect to the substituted Sn plating film, the intermetallic compound layers formed on the electrode side and the solder side made of Cu are integrated to form the same intermetallic compound layer during reflow. In contrast to the case where the intermetallic compound layer is formed only from the solder side with respect to the substituted Sn plating film, it is more preferable that the intermetallic compound layer is formed from both sides of the solder and the electrode with respect to the substituted Sn plating film. The component ratio of Cu, Ni, Sn, and Pd in the intermetallic layer is less likely to be biased, and stable solderability can be obtained. Moreover, solder joint reliability can be improved by controlling the growth of the Ni 3 Sn 4 layer, which is a brittle intermetallic compound layer.
前記Ｃｕからなる電極上へのＰｄ触媒化処理において、Ｐｄ触媒化処理液は塩化Ｐｄ溶液、硫酸Ｐｄ溶液などを使用することができる。処理量は、０．０５ｍｇ／ｄｍ２以下が適当である。処理量が０．０５ｍｇ／ｄｍ２より多い場合、Ｃｕからなる電極と置換Ｓｎめっき皮膜界面でＣｕ、Ｓｎからなる合金層が形成され、電極側からのＣｕの溶解が抑制され、Ｃｕからなる電極上に順次積層した置換Ｓｎめっき皮膜、無電解Ｎｉめっき皮膜、無電解Ｐｄめっき皮膜、無電解Ａｕめっき皮膜とはんだ接合界面において、Ｎｉ、Ｃｕ、Ｓｎ、Ｐｄを含む合金層の形成が阻害される。 In the Pd catalyzing treatment on the electrode made of Cu, the Pd catalyzing treatment liquid may be a Pd chloride solution, a sulfuric acid Pd solution, or the like. The treatment amount is suitably 0.05 mg / dm 2 or less. When the treatment amount is more than 0.05 mg / dm 2 , an alloy layer made of Cu and Sn is formed at the interface between the electrode made of Cu and the substituted Sn plating film, and dissolution of Cu from the electrode side is suppressed, and the electrode made of Cu Formation of an alloy layer containing Ni, Cu, Sn, and Pd is hindered at the solder joint interface with the substituted Sn plating film, electroless Ni plating film, electroless Pd plating film, electroless Au plating film, and solder layer sequentially laminated on the top. .
本発明に使用可能なはんだとしては、スズと銅、銀、ビスマス、インジウム（ＳｎとＣｕ、Ａｇ、Ｂｉ、Ｉｎ）などから１種類以上選択して構成されるものが挙げられ、例えば、Ｓｎ−３．５Ａｇ（Ｓｎ９６．５％、Ａｇ３．５％）、Ｓｎ−５８Ｂｉ、Ｓｎ−８．０Ｚｎ−３．０Ｂｉ、Ｓｎ−３．５Ａｇ−０．５Ｂｉ−３．０Ｉｎ、Ｓｎ−３．５Ａｇ−０．５Ｂｉ−４．０Ｉｎ、Ｓｎ−３．５Ａｇ−０．５Ｂｉ−８．０Ｉｎ、Ｓｎ−３Ａｇ−０．５Ｃｕ、Ｓｎ−３．５Ａｇ−０．７５Ｃｕ、Ｓｎ−４０Ｂｉ−０．１Ｃｕなどが挙げられる。 Examples of the solder that can be used in the present invention include one selected from tin and copper, silver, bismuth, indium (Sn and Cu, Ag, Bi, In), and the like. For example, Sn— 3.5Ag (Sn 96.5%, Ag 3.5%), Sn-58Bi, Sn-8.0Zn-3.0Bi, Sn-3.5Ag-0.5Bi-3.0In, Sn-3.5Ag-0 .5Bi-4.0In, Sn-3.5Ag-0.5Bi-8.0In, Sn-3Ag-0.5Cu, Sn-3.5Ag-0.75Cu, Sn-40Bi-0.1Cu, etc. .
また、前記はんだには、Ｓｎ−３７Ｐｂを使用することもできる。無電解Ｎｉ／Ｐｄ／Ａｕめっき上に前記Ｓｎ−３７Ｐｂはんだを接合した場合、はんだとめっき接合界面において、Ｐｂの濃縮によるはんだ接合信頼性の低下が生じるが、本発明にかかる表面処理とＳｎ−３７Ｐｂの接合界面においては、Ｐｂの濃縮は生じず、はんだ接合性が向上する。 Moreover, Sn-37Pb can also be used for the solder. When the Sn-37Pb solder is joined on the electroless Ni / Pd / Au plating, the solder joint reliability decreases due to the concentration of Pb at the solder-plating joint interface. At the joint interface of 37Pb, Pb concentration does not occur, and the solderability is improved.
以下に本発明にかかる実施例について説明する。 Examples of the present invention will be described below.
本実施例においては、置換Ｓｎめっき、無電解Ｎｉ−Ｐめっき（Ｐ：７ｗｔ％）、無電解Ｐｄ−Ｐめっき（Ｐ：４ｗｔ％）、置換Ａｕめっきを順次積層したＣｕからなる電極（電極径＝φ５００μｍ）を作製後、該電極上にφ＝６００μｍのＳｎ−３Ａｇ−０．５Ｃｕ（Ｓｎ９６．５％、Ａｇ３％、Ｃｕ０．５％）、Ｓｎ−３．５Ａｇ−０．５Ｂｉ−８Ｉｎのはんだボールを加熱接合によって搭載し、はんだシェア試験により、接合強度を測定した。 In this example, an electrode (electrode diameter) made of Cu in which substitution Sn plating, electroless Ni—P plating (P: 7 wt%), electroless Pd—P plating (P: 4 wt%), and substitution Au plating are sequentially laminated. = Φ500 μm), and then Sn = Ag-0.5Cu (Sn96.5%, Ag3%, Cu0.5%), Sn-3.5Ag-0.5Bi-8In solder of φ = 600 μm on the electrode The ball was mounted by heat bonding, and the bonding strength was measured by a solder shear test.
Ｃｕからなる電極には、ガラスエポキシ樹脂に無電解銅めっきと電気銅めっきを行い、サブトラクティブ法によりＣｕパターンを形成し、パッド径がφ５００μｍとなるようにソルダーレジストでパッド以外の部分を被覆したものを用いた。 For the electrode made of Cu, electroless copper plating and electrolytic copper plating were performed on a glass epoxy resin, a Cu pattern was formed by a subtractive method, and a portion other than the pad was coated with a solder resist so that the pad diameter was φ500 μm. A thing was used.
前記置換Ｓｎめっき、無電解Ｎｉ−Ｐめっき、無電解Ｐｄ−Ｐめっき、置換Ａｕめっき処理に用いた浴組成は以下の通りである。 The bath compositions used for the replacement Sn plating, electroless Ni—P plating, electroless Pd—P plating, and replacement Au plating are as follows.
・置換Ｓｎめっき
メタンスルホン酸Ｓｎ：１０ｇ／Ｌ
メタンスルホン酸：２０ｇ／Ｌ
チオ尿素：５０ｇ／Ｌ
塩化ナトリウム：５ｇ／Ｌ
液温：５５℃
析出速度：０．１μｍ／ｍｉｎ
・無電解Ｎｉ−Ｐめっき
Ｎｉ：５ｇ／Ｌ（硫酸Ｎｉとして添加）
次亜りん酸ナトリウム：３０ｇ／Ｌ
乳酸：２５ｇ／Ｌ
チオ尿素：０．５ｍｇ／Ｌ
硝酸Ｐｂ：０．５ｍｇ／Ｌ
ｐＨ：４．５
液温：８４℃
析出速度：１２μｍ／ｈ
・無電解Ｐｄ−Ｐめっき
Ｐｄ：０．８ｇ／Ｌ（テトラアンミンＰｄとして添加）
次亜りん酸ナトリウム：１０ｇ／Ｌ
硝酸Ｂｉ：２ｍｇ／Ｌ
りん酸：１０ｇ／Ｌ
ｐＨ：７．５
液温：４３℃
析出速度：０．０５μｍ／５分
・置換Ａｕめっき
Ａｕ：１．０ｇ／Ｌ（シアン化Ａｕカリウムとして添加）
チオ硫酸：１ｍｇ／Ｌ
クエン酸：２５ｇ／Ｌ
りん酸：１０ｇ／Ｌ
ｐＨ：４．５
液温：８６℃
析出速度：０．０５μｍ／２０分
・Ｐｄ触媒化処理液
Ｐｄ：０．１ｇ／Ｌ（塩化Ｐｄとして添加）
塩酸：１．５ｇ／Ｌ
液温：２５℃
＜実施例１＞
φ＝５００μｍのＣｕからなる電極上に、前記置換Ｓｎめっき浴を用いて置換Ｓｎめっき皮膜を形成後、該置換Ｓｎめっき皮膜上に前記無電解Ｎｉ−Ｐめっき浴を用いて、無電解Ｎｉ−Ｐめっき皮膜を形成する工程において、前記置換Ｓｎめっき浴中への添加剤（塩化ナトリウム）の添加による無電解Ｎｉ−Ｐめっき皮膜の析出性への効果を検証した。
・ Substituted Sn plating methanesulfonic acid Sn: 10 g / L
Methanesulfonic acid: 20 g / L
Thiourea: 50 g / L
Sodium chloride: 5g / L
Liquid temperature: 55 ° C
Deposition rate: 0.1 μm / min
Electroless Ni-P plated Ni: 5 g / L (added as Ni sulfate)
Sodium hypophosphite: 30 g / L
Lactic acid: 25 g / L
Thiourea: 0.5mg / L
Pb nitrate: 0.5mg / L
pH: 4.5
Liquid temperature: 84 ° C
Deposition rate: 12 μm / h
Electroless Pd—P plating Pd: 0.8 g / L (added as tetraammine Pd)
Sodium hypophosphite: 10 g / L
Binitrate: 2 mg / L
Phosphoric acid: 10 g / L
pH: 7.5
Liquid temperature: 43 ° C
Deposition rate: 0.05 μm / 5 min. Substitution Au plating Au: 1.0 g / L (added as Au potassium cyanide)
Thiosulfuric acid: 1 mg / L
Citric acid: 25 g / L
Phosphoric acid: 10 g / L
pH: 4.5
Liquid temperature: 86 ° C
Deposition rate: 0.05 μm / 20 minutes Pd-catalyzed treatment solution Pd: 0.1 g / L (added as Pd chloride)
Hydrochloric acid: 1.5 g / L
Liquid temperature: 25 ° C
<Example 1>
After forming a substituted Sn plating film on the electrode made of Cu of φ = 500 μm using the substituted Sn plating bath, an electroless Ni-P is used on the substituted Sn plating film using the electroless Ni—P plating bath. In the step of forming the P plating film, the effect on the depositability of the electroless Ni—P plating film by the addition of the additive (sodium chloride) into the substituted Sn plating bath was verified.
Ｃｕからなる電極上に置換Ｓｎめっき処理をする工程において、置換Ｓｎめっき浴中に塩化ナトリウムの濃度が５ｇ／Ｌとなるように添加し、置換Ｓｎめっき皮膜を０．５μｍ形成後、無電解Ｎｉ−Ｐめっき処理を前記浴中にて１５分間実施した。 In the step of performing the substitutional Sn plating treatment on the electrode made of Cu, it was added to the substitutional Sn plating bath so that the concentration of sodium chloride was 5 g / L, and after forming the substitutional Sn plating film to 0.5 μm, electroless Ni -P plating treatment was carried out in the bath for 15 minutes.
＜比較例１＞
Ｃｕからなる電極上に置換Ｓｎめっき処理をする工程において、置換Ｓｎめっき浴中に塩化ナトリウムを添加せずに、置換Ｓｎめっき皮膜を０．５μｍ形成後、無電解Ｎｉ−Ｐめっき処理を前記浴中にて１５分間実施した。
<Comparative Example 1>
In the step of performing the substitutional Sn plating treatment on the electrode made of Cu, without adding sodium chloride in the substitutional Sn plating bath, after forming a substitutional Sn plating film of 0.5 μm, the electroless Ni-P plating treatment is performed in the bath. For 15 minutes.
実施例１と比較例１より、置換Ｓｎめっき浴中に塩化ナトリウムを５ｇ／Ｌ添加した時と未添加の場合において、無電解Ｎｉ−Ｐめっきの各膜厚は、３μｍ、０．０５μｍとなった。また、未添加時のめっき皮膜表面には、めっきムラが認められた。これより、Ｓｎめっき皮膜上に無電解Ｎｉ−Ｐめっき皮膜を析出させるためには、Ｓｎめっき皮膜中にピンホールを設ける必要があり、これは、置換Ｓｎめっき浴中に塩化ナトリウムを添加することで達成できることが確認された。 From Example 1 and Comparative Example 1, in the case where 5 g / L of sodium chloride was added to the substituted Sn plating bath and when it was not added, the respective film thicknesses of the electroless Ni—P plating were 3 μm and 0.05 μm. It was. Further, uneven plating was observed on the surface of the plating film when not added. Therefore, in order to deposit the electroless Ni-P plating film on the Sn plating film, it is necessary to provide a pinhole in the Sn plating film. This is because sodium chloride is added to the substituted Sn plating bath. It was confirmed that this can be achieved.
＜実施例２＞
φ＝５００μｍのＣｕからなる電極上に、前記置換Ｓｎめっき浴、無電解Ｎｉ−Ｐめっき浴、無電解Ｐｄ−Ｐめっき浴、置換Ａｕめっき浴を用いて、置換Ｓｎめっき、無電解Ｎｉ−Ｐめっき、無電解Ｐｄ−Ｐめっき、置換Ａｕめっき皮膜の各厚みが表１記載の数値となるように、サンプルを作製後、該電極上にφ＝６００μｍのＳｎ−３Ａｇ−０．５Ｃｕ、Ｓｎ−３．５Ａｇ−０．５Ｂｉ−８Ｉｎのはんだボールを加熱接合によって搭載し、はんだシェア試験により、はんだ付け性を評価し、結果を表１に示した。
<Example 2>
On the electrode made of Cu of φ = 500 μm, the substituted Sn plating bath, the electroless Ni—P plating bath, the electroless Pd—P plating bath, and the substituted Au plating bath are used. After preparing the sample so that each thickness of the plating, electroless Pd—P plating, and substituted Au plating film becomes the numerical value described in Table 1, φ = 600 μm of Sn-3Ag-0.5Cu, Sn— A solder ball of 3.5Ag-0.5Bi-8In was mounted by heat bonding, the solderability was evaluated by a solder shear test, and the results are shown in Table 1.
＜比較例２−１〜２−８＞
実施例２に対し、実施例２と同様の方法で、置換Ｓｎめっき厚を０〜０．３μｍ、無電解Ｎｉ−Ｐめっき厚を０〜２．０μｍ、無電解Ｐｄ−Ｐめっき厚を０〜０．３μｍ、置換Ａｕめっき厚を０〜０．２μｍに変化させたサンプルを作製し、はんだ接合性を評価し、結果を表１に示した。
<Comparative Examples 2-1 to 2-8>
In contrast to Example 2, the replacement Sn plating thickness was 0 to 0.3 μm, the electroless Ni—P plating thickness was 0 to 2.0 μm, and the electroless Pd—P plating thickness was 0 to 0 in the same manner as in Example 2. Samples with 0.3 μm and substituted Au plating thickness changed to 0-0.2 μm were prepared, and the solderability was evaluated. The results are shown in Table 1.
＜比較例２−９〜２−１０＞
実施例２に対し、一般的な無電解Ｎｉ／Ａｕめっき、無電解Ｎｉ／Ｐｄ／Ａｕめっきサンプルを作製して、はんだ接合性を評価し、結果を表１に示した。
<Comparative Examples 2-9 to 2-10>
For Example 2, general electroless Ni / Au plating and electroless Ni / Pd / Au plating samples were prepared, and solder joint properties were evaluated. The results are shown in Table 1.
表１より、実施例２に記載した置換Ｓｎめっき、無電解Ｎｉ−Ｐめっき、無電解Ｐｄ−Ｐめっき、置換Ａｕめっき皮膜の各厚みが本発明にかかる請求の範囲内にある０．５、０．５、０．１、０．０５μｍである場合において、はんだ接合強度が、比較例２−１〜２−８よりも良好な結果を示した。また、比較例２−９〜２−１０との比較から、従来、プリント配線板に用いられてきた無電解Ｎｉ／Ａｕめっき、無電解Ｎｉ／Ｐｄ／Ａｕめっき処理よりも実施例２の本発明にかかる表面処理の方が、はんだ接合性に優れていることが示された。 From Table 1, each thickness of the substituted Sn plating, electroless Ni—P plating, electroless Pd—P plating, and substituted Au plating film described in Example 2 is within the scope of the claims according to the present invention, 0.5, When the thickness was 0.5, 0.1, 0.05 μm, the solder joint strength was better than those of Comparative Examples 2-1 to 2-8. Further, from the comparison with Comparative Examples 2-9 to 2-10, the present invention of Example 2 is more than the electroless Ni / Au plating and electroless Ni / Pd / Au plating treatments conventionally used for printed wiring boards. It was shown that the surface treatment according to 1 is superior in solderability.
＜実施例３、４＞
実施例２に対し、前記各めっき浴を用いて、Ｃｕからなる電極上にＰｄ触媒化処理を０．０５ｍｇ／ｄｍ２形成後、置換Ｓｎめっき厚を０．５μｍ、無電解Ｎｉ−Ｐめっき厚を０．５μｍ、無電解Ｐｄ−Ｐめっき厚を０．１μｍ、置換Ａｕめっき厚を０．０５μｍに変化させたサンプルを作製し、はんだ接合性を評価し、結果を表１に示した。
<Examples 3 and 4>
In contrast to Example 2, 0.05 mg / dm 2 of Pd-catalyzed treatment was formed on an electrode made of Cu using each of the plating baths, and the substituted Sn plating thickness was 0.5 μm, and the electroless Ni—P plating thickness. Of 0.5 μm, electroless Pd—P plating thickness was changed to 0.1 μm, and displacement Au plating thickness was changed to 0.05 μm. The solderability was evaluated, and the results are shown in Table 1.
表１より、Ｃｕからなる電極表面に前記めっき皮膜を順次積層する前処理として、Ｐｄ触媒化処理をすることにより、本発明にかかる表面処理方法が、同等もしくはそれ以上のはんだ接合強度を示した。これより、実施例１よりも、より高いはんだ接合強度を得るためには、Ｃｕからなる電極と置換Ｓｎめっき皮膜界面に、Ｐｄ触媒層を設ける必要があることが確認された。 From Table 1, the surface treatment method according to the present invention showed equivalent or higher solder joint strength by performing Pd catalyst treatment as a pretreatment for sequentially laminating the plating film on the electrode surface made of Cu. . From this, in order to obtain higher solder joint strength than Example 1, it was confirmed that it was necessary to provide a Pd catalyst layer at the interface between the electrode made of Cu and the substituted Sn plating film.
Claims (5)
電極上に、ピンホールを有する置換Ｓｎめっき皮膜と、無電解Ｎｉめっき皮膜と、無電解Ｐｄめっき皮膜と、無電解Ａｕめっき皮膜とを順次積層する工程と、
積層した表面にはんだを加熱接合し、Ｃｕ、Ｎｉ、Ｓｎ、Ｐｄを含む金属間化合物層を形成してはんだと電極を接続する工程と、
を含むことを特徴とする配線基板の製造方法。 Preparing a substrate having an electrode made of Cu;
A step of sequentially laminating a substituted Sn plating film having pinholes, an electroless Ni plating film, an electroless Pd plating film, and an electroless Au plating film on the electrode;
Soldering solder to the laminated surface, forming an intermetallic compound layer containing Cu, Ni, Sn, Pd and connecting the solder and the electrode;
A method for manufacturing a wiring board, comprising:
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013012739A (en) * | 2011-06-28 | 2013-01-17 | Samsung Electro-Mechanics Co Ltd | Electric joining terminal structure and method for preparing the same |
| JP2015008179A (en) * | 2013-06-24 | 2015-01-15 | 新光電気工業株式会社 | Pad structure, mounting structure, and manufacturing method |
-
2011
- 2011-03-24 JP JP2011065950A patent/JP2012204476A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013012739A (en) * | 2011-06-28 | 2013-01-17 | Samsung Electro-Mechanics Co Ltd | Electric joining terminal structure and method for preparing the same |
| JP2015008179A (en) * | 2013-06-24 | 2015-01-15 | 新光電気工業株式会社 | Pad structure, mounting structure, and manufacturing method |
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