JP2011040731A - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP2011040731A JP2011040731A JP2010159825A JP2010159825A JP2011040731A JP 2011040731 A JP2011040731 A JP 2011040731A JP 2010159825 A JP2010159825 A JP 2010159825A JP 2010159825 A JP2010159825 A JP 2010159825A JP 2011040731 A JP2011040731 A JP 2011040731A
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- oxide semiconductor
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- semiconductor film
- oxide
- insulating film
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- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 150000003608 titanium Chemical class 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- 229910001930 tungsten oxide Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- OYQCBJZGELKKPM-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[O-2].[In+3] OYQCBJZGELKKPM-UHFFFAOYSA-N 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
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Abstract
【解決手段】絶縁表面を有する基板上にゲート電極を形成し、ゲート電極上にゲート絶縁膜を形成し、ゲート絶縁膜上に酸化物半導体膜を形成し、酸化物半導体膜にマイクロ波または高周波の電磁波を照射し、電磁波が照射された酸化物半導体膜上にソース電極及びドレイン電極を形成し、ゲート絶縁膜、酸化物半導体膜、ソース電極、及びドレイン電極上に酸化物半導体膜の一部と接する酸化物絶縁膜を形成する半導体装置の作製方法。
【選択図】図1
Description
半導体装置の作製方法について、図1及び図2を用いて説明する。
本実施の形態では、実施の形態1で示したトランジスタ112とは構造が異なるトランジスタを有する、半導体装置の作製方法について説明する。なお、実施の形態1と同一部分又は同様な機能を有する部分、及び工程は、実施の形態1と同様に行うことができるため、繰り返しの説明は省略する。
トランジスタを含む半導体装置の作製工程について、図5乃至図10を用いて説明する。
本実施の形態では、実施の形態1で示したトランジスタ112、実施の形態2で示したトランジスタ212とは、構造が異なるトランジスタを有する、半導体装置の作製方法について説明する。なお、実施の形態1と同一部分又は同様な機能を有する部分、及び工程は、実施の形態1と同様に行うことができるため、繰り返しの説明は省略する。
本実施の形態では、本発明の半導体装置の作製方法を用いて形成することができ、なおかつ、実施の形態1乃至実施の形態4と構造が一部異なるトランジスタの構成について説明する。
本実施の形態では、本発明の一態様に係るトランジスタをスイッチング素子として用いた、液晶表示装置の構成について説明する。
本実施の形態では、本発明の一態様に係るトランジスタを画素に用いた、発光装置の構成について説明する。本実施の形態では、発光素子を駆動させるためのトランジスタがn型の場合における、画素の断面構造について、図15を用いて説明する。なお図15では、第1の電極が陰極、第2の電極が陽極の場合について説明するが、第1の電極が陽極、第2の電極が陰極であっても良い。
本実施の形態では、同一基板上に少なくとも駆動回路の一部と、画素部に配置するトランジスタを作製する例について以下に説明する。
11 配線
12 配線
13 配線
14 配線
15 配線
21 入力端子
22 入力端子
23 入力端子
24 入力端子
25 入力端子
26 出力端子
27 出力端子
31 トランジスタ
32 トランジスタ
33 トランジスタ
34 トランジスタ
35 トランジスタ
36 トランジスタ
37 トランジスタ
38 トランジスタ
39 トランジスタ
40 トランジスタ
41 トランジスタ
42 トランジスタ
43 トランジスタ
51 電源線
52 電源線
53 電源線
61 期間
62 期間
100 基板
101 ゲート電極
103 ゲート絶縁膜
104 酸化物半導体膜
105 酸化物半導体膜
106 ソース電極
107 ドレイン電極
108 酸化物半導体膜
109 酸化物半導体膜
110 酸化物絶縁膜
111 酸化物半導体膜
112 トランジスタ
122 酸化物半導体膜
123 酸化物絶縁膜
132 酸化物半導体膜
133 酸化物絶縁膜
142 酸化物半導体膜
143 絶縁膜
145 チャネル保護膜
170 プラズマ
180 処理容器
181 支持台
182 ガス供給部
183 排気口
184 マイクロ波発生装置
185 導波管
186 誘電体板
187 天板
188 取り付け具
191 非原料ガス供給源
192 非原料ガス供給源
193 質量流量コントローラ
194 質量流量コントローラ
195 バルブ
196 バルブ
197 ガス管
198 ガス管
199 温度制御部
200 基板
201 ゲート電極
203 ゲート絶縁膜
204 酸化物半導体膜
205 酸化物半導体膜
206 ソース電極
207 ドレイン電極
210 酸化物絶縁膜
211 酸化物半導体膜
212 トランジスタ
300 基板
301 ゲート電極
303 ゲート絶縁膜
304 酸化物半導体膜
305 酸化物半導体膜
306 ソース電極
307 ドレイン電極
310 絶縁膜
311 酸化物半導体膜
312 トランジスタ
313 チャネル保護膜
400 基板
401 ゲート電極
402 ゲート絶縁膜
403 酸化物半導体膜
404 酸化物半導体膜
405 酸化物半導体膜
406 導電膜
408 容量配線
409 酸化物半導体膜
410 酸化物半導体膜
411 酸化物絶縁膜
412 酸化物半導体膜
413 トランジスタ
414 画素電極
415 透明導電膜
416 透明導電膜
420 第2の端子
421 第1の端子
120a ソース領域
120b ドレイン領域
121a ソース電極
121b ドレイン電極
130a ソース領域
130b ドレイン領域
131a ソース電極
131b ドレイン電極
140a ソース領域
140b ドレイン領域
141a ソース電極
141b ドレイン電極
187a 開口部
1401 トランジスタ
1402 ゲート電極
1403 ゲート絶縁膜
1404 酸化物半導体膜
1405 半導体膜
1406 導電膜
1407 酸化物絶縁膜
1408 絶縁膜
1410 画素電極
1411 配向膜
1413 対向電極
1414 配向膜
1415 液晶
1416 シール材
1417 スペーサ
1601 液晶パネル
1602 拡散板
1603 プリズムシート
1604 拡散板
1605 導光板
1606 反射板
1607 光源
1608 回路基板
1609 FPC
1610 FPC
407a ソース電極
407b ドレイン電極
5300 基板
5301 画素部
5302 走査線駆動回路
5303 走査線駆動回路
5304 信号線駆動回路
5305 タイミング制御回路
5601 シフトレジスタ
5602 スイッチング回路
5603 トランジスタ
5604 配線
5605 配線
6031 トランジスタ
6033 発光素子
6034 電極
6035 電界発光層
6036 電極
6037 絶縁膜
6038 隔壁
6041 トランジスタ
6043 発光素子
6044 電極
6045 電界発光層
6046 電極
6047 絶縁膜
6048 隔壁
6051 トランジスタ
6053 発光素子
6054 電極
6055 電界発光層
6056 電極
6057 絶縁膜
6058 隔壁
7001 筐体
7002 表示部
7011 筐体
7012 ICチップ
7021 筐体
7022 表示部
7301 筐体
7302 筐体
7303 表示部
7304 表示部
7305 マイクロホン
7306 スピーカー
7307 操作キー
7308 スタイラス
Claims (23)
- 絶縁表面を有する基板上に酸化物半導体膜を形成し、
不活性気体雰囲気下において前記酸化物半導体膜にマイクロ波または高周波の電磁波を照射することで、前記酸化物半導体膜中に含まれる極性分子にエネルギーを与え、該極性分子を気化させる処理を含む半導体装置の作製方法。 - 請求項1において、前記不活性気体雰囲気が、窒素雰囲気または希ガス雰囲気である半導体装置の作製方法。
- 請求項1において、前記不活性雰囲気下に代えて、減圧下で前記酸化物半導体膜にマイクロ波または高周波の電磁波を照射する半導体装置の作製方法。
- 請求項1において、前記不活性雰囲気下に代えて、大気圧下における露点が−60℃以下の空気中で前記酸化物半導体膜にマイクロ波または高周波の電磁波を照射する半導体装置の作製方法。
- 請求項1乃至請求項4のいずれか1項において、前記処理の後に前記酸化物半導体膜に酸素を導入する処理を行う半導体装置の作製方法。
- 請求項5において、前記酸素を導入する処理が、酸素雰囲気中の加熱処理である半導体装置の作製方法。
- 請求項1乃至請求項4のいずれか1項において、前記処理の後に前記酸化物半導体膜に接する酸化物半導体膜を形成する半導体装置の作製方法。
- 請求項1乃至請求項7のいずれか1項において、前記マイクロ波は周波数が300MHz以上3THz以下である半導体装置の作製方法。
- 請求項1乃至請求項7のいずれか1項において、前記マイクロ波は周波数が300MHz以上300GHz以下である半導体装置の作製方法。
- 請求項1乃至請求項7のいずれか1項において、前記マイクロ波は周波数が915MHzまたは2.45GHzである半導体装置の作製方法。
- 請求項1乃至請求項7のいずれか1項において、前記高周波は周波数が1MHz以上300MHz以下である半導体装置の作製方法。
- 請求項1乃至請求項7のいずれか1項において、前記高周波は周波数が4MHz以上80MHz以下である半導体装置の作製方法。
- 絶縁表面を有する基板上にゲート電極を形成し、
前記ゲート電極上にゲート絶縁膜を形成し、
前記ゲート絶縁膜上に酸化物半導体膜を形成し、
前記酸化物半導体膜にマイクロ波または高周波の電磁波を照射し、
前記電磁波が照射された酸化物半導体膜上にソース電極及びドレイン電極を形成し、
前記ゲート絶縁膜、前記酸化物半導体膜、前記ソース電極、及び前記ドレイン電極上に前記酸化物半導体膜の一部と接する酸化物絶縁膜を形成する半導体装置の作製方法。 - 絶縁表面を有する基板上にゲート電極を形成し、
前記ゲート電極上にゲート絶縁膜を形成し、
前記ゲート絶縁膜上に酸化物半導体膜を形成し、
前記酸化物半導体膜上にソース電極及びドレイン電極を形成し、
前記酸化物半導体膜にマイクロ波または高周波の電磁波を照射し、
前記ゲート絶縁膜、前記酸化物半導体膜、前記ソース電極、及び前記ドレイン電極上に前記電磁波が照射された酸化物半導体膜の一部と接する酸化物絶縁膜を形成する半導体装置の作製方法。 - 絶縁表面を有する基板上にゲート電極を形成し、
前記ゲート電極上にゲート絶縁膜を形成し、
前記ゲート絶縁膜上に酸化物半導体膜を形成し、
前記酸化物半導体膜に加熱処理を行いながら、マイクロ波または高周波の電磁波を照射し、
前記電磁波が照射された酸化物半導体膜上にソース電極及びドレイン電極を形成し、
前記ゲート絶縁膜、前記酸化物半導体膜、前記ソース電極、及び前記ドレイン電極上に前記酸化物半導体膜の一部と接する酸化物絶縁膜を形成する半導体装置の作製方法。 - 絶縁表面を有する基板上にゲート電極を形成し、
前記ゲート電極上にゲート絶縁膜を形成し、
前記ゲート絶縁膜上に酸化物半導体膜を形成し、
前記酸化物半導体膜上にソース電極及びドレイン電極を形成し、
前記酸化物半導体膜に加熱処理を行いながら、マイクロ波または高周波の電磁波を照射し、
前記ゲート絶縁膜、前記酸化物半導体膜、前記ソース電極、及び前記ドレイン電極上に前記電磁波が照射された酸化物半導体膜の一部と接する酸化物絶縁膜を形成する半導体装置の作製方法。 - 請求項15または請求項16において、前記加熱処理は100℃以上350℃未満で行う半導体装置の作製方法。
- 請求項13乃至請求項17のいずれか1項において、前記電磁波の照射は窒素雰囲気、または希ガス雰囲気、或いは減圧下で行う半導体装置の作製方法。
- 請求項13乃至請求項18のいずれか1項において、前記マイクロ波は周波数が300MHz以上3THz以下である半導体装置の作製方法。
- 請求項13乃至請求項18のいずれか1項において、前記マイクロ波は周波数が300MHz以上300GHz以下である半導体装置の作製方法。
- 請求項13乃至請求項18のいずれか1項において、前記マイクロ波は周波数が915MHzまたは2.45GHzである半導体装置の作製方法。
- 請求項13乃至請求項18のいずれか1項において、前記高周波は周波数が1MHz以上300MHz以下である半導体装置の作製方法。
- 請求項13乃至請求項18のいずれか1項において、前記高周波は周波数が4MHz以上80MHz以下である半導体装置の作製方法。
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JP2022044747A (ja) | 2022-03-17 |
JP2017063208A (ja) | 2017-03-30 |
US20150144947A1 (en) | 2015-05-28 |
JP5857103B2 (ja) | 2016-02-10 |
JP2020096204A (ja) | 2020-06-18 |
JP2015035607A (ja) | 2015-02-19 |
US10256291B2 (en) | 2019-04-09 |
US8952378B2 (en) | 2015-02-10 |
JP5618661B2 (ja) | 2014-11-05 |
US20110014745A1 (en) | 2011-01-20 |
TWI524427B (zh) | 2016-03-01 |
TW201118956A (en) | 2011-06-01 |
TW201611129A (zh) | 2016-03-16 |
WO2011007682A1 (en) | 2011-01-20 |
TWI605523B (zh) | 2017-11-11 |
JP7489509B2 (ja) | 2024-05-23 |
US20120302004A1 (en) | 2012-11-29 |
JP7016902B2 (ja) | 2022-02-07 |
JP7236571B2 (ja) | 2023-03-09 |
JP2016086178A (ja) | 2016-05-19 |
JP2023054363A (ja) | 2023-04-13 |
US8241949B2 (en) | 2012-08-14 |
JP6039047B2 (ja) | 2016-12-07 |
JP2018133576A (ja) | 2018-08-23 |
JP6310038B2 (ja) | 2018-04-11 |
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