JP2009253004A - Semiconductor element, semiconductor device, and method of driving the same - Google Patents

Semiconductor element, semiconductor device, and method of driving the same Download PDF

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JP2009253004A
JP2009253004A JP2008098968A JP2008098968A JP2009253004A JP 2009253004 A JP2009253004 A JP 2009253004A JP 2008098968 A JP2008098968 A JP 2008098968A JP 2008098968 A JP2008098968 A JP 2008098968A JP 2009253004 A JP2009253004 A JP 2009253004A
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element region
igbt
trench gate
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JP4952638B2 (en
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Jun Saito
順 斎藤
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Toyota Motor Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor element which is a reverse conducting IGBT and is capable of reducing an on-voltage without reducing a breakdown voltage. <P>SOLUTION: A reverse conducting IGBT 100 has an n<SP>+</SP>-type floating layer 16 formed over trench gate electrodes 6a and 6b which are formed in a middle depth of a surface layer 4 and adjacent to each other. When switching an IGBT element region 24 to on-state, a positive polar voltage is applied to at least the trench gate electrode group 6a of the IGBT element region 24. When switching the IGBT element region 24 to off-state, a negative polar voltage is applied to at least the trench gate electrode group 6b of a diode element region 26. In reverse conducting IGBT 100, holes are accumulated in a drift layer 2, and the on-voltage is reduced. The floating layer 16 is formed in the surface layer 4, an electric field strength does not become high between the floating layer 16 and the surface layer 4. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体素子と半導体装置とその駆動方法に関する。特に、同一の半導体基板にＩＧＢＴ素子領域とダイオード素子領域が混在している半導体素子と、その半導体素子とその半導体素子を制御する回路を備えている半導体装置と、その半導体素子およびその半導体装置を駆動する方法に関する。   The present invention relates to a semiconductor element, a semiconductor device, and a driving method thereof. In particular, a semiconductor element in which an IGBT element region and a diode element region are mixed on the same semiconductor substrate, a semiconductor device including the semiconductor element and a circuit for controlling the semiconductor element, the semiconductor element, and the semiconductor device It relates to a method of driving.

同一の半導体基板にＩＧＢＴ（Insulated Gate Bipolar Transistor）素子領域とダイオード素子領域が混在している構造を備えている逆導通ＩＧＢＴが知られている。ダイオード素子領域では、ＩＧＢＴ素子領域に流れる電流と逆方向に電流を流すダイオード構造が形成されており、逆方向のサージ耐量を向上することができる。   A reverse conducting IGBT having a structure in which an IGBT (Insulated Gate Bipolar Transistor) element region and a diode element region are mixed on the same semiconductor substrate is known. In the diode element region, a diode structure is formed in which a current flows in a direction opposite to the current flowing in the IGBT element region, and the surge resistance in the reverse direction can be improved.

特許文献１に、逆導通ＩＧＢＴの従来例が記載されている。図５に、その逆導通ＩＧＢＴ４００の断面図を示す。
逆導通ＩＧＢＴ４００では、同一の半導体基板５８内にＩＧＢＴ素子領域７４とダイオード素子領域７６が混在している。逆導通ＩＧＢＴ４００は、半導体基板５８の中間深さをＩＧＢＴ素子領域７４とダイオード素子領域７６に亘って伸びているｎ−型のドリフト層５２を備えている。逆導通ＩＧＢＴ４００は、ＩＧＢＴ素子領域７４のドリフト層５２の裏面に接しているｐ＋型のＩＧＢＴ裏面層７２と、ダイオード素子領域７６のドリフト層５２の裏面に接しているｎ＋型のダイオード裏面層６８を備えている。逆導通ＩＧＢＴ４００は、半導体基板５８の表面に沿って形成されているとともにＩＧＢＴ素子領域７４とダイオード素子領域７６に亘って伸びているｐ型の表面層５４を備えている。 Patent Document 1 describes a conventional example of a reverse conducting IGBT. FIG. 5 shows a cross-sectional view of the reverse conducting IGBT 400.
In the reverse conducting IGBT 400, the IGBT element region 74 and the diode element region 76 are mixed in the same semiconductor substrate 58. The reverse conducting IGBT 400 includes an n − type drift layer 52 that extends an intermediate depth of the semiconductor substrate 58 across the IGBT element region 74 and the diode element region 76. The reverse conducting IGBT 400 includes a p + type IGBT back surface layer 72 in contact with the back surface of the drift layer 52 in the IGBT element region 74 and an n + type diode back surface layer in contact with the back surface of the drift layer 52 in the diode element region 76. 68. The reverse conducting IGBT 400 includes a p-type surface layer 54 formed along the surface of the semiconductor substrate 58 and extending over the IGBT element region 74 and the diode element region 76.

逆導通ＩＧＢＴ４００は、表面層５４の表面の一部に形成されているｎ＋型のｎ型高濃度領域６０ａ、６０ｂを備えている。ｎ型高濃度領域６０ａ、６０ｂは、通常のＩＧＢＴにおけるエミッタ領域に相当する。逆導通ＩＧＢＴ４００は、半導体基板５８の表面から表面層５４を貫通してドリフト層５２に達しているトレンチゲート電極群５６ａ、５６ｂを備えている。逆導通ＩＧＢＴ４００は、ｎ型高濃度領域６０ａ、６０ｂに接しているとともにトレンチゲート電極群５６ａ、５６ｂから絶縁されている表面電極６４と、ＩＧＢＴ裏面層７２とダイオード裏面層６８の裏面に形成されている裏面電極７０を備えている。逆導通ＩＧＢＴ４００は、ドリフト層５２の上面と表面層５４の下面に接しているとともに隣接するトレンチゲート電極５６ａ、５６ｂ間に亘って形成されているｎ型の第２ドリフト層６６を備えている。第２ドリフト層６６は、トレンチゲート電極群５６ａ、５６ｂの外壁を覆うゲート絶縁膜５９ａ、５９ｂに接している。 The reverse conducting IGBT 400 includes n + -type n-type high concentration regions 60 a and 60 b formed on a part of the surface of the surface layer 54. The n-type high concentration regions 60a and 60b correspond to emitter regions in a normal IGBT. The reverse conducting IGBT 400 includes trench gate electrode groups 56 a and 56 b that penetrate the surface layer 54 from the surface of the semiconductor substrate 58 and reach the drift layer 52. The reverse conducting IGBT 400 is formed on the back surface of the surface electrode 64 that is in contact with the n-type high concentration regions 60 a and 60 b and is insulated from the trench gate electrode groups 56 a and 56 b, the IGBT back surface layer 72, and the diode back surface layer 68. The back electrode 70 is provided. The reverse conducting IGBT 400 includes an n-type second drift layer 66 that is in contact with the upper surface of the drift layer 52 and the lower surface of the surface layer 54 and is formed between the adjacent trench gate electrodes 56a and 56b. The second drift layer 66 is in contact with the gate insulating films 59a and 59b covering the outer walls of the trench gate electrode groups 56a and 56b.

逆導通ＩＧＢＴ４００では、ＩＧＢＴ素子領域７４をオンするときに、トレンチゲート電極５６ａ、５６ｂに所定の電圧を印加する。表面層５４内にチャネルが形成され、表面電極６４からドリフト層５２、６６に電子が注入されるとともにＩＧＢＴ裏面層７２からドリフト層５２、６６に正孔が注入され、ドリフト層５２、６６で伝導度変調現象が生じてＩＧＢＴ素子領域７４に、裏面電極７０から表面電極６４に向かう電流が流れる。   In the reverse conducting IGBT 400, when the IGBT element region 74 is turned on, a predetermined voltage is applied to the trench gate electrodes 56a and 56b. A channel is formed in the surface layer 54, electrons are injected from the surface electrode 64 into the drift layers 52, 66, and holes are injected from the IGBT back surface layer 72 into the drift layers 52, 66. A degree modulation phenomenon occurs, and a current from the back electrode 70 to the front electrode 64 flows in the IGBT element region 74.

逆導通ＩＧＢＴ４００では、表面層５４の直下にドリフト層５２よりもｎ型不純物濃度の高い第２ドリフト層６６が形成されていることによって、表面層５４と第２ドリフト層６６の間にポテンシャル障壁が形成される。ＩＧＢＴ素子領域７４をオンするときにコレクタ層６８からドリフト層５２、６６注入された正孔は、このポテンシャル障壁によって流動が妨げられる。その結果、ドリフト層５２内に正孔が蓄積されて、逆導通ＩＧＢＴ４００のオン電圧が低減される。   In the reverse conducting IGBT 400, the second drift layer 66 having an n-type impurity concentration higher than that of the drift layer 52 is formed immediately below the surface layer 54, so that a potential barrier is formed between the surface layer 54 and the second drift layer 66. It is formed. The holes injected into the drift layers 52 and 66 from the collector layer 68 when turning on the IGBT element region 74 are prevented from flowing by this potential barrier. As a result, holes are accumulated in the drift layer 52, and the on-voltage of the reverse conducting IGBT 400 is reduced.

特開２００５−５７２３５号公報JP 2005-57235 A

しかしながら、上記の逆導通ＩＧＢＴ４００によると、第２ドリフト層６６のｎ型不純物濃度を上げることによって、第２ドリフト層６６とｐ型の表面層５４の間で電界強度が高くなる。その結果、表面電極６４と裏面電極７０の間の耐圧が低下する。逆導通ＩＧＢＴ４００では、第２ドリフト層６６が形成されていることによって耐圧が低下してしまう。   However, according to the reverse conducting IGBT 400 described above, increasing the n-type impurity concentration of the second drift layer 66 increases the electric field strength between the second drift layer 66 and the p-type surface layer 54. As a result, the withstand voltage between the front electrode 64 and the back electrode 70 decreases. In the reverse conducting IGBT 400, the breakdown voltage is reduced due to the formation of the second drift layer 66.

本発明は、上記の課題を解決する。すなわち本発明は、ＩＧＢＴのターンオフ時にダイオードにフリーホイール電流が流れる逆導通ＩＧＢＴであって、耐圧を低下させることなくオン電圧を低減することができる半導体素子を提供することを目的とする。また、そのような逆導通ＩＧＢＴを制御する回路を備えている半導体装置を提供することを目的とする。   The present invention solves the above problems. That is, an object of the present invention is to provide a semiconductor element that is a reverse conducting IGBT in which a freewheel current flows through a diode when the IGBT is turned off, and can reduce an on-voltage without lowering a withstand voltage. It is another object of the present invention to provide a semiconductor device including a circuit for controlling such a reverse conducting IGBT.

本発明は、同一の半導体基板にＩＧＢＴ素子領域とダイオード素子領域が混在している半導体素子に関する。
本発明の半導体素子は、半導体基板の中間深さをＩＧＢＴ素子領域からダイオード素子領域に亘って伸びている第１導電型のドリフト層を備えている。このドリフト層は、ダイオード素子領域ではカソード層とアノード層の中間に位置している不純物低濃度層であって、ダイオードの耐圧を向上させる層を形成する。
本発明の半導体素子は、ＩＧＢＴ素子領域のドリフト層の裏面に接している第２導電型のＩＧＢＴ裏面層と、ダイオード素子領域のドリフト層の裏面に接している第１導電型のダイオード裏面層を備えている。例えば、第１導電型がｎ型のとき、第２導電型はｐ型となる。この場合、ＩＧＢＴ裏面層は、通常のＩＧＢＴにおけるコレクタ層に相当し、ダイオード裏面層は、通常のダイオードにおけるカソード層に相当する。 The present invention relates to a semiconductor element in which an IGBT element region and a diode element region are mixed on the same semiconductor substrate.
The semiconductor element of the present invention includes a drift layer of a first conductivity type that extends an intermediate depth of the semiconductor substrate from the IGBT element region to the diode element region. This drift layer is a low impurity concentration layer located between the cathode layer and the anode layer in the diode element region, and forms a layer that improves the breakdown voltage of the diode.
The semiconductor element of the present invention includes a second conductivity type IGBT back surface layer in contact with the back surface of the drift layer in the IGBT element region and a first conductivity type diode back surface layer in contact with the back surface of the drift layer in the diode element region. I have. For example, when the first conductivity type is n-type, the second conductivity type is p-type. In this case, the IGBT back surface layer corresponds to a collector layer in a normal IGBT, and the diode back surface layer corresponds to a cathode layer in a normal diode.

本発明の半導体素子は、ドリフト層の表面に接しているとともにＩＧＢＴ素子領域からダイオード素子領域に亘って伸びている第２導電型の表面層を備えている。ＩＧＢＴ素子領域内の表面層は、通常のＩＧＢＴにおけるボディ層に相当する。
本発明の半導体素子は、半導体基板の表面から表面層を貫通してドリフト層に達しているとともにＩＧＢＴ素子領域からダイオード素子領域に亘って繰返して形成されているトレンチゲート電極群を備えている。
本発明の半導体素子は、表面層の中間深さに形成されているとともに少なくともＩＧＢＴ素子領域とダイオード素子領域の境界を介して隣接するトレンチゲート電極間に亘って形成されている第１導電型のフローティング層を備えている。フローティング層は、トレンチゲート電極の外壁を覆うゲート絶縁膜に接しているととともに表面層の一部によってドリフト層から隔てられている。 The semiconductor element of the present invention includes a surface layer of a second conductivity type that is in contact with the surface of the drift layer and extends from the IGBT element region to the diode element region. The surface layer in the IGBT element region corresponds to a body layer in a normal IGBT.
The semiconductor element of the present invention includes a trench gate electrode group that extends from the surface of the semiconductor substrate through the surface layer to the drift layer and is repeatedly formed from the IGBT element region to the diode element region.
The semiconductor element of the present invention is formed at an intermediate depth of the surface layer and has a first conductivity type formed at least between adjacent trench gate electrodes via a boundary between the IGBT element region and the diode element region. It has a floating layer. The floating layer is in contact with the gate insulating film covering the outer wall of the trench gate electrode and is separated from the drift layer by a part of the surface layer.

本発明の半導体素子によると、ＩＧＢＴ素子領域のオフ時に、少なくともダイオード素子領域のトレンチゲート電極群に、ＩＧＢＴ素子領域のオン時とは逆の極性の電圧を印加することによって、フローティング層内のゲート絶縁膜近傍でフローティング層を反転させて、表面層と同じ導電型にすることができる。表面層とフローティング層を同じ導電型にすることによって、ゲート絶縁膜近傍では、表面層とフローティング層の間に形成されている方向の異なる二つのダイオードの影響が解消される。その結果、ダイオード素子領域の表面層とドリフト層の間で形成されるダイオードの順方向に電流を流すことができる。逆導通ＩＧＢＴの表面層内にフローティング層が形成されているダイオードを、ダイオードに求められているように作動させることができる。
また、本発明の半導体素子によると、ｎ型のフローティング層の上面側だけでなく下面側にもｐ型の表面層が存在しているため、電界強度が過度に集中することがない。フローティング層のｎ型不純物濃度を上げても、フローティング層と表面層の間で電界強度が高くなることがない。そのため、表面電極と裏面電極の間の耐圧が低下することがない。本発明の半導体素子によると、耐圧を低下させることなくオン電圧を低減することができる。 According to the semiconductor element of the present invention, when the IGBT element region is turned off, a voltage having a polarity opposite to that when the IGBT element region is turned on is applied to at least the trench gate electrode group in the diode element region. The floating layer can be inverted in the vicinity of the insulating film to have the same conductivity type as the surface layer. By making the surface layer and the floating layer have the same conductivity type, the influence of two diodes having different directions formed between the surface layer and the floating layer is eliminated in the vicinity of the gate insulating film. As a result, current can flow in the forward direction of the diode formed between the surface layer of the diode element region and the drift layer. A diode having a floating layer formed in the surface layer of the reverse conducting IGBT can be operated as required for the diode.
In addition, according to the semiconductor element of the present invention, since the p-type surface layer exists not only on the upper surface side but also on the lower surface side of the n-type floating layer, the electric field strength is not excessively concentrated. Even if the n-type impurity concentration of the floating layer is increased, the electric field strength does not increase between the floating layer and the surface layer. Therefore, the withstand voltage between the front electrode and the back electrode does not decrease. According to the semiconductor element of the present invention, the on-voltage can be reduced without lowering the breakdown voltage.

本発明の半導体装置は、上記の半導体素子を備えている他に、ＩＧＢＴ素子領域のトレンチゲート電極群とダイオード素子領域のトレンチゲート電極群の両者に電気的に接続されている配線を備えている。
本発明の半導体装置はさらに、その配線に接続されており、かつＩＧＢＴ素子領域のトレンチゲート電極群とダイオード素子領域のトレンチゲート電極群の両者に、第１極性と第２極性の間で経時的に反転する電圧を印加するゲート電圧印加回路を備えている。印加される電圧は０ボルトを挟んで正極性と負極性の間で反転される。 In addition to the semiconductor device described above, the semiconductor device of the present invention includes wiring that is electrically connected to both the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region. .
The semiconductor device according to the present invention is further connected to the wiring, and both the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region are changed over time between the first polarity and the second polarity. A gate voltage application circuit for applying a voltage to be inverted. The applied voltage is reversed between positive polarity and negative polarity across 0 volts.

本発明の半導体装置では、ゲート電圧印加回路によって、ＩＧＢＴ素子領域のトレンチゲート電極群とダイオード素子領域のトレンチゲート電極群の各々に、同極性の電圧が同時に印加される。ＩＧＢＴ素子領域のトレンチゲート電極群とダイオード素子領域のトレンチゲート電極群の各々に第１極性の電圧が印加されると、ＩＧＢＴ素子領域がオン状態に切換えられる。ＩＧＢＴ素子領域がオンされているときにダイオード素子領域に第１極性の電圧が印加されていても問題はない。   In the semiconductor device of the present invention, a voltage having the same polarity is simultaneously applied to each of the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region by the gate voltage application circuit. When a first polarity voltage is applied to each of the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region, the IGBT element region is switched to the ON state. There is no problem even if a voltage having the first polarity is applied to the diode element region when the IGBT element region is turned on.

ＩＧＢＴ素子領域のトレンチゲート電極群とダイオード素子領域のトレンチゲート電極群の各々に第２極性の電圧が印加されると、ＩＧＢＴ素子領域がオフ状態に切換えられる。ダイオード素子領域のトレンチゲート電極群に第２極性の電圧が印加されることによって、ＩＧＢＴ素子領域がオフされているときでもダイオード素子領域に電流が流れる。ＩＧＢＴ素子領域がオフされているときにＩＧＢＴ素子領域に第２極性の電圧が印加されていても問題はない。本発明の半導体装置を用いることによって、逆導通ＩＧＢＴであって、耐圧を低下させることなくオン電圧を低減することができる半導体素子を駆動することができる。   When a second polarity voltage is applied to each of the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region, the IGBT element region is switched to the off state. By applying a second polarity voltage to the trench gate electrode group in the diode element region, a current flows through the diode element region even when the IGBT element region is turned off. There is no problem even if a voltage of the second polarity is applied to the IGBT element region when the IGBT element region is turned off. By using the semiconductor device of the present invention, it is possible to drive a semiconductor element which is a reverse conducting IGBT and can reduce the on-voltage without reducing the withstand voltage.

本発明の半導体素子および半導体装置を駆動する方法では、ＩＧＢＴ素子領域をオン状態に切換える際に、少なくともＩＧＢＴ素子領域のトレンチゲート電極群に第１極性の電圧を印加する。このとき、ダイオード素子領域のトレンチゲート電極群にも第１極性の電圧を印加してもよいし、ダイオード素子領域のトレンチゲート電極群には０ボルトの電圧を印加してもよい。また、ダイオード素子領域のトレンチゲート電極群に印加する電圧は、ＩＧＢＴ素子領域をオン状態に切換えるのと同時に印加しなくてもよい。ＩＧＢＴ素子領域がオフされるまでに印加すればよい。   In the method of driving the semiconductor element and the semiconductor device of the present invention, when the IGBT element region is switched to the ON state, a voltage having the first polarity is applied to at least the trench gate electrode group in the IGBT element region. At this time, a first polarity voltage may be applied to the trench gate electrode group in the diode element region, or a voltage of 0 volt may be applied to the trench gate electrode group in the diode element region. The voltage applied to the trench gate electrode group in the diode element region may not be applied simultaneously with switching the IGBT element region to the on state. It may be applied before the IGBT element region is turned off.

本発明の半導体素子および半導体装置を駆動する方法では、ＩＧＢＴ素子領域をオフ状態に切換える際に、少なくともダイオード素子領域のトレンチゲート電極群に第２極性の電圧を印加する。このとき、ＩＧＢＴ素子領域のトレンチゲート電極群にも第２極性の電圧を印加してもよいし、ＩＧＢＴ素子領域のトレンチゲート電極群には０ボルトの電圧を印加してもよい。ここで第１極性が正極性である場合、第２極性は、０ボルトでなく、負極性のことをいう。   In the method of driving the semiconductor element and the semiconductor device of the present invention, when the IGBT element region is switched to the OFF state, a voltage having the second polarity is applied to at least the trench gate electrode group in the diode element region. At this time, a second polarity voltage may be applied to the trench gate electrode group in the IGBT element region, or a voltage of 0 volt may be applied to the trench gate electrode group in the IGBT element region. Here, when the first polarity is positive, the second polarity is negative, not 0 volts.

本発明の駆動方法によると、ＩＧＢＴ素子領域のオフ時に、少なくともダイオード素子領域のトレンチゲート電極群に、ＩＧＢＴ素子領域のオン時とは逆の極性の電圧を印加することによって、ダイオード素子領域の表面層とドリフト層の間で形成されるダイオードの順方向に電流を流すことができる。逆導通ＩＧＢＴの表面層内にフローティング層が形成されているダイオードを、ダイオードに求められているように作動させることができる。本発明の半導体素子および半導体装置を駆動することができ、特性を向上させることができる。   According to the driving method of the present invention, when the IGBT element region is turned off, a voltage having a polarity opposite to that when the IGBT element region is turned on is applied to at least the trench gate electrode group in the diode element region. Current can flow in the forward direction of the diode formed between the layer and the drift layer. A diode having a floating layer formed in the surface layer of the reverse conducting IGBT can be operated as required for the diode. The semiconductor element and the semiconductor device of the present invention can be driven and the characteristics can be improved.

本発明によると、ＩＧＢＴのターンオフ時にダイオードにフリーホイール電流が流れる逆導通ＩＧＢＴであって、耐圧を低下させることなくオン電圧を低減することができる半導体素子を提供することができる。また、そのような逆導通ＩＧＢＴを制御する回路を備えている半導体装置を提供することができる。また、そのような半導体素子および半導体装置を駆動することができる。   According to the present invention, it is possible to provide a semiconductor element that is a reverse conducting IGBT in which a freewheel current flows through a diode when the IGBT is turned off, and can reduce an on-voltage without lowering a withstand voltage. In addition, a semiconductor device including a circuit for controlling such reverse conducting IGBT can be provided. Further, such a semiconductor element and a semiconductor device can be driven.

下記に説明する実施例の好ましい特徴を列記する。
（第１特徴） 逆導通ＩＧＢＴを備えている複数個の半導体装置を組み合わせる。 Preferred features of the embodiments described below are listed.
(First Feature) A plurality of semiconductor devices including reverse conducting IGBTs are combined.

（第１実施例）
図１に、本発明の第１実施例である逆導通ＩＧＢＴ１００の断面図の一部を示す。逆導通ＩＧＢＴ１００では、同一の半導体基板８にＩＧＢＴ素子領域２４とダイオード素子領域２６が混在している。図１は、ＩＧＢＴ素子領域２４とダイオード素子領域２６の境界近傍の断面図を示す。逆導通ＩＧＢＴ１００は、半導体基板８の中間深さをＩＧＢＴ素子領域２４からダイオード素子領域２６に亘って伸びているｎ−型のドリフト層２を備えている。逆導通ＩＧＢＴ１００は、ＩＧＢＴ素子領域２４のドリフト層２の裏面に接しているｐ＋型のＩＧＢＴ裏面層２２と、ダイオード素子領域２６のドリフト層２の裏面に接しているｎ＋型のダイオード裏面層１８を備えている。逆導通ＩＧＢＴ１００は、ドリフト層２の表面に接しているとともにＩＧＢＴ素子領域２４からダイオード素子領域２６に亘って伸びているｐ−型の表面層４を備えている。 (First embodiment)
FIG. 1 shows a part of a sectional view of a reverse conducting IGBT 100 according to the first embodiment of the present invention. In the reverse conducting IGBT 100, the IGBT element region 24 and the diode element region 26 are mixed on the same semiconductor substrate 8. FIG. 1 is a cross-sectional view of the vicinity of the boundary between the IGBT element region 24 and the diode element region 26. The reverse conducting IGBT 100 includes an n − type drift layer 2 extending from the IGBT element region 24 to the diode element region 26 at an intermediate depth of the semiconductor substrate 8. The reverse conducting IGBT 100 includes a p + type IGBT back surface layer 22 in contact with the back surface of the drift layer 2 in the IGBT element region 24 and an n + type diode back surface layer in contact with the back surface of the drift layer 2 in the diode element region 26. 18 is provided. The reverse conducting IGBT 100 includes a p − type surface layer 4 that is in contact with the surface of the drift layer 2 and extends from the IGBT element region 24 to the diode element region 26.

逆導通ＩＧＢＴ１００は、表面層４の表面の少なくとも一部に形成されているｎ＋型のｎ型高濃度領域１０ａ、１０ｂと、表面層４の表面に形成されているとともに左右をｎ型高濃度領域１０ａ、１０ｂに挟まれて形成されているｐ＋型のｐ型高濃度領域１２を備えている。ｎ型高濃度領域１０ａ、１０ｂとｐ型高濃度領域１２の各々は、通常のＩＧＢＴにおけるエミッタ領域とボディコンタクト領域に相当する。逆導通ＩＧＢＴ１００は、半導体基板８の表面から表面層４を貫通してドリフト層２に達しているとともにＩＧＢＴ素子領域２４からダイオード素子領域２６に亘って繰返して形成されているトレンチゲート電極群６ａ、６ｂを備えている。 The reverse conducting IGBT 100 is formed on the surface of the surface layer 4 and the n + type n-type high concentration regions 10a and 10b formed on at least part of the surface of the surface layer 4, and the n-type high concentration on the left and right. A p + -type p-type high concentration region 12 is formed between the regions 10a and 10b. Each of n-type high concentration regions 10a and 10b and p-type high concentration region 12 corresponds to an emitter region and a body contact region in a normal IGBT. The reverse conducting IGBT 100 extends from the surface of the semiconductor substrate 8 through the surface layer 4 to the drift layer 2 and is repeatedly formed from the IGBT element region 24 to the diode element region 26. 6b.

逆導通ＩＧＢＴ１００は、ｎ型高濃度領域１０ａ、１０ｂに接しているとともにトレンチゲート電極群６ａ、６ｂから絶縁されている表面電極１４と、ＩＧＢＴ裏面層２２とダイオード裏面層１８の裏面に連続して形成されている裏面電極２０を備えている。
逆導通ＩＧＢＴ１００は、表面層４の中間深さに形成されているとともに隣接するトレンチゲート電極６ａ、６ｂ間に亘って形成されているｎ＋型のフローティング層１６を備えている。フローティング層１６は、トレンチゲート電極群６ａ、６ｂの外壁を覆うゲート絶縁膜９ａ、９ｂに接しているととともに表面層４の一部を介してドリフト層２から隔てられている。 The reverse conducting IGBT 100 is in contact with the n-type high concentration regions 10a and 10b and is insulated from the trench gate electrode groups 6a and 6b, and the back surface of the IGBT back layer 22 and the diode back layer 18 continuously. A back electrode 20 is provided.
The reverse conducting IGBT 100 includes an n + type floating layer 16 formed at an intermediate depth of the surface layer 4 and formed between adjacent trench gate electrodes 6a and 6b. The floating layer 16 is in contact with the gate insulating films 9a and 9b covering the outer walls of the trench gate electrode groups 6a and 6b, and is separated from the drift layer 2 through a part of the surface layer 4.

次に、逆導通ＩＧＢＴ１００を駆動する方法を示す。
ＩＧＢＴ素子領域２４をオン状態に切換える際には、ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａに正極性の電圧を印加する。このとき、ダイオード素子領域２６のトレンチゲート電極群６ｂにも正極性の電圧を印加してもよいし、ダイオード素子領域２６のトレンチゲート電極群６ｂには０ボルトの電圧を印加してもよい。また、ダイオード素子領域２６のトレンチゲート電極群６ｂに印加する電圧は、ＩＧＢＴ素子領域２４をオン状態に切換えるのと同時に印加しなくてもよい。ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａに正極性の電圧が印加されると、ゲート絶縁膜９ａ近傍の表面層４がｎ型に反転し、ＩＧＢＴ素子領域２４では、裏面電極２２から表面電極１４に向かって電流が流れる。 Next, a method for driving the reverse conducting IGBT 100 will be described.
When switching the IGBT element region 24 to the ON state, a positive voltage is applied to the trench gate electrode group 6 a in the IGBT element region 24. At this time, a positive voltage may be applied to the trench gate electrode group 6b in the diode element region 26, or a voltage of 0 volt may be applied to the trench gate electrode group 6b in the diode element region 26. Further, the voltage applied to the trench gate electrode group 6b in the diode element region 26 may not be applied at the same time when the IGBT element region 24 is switched to the ON state. When a positive voltage is applied to the trench gate electrode group 6a in the IGBT element region 24, the surface layer 4 in the vicinity of the gate insulating film 9a is inverted to n-type, and in the IGBT element region 24, the back electrode 22 to the surface electrode 14 are reversed. A current flows toward.

ＩＧＢＴ素子領域２４をオフ状態に切換える際には、ダイオード素子領域２６のトレンチゲート電極群６ｂに負極性の電圧を印加する。このとき、ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａにも負極性の電圧を印加してもよいし、ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａには０ボルトの電圧を印加してもよい。ダイオード素子領域２６のトレンチゲート電極群６ｂに負極性の電圧が印加されると、ゲート絶縁膜９ｂ近傍のフローティング層１６がｐ型に反転する。その結果、表面層４とフローティング層１６の間で形成されている方向の異なる二つのダイオードの影響が解消され、表面層４からドリフト層２に向かうダイオードが駆動される。ダイオード素子領域２６では、表面電極１４から裏面電極２０に向かって電流が流れる。   When the IGBT element region 24 is switched to the OFF state, a negative voltage is applied to the trench gate electrode group 6b in the diode element region 26. At this time, a negative voltage may be applied to the trench gate electrode group 6a in the IGBT element region 24, or a voltage of 0 volt may be applied to the trench gate electrode group 6a in the IGBT element region 24. When a negative voltage is applied to the trench gate electrode group 6b in the diode element region 26, the floating layer 16 near the gate insulating film 9b is inverted to the p-type. As a result, the influence of the two diodes having different directions formed between the surface layer 4 and the floating layer 16 is eliminated, and the diode from the surface layer 4 toward the drift layer 2 is driven. In the diode element region 26, a current flows from the front electrode 14 toward the back electrode 20.

逆導通ＩＧＢＴ１００では、フローティング層１６の上面１６ａ側だけでなく下面１６ｂ側にもｐ型の表面層４が存在しているため、フローティング層１６と表面層４の間で電界強度が高くなることがない。そのため、表面電極１４と裏面電極２０の間の耐圧が低下することがない。逆導通ＩＧＢＴ１００によると、耐圧を低下させることなくオン電圧を低減することができる。   In the reverse conducting IGBT 100, since the p-type surface layer 4 exists not only on the upper surface 16a side but also on the lower surface 16b side of the floating layer 16, the electric field strength may increase between the floating layer 16 and the surface layer 4. Absent. Therefore, the withstand voltage between the front electrode 14 and the back electrode 20 does not decrease. According to the reverse conducting IGBT 100, the on-voltage can be reduced without lowering the breakdown voltage.

（第２実施例）
図２に、第２実施例である半導体装置２００の断面図を示す。半導体装置２００は、第１実施例の逆導通ＩＧＢＴ１００と、ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａとダイオード素子領域２６のトレンチゲート電極群６ｂに電気的に接続されている配線２８を備えている。半導体装置２００は、配線２８に接続されており、かつＩＧＢＴ素子領域２４のトレンチゲート電極群６ａとダイオード素子領域２６のトレンチゲート電極群６ｂの両者に、正極性と負極性の間で経時的に反転する電圧を印加するゲート電圧印加回路３０を備えている。 (Second embodiment)
FIG. 2 is a sectional view of a semiconductor device 200 according to the second embodiment. The semiconductor device 200 includes the reverse conducting IGBT 100 of the first embodiment, and the wiring 28 that is electrically connected to the trench gate electrode group 6a in the IGBT element region 24 and the trench gate electrode group 6b in the diode element region 26. . The semiconductor device 200 is connected to the wiring 28, and both the trench gate electrode group 6 a in the IGBT element region 24 and the trench gate electrode group 6 b in the diode element region 26 are changed over time between positive polarity and negative polarity. A gate voltage application circuit 30 for applying a voltage to be inverted is provided.

半導体装置２００では、ゲート電圧印加回路３０によって、ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａとダイオード素子領域２６のトレンチゲート電極群６ｂの各々に、同極性の電圧が同時に印加される。ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａとダイオード素子領域２６のトレンチゲート電極群６ｂの各々に正極性の電圧が印加されると、ゲート絶縁膜９ａ、９ｂ近傍の表面層４が反転し、ＩＧＢＴ素子領域２４がオン状態に切換えられる。ＩＧＢＴ素子領域２４のトレンチゲート電極群６ａとダイオード素子領域２６のトレンチゲート電極群６ｂの各々に負極性の電圧が印加されると、ＩＧＢＴ素子領域２４がオフ状態に切換えられる。ゲート絶縁膜９ａ、９ｂ近傍のフローティング層１６が反転し、ダイオード素子領域２６に電流が流れる。その結果、逆導通ＩＧＢＴであって、耐圧を低下させることなくオン電圧を低減することができる逆導通ＩＧＢＴ１００を駆動することができる。   In the semiconductor device 200, a voltage having the same polarity is simultaneously applied to the trench gate electrode group 6 a in the IGBT element region 24 and the trench gate electrode group 6 b in the diode element region 26 by the gate voltage application circuit 30. When a positive voltage is applied to each of the trench gate electrode group 6a in the IGBT element region 24 and the trench gate electrode group 6b in the diode element region 26, the surface layer 4 in the vicinity of the gate insulating films 9a and 9b is inverted, and the IGBT The element region 24 is switched to the on state. When a negative voltage is applied to each of trench gate electrode group 6a in IGBT element region 24 and trench gate electrode group 6b in diode element region 26, IGBT element region 24 is switched to an off state. The floating layer 16 in the vicinity of the gate insulating films 9 a and 9 b is inverted, and a current flows through the diode element region 26. As a result, it is possible to drive the reverse conducting IGBT 100 that can reduce the on-voltage without lowering the breakdown voltage.

（第３実施例）
図３（ａ）、（ｂ）に第３実施例であるインバータ回路３００の回路図を示す。インバータ回路３００は第２実施例の半導体装置２００を複数個備えている。インバータ回路３００は、モータ３６を制御することによって直流電源３２から交流電源を生成してモータ３６を駆動する。参照符号２００ａ〜２００ｄは第２実施例の半導体装置２００と同じ構造の半導体装置である。参照符号３４はコンデンサを示す。図３（ａ）は、半導体装置２００ａと半導体装置２００ｄのＩＧＢＴ素子領域がオンされており、半導体装置２００ｂと半導体装置２００ｃのＩＧＢＴ素子領域がオフされている状態を示す。この場合、モータ３６に矢印方向の電流Iが給電される。図３（ｂ）は、半導体装置２００ａがオンされており、半導体装置２００ｂと半導体装置２００ｃと半導体装置２００ｄのＩＧＢＴ素子領域がオフされている状態を示す。この場合、モータ３６に矢印方向の電流IIが給電される。なお、図３（ａ）、（ｂ）では半導体装置２００ａ〜２００ｄに形成されているゲート電圧印加回路３０は図示していない。 (Third embodiment)
FIGS. 3A and 3B are circuit diagrams of an inverter circuit 300 according to the third embodiment. The inverter circuit 300 includes a plurality of semiconductor devices 200 according to the second embodiment. The inverter circuit 300 controls the motor 36 to generate AC power from the DC power source 32 and drive the motor 36. Reference numerals 200a to 200d are semiconductor devices having the same structure as the semiconductor device 200 of the second embodiment. Reference numeral 34 indicates a capacitor. FIG. 3A shows a state in which the IGBT element regions of the semiconductor device 200a and the semiconductor device 200d are turned on, and the IGBT element regions of the semiconductor device 200b and the semiconductor device 200c are turned off. In this case, a current I in the direction of the arrow is supplied to the motor 36. FIG. 3B shows a state in which the semiconductor device 200a is turned on and the IGBT element regions of the semiconductor device 200b, the semiconductor device 200c, and the semiconductor device 200d are turned off. In this case, the motor 36 is supplied with the current II in the direction of the arrow. 3A and 3B, the gate voltage application circuit 30 formed in the semiconductor devices 200a to 200d is not shown.

インバータ回路３００では、４個の半導体装置２００ａ、２００ｂ、２００ｃ、２００ｄの各々が、直流電源３２とモータ３６に対して直列に接続されている。
図３（ａ）の状態から図３（ｂ）の状態に切換えた時に、モータ３６に流れる電流が急激にゼロになると、モータ３６のインダクタンス成分によって高電圧が発生し、その高電圧が半導体装置２００ａ、２００ｂ、２００ｃ、２００ｄに作用して素子が破壊される可能性がある。図３（ａ）の状態から図３（ｂ）の状態に切換えた時に、半導体装置２００ｂのダイオード素子領域２６ｂのトレンチゲート電極群に負極性の電圧を印加することによって、ダイオード素子領域２６ｂにフリーホイール電流を流すことができる。その結果、図３（ｂ）の矢印に示すようにモータ３６に電流IIが流れ続け、半導体装置２００ａ、２００ｂ、２００ｃ、２００ｄに高電圧が作用することを防止することができる。さらに、半導体装置２００ａ、２００ｂ、２００ｃ、２００ｄの各々は、半導体素子内にフローティング層１６が形成されていることによってオン電圧が低減されるため、従来のインバータ回路に比べてスイッチングの高速化を実現することができる。 In the inverter circuit 300, each of the four semiconductor devices 200 a, 200 b, 200 c, and 200 d is connected in series to the DC power supply 32 and the motor 36.
When the current flowing through the motor 36 suddenly becomes zero when the state shown in FIG. 3A is switched to the state shown in FIG. 3B, a high voltage is generated by the inductance component of the motor 36, and the high voltage is applied to the semiconductor device. There is a possibility that the element is destroyed by acting on 200a, 200b, 200c, and 200d. When the state of FIG. 3A is switched to the state of FIG. 3B, a negative voltage is applied to the trench gate electrode group in the diode element region 26b of the semiconductor device 200b, thereby freeing the diode element region 26b. Wheel current can flow. As a result, the current II continues to flow through the motor 36 as shown by the arrow in FIG. 3B, and high voltage can be prevented from acting on the semiconductor devices 200a, 200b, 200c, and 200d. Furthermore, each of the semiconductor devices 200a, 200b, 200c, and 200d has a floating layer 16 formed in the semiconductor element, so that the on-voltage is reduced. Therefore, the switching speed is higher than that of the conventional inverter circuit. can do.

図４に、図３（ａ）、（ｂ）に示す状態が経時的に繰返される場合のタイミングチャートを示す。図のｘ方向は時間軸を示す。図３（ａ）で示す状態をＴ１とする。図３（ｂ）で示す状態をＴ２とする。参照符号Ｖａは、半導体装置２００ａのゲート電圧の経時変化を示す。参照符号Ｖｂは、半導体装置２００ｂのゲート電圧の経時変化を示す。参照符号Ｖｃは、半導体装置２００ｃのゲート電圧の経時変化を示す。参照符号Ｖｄは、半導体装置２００ｄのゲート電圧の経時変化を示す。参照符号Ｉｄは、半導体装置２００ｄのＩＧＢＴ素子領域２４ｄに流れるコレクタ電流の経時変化を示す。参照符号Ｉｂは、半導体装置２００ｂのダイオード素子領域２６ｂに流れるアノード電流の経時変化を示す。参照符号Ｉｅは、モータ３６に流れるモータ電流の経時変化を示す。   FIG. 4 shows a timing chart when the state shown in FIGS. 3A and 3B is repeated over time. The x direction in the figure shows the time axis. The state shown in FIG. The state shown in FIG. Reference sign Va indicates a change with time in the gate voltage of the semiconductor device 200a. Reference sign Vb indicates a change with time in the gate voltage of the semiconductor device 200b. Reference sign Vc indicates a change with time in the gate voltage of the semiconductor device 200c. Reference sign Vd indicates a change with time in the gate voltage of the semiconductor device 200d. Reference numeral Id indicates a change with time of the collector current flowing in the IGBT element region 24d of the semiconductor device 200d. Reference symbol Ib indicates a change with time of the anode current flowing in the diode element region 26b of the semiconductor device 200b. Reference symbol Ie indicates a change with time of the motor current flowing through the motor 36.

半導体装置２００ａと半導体装置２００ｄに正極性の電圧を印加すると、半導体装置２００ａのＩＧＢＴ素子領域２６ａと半導体装置２００ｄのＩＧＢＴ素子領域２４ｄがオンされ、コレクタ電流Ｉｄが緩やかに上昇する。Ｉｄの上昇に伴ってモータ電流が緩やかに上昇する（１回目のＴ１）。
半導体装置２００ｄをオフ状態に切換えると、半導体装置２００ｂと半導体装置２００ｂに還元電流が流れる。半導体装置２００ｂには負極性の電圧Ｖｂが印加されているため、半導体装置２００ｂのダイオード素子領域２６ｂに電流Ｉｂが流れる。そのため、モータ電流Ｉｅはゼロにはならず、流れ続ける（１回目のＴ２）。 When a positive voltage is applied to the semiconductor device 200a and the semiconductor device 200d, the IGBT element region 26a of the semiconductor device 200a and the IGBT element region 24d of the semiconductor device 200d are turned on, and the collector current Id gradually increases. As Id increases, the motor current gradually increases (first T1).
When the semiconductor device 200d is switched to the OFF state, a reduction current flows through the semiconductor device 200b and the semiconductor device 200b. Since the negative voltage Vb is applied to the semiconductor device 200b, the current Ib flows through the diode element region 26b of the semiconductor device 200b. Therefore, the motor current Ie does not become zero and continues to flow (first T2).

半導体装置２００ｄに再び正極性の電圧Ｖｄを印加すると、半導体装置２００ｄのＩＧＢＴ素子領域２４ｄがオンされる。ダイオード素子領域２６ｂに流れていた電流がＩＧＢＴ素子領域２４ｄに流れるため、ＩＧＢＴ素子領域２６ｄに流れる電流Ｉｄの立ち上がりが早い。電流Ｉｄが流れることによって、モータ電流Ｉｅはさらに上昇する（２回目のＴ１）。
半導体装置２００ｄを再びオフ状態に切換えると、再びダイオード素子領域２６ｂに電流Ｉｂが流れる。そのため、モータ電流Ｉｅはゼロにはならず、流れ続ける（２回目のＴ２）。半導体装置２００ａ、２００ｂ、２００ｃ、２００ｄの各々は、半導体素子内にフローティング層１６が形成されていることによってオン電圧が低減されるため、従来のインバータ回路に比べてスイッチングの高速化を実現することができる。 When the positive voltage Vd is applied to the semiconductor device 200d again, the IGBT element region 24d of the semiconductor device 200d is turned on. Since the current flowing in the diode element region 26b flows in the IGBT element region 24d, the rise of the current Id flowing in the IGBT element region 26d is quick. When the current Id flows, the motor current Ie further increases (second T1).
When the semiconductor device 200d is switched to the off state again, the current Ib flows again in the diode element region 26b. Therefore, the motor current Ie does not become zero and continues to flow (second T2). In each of the semiconductor devices 200a, 200b, 200c, and 200d, since the on-voltage is reduced by forming the floating layer 16 in the semiconductor element, the switching speed can be increased as compared with the conventional inverter circuit. Can do.

以上、本発明の実施例について詳細に説明したが、これらは例示に過ぎず、特許請求の範囲を限定するものではない。特許請求の範囲に記載の技術には、以上に例示した具体例を様々に変形、変更したものが含まれる。
本明細書または図面に説明した技術要素は、単独であるいは各種の組合せによって技術的有用性を発揮するものであり、出願時請求項記載の組合せに限定されるものではない。また、本明細書または図面に例示した技術は複数目的を同時に達成し得るものであり、そのうちの一つの目的を達成すること自体で技術的有用性を持つものである。 As mentioned above, although the Example of this invention was described in detail, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

第１実施例である逆導通ＩＧＢＴ１００の断面図を示す。Sectional drawing of reverse conducting IGBT100 which is 1st Example is shown. 第２実施例である半導体装置２００の断面図を示す。Sectional drawing of the semiconductor device 200 which is 2nd Example is shown. （ａ）、（ｂ）は、第３実施例であるインバータ回路３００の回路図を示す。(A), (b) shows the circuit diagram of the inverter circuit 300 which is a 3rd Example. インバータ回路３００の駆動時のタイミングチャートを示すA timing chart at the time of driving the inverter circuit 300 is shown. 従来の逆導通ＩＧＢＴ４００の断面図を示す。A cross-sectional view of a conventional reverse conducting IGBT 400 is shown.

符号の説明Explanation of symbols

２、５２：ドリフト層
４、５４：表面層
６ａ、６ｂ、５６ａ、５６ｂ：トレンチゲート電極
８．５８：半導体基板
９ａ、９ｂ、５９ａ、５９ｂ：ゲート絶縁膜
１０ａ、１０ｂ、６０ａ、６０ｂ：ｎ型高濃度領域（エミッタ領域）
１２、６２：ｐ型高濃度領域（ボディコンタクト領域）
１４、６４：表面電極（エミッタ電極）
１６：フローティング層
１６ａ：フローティング層１６の上面
１６ｂ：フローティング層１６の下面
１８、６８：ダイオード裏面層（カソード層）
２０、７０：裏面電極（コレクタ電極）
２２、７２：ＩＧＢＴ裏面層（コレクタ層）
２４、７４：ＩＧＢＴ素子領域
２６、７６：ダイオード素子領域
２８：配線
３０：ゲート印加回路
３２：直流電源
３４：コンデンサ
３６：モータ
６６：第２ドリフト層
１００、４００：逆導通ＩＧＢＴ
２００、２００ａ、２００ｂ、２００ｃ、２００ｄ：半導体装置
３００：インバータ回路 2, 52: Drift layers 4, 54: Surface layers 6a, 6b, 56a, 56b: Trench gate electrodes 8.58: Semiconductor substrates 9a, 9b, 59a, 59b: Gate insulating films 10a, 10b, 60a, 60b: n-type High concentration region (emitter region)
12, 62: p-type high concentration region (body contact region)
14, 64: Surface electrode (emitter electrode)
16: Floating layer 16a: Upper surface 16b of floating layer 16: Lower surface 18 of floating layer 16, 68: Diode back surface layer (cathode layer)
20, 70: Back electrode (collector electrode)
22, 72: IGBT back layer (collector layer)
24, 74: IGBT element region 26, 76: Diode element region 28: Wiring 30: Gate application circuit 32: DC power supply 34: Capacitor 36: Motor 66: Second drift layer 100, 400: Reverse conducting IGBT
200, 200a, 200b, 200c, 200d: Semiconductor device 300: Inverter circuit

Claims (3)

同一の半導体基板にＩＧＢＴ素子領域とダイオード素子領域が混在している半導体素子であり、
前記半導体基板の中間深さを前記ＩＧＢＴ素子領域から前記ダイオード素子領域に亘って伸びている第１導電型のドリフト層と、
前記ＩＧＢＴ素子領域の前記ドリフト層の裏面に接している第２導電型のＩＧＢＴ裏面層と、
前記ダイオード素子領域の前記ドリフト層の裏面に接している第１導電型のダイオード裏面層と、
前記ドリフト層の表面に接しているとともに前記ＩＧＢＴ素子領域から前記ダイオード素子領域に亘って伸びている第２導電型の表面層と、
前記半導体基板の表面から前記表面層を貫通して前記ドリフト層に達しているとともに前記ＩＧＢＴ素子領域から前記ダイオード素子領域に亘って繰返して形成されているトレンチゲート電極群と、
前記表面層の中間深さに形成されているとともに隣接するトレンチゲート電極間に亘って形成されている第１導電型のフローティング層を備えていることを特徴とする半導体素子。 It is a semiconductor element in which the IGBT element region and the diode element region are mixed on the same semiconductor substrate,
A first conductivity type drift layer extending from the IGBT element region to the diode element region at an intermediate depth of the semiconductor substrate;
An IGBT back surface layer of a second conductivity type in contact with the back surface of the drift layer in the IGBT element region;
A diode back surface layer of a first conductivity type in contact with the back surface of the drift layer in the diode element region;
A surface layer of a second conductivity type in contact with the surface of the drift layer and extending from the IGBT element region to the diode element region;
A trench gate electrode group formed from the surface of the semiconductor substrate through the surface layer to the drift layer and repeatedly formed from the IGBT element region to the diode element region;
A semiconductor element comprising a floating layer of a first conductivity type formed at an intermediate depth of the surface layer and formed between adjacent trench gate electrodes. 請求項１の半導体素子と、
前記ＩＧＢＴ素子領域のトレンチゲート電極群と前記ダイオード素子領域のトレンチゲート電極群の両者に電気的に接続されている配線と、
その配線に接続されており、前記ＩＧＢＴ素子領域のトレンチゲート電極群と前記ダイオード素子領域のトレンチゲート電極群の両者に、第１極性と第２極性の間で経時的に反転する電圧を印加するゲート電圧印加回路を備えていることを特徴とする半導体装置。 A semiconductor device according to claim 1;
A wiring electrically connected to both the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region;
A voltage that is connected to the wiring and reverses with time between the first polarity and the second polarity is applied to both the trench gate electrode group in the IGBT element region and the trench gate electrode group in the diode element region. A semiconductor device comprising a gate voltage application circuit. 請求項１の半導体素子又は請求項２の半導体装置を駆動する方法であり、
前記ＩＧＢＴ素子領域をオン状態に切換える際には、少なくとも前記ＩＧＢＴ素子領域のトレンチゲート電極群に第１極性の電圧を印加し、
前記ＩＧＢＴ素子領域をオフ状態に切換える際には、少なくとも前記ダイオード素子領域のトレンチゲート電極群に第２極性の電圧を印加することを特徴とする駆動方法。 A method of driving the semiconductor element of claim 1 or the semiconductor device of claim 2,
When switching the IGBT element region to an ON state, a voltage of the first polarity is applied to at least the trench gate electrode group in the IGBT element region,
A drive method characterized by applying a voltage of the second polarity to at least the trench gate electrode group in the diode element region when the IGBT element region is switched to the off state.
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