JP2009239160A - Plasma cvd device and plasma cvd method - Google Patents

Plasma cvd device and plasma cvd method Download PDF

Info

Publication number
JP2009239160A
JP2009239160A JP2008085853A JP2008085853A JP2009239160A JP 2009239160 A JP2009239160 A JP 2009239160A JP 2008085853 A JP2008085853 A JP 2008085853A JP 2008085853 A JP2008085853 A JP 2008085853A JP 2009239160 A JP2009239160 A JP 2009239160A
Authority
JP
Japan
Prior art keywords
recess
plasma cvd
source gas
discharge electrode
supplying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008085853A
Other languages
Japanese (ja)
Inventor
Tsunenori Komori
常範 小森
Takao Amioka
孝夫 網岡
Keitaro Sakamoto
桂太郎 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toray Industries Inc
Original Assignee
Toray Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Industries Inc filed Critical Toray Industries Inc
Priority to JP2008085853A priority Critical patent/JP2009239160A/en
Publication of JP2009239160A publication Critical patent/JP2009239160A/en
Pending legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma CVD device capable of obtaining a high quality amorphous silicon film having low defects and no contaminating high order silane, and to provide the method of the plasma CVD. <P>SOLUTION: The parallel plate type plasma CVD 1 includes: a vacuum vessel 2; an exhaust system for maintaining a vacuum degree in the vacuum vessel 2; a ground electrode 4 for placing a substrate 5 to be coated with a film; a heating mechanism 7 for heating the substrate 5 to be coated with a film; a discharge electrode 3 capable of supplying a material gas; and a high-frequency power source 9 for applying a high-frequency power to the discharge electrode 3 to generate plasma in the material gas, wherein a recess parts 8 are disposed in the discharge electrode 3 for supplying the material gas in the vacuum vessel 2, and a material gas supply hole is disposed in the wall surface of the recess parts 8 for supplying the material gas in the recess parts, the material gas supply hole being formed so that the material gas is discharged in the recess parts 8 in the direction to the wall surface of the recess parts. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明はプラズマＣＶＤ装置及びプラズマＣＶＤ法に関するものである。特にシリコン薄膜太陽電池や、薄膜トランジスタなどに利用される高品質なアモルファスシリコン薄膜を形成する、ためのプラズマＣＶＤ装置及びプラズマＣＶＤ法に関するものである．   The present invention relates to a plasma CVD apparatus and a plasma CVD method. In particular, the present invention relates to a plasma CVD apparatus and a plasma CVD method for forming high-quality amorphous silicon thin films used for silicon thin film solar cells and thin film transistors.

従来、太陽電池に用いられるようなアモルファスシリコン薄膜を作製するための技術としてプラズマＣＶＤ法が採用されている。このような従来のプラズマＣＶＤ装置を図３に示す．図３に示す従来のプラズマＣＶＤ装置１には真空度を保持する排気系を備えた真空容器２内には放電電極３と、基板を保持する接地電極４が設置されている。接地電極４上には基板５が保持されており、接地電極４の内部には基板を加熱するための加熱機構７が内蔵されている。原料ガスは放電電極３内部へと絶縁物を介しガス供給管１０により供給され、放電電極３の内部を通じシャワープレート１３より、基板５上へ均一に導入される。また放電電極３には高周波電源９が接続されており、排気系により一定の圧力に保持し、放電電極３に高周波電力を印加してプラズマを発生させ、基板表面にアモルファスシリコン薄膜を形成する。   Conventionally, a plasma CVD method has been adopted as a technique for producing an amorphous silicon thin film used in a solar cell. Such a conventional plasma CVD apparatus is shown in FIG. In the conventional plasma CVD apparatus 1 shown in FIG. 3, a discharge electrode 3 and a ground electrode 4 for holding a substrate are installed in a vacuum vessel 2 having an exhaust system for keeping the degree of vacuum. A substrate 5 is held on the ground electrode 4, and a heating mechanism 7 for heating the substrate is built in the ground electrode 4. The source gas is supplied to the inside of the discharge electrode 3 via the insulator through the gas supply pipe 10 and is uniformly introduced onto the substrate 5 from the shower plate 13 through the inside of the discharge electrode 3. A high-frequency power source 9 is connected to the discharge electrode 3, and is maintained at a constant pressure by an exhaust system, and high-frequency power is applied to the discharge electrode 3 to generate plasma, thereby forming an amorphous silicon thin film on the substrate surface.

このようなアモルファスシリコン薄膜の形成に際し、高品質な膜を得るためには、未結合種である欠陥（ダングリングボンド）が少なく、高次シラン（（ＳｉＨ２）ｎ：ｎ＝２〜５）の取り込みを抑制しなければならない。その欠陥を抑制する手段として基板表面温度は２２０℃から２５０℃が好適であるとされている（非特許文献１）。これはこの範囲より低温であると成膜中のアモルファスシリコン薄膜表面での表面反応が抑制され、欠陥の多い膜となってしまい、またこれより高温となると表面からの水素の脱離が発生し欠陥が多くなったり、太陽電池を作製する際に下地へのダメージが問題になったりするからである。またプラズマ中のガス温度も重要な因子である。これはプラズマ中のガス温度が低下すると、高次シランを生成する際に起こる３体反応が促進され膜中への高次シランの取り込みが懸念されるからである（非特許文献２）。この高次シランはアモルファスシリコンの光劣化を引き起こすものとして膜中への取り込みは出来るだけ抑えられなければならない。 In forming such an amorphous silicon thin film, in order to obtain a high quality film, there are few defects (dangling bonds) which are unbonded species, and higher order silane ((SiH 2 ) n: n = 2 to 5). Must be suppressed. A substrate surface temperature of 220 ° C. to 250 ° C. is suitable as a means for suppressing such defects (Non-patent Document 1). If the temperature is lower than this range, the surface reaction on the amorphous silicon thin film surface during film formation is suppressed, resulting in a film having many defects, and if the temperature is higher than this range, desorption of hydrogen from the surface occurs. This is because the number of defects increases or damage to the base becomes a problem when a solar cell is manufactured. The gas temperature in the plasma is also an important factor. This is because when the gas temperature in the plasma is lowered, the three-body reaction that occurs when the higher-order silane is generated is promoted, and there is a concern that higher-order silane is taken into the film (Non-Patent Document 2). Since this higher order silane causes photodegradation of amorphous silicon, the incorporation into the film must be suppressed as much as possible.

このような問題を解決するためにいくつかの手段が提案されている。例えば特許文献１ではプラズマ雰囲気中に導入する反応ガスを加熱し、基板を加熱することにより、基板温度の低下を抑制する方法が開示されている（特許文献１）。さらに電極中に導入するガス温度を変化させることにより、基板の表面温度を制御する手段等が開示されている（特許文献２）。
A.Matsuda et al. Solar Energy Materials & Sollar Cells 78 (2003) 3-26 Madoka Takai et al. APPLIED PHYSICS LETTERS 77 (2000) 2828 特開平８−９１９８７号公報 特開２０００−２７３６３７号公報 Several means have been proposed to solve such problems. For example, Patent Document 1 discloses a method of suppressing a decrease in substrate temperature by heating a reaction gas introduced into a plasma atmosphere and heating the substrate (Patent Document 1). Furthermore, a means for controlling the surface temperature of the substrate by changing the gas temperature introduced into the electrode is disclosed (Patent Document 2).
A. Matsuda et al. Solar Energy Materials & Sollar Cells 78 (2003) 3-26 Madoka Takai et al. APPLIED PHYSICS LETTERS 77 (2000) 2828 JP-A-8-91987 Japanese Patent Laid-Open No. 2000-273737

しかしながら、上記のようにガス加熱を行ったとしても、シャワーヘッド内から真空チャンバ内にガスを導入しようとすると流速は数ｍ／ｓ以上となり、ガス加熱を行おうとしても加熱機構の能力が現実的ではないという問題がある。また基板として一般的に用いられるガラスは熱伝導度の低い材料である。そのため設置する電極を加熱し、ガラス裏面より加熱しても、表面がガスにより冷やされた場合、ガラス表層の温度が下がってしまうことは十分考えられる。またいくら加熱が可能であったとしてもシャワーヘッド内から真空容器内に導入された際に圧力差によって断熱膨張をおこし、周囲の温度を下げてしまうことが予想される。   However, even if gas heating is performed as described above, the flow rate becomes several m / s or more when gas is introduced from the shower head into the vacuum chamber, and the ability of the heating mechanism is real even if gas heating is performed. There is a problem that is not appropriate. Glass generally used as a substrate is a material having low thermal conductivity. Therefore, even if the electrode to be installed is heated and heated from the back surface of the glass, it is considered that the temperature of the glass surface layer is lowered when the surface is cooled by gas. Moreover, no matter how much heating is possible, it is expected that when introduced from the shower head into the vacuum vessel, adiabatic expansion occurs due to the pressure difference, and the ambient temperature is lowered.

本発明は上記のような事情を鑑みてなされたものであり、欠陥が低く、高次シランの混入のない高品質なアモルファスシリコン薄膜を得ることを目的とする。   The present invention has been made in view of the above circumstances, and an object of the present invention is to obtain a high-quality amorphous silicon thin film that has low defects and does not contain higher-order silane.

上記課題を解決するために、本発明のプラズマＣＶＤ装置は、
真空容器と、
該真空容器内の真空度を保持する排気系と、
被成膜基板を置くための接地電極と、
該被成膜基板を加熱するための加熱機構と、
原料ガスを供給可能な放電電極と、
該原料ガスにプラズマを発生させるために該放電電極に高周波電力を印加する高周波電源と、を備えた平行平板型プラズマＣＶＤ装置において、
該放電電極には該真空容器内に原料ガスを供給するための凹部が設けられており、該凹部の壁面には原料ガスを凹部内に供給するための原料ガス供給孔が設けられており、該原料ガス供給孔は原料ガスを該凹部内に凹部の壁面に向けて放出するように形成されていることを特徴とするものである。 In order to solve the above problems, the plasma CVD apparatus of the present invention is:
A vacuum vessel;
An exhaust system for maintaining the degree of vacuum in the vacuum vessel;
A ground electrode for placing a deposition substrate;
A heating mechanism for heating the film formation substrate;
A discharge electrode capable of supplying a source gas;
In a parallel plate type plasma CVD apparatus comprising: a high frequency power source that applies high frequency power to the discharge electrode to generate plasma in the source gas;
The discharge electrode is provided with a recess for supplying the source gas into the vacuum vessel, and the wall surface of the recess is provided with a source gas supply hole for supplying the source gas into the recess, The source gas supply hole is formed so as to discharge the source gas into the recess toward the wall surface of the recess.

また、本発明のプラズマＣＶＤ法は、
真空容器内を真空に保持し、
放電電極から原料ガスを供給し、
放電電極に高周波電力を印加して原料ガスにプラズマを発生させ、
接地電極に置かれて加熱されている被成膜基板に薄膜を形成するプラズマＣＶＤ法において、
該放電電極には該真空容器内に原料ガスを供給するための凹部が設けられており、該凹部の壁面から凹部内に凹部の壁面に向けて原料ガスを放出することを特徴とするものである。 Moreover, the plasma CVD method of the present invention comprises:
Hold the vacuum container in a vacuum,
Supply raw material gas from the discharge electrode,
Apply high frequency power to the discharge electrode to generate plasma in the source gas,
In the plasma CVD method of forming a thin film on a deposition target substrate placed on a ground electrode and heated,
The discharge electrode is provided with a recess for supplying a source gas into the vacuum vessel, and the source gas is discharged from the wall surface of the recess into the recess toward the wall surface of the recess. is there.

本発明によれば、原料ガスが放電電極の凹部内に凹部の壁面に向けて放出されることにより、原料ガス流が直接基板に到達するのを防ぎ、原料ガス流が被成膜基板から熱を奪うことを防ぎ、被成膜基板表面温度の低下を防ぐことができる。その結果、低欠陥密度でかつ、高次シランの混入のない高品質なアモルファスシリコン薄膜を得ることができる。   According to the present invention, the source gas is released into the recess of the discharge electrode toward the wall surface of the recess, thereby preventing the source gas flow from directly reaching the substrate, and the source gas flow is heated from the deposition substrate. Can be prevented, and the surface temperature of the film formation substrate can be prevented from lowering. As a result, it is possible to obtain a high-quality amorphous silicon thin film having a low defect density and free from high-order silane.

以下、本発明をその実施の形態を示す図面を参照して具体的に説明する。   Hereinafter, the present invention will be described in detail with reference to the drawings showing embodiments thereof.

［第一実施の形態］
図１は本発明の第一実施の形態によるプラズマＣＶＤ装置の構成を示す概略図である。本発明のプラズマＣＶＤ装置１には、真空度を保持する排気系を備えた真空容器２と、真空容器２内には放電電極３と、被成膜基板５が置かれる接地電極４が設置されている。被成膜基板５は接地電極４上に動かないように置かれていればよく、例えば接地電極４に座繰りを設けて被成膜基板５をその中に置いたり、別の治具で被成膜基板５を接地電極４に押し付けてもよい。また接地電極４の内部には被成膜基板５を加熱するための加熱機構７が内蔵されている。図１では加熱機構７は接地電極４に内蔵されているが、接地電極を介さずに直接に被成膜基板を加熱する加熱機構を設けてもよい。ただし、真空中では気体を通じた熱伝達が難しいので、加熱機構を設置電極に内蔵するのが効果的な構造である。さらに、放電電極３の内部には放電電極を加熱する加熱機構６が内蔵されていることも好ましい。放電電極３の表面には円筒状の穴が配置され、凹部８を形成している。原料ガスは放電電極３内部へと絶縁物を介しガス供給管１０により供給され、放電電極３の内部を通じ電極表面の凹部８壁面から同じ凹部８内の別の場所の壁面へ向けて放出され、凹部８内つまり真空容器内に導入される。このようにして、原料ガスを放電電極３の凹部８へと導入し、排気系により一定の圧力に保持した後、放電電極３に接続されている高周波電源９により高周波電力を印加してプラズマを発生させ、被成膜基板表面に薄膜を形成する。 [First embodiment]
FIG. 1 is a schematic diagram showing the configuration of a plasma CVD apparatus according to the first embodiment of the present invention. In the plasma CVD apparatus 1 of the present invention, a vacuum vessel 2 having an exhaust system for maintaining a degree of vacuum, a discharge electrode 3 and a ground electrode 4 on which a film formation substrate 5 is placed are installed in the vacuum vessel 2. ing. The film formation substrate 5 may be placed so as not to move on the ground electrode 4. For example, the ground electrode 4 is provided with a countersink, and the film formation substrate 5 is placed in the ground electrode 4. The film formation substrate 5 may be pressed against the ground electrode 4. A heating mechanism 7 for heating the film formation substrate 5 is built in the ground electrode 4. Although the heating mechanism 7 is built in the ground electrode 4 in FIG. 1, a heating mechanism for directly heating the deposition target substrate without using the ground electrode may be provided. However, since heat transfer through gas is difficult in a vacuum, it is effective to incorporate a heating mechanism in the installation electrode. Furthermore, it is also preferable that a heating mechanism 6 for heating the discharge electrode is built in the discharge electrode 3. A cylindrical hole is disposed on the surface of the discharge electrode 3 to form a recess 8. The source gas is supplied to the inside of the discharge electrode 3 through the insulator through the gas supply pipe 10, and is discharged through the inside of the discharge electrode 3 from the wall surface of the recess 8 on the electrode surface toward the wall surface at another location in the same recess 8. It is introduced into the recess 8, that is, into the vacuum vessel. In this way, the raw material gas is introduced into the recess 8 of the discharge electrode 3 and maintained at a constant pressure by the exhaust system, and then high frequency power is applied by the high frequency power source 9 connected to the discharge electrode 3 to generate plasma. And a thin film is formed on the surface of the film formation substrate.

このような構成で薄膜を成膜すると、低温の原料ガスが一旦凹部８内にたまり、被成膜基板に直接噴射されるのが防がれるため、熱導電率の低いガラス基板等であっても表面温度を下げることなく成膜が可能である。その結果、薄膜の成長表面での表面反応が促進され欠陥が少ない膜が得られるものと考えられる。また、凹部８内に原料ガスがたまるので、さらに放電電極３を加熱することで原料ガスを効率的に加熱することが可能である。   When a thin film is formed in such a configuration, a low temperature source gas once accumulates in the recess 8 and is prevented from being directly injected onto the deposition target substrate. However, film formation is possible without lowering the surface temperature. As a result, it is considered that a surface reaction on the growth surface of the thin film is promoted and a film with few defects is obtained. In addition, since the source gas accumulates in the recess 8, the source gas can be efficiently heated by further heating the discharge electrode 3.

凹部８の直径は２ｍｍ以上３０ｍｍ以下が好ましく、さらに好ましくは５ｍｍ以上２０ｍｍ以下であり、放電圧力により凹部８に放電が入り込まない範囲で適宜選択可能である。また凹部８の深さは、凹部８の直径をＤ（ｍｍ）としたときに、Ｄ以上５Ｄ以下であることが好ましい。凹部８深さがＤ以上であれば、導入された原料ガスが凹部内を十分に拡散するので好ましい。凹部８深さが深くても効果の発現上問題はないが電極が大きくなるので、現実的には凹部８深さの上限は５Ｄ程度である。   The diameter of the recess 8 is preferably 2 mm or more and 30 mm or less, more preferably 5 mm or more and 20 mm or less, and can be appropriately selected within a range in which discharge does not enter the recess 8 due to discharge pressure. Moreover, it is preferable that the depth of the recessed part 8 is D or more and 5D or less, when the diameter of the recessed part 8 is set to D (mm). If the depth of the recess 8 is D or more, the introduced source gas is preferably diffused sufficiently in the recess. Even if the depth of the concave portion 8 is deep, there is no problem in the manifestation of the effect, but since the electrode becomes large, the upper limit of the depth of the concave portion 8 is actually about 5D.

［第二実施の形態］
図２は本発明の好ましい第二実施の形態によるプラズマＣＶＤ装置の構成を示す概略図である。本発明の第一実施の形態との違いは、さらに放電電極３の凹部８の開口側に、凹部８の開口の開孔率を制限するものとして貫通孔を有する表面プレート１１を設置した。開孔率を制限する目的としては、凹部へ放電が集中することを防ぐためである。凹部へ放電が集中すると凹部内部での電子温度が上昇し、原料ガスの過剰な分解や、ガス導入穴へ膜が付着してしまう。その結果、被成膜基板上にできる薄膜に特性のムラができてしまう。開孔率に関しては凹部８直径より小さなものであれば制限がないがあまり小さいと基板表面上へ向かう流速が大きくなってしまうため、放電が凹部８に入り込まない範囲で出来るだけ大きなものが良い。このようにして、原料ガスを放電電極３の凹部８の壁面へと導入し、排気系により一定の圧力に保持した後、放電電極３に接続されている高周波電源９により高周波電力を印加してプラズマを発生させ、被成膜基板表面に薄膜を形成する。 [Second Embodiment]
FIG. 2 is a schematic view showing a configuration of a plasma CVD apparatus according to a second preferred embodiment of the present invention. The difference from the first embodiment of the present invention is that a surface plate 11 having a through hole is installed on the opening side of the recess 8 of the discharge electrode 3 to limit the aperture ratio of the opening of the recess 8. The purpose of limiting the open area ratio is to prevent discharge from concentrating on the recess. When the discharge concentrates on the recess, the electron temperature inside the recess increases, and excessive decomposition of the source gas or a film adheres to the gas introduction hole. As a result, the thin film formed on the deposition target substrate has uneven characteristics. The opening ratio is not limited as long as it is smaller than the diameter of the recess 8, but if it is too small, the flow velocity toward the substrate surface increases, so that it should be as large as possible without causing discharge to enter the recess 8. In this way, the source gas is introduced into the wall surface of the recess 8 of the discharge electrode 3 and maintained at a constant pressure by the exhaust system, and then high frequency power is applied by the high frequency power source 9 connected to the discharge electrode 3. Plasma is generated to form a thin film on the surface of the film formation substrate.

また表面プレートに施されている凹部８へのプラズマの進入を防ぐ手段として貫通孔でなく、同様の理由で凹部直径を狭めるためのパンチングプレート状のものでもかまわない。   Further, as a means for preventing the plasma from entering the recess 8 provided on the surface plate, a punching plate for narrowing the recess diameter for the same reason may be used instead of the through hole.

このような構成で薄膜を成膜すると、第一実施形態と同様の優れた薄膜が得られ、さらに凹部への放電の集中を防げるので、凹部の形状自由度も上げることができる。   When a thin film is formed in such a configuration, an excellent thin film similar to that of the first embodiment can be obtained, and further, the concentration of discharge in the concave portion can be prevented, so that the degree of freedom in the shape of the concave portion can be increased.

次に第一実施の形態のプラズマＣＶＤ装置、第二実施の形態のプラズマＣＶＤ装置、従来のプラズマＣＶＤ装置を用いて基板上へアモルファスシリコン薄膜を形成した場合の結果について説明する。欠陥密度は石英上へ成膜したアモルファスシリコン薄膜をＥＳＲを用いて測定した。また高次シランの混入の指標としてシリコン基板に成膜したアモルファスシリコン薄膜をＦＴＩＲを用いて（ＳｉＨ２）密度を測定した。 Next, the results when an amorphous silicon thin film is formed on a substrate using the plasma CVD apparatus of the first embodiment, the plasma CVD apparatus of the second embodiment, and a conventional plasma CVD apparatus will be described. The defect density was measured using ESR on an amorphous silicon thin film formed on quartz. In addition, the density of an amorphous silicon thin film formed on a silicon substrate as an index of the inclusion of higher order silane was measured using FTIR (SiH 2 ).

（実施例１）
図１に示される第一実施形態のプラズマＣＶＤ装置を用いてアモルファスシリコン薄膜を形成した。放電電極３は１５０ｍｍ角、放電電極３と基板５との距離は３０ｍｍとした。放電電極３表面に形成される凹部８の中心の間隔は２０ｍｍとし、６列×６列配置した。凹部８は直径８ｍｍ、深さ２０ｍｍとした。放電電極３および、接地電極４の加熱源の温度は放電電極３を２５０℃、接地電極４が２４０℃とした。放電には６０ＭＨｚの高周波を用い高周波パワー密度０．１Ｗ／ｃｍ２、ＳｉＨ４流量１５ｓｃｃｍ、水素流量５０ｓｃｃｍ、真空容器内の圧力を３０Ｐａとして４０ｍｍ範囲に厚さ４０００Åのアモルファスシリコン薄膜を形成した。このとき得られたアモルファスシリコン薄膜の欠陥密度は５×１０１５ｃｍ−３であり、（ＳｉＨ２）密度は１％以下であった。 Example 1
An amorphous silicon thin film was formed using the plasma CVD apparatus of the first embodiment shown in FIG. The discharge electrode 3 was 150 mm square, and the distance between the discharge electrode 3 and the substrate 5 was 30 mm. The distance between the centers of the recesses 8 formed on the surface of the discharge electrode 3 was 20 mm, and 6 rows × 6 rows were arranged. The concave portion 8 had a diameter of 8 mm and a depth of 20 mm. The temperature of the heat source for the discharge electrode 3 and the ground electrode 4 was 250 ° C. for the discharge electrode 3 and 240 ° C. for the ground electrode 4. A high frequency of 60 MHz was used for discharging, and a high frequency power density of 0.1 W / cm 2 , a SiH 4 flow rate of 15 sccm, a hydrogen flow rate of 50 sccm, a pressure in the vacuum vessel of 30 Pa, and an amorphous silicon thin film having a thickness of 4000 mm in a 40 mm range was formed. The amorphous silicon thin film obtained at this time had a defect density of 5 × 10 15 cm −3 and a (SiH 2 ) density of 1% or less.

（比較例１）
図３に示される従来のプラズマＣＶＤ装置を用いてアモルファスシリコン薄膜を形成した。放電電極３は１５０ｍｍ角、放電電極３と基板５との距離は３０ｍｍとした。放電電極３および、接地電極４の加熱源の温度は放電電極３を２５０℃、接地電極４が２４０℃とした。放電には６０ＭＨｚの高周波を用い高周波パワー密度０．１Ｗ／ｃｍ２、ＳｉＨ４流量１５ｓｃｃｍ、水素流量５０ｓｃｃｍ、真空容器内の圧力を３０Ｐａとして４０ｍｍ範囲に厚さ４０００Åのアモルファスシリコン薄膜を形成した。このとき得られたアモルファスシリコン薄膜の欠陥密度は８×１０１５ｃｍ−３であり、（ＳｉＨ２）密度は４％であった。 (Comparative Example 1)
An amorphous silicon thin film was formed using the conventional plasma CVD apparatus shown in FIG. The discharge electrode 3 was 150 mm square, and the distance between the discharge electrode 3 and the substrate 5 was 30 mm. The temperature of the heat source for the discharge electrode 3 and the ground electrode 4 was 250 ° C. for the discharge electrode 3 and 240 ° C. for the ground electrode 4. A high frequency of 60 MHz was used for discharging, and a high frequency power density of 0.1 W / cm 2 , an SiH 4 flow rate of 15 sccm, a hydrogen flow rate of 50 sccm, a pressure in the vacuum vessel of 30 Pa, and an amorphous silicon thin film having a thickness of 4000 mm in a 40 mm range was formed. The amorphous silicon thin film obtained at this time had a defect density of 8 × 10 15 cm −3 and a (SiH 2 ) density of 4%.

（実施例２）
図２に示される第二実施形態のプラズマＣＶＤ装置を用いてアモルファスシリコン薄膜を形成した。凹部８の開口側に、凹部８の開口の開孔率を制限する直径６ｍｍの貫通孔を有する表面プレートを設置した。真空容器内の圧力を１００Ｐａとし、それ以外の成膜条件は実施例２と同様にしてアモルファスシリコン薄膜の成膜を行った。特定の凹部にプラズマが集中することもなく、均一な放電が確認された。このとき得られたアモルファスシリコン薄膜の欠陥密度は７×１０１５ｃｍ−３であり、（ＳｉＨ２）密度は１％以下であった。 (Example 2)
An amorphous silicon thin film was formed using the plasma CVD apparatus of the second embodiment shown in FIG. On the opening side of the recess 8, a surface plate having a through hole with a diameter of 6 mm that restricts the aperture ratio of the opening of the recess 8 was installed. The pressure in the vacuum vessel was 100 Pa, and the amorphous silicon thin film was formed in the same manner as in Example 2 except for the film formation conditions. Uniform discharge was confirmed without plasma concentrating on the specific recess. The amorphous silicon thin film obtained at this time had a defect density of 7 × 10 15 cm −3 and a (SiH 2 ) density of 1% or less.

（まとめ）
実施例１および比較例１との比較から明らかなように、同一条件で成膜されているのにも関わらず、本発明にかかる第一実施形態に示されるプラズマＣＶＤ装置を用いると、アモルファスシリコン薄膜中の欠陥密度および（ＳｉＨ２）密度が低く抑えられることが分かる。 (Summary)
As is apparent from the comparison with Example 1 and Comparative Example 1, when the plasma CVD apparatus shown in the first embodiment according to the present invention is used, amorphous silicon is formed even though the film is formed under the same conditions. It can be seen that the defect density and (SiH 2 ) density in the thin film can be kept low.

また、実施例２より、本発明にかかる第二実施形態に示されるプラズマＣＶＤ装置においては、真空容器内の圧力を高くした場合においても、均一な放電が得られ、アモルファスシリコン薄膜中の欠陥密度および（ＳｉＨ２）密度が低く抑えられることがわかる。 Further, from Example 2, in the plasma CVD apparatus shown in the second embodiment according to the present invention, even when the pressure in the vacuum vessel is increased, uniform discharge is obtained, and the defect density in the amorphous silicon thin film is obtained. It can be seen that the (SiH 2 ) density can be kept low.

本発明にかかる第一実施形態によるプラズマＣＶＤ装置の構成を示す概略図である。It is the schematic which shows the structure of the plasma CVD apparatus by 1st embodiment concerning this invention. 本発明にかかる第二実施形態によるプラズマＣＶＤ装置の構成を示す概略図である。It is the schematic which shows the structure of the plasma CVD apparatus by 2nd embodiment concerning this invention. 従来のプラズマＣＶＤ装置の構成を示す概略図である。It is the schematic which shows the structure of the conventional plasma CVD apparatus.

符号の説明Explanation of symbols

１ プラズマＣＶＤ装置
２ 真空容器
３ 放電電極
４ 接地電極
５ 基板
６ 放電電極加熱機構
７ 基板加熱機構
８ 放電電極上に設けられた凹部
９ 高周波電源
１０ ガス供給管
１１ 表面プレート
１２ 開口率制御部
１３ シャワープレート DESCRIPTION OF SYMBOLS 1 Plasma CVD apparatus 2 Vacuum vessel 3 Discharge electrode 4 Ground electrode 5 Substrate 6 Discharge electrode heating mechanism 7 Substrate heating mechanism 8 Recess 9 provided on the discharge electrode High frequency power supply 10 Gas supply pipe 11 Surface plate 12 Opening ratio control unit 13 Shower plate

Claims (6)

真空容器と、
該真空容器内の真空度を保持する排気系と、
被成膜基板を置くための接地電極と、
該被成膜基板を加熱するための加熱機構と、
原料ガスを供給可能な放電電極と、
該原料ガスにプラズマを発生させるために該放電電極に高周波電力を印加する高周波電源と、を備えた平行平板型プラズマＣＶＤ装置において、
該放電電極には該真空容器内に原料ガスを供給するための凹部が設けられており、該凹部の壁面には原料ガスを凹部内に供給するための原料ガス供給孔が設けられており、該原料ガス供給孔は原料ガスを該凹部内に凹部の壁面に向けて放出するように形成されているプラズマＣＶＤ装置。 A vacuum vessel;
An exhaust system for maintaining the degree of vacuum in the vacuum vessel;
A ground electrode for placing a deposition substrate;
A heating mechanism for heating the film formation substrate;
A discharge electrode capable of supplying a source gas;
In a parallel plate type plasma CVD apparatus comprising: a high frequency power source that applies high frequency power to the discharge electrode to generate plasma in the source gas;
The discharge electrode is provided with a recess for supplying the source gas into the vacuum vessel, and the wall surface of the recess is provided with a source gas supply hole for supplying the source gas into the recess, The source gas supply hole is a plasma CVD apparatus formed so as to discharge source gas into the recess toward the wall surface of the recess. 前記原料ガスを供給するための凹部の直径をＤ（ｍｍ）、深さをＨ（ｍｍ）としたとき、２ｍｍ≦Ｄ≦３０ｍｍ、かつ、Ｄ≦Ｈ≦５Ｄである請求項１に記載のプラズマＣＶＤ装置。   2. The plasma according to claim 1, wherein a diameter of the recess for supplying the source gas is D (mm) and a depth is H (mm), and 2 mm ≦ D ≦ 30 mm and D ≦ H ≦ 5D. CVD equipment. 前記放電電極に、該放電電極を加熱する加熱機構を有する請求項１又は２に記載のプラズマＣＶＤ装置。   The plasma CVD apparatus according to claim 1, wherein the discharge electrode has a heating mechanism for heating the discharge electrode. 前記原料ガスを供給するための凹部の開口側に、凹部の開口の開孔率を制限するための表面プレートが設けられた請求項１〜３のいずれかに記載のプラズマＣＶＤ装置。   The plasma CVD apparatus according to any one of claims 1 to 3, wherein a surface plate for restricting a hole area ratio of the opening of the recess is provided on an opening side of the recess for supplying the source gas. 真空容器内を真空に保持し、
放電電極から原料ガスを供給し、
放電電極に高周波電力を印加して原料ガスにプラズマを発生させ、
接地電極に置かれて加熱されている被成膜基板に薄膜を形成するプラズマＣＶＤ法において、
該放電電極には該真空容器内に原料ガスを供給するための凹部が設けられており、該凹部の壁面から凹部内に凹部の壁面に向けて原料ガスを放出するプラズマＣＶＤ法。 Hold the vacuum container in a vacuum,
Supply raw material gas from the discharge electrode,
Apply high frequency power to the discharge electrode to generate plasma in the source gas,
In the plasma CVD method of forming a thin film on a deposition target substrate placed on a ground electrode and heated,
A plasma CVD method in which the discharge electrode is provided with a recess for supplying a source gas into the vacuum vessel, and the source gas is discharged from the wall surface of the recess into the recess toward the wall surface of the recess. 請求項５に記載のプラズマＣＶＤ法を用いて製造された薄膜付基板。   A substrate with a thin film manufactured using the plasma CVD method according to claim 5.
JP2008085853A 2008-03-28 2008-03-28 Plasma cvd device and plasma cvd method Pending JP2009239160A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008085853A JP2009239160A (en) 2008-03-28 2008-03-28 Plasma cvd device and plasma cvd method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008085853A JP2009239160A (en) 2008-03-28 2008-03-28 Plasma cvd device and plasma cvd method

Publications (1)

Publication Number Publication Date
JP2009239160A true JP2009239160A (en) 2009-10-15

Family

ID=41252728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008085853A Pending JP2009239160A (en) 2008-03-28 2008-03-28 Plasma cvd device and plasma cvd method

Country Status (1)

Country Link
JP (1) JP2009239160A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011171541A (en) * 2010-02-19 2011-09-01 Toray Eng Co Ltd Cvd apparatus
JP2012253347A (en) * 2011-05-31 2012-12-20 Semes Co Ltd Apparatus for treating substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011171541A (en) * 2010-02-19 2011-09-01 Toray Eng Co Ltd Cvd apparatus
JP2012253347A (en) * 2011-05-31 2012-12-20 Semes Co Ltd Apparatus for treating substrate

Similar Documents

Publication Publication Date Title
US8940625B2 (en) Low temperature polysilicon thin film and manufacturing method thereof
US20050145170A1 (en) Substrate processing apparatus and cleaning method therefor
JP4960134B2 (en) Manufacturing method of multilayer thin film structure based on plasma enhanced chemical vapor deposition
US8431996B2 (en) Plasma processing apparatus and method of producing amorphous silicon thin film using same
US20080226838A1 (en) Plasma CVD apparatus and film deposition method
US10000850B2 (en) Deposition method and method of manufacturing a catalyst wire for a catalytic chemical vapor deposition apparatus
JP5919482B2 (en) Catalytic chemical vapor deposition apparatus, film forming method using the same, and surface treatment method for catalyst body
US7521341B2 (en) Method of direct deposition of polycrystalline silicon
JP2016539514A (en) Adhesion improvement for oxide-silicon stacks
KR101321424B1 (en) Method of surface treatment and thin film growth, and equipment for surface treatment and thin film growth
WO2011132775A1 (en) Method for manufacturing a thin-film solar cell
JP2004095953A (en) Method for forming silicon nitride deposited film
CN101317249B (en) Method of fabricating polycrystalline silicon thin film
JP2009239160A (en) Plasma cvd device and plasma cvd method
JP5105898B2 (en) Silicon thin film deposition method
JP5488051B2 (en) Plasma CVD apparatus and silicon thin film manufacturing method
JP2008177419A (en) Method for forming silicon thin film
JP2006319306A (en) In-situ growth method of polycrystalline thin film
JP2009158504A (en) Apparatus for manufacturing semiconductor and method of manufacturing semiconductor device
JP5862027B2 (en) Plasma CVD apparatus and method for manufacturing thin film substrate
JP2009289782A (en) Plasma cvd device and method for manufacturing thin amorphous silicon film
US9640393B2 (en) Substrate with crystallized silicon film and manufacturing method thereof
JP3259453B2 (en) Electrode used for plasma CVD apparatus and plasma CVD apparatus
JP2005294559A (en) Radical generating method and radical generator, thin film deposition equipment
US20230197447A1 (en) Method and apparatus for forming crystalline silicon film